MIPS: remove empty cpu_mips_irqctrl_init()

cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty.
Attached patch removes it, and its callers.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/hw/mips.h b/hw/mips.h
index 382ea84c61eb62e3db8597de5ce03dca8743fb20..1ebb107dbcf76345c1a7cb4c72210ee5b6c57298 100644 (file)
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -25,7 +25,6 @@ extern void cpu_mips_irq_init_cpu(CPUState *env);
 
 /* mips_timer.c */
 extern void cpu_mips_clock_init(CPUState *);
-extern void cpu_mips_irqctrl_init (void);
 
 /* rc4030.c */
 qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus);

diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 63af965d7c624a4f5e2696afa15f9cbac47c7fb6..d94613c8e725d8986c9a243036c1e9117b322972 100644 (file)
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -878,7 +878,6 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
     /* Init internal devices */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* Interrupt controller */
     /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */

diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 01f4c1b6b2111c2fbd18e90bd5161ccbc3d78cbd..fb56dc5450563e7d6871dc8e343777a003e50a59 100644 (file)
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -165,7 +165,6 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
     /* Init CPU internal devices. */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* Register 64 KB of ISA IO space at 0x1fd00000. */
     isa_mmio_init(0x1fd00000, 0x00010000);

diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index b1551b9827bf5c39fe14f691f02caea16956e948..8b3f4e93a3c4571ce0fc06a794bc8331f2133386 100644 (file)
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -225,7 +225,6 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
     /* Init CPU internal devices */
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
-    cpu_mips_irqctrl_init();
 
     /* The PIC is attached to the MIPS CPU INT0 pin */
     i8259 = i8259_init(env->irq[2]);

diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index 5549e2483a86562cc498893c64a87ba85ef19c50..13217b2da01ff5765200a895bdc82f02a582724d 100644 (file)
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -4,10 +4,6 @@
 
 #define TIMER_FREQ     100 * 1000 * 1000
 
-void cpu_mips_irqctrl_init (void)
-{
-}
-
 /* XXX: do not use a global */
 uint32_t cpu_mips_get_random (CPUState *env)
 {

diff --git a/target-mips/exec.h b/target-mips/exec.h
index 3395da4f4df65199bd4a14691e0e84ad024737c2..de6e6dd103695594e710c46ba11d60077872d78b 100644 (file)
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -33,7 +33,6 @@ void cpu_loop_exit(void);
 void do_raise_exception_err (uint32_t exception, int error_code);
 void do_raise_exception (uint32_t exception);
 
-void cpu_mips_irqctrl_init (void);
 uint32_t cpu_mips_get_random (CPUState *env);
 uint32_t cpu_mips_get_count (CPUState *env);
 void cpu_mips_store_count (CPUState *env, uint32_t value);