- hw-obj-y = usb/ ide/
- hw-obj-y += loader.o
- hw-obj-$(CONFIG_VIRTIO) += virtio-console.o
- hw-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
- hw-obj-y += fw_cfg.o
- hw-obj-$(CONFIG_PCI) += pci.o pci_bridge.o pci_bridge_dev.o
- hw-obj-$(CONFIG_PCI) += msix.o msi.o
- hw-obj-$(CONFIG_PCI) += shpc.o
- hw-obj-$(CONFIG_PCI) += slotid_cap.o
- hw-obj-$(CONFIG_PCI) += pci_host.o pcie_host.o
- hw-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
- hw-obj-y += watchdog.o
- hw-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
- hw-obj-$(CONFIG_ECC) += ecc.o
- hw-obj-$(CONFIG_NAND) += nand.o
- hw-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
- hw-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
-
- hw-obj-$(CONFIG_M48T59) += m48t59.o
- hw-obj-$(CONFIG_ESCC) += escc.o
- hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
-
- hw-obj-$(CONFIG_SERIAL) += serial.o
- hw-obj-$(CONFIG_PARALLEL) += parallel.o
- hw-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
- hw-obj-$(CONFIG_PCSPK) += pcspk.o
- hw-obj-$(CONFIG_PCKBD) += pckbd.o
- hw-obj-$(CONFIG_FDC) += fdc.o
- hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o
- hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o
- hw-obj-$(CONFIG_DMA) += dma.o
- hw-obj-$(CONFIG_I82374) += i82374.o
- hw-obj-$(CONFIG_HPET) += hpet.o
- hw-obj-$(CONFIG_APPLESMC) += applesmc.o
- hw-obj-$(CONFIG_SMARTCARD) += ccid-card-passthru.o
- hw-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
- hw-obj-$(CONFIG_I8259) += i8259_common.o i8259.o
+ # core qdev-related obj files, also used by *-user:
+ hw-core-obj-y += qdev.o qdev-properties.o
+ # irq.o needed for qdev GPIO handling:
+ hw-core-obj-y += irq.o
+
+
+ common-obj-y = usb/ ide/ pci/
+ common-obj-y += loader.o
+ common-obj-$(CONFIG_VIRTIO) += virtio-console.o
+ common-obj-$(CONFIG_VIRTIO) += virtio-rng.o
+ common-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
+ common-obj-y += fw_cfg.o
+ common-obj-$(CONFIG_PCI) += pci_bridge_dev.o
+ common-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
+ common-obj-$(CONFIG_PCI) += i82801b11.o
+ common-obj-y += watchdog.o
+ common-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
+ common-obj-$(CONFIG_ECC) += ecc.o
+ common-obj-$(CONFIG_NAND) += nand.o
+ common-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
+ common-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
+
+ common-obj-$(CONFIG_M48T59) += m48t59.o
+ common-obj-$(CONFIG_ESCC) += escc.o
+ common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
+
+ common-obj-$(CONFIG_SERIAL) += serial.o serial-isa.o
+ common-obj-$(CONFIG_SERIAL_PCI) += serial-pci.o
+ common-obj-$(CONFIG_PARALLEL) += parallel.o
+ common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
+ common-obj-$(CONFIG_PCSPK) += pcspk.o
+ common-obj-$(CONFIG_PCKBD) += pckbd.o
+ common-obj-$(CONFIG_FDC) += fdc.o
+ common-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o acpi_ich9.o smbus_ich9.o
+ common-obj-$(CONFIG_APM) += pm_smbus.o apm.o
+ common-obj-$(CONFIG_DMA) += dma.o
+ common-obj-$(CONFIG_I82374) += i82374.o
+ common-obj-$(CONFIG_HPET) += hpet.o
+ common-obj-$(CONFIG_APPLESMC) += applesmc.o
+ common-obj-$(CONFIG_SMARTCARD) += ccid-card-passthru.o
+ common-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
+ common-obj-$(CONFIG_I8259) += i8259_common.o i8259.o
+ common-obj-y += fifo.o
+ common-obj-y += pam.o
+
+ extra-obj-y += pci/
# PPC devices
- hw-obj-$(CONFIG_PREP_PCI) += prep_pci.o
- hw-obj-$(CONFIG_I82378) += i82378.o
- hw-obj-$(CONFIG_PC87312) += pc87312.o
+ common-obj-$(CONFIG_PREP_PCI) += prep_pci.o
+ common-obj-$(CONFIG_I82378) += i82378.o
++common-obj-$(CONFIG_PC87312) += pc87312.o
# Mac shared devices
- hw-obj-$(CONFIG_MACIO) += macio.o
- hw-obj-$(CONFIG_CUDA) += cuda.o
- hw-obj-$(CONFIG_ADB) += adb.o
- hw-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
- hw-obj-$(CONFIG_MAC_DBDMA) += mac_dbdma.o
+ common-obj-$(CONFIG_MACIO) += macio.o
+ common-obj-$(CONFIG_CUDA) += cuda.o
+ common-obj-$(CONFIG_ADB) += adb.o
+ common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
+ common-obj-$(CONFIG_MAC_DBDMA) += mac_dbdma.o
# OldWorld PowerMac
- hw-obj-$(CONFIG_HEATHROW_PIC) += heathrow_pic.o
- hw-obj-$(CONFIG_GRACKLE_PCI) += grackle_pci.o
+ common-obj-$(CONFIG_HEATHROW_PIC) += heathrow_pic.o
+ common-obj-$(CONFIG_GRACKLE_PCI) += grackle_pci.o
# NewWorld PowerMac
- hw-obj-$(CONFIG_UNIN_PCI) += unin_pci.o
- hw-obj-$(CONFIG_DEC_PCI) += dec_pci.o
+ common-obj-$(CONFIG_UNIN_PCI) += unin_pci.o
+ common-obj-$(CONFIG_DEC_PCI) += dec_pci.o
# PowerPC E500 boards
- hw-obj-$(CONFIG_PPCE500_PCI) += ppce500_pci.o
+ common-obj-$(CONFIG_PPCE500_PCI) += ppce500_pci.o
# MIPS devices
- hw-obj-$(CONFIG_PIIX4) += piix4.o
- hw-obj-$(CONFIG_G364FB) += g364fb.o
- hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
+ common-obj-$(CONFIG_PIIX4) += piix4.o
+ common-obj-$(CONFIG_G364FB) += g364fb.o
+ common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
# Xilinx devices
- hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
- hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
- hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
- hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
- hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
- hw-obj-$(CONFIG_XILINX_AXI) += stream.o
+ common-obj-$(CONFIG_XILINX) += xilinx_intc.o
+ common-obj-$(CONFIG_XILINX) += xilinx_timer.o
+ common-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
+ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
+ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
+ common-obj-$(CONFIG_XILINX_AXI) += stream.o
# PKUnity SoC devices
- hw-obj-$(CONFIG_PUV3) += puv3_intc.o
- hw-obj-$(CONFIG_PUV3) += puv3_ost.o
- hw-obj-$(CONFIG_PUV3) += puv3_gpio.o
- hw-obj-$(CONFIG_PUV3) += puv3_pm.o
- hw-obj-$(CONFIG_PUV3) += puv3_dma.o
+ common-obj-$(CONFIG_PUV3) += puv3_intc.o
+ common-obj-$(CONFIG_PUV3) += puv3_ost.o
+ common-obj-$(CONFIG_PUV3) += puv3_gpio.o
+ common-obj-$(CONFIG_PUV3) += puv3_pm.o
+ common-obj-$(CONFIG_PUV3) += puv3_dma.o
# ARM devices
- hw-obj-$(CONFIG_ARM_TIMER) += arm_timer.o
- hw-obj-$(CONFIG_PL011) += pl011.o
- hw-obj-$(CONFIG_PL022) += pl022.o
- hw-obj-$(CONFIG_PL031) += pl031.o
- hw-obj-$(CONFIG_PL041) += pl041.o lm4549.o
- hw-obj-$(CONFIG_PL050) += pl050.o
- hw-obj-$(CONFIG_PL061) += pl061.o
- hw-obj-$(CONFIG_PL080) += pl080.o
- hw-obj-$(CONFIG_PL110) += pl110.o
- hw-obj-$(CONFIG_PL181) += pl181.o
- hw-obj-$(CONFIG_PL190) += pl190.o
- hw-obj-$(CONFIG_PL310) += arm_l2x0.o
- hw-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
- hw-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
- hw-obj-$(CONFIG_CADENCE) += cadence_uart.o
- hw-obj-$(CONFIG_CADENCE) += cadence_ttc.o
- hw-obj-$(CONFIG_CADENCE) += cadence_gem.o
- hw-obj-$(CONFIG_XGMAC) += xgmac.o
+ common-obj-$(CONFIG_ARM_TIMER) += arm_timer.o
+ common-obj-$(CONFIG_PL011) += pl011.o
+ common-obj-$(CONFIG_PL022) += pl022.o
+ common-obj-$(CONFIG_PL031) += pl031.o
+ common-obj-$(CONFIG_PL041) += pl041.o lm4549.o
+ common-obj-$(CONFIG_PL050) += pl050.o
+ common-obj-$(CONFIG_PL061) += pl061.o
+ common-obj-$(CONFIG_PL080) += pl080.o
+ common-obj-$(CONFIG_PL110) += pl110.o
+ common-obj-$(CONFIG_PL181) += pl181.o
+ common-obj-$(CONFIG_PL190) += pl190.o
+ common-obj-$(CONFIG_PL310) += arm_l2x0.o
+ common-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
+ common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
+ common-obj-$(CONFIG_CADENCE) += cadence_uart.o
+ common-obj-$(CONFIG_CADENCE) += cadence_ttc.o
+ common-obj-$(CONFIG_CADENCE) += cadence_gem.o
+ common-obj-$(CONFIG_XGMAC) += xgmac.o
# PCI watchdog devices
- hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
-
- hw-obj-$(CONFIG_PCI) += pcie.o pcie_aer.o pcie_port.o
+ common-obj-$(CONFIG_PCI) += wdt_i6300esb.o
# PCI network cards
- hw-obj-$(CONFIG_NE2000_PCI) += ne2000.o
- hw-obj-$(CONFIG_EEPRO100_PCI) += eepro100.o
- hw-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o
- hw-obj-$(CONFIG_PCNET_COMMON) += pcnet.o
- hw-obj-$(CONFIG_E1000_PCI) += e1000.o
- hw-obj-$(CONFIG_RTL8139_PCI) += rtl8139.o
-
- hw-obj-$(CONFIG_SMC91C111) += smc91c111.o
- hw-obj-$(CONFIG_LAN9118) += lan9118.o
- hw-obj-$(CONFIG_NE2000_ISA) += ne2000-isa.o
- hw-obj-$(CONFIG_OPENCORES_ETH) += opencores_eth.o
+ common-obj-$(CONFIG_NE2000_PCI) += ne2000.o
+ common-obj-$(CONFIG_EEPRO100_PCI) += eepro100.o
+ common-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o
+ common-obj-$(CONFIG_PCNET_COMMON) += pcnet.o
+ common-obj-$(CONFIG_E1000_PCI) += e1000.o
+ common-obj-$(CONFIG_RTL8139_PCI) += rtl8139.o
+
+ common-obj-$(CONFIG_SMC91C111) += smc91c111.o
+ common-obj-$(CONFIG_LAN9118) += lan9118.o
+ common-obj-$(CONFIG_NE2000_ISA) += ne2000-isa.o
+ common-obj-$(CONFIG_OPENCORES_ETH) += opencores_eth.o
# SCSI layer
- hw-obj-$(CONFIG_LSI_SCSI_PCI) += lsi53c895a.o
- hw-obj-$(CONFIG_MEGASAS_SCSI_PCI) += megasas.o
- hw-obj-$(CONFIG_ESP) += esp.o
- hw-obj-$(CONFIG_ESP_PCI) += esp-pci.o
+ common-obj-$(CONFIG_LSI_SCSI_PCI) += lsi53c895a.o
+ common-obj-$(CONFIG_MEGASAS_SCSI_PCI) += megasas.o
+ common-obj-$(CONFIG_ESP) += esp.o
+ common-obj-$(CONFIG_ESP_PCI) += esp-pci.o
- hw-obj-y += sysbus.o isa-bus.o
- hw-obj-y += qdev-addr.o
+ common-obj-y += sysbus.o isa-bus.o
+ common-obj-y += qdev-addr.o
# VGA
- hw-obj-$(CONFIG_VGA_PCI) += vga-pci.o
- hw-obj-$(CONFIG_VGA_ISA) += vga-isa.o
- hw-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o
- hw-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o
- hw-obj-$(CONFIG_VMMOUSE) += vmmouse.o
- hw-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o
-
- hw-obj-$(CONFIG_RC4030) += rc4030.o
- hw-obj-$(CONFIG_DP8393X) += dp8393x.o
- hw-obj-$(CONFIG_DS1225Y) += ds1225y.o
- hw-obj-$(CONFIG_MIPSNET) += mipsnet.o
+ common-obj-$(CONFIG_VGA_PCI) += vga-pci.o
+ common-obj-$(CONFIG_VGA_ISA) += vga-isa.o
+ common-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o
+ common-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o
+ common-obj-$(CONFIG_VMMOUSE) += vmmouse.o
+ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o
+
+ common-obj-$(CONFIG_RC4030) += rc4030.o
+ common-obj-$(CONFIG_DP8393X) += dp8393x.o
+ common-obj-$(CONFIG_DS1225Y) += ds1225y.o
+ common-obj-$(CONFIG_MIPSNET) += mipsnet.o
+
+ common-obj-y += null-machine.o
# Sound
sound-obj-y =
--- /dev/null
- #include "blockdev.h"
- #include "sysemu.h"
+/*
+ * QEMU National Semiconductor PC87312 (Super I/O)
+ *
+ * Copyright (c) 2010-2012 Herve Poussineau
+ * Copyright (c) 2011-2012 Andreas Färber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "pc87312.h"
++#include "sysemu/blockdev.h"
++#include "sysemu/sysemu.h"
++#include "char/char.h"
+#include "trace.h"
+
+
+#define REG_FER 0
+#define REG_FAR 1
+#define REG_PTR 2
+
+#define FER regs[REG_FER]
+#define FAR regs[REG_FAR]
+#define PTR regs[REG_PTR]
+
+#define FER_PARALLEL_EN 0x01
+#define FER_UART1_EN 0x02
+#define FER_UART2_EN 0x04
+#define FER_FDC_EN 0x08
+#define FER_FDC_4 0x10
+#define FER_FDC_ADDR 0x20
+#define FER_IDE_EN 0x40
+#define FER_IDE_ADDR 0x80
+
+#define FAR_PARALLEL_ADDR 0x03
+#define FAR_UART1_ADDR 0x0C
+#define FAR_UART2_ADDR 0x30
+#define FAR_UART_3_4 0xC0
+
+#define PTR_POWER_DOWN 0x01
+#define PTR_CLOCK_DOWN 0x02
+#define PTR_PWDN 0x04
+#define PTR_IRQ_5_7 0x08
+#define PTR_UART1_TEST 0x10
+#define PTR_UART2_TEST 0x20
+#define PTR_LOCK_CONF 0x40
+#define PTR_EPP_MODE 0x80
+
+
+/* Parallel port */
+
+static inline bool is_parallel_enabled(PC87312State *s)
+{
+ return s->FER & FER_PARALLEL_EN;
+}
+
+static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
+
+static inline uint32_t get_parallel_iobase(PC87312State *s)
+{
+ return parallel_base[s->FAR & FAR_PARALLEL_ADDR];
+}
+
+static const uint32_t parallel_irq[] = { 5, 7, 5, 0 };
+
+static inline uint32_t get_parallel_irq(PC87312State *s)
+{
+ int idx;
+ idx = (s->FAR & FAR_PARALLEL_ADDR);
+ if (idx == 0) {
+ return (s->PTR & PTR_IRQ_5_7) ? 7 : 5;
+ } else {
+ return parallel_irq[idx];
+ }
+}
+
+static inline bool is_parallel_epp(PC87312State *s)
+{
+ return s->PTR & PTR_EPP_MODE;
+}
+
+
+/* UARTs */
+
+static const uint32_t uart_base[2][4] = {
+ { 0x3e8, 0x338, 0x2e8, 0x220 },
+ { 0x2e8, 0x238, 0x2e0, 0x228 }
+};
+
+static inline uint32_t get_uart_iobase(PC87312State *s, int i)
+{
+ int idx;
+ idx = (s->FAR >> (2 * i + 2)) & 0x3;
+ if (idx == 0) {
+ return 0x3f8;
+ } else if (idx == 1) {
+ return 0x2f8;
+ } else {
+ return uart_base[idx & 1][(s->FAR & FAR_UART_3_4) >> 6];
+ }
+}
+
+static inline uint32_t get_uart_irq(PC87312State *s, int i)
+{
+ int idx;
+ idx = (s->FAR >> (2 * i + 2)) & 0x3;
+ return (idx & 1) ? 3 : 4;
+}
+
+static inline bool is_uart_enabled(PC87312State *s, int i)
+{
+ return s->FER & (FER_UART1_EN << i);
+}
+
+
+/* Floppy controller */
+
+static inline bool is_fdc_enabled(PC87312State *s)
+{
+ return s->FER & FER_FDC_EN;
+}
+
+static inline uint32_t get_fdc_iobase(PC87312State *s)
+{
+ return (s->FER & FER_FDC_ADDR) ? 0x370 : 0x3f0;
+}
+
+
+/* IDE controller */
+
+static inline bool is_ide_enabled(PC87312State *s)
+{
+ return s->FER & FER_IDE_EN;
+}
+
+static inline uint32_t get_ide_iobase(PC87312State *s)
+{
+ return (s->FER & FER_IDE_ADDR) ? 0x170 : 0x1f0;
+}
+
+
+static void reconfigure_devices(PC87312State *s)
+{
+ error_report("pc87312: unsupported device reconfiguration (%02x %02x %02x)",
+ s->FER, s->FAR, s->PTR);
+}
+
+static void pc87312_soft_reset(PC87312State *s)
+{
+ static const uint8_t fer_init[] = {
+ 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4b, 0x4b,
+ 0x4b, 0x4b, 0x4b, 0x4b, 0x0f, 0x0f, 0x0f, 0x0f,
+ 0x49, 0x49, 0x49, 0x49, 0x07, 0x07, 0x07, 0x07,
+ 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x08, 0x00,
+ };
+ static const uint8_t far_init[] = {
+ 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x00, 0x01,
+ 0x01, 0x09, 0x08, 0x08, 0x10, 0x11, 0x39, 0x24,
+ 0x00, 0x01, 0x01, 0x00, 0x10, 0x11, 0x39, 0x24,
+ 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x10, 0x10,
+ };
+ static const uint8_t ptr_init[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ };
+
+ s->read_id_step = 0;
+ s->selected_index = REG_FER;
+
+ s->FER = fer_init[s->config & 0x1f];
+ s->FAR = far_init[s->config & 0x1f];
+ s->PTR = ptr_init[s->config & 0x1f];
+}
+
+static void pc87312_hard_reset(PC87312State *s)
+{
+ pc87312_soft_reset(s);
+}
+
+static void pc87312_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+{
+ PC87312State *s = opaque;
+
+ trace_pc87312_io_write(addr, val);
+
+ if ((addr & 1) == 0) {
+ /* Index register */
+ s->read_id_step = 2;
+ s->selected_index = val;
+ } else {
+ /* Data register */
+ if (s->selected_index < 3) {
+ s->regs[s->selected_index] = val;
+ reconfigure_devices(s);
+ }
+ }
+}
+
+static uint32_t pc87312_ioport_read(void *opaque, uint32_t addr)
+{
+ PC87312State *s = opaque;
+ uint32_t val;
+
+ if ((addr & 1) == 0) {
+ /* Index register */
+ if (s->read_id_step++ == 0) {
+ val = 0x88;
+ } else if (s->read_id_step++ == 1) {
+ val = 0;
+ } else {
+ val = s->selected_index;
+ }
+ } else {
+ /* Data register */
+ if (s->selected_index < 3) {
+ val = s->regs[s->selected_index];
+ } else {
+ /* Invalid selected index */
+ val = 0;
+ }
+ }
+
+ trace_pc87312_io_read(addr, val);
+ return val;
+}
+
+static int pc87312_post_load(void *opaque, int version_id)
+{
+ PC87312State *s = opaque;
+
+ reconfigure_devices(s);
+ return 0;
+}
+
+static void pc87312_reset(DeviceState *d)
+{
+ PC87312State *s = PC87312(d);
+
+ pc87312_soft_reset(s);
+}
+
+static int pc87312_init(ISADevice *dev)
+{
+ PC87312State *s;
+ DeviceState *d;
+ ISADevice *isa;
+ ISABus *bus;
+ CharDriverState *chr;
+ DriveInfo *drive;
+ char name[5];
+ int i;
+
+ s = PC87312(dev);
+ bus = isa_bus_from_device(dev);
+ pc87312_hard_reset(s);
+
+ if (is_parallel_enabled(s)) {
+ chr = parallel_hds[0];
+ if (chr == NULL) {
+ chr = qemu_chr_new("par0", "null", NULL);
+ }
+ isa = isa_create(bus, "isa-parallel");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "index", 0);
+ qdev_prop_set_uint32(d, "iobase", get_parallel_iobase(s));
+ qdev_prop_set_uint32(d, "irq", get_parallel_irq(s));
+ qdev_prop_set_chr(d, "chardev", chr);
+ qdev_init_nofail(d);
+ s->parallel.dev = isa;
+ trace_pc87312_info_parallel(get_parallel_iobase(s),
+ get_parallel_irq(s));
+ }
+
+ for (i = 0; i < 2; i++) {
+ if (is_uart_enabled(s, i)) {
+ chr = serial_hds[i];
+ if (chr == NULL) {
+ snprintf(name, sizeof(name), "ser%d", i);
+ chr = qemu_chr_new(name, "null", NULL);
+ }
+ isa = isa_create(bus, "isa-serial");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "index", i);
+ qdev_prop_set_uint32(d, "iobase", get_uart_iobase(s, i));
+ qdev_prop_set_uint32(d, "irq", get_uart_irq(s, i));
+ qdev_prop_set_chr(d, "chardev", chr);
+ qdev_init_nofail(d);
+ s->uart[i].dev = isa;
+ trace_pc87312_info_serial(i, get_uart_iobase(s, i),
+ get_uart_irq(s, i));
+ }
+ }
+
+ if (is_fdc_enabled(s)) {
+ isa = isa_create(bus, "isa-fdc");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "iobase", get_fdc_iobase(s));
+ qdev_prop_set_uint32(d, "irq", 6);
+ drive = drive_get(IF_FLOPPY, 0, 0);
+ if (drive != NULL) {
+ qdev_prop_set_drive_nofail(d, "driveA", drive->bdrv);
+ }
+ drive = drive_get(IF_FLOPPY, 0, 1);
+ if (drive != NULL) {
+ qdev_prop_set_drive_nofail(d, "driveB", drive->bdrv);
+ }
+ qdev_init_nofail(d);
+ s->fdc.dev = isa;
+ trace_pc87312_info_floppy(get_fdc_iobase(s));
+ }
+
+ if (is_ide_enabled(s)) {
+ isa = isa_create(bus, "isa-ide");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "iobase", get_ide_iobase(s));
+ qdev_prop_set_uint32(d, "iobase2", get_ide_iobase(s) + 0x206);
+ qdev_prop_set_uint32(d, "irq", 14);
+ qdev_init_nofail(d);
+ s->ide.dev = isa;
+ trace_pc87312_info_ide(get_ide_iobase(s));
+ }
+
+ register_ioport_write(s->iobase, 2, 1, pc87312_ioport_write, s);
+ register_ioport_read(s->iobase, 2, 1, pc87312_ioport_read, s);
+ return 0;
+}
+
+static const VMStateDescription vmstate_pc87312 = {
+ .name = "pc87312",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .post_load = pc87312_post_load,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(read_id_step, PC87312State),
+ VMSTATE_UINT8(selected_index, PC87312State),
+ VMSTATE_UINT8_ARRAY(regs, PC87312State, 3),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static Property pc87312_properties[] = {
+ DEFINE_PROP_HEX32("iobase", PC87312State, iobase, 0x398),
+ DEFINE_PROP_UINT8("config", PC87312State, config, 1),
+ DEFINE_PROP_END_OF_LIST()
+};
+
+static void pc87312_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
+
+ ic->init = pc87312_init;
+ dc->reset = pc87312_reset;
+ dc->vmsd = &vmstate_pc87312;
+ dc->props = pc87312_properties;
+}
+
+static const TypeInfo pc87312_type_info = {
+ .name = TYPE_PC87312,
+ .parent = TYPE_ISA_DEVICE,
+ .instance_size = sizeof(PC87312State),
+ .class_init = pc87312_class_init,
+};
+
+static void pc87312_register_types(void)
+{
+ type_register_static(&pc87312_type_info);
+}
+
+type_init(pc87312_register_types)