tcg: Move helper registration into tcg_context_init

No longer needs to be done on a per-target basis.

Signed-off-by: Richard Henderson <[email protected]>

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 28ce4363f147a95a20bb8fb9b9585865591ff82f..9cb8084057cf5b433b9f8c3792e70c778e03432f 100644 (file)
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -140,10 +140,6 @@ void alpha_translate_init(void)
                                      offsetof(CPUAlphaState, usp), "usp");
 #endif
 
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
-
     done_init = 1;
 }
 

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 998bde268d9ee775f8f95f9f9c08b5b105f726ea..5f003e785e00a8bebc27baa75f5b809454e26ebc 100644 (file)
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -115,9 +115,6 @@ void arm_translate_init(void)
 #endif
 
     a64_translate_init();
-
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 static inline TCGv_i32 load_cpu_offset(int offset)

diff --git a/target-cris/translate.c b/target-cris/translate.c
index 617e1b4242fa2a65810f27c83df0e82f2e80e5b8..5faa44c1ea6f78d6619b30e5733004567432c136 100644 (file)
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3480,9 +3480,6 @@ void cris_initialize_tcg(void)
 {
     int i;
 
-#define GEN_HELPER 2
-#include "helper.h"
-
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
     cc_x = tcg_global_mem_new(TCG_AREG0,
                               offsetof(CPUCRISState, cc_x), "cc_x");

diff --git a/target-i386/translate.c b/target-i386/translate.c
index be74ebc278908b34477b3582d8ad227fae8e9475..eb0ea93dbbd4aa0bc2c7f337a869f3562254ab66 100644 (file)
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8261,10 +8261,6 @@ void optimize_flags_init(void)
     cpu_regs[R_EDI] = tcg_global_mem_new_i32(TCG_AREG0,
                                              offsetof(CPUX86State, regs[R_EDI]), "edi");
 #endif
-
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 /* generate intermediate code in gen_opc_buf and gen_opparam_buf for

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f31e48d073b32e162530dba93406402474444413..f54b94a53f200b99ebb2a40671023bf06e53c0fe 100644 (file)
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -108,9 +108,6 @@ void m68k_tcg_init(void)
 
     NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL");
     store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL");
-
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 static inline void qemu_assert(int cond, const char *msg)

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 0673176957c7cec5f9b107ed32a6681616c87c35..1b937b3f0d18cf44852d8adec6be94c7bfe17b1b 100644 (file)
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -2024,8 +2024,6 @@ void mb_tcg_init(void)
                           offsetof(CPUMBState, sregs[i]),
                           special_regnames[i]);
     }
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index ad43d591031181c2f0ce1716ab9fcf5eeec47fd8..0d8db668899966337d6b5cbaa47d819308c9935a 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15886,10 +15886,6 @@ void mips_tcg_init(void)
                                        offsetof(CPUMIPSState, active_fpu.fcr31),
                                        "fcr31");
 
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
-
     inited = 1;
 }
 

diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 723b77d3b4913e52cf3fceba3cfeae38ca894cf2..8908a2e32bbf0354141106bad0db6990677aab6a 100644 (file)
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -110,8 +110,6 @@ void openrisc_translate_init(void)
                                       offsetof(CPUOpenRISCState, gpr[i]),
                                       regnames[i]);
     }
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 /* Writeback SR_F transaltion-space to execution-space.  */

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 9c59f69ee1c28d83e44f80dcc31265d88922de36..66c777174c3bbef6d60f08568ba626945e520f1d 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -175,10 +175,6 @@ void ppc_translate_init(void)
     cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0,
                                              offsetof(CPUPPCState, access_type), "access_type");
 
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
-
     done_init = 1;
 }
 

diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index afe90eb8bedd6e8f319768d1722b2698163184c3..bc99a378a72ebe1df04b738794759652b62ddf88 100644 (file)
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -188,10 +188,6 @@ void s390x_translate_init(void)
                                       offsetof(CPUS390XState, fregs[i].d),
                                       cpu_reg_names[i + 16]);
     }
-
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 static TCGv_i64 load_reg(int reg)

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index c06b29f1dcc4ee9247d25e22db00ea2f40884581..2272eb0bebfc130e60ac0eb0d2c027460ce7b3b0 100644 (file)
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -143,10 +143,6 @@ void sh4_translate_init(void)
                                               offsetof(CPUSH4State, fregs[i]),
                                               fregnames[i]);
 
-    /* register helpers */
-#define GEN_HELPER 2
-#include "helper.h"
-
     done_init = 1;
 }
 

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 36615f1979cb0d786180cb524e72322b65661679..dce64c3c4a7ddc31103452a775ca7e3700c79b24 100644 (file)
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5456,11 +5456,6 @@ void gen_intermediate_code_init(CPUSPARCState *env)
                                                 offsetof(CPUSPARCState, fpr[i]),
                                                 fregnames[i]);
         }
-
-        /* register helpers */
-
-#define GEN_HELPER 2
-#include "helper.h"
     }
 }
 

diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 1246895f86bdd504b07992363d3d7d1ca3a081f0..4572890ffa913695caa2c801f372d5002d4be214 100644 (file)
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -74,9 +74,6 @@ void uc32_translate_init(void)
         cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
                                 offsetof(CPUUniCore32State, regs[i]), regnames[i]);
     }
-
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 static int num_temps;

diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 24343bdf60ad9b67408a1e838e80fe2e5e782b65..06641bb7d0d4f0799a8ea679e926f17c6e165208 100644 (file)
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -238,8 +238,6 @@ void xtensa_translate_init(void)
                     uregnames[i].name);
         }
     }
-#define GEN_HELPER 2
-#include "helper.h"
 }
 
 static inline bool option_bits_enabled(DisasContext *dc, uint64_t opt)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 9cd5c38cb32385e430d0377c1eb15445f5ebc830..d3ac5fd9e08807f0f0f6fbab17d25d77628a89bf 100644 (file)
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -254,6 +254,8 @@ void tcg_pool_reset(TCGContext *s)
     s->pool_current = NULL;
 }
 
+#include "helper.h"
+
 void tcg_context_init(TCGContext *s)
 {
     int op, total_args, n;
@@ -284,7 +286,11 @@ void tcg_context_init(TCGContext *s)
         sorted_args += n;
         args_ct += n;
     }
-    
+
+    /* Register helpers.  */
+#define GEN_HELPER 2
+#include "helper.h"
+
     tcg_target_init(s);
 }