Parallel Port Direction Fix

The direction bit in the control register should not be directly

set using PPWCONTROL. The kernel gives the following debug message.

    parport0 (ppdev0): use data_reverse for this!

More over setting the data pins to forward mode does not work,
perhaps a bug in the Linux PP driver. The right way to do this is
to use PPDATADIR to set the direction. The patch checks if the
user is toggling the direction bit, and invokes PPDATADIR to
do the job.

Signed-off-by: Vijay Kumar B <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5063 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/hw/parallel.c b/hw/parallel.c
index 8402eadf9b1b79825d28f4c05c94295c04aca738..66bc715fa49f78019ea06787bf649f1a176235ac 100644 (file)
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -129,6 +129,7 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val)
 {
     ParallelState *s = opaque;
     uint8_t parm = val;
+    int dir;
 
     /* Sometimes programs do several writes for timing purposes on old
        HW. Take care not to waste time on writes that do nothing. */
@@ -154,6 +155,17 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val)
         if (s->control == val)
             return;
         pdebug("wc%02x\n", val);
+
+        if ((val & PARA_CTR_DIR) != (s->control & PARA_CTR_DIR)) {
+            if (val & PARA_CTR_DIR) {
+                dir = 1;
+            } else {
+                dir = 0;
+            }
+            qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_DATA_DIR, &dir);
+            parm &= ~PARA_CTR_DIR;
+        }
+
         qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_CONTROL, &parm);
         s->control = val;
         break;

diff --git a/qemu-char.h b/qemu-char.h
index 2746472d58a0df633a60bbbf7838ac37170fda48..c01e590e5436580b24303cb1d6ff47a9e873f452 100644 (file)
--- a/qemu-char.h
+++ b/qemu-char.h
@@ -27,6 +27,7 @@ typedef struct {
 #define CHR_IOCTL_PP_EPP_READ         9
 #define CHR_IOCTL_PP_EPP_WRITE_ADDR  10
 #define CHR_IOCTL_PP_EPP_WRITE       11
+#define CHR_IOCTL_PP_DATA_DIR        12
 
 #define CHR_IOCTL_SERIAL_SET_TIOCM   12
 #define CHR_IOCTL_SERIAL_GET_TIOCM   13

diff --git a/vl.c b/vl.c
index ac63b640692adefa3ec7f36a8926b55b7f7e51f5..7ca8420f048a535e84bd1ac045770a76768dd3a5 100644 (file)
--- a/vl.c
+++ b/vl.c
@@ -2835,6 +2835,10 @@ static int pp_ioctl(CharDriverState *chr, int cmd, void *arg)
             return -ENOTSUP;
         *(uint8_t *)arg = b;
         break;
+    case CHR_IOCTL_PP_DATA_DIR:
+        if (ioctl(fd, PPDATADIR, (int *)arg) < 0)
+            return -ENOTSUP;
+        break;
     case CHR_IOCTL_PP_EPP_READ_ADDR:
        if (pp_hw_mode(drv, IEEE1284_MODE_EPP|IEEE1284_ADDR)) {
            struct ParallelIOArg *parg = arg;