]> Git Repo - qemu.git/commitdiff
hw/isa/piix3: Add size constraints to rcr_ops
authorBernhard Beschow <[email protected]>
Sat, 22 Oct 2022 15:04:29 +0000 (17:04 +0200)
committerPhilippe Mathieu-Daudé <[email protected]>
Mon, 31 Oct 2022 10:32:07 +0000 (11:32 +0100)
According to the PIIX3 datasheet, the reset control register is one byte in size.
Moreover, PIIX4 has it, so add it to PIIX3 as well.

Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <20221022150508[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
hw/isa/piix3.c

index 04895ce2e54a34bcbabb4e1090515eef2808d1cc..72dbf688d967cd7b6680c9f40fc694b235633c74 100644 (file)
@@ -290,7 +290,11 @@ static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len)
 static const MemoryRegionOps rcr_ops = {
     .read = rcr_read,
     .write = rcr_write,
-    .endianness = DEVICE_LITTLE_ENDIAN
+    .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
 };
 
 static void pci_piix3_realize(PCIDevice *dev, Error **errp)
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