]> Git Repo - qemu.git/commitdiff
target/arm: Treat SCTLR_EL1.M as if it were zero when HCR_EL2.TGE is set
authorPeter Maydell <[email protected]>
Tue, 14 Aug 2018 16:17:21 +0000 (17:17 +0100)
committerPeter Maydell <[email protected]>
Tue, 14 Aug 2018 16:17:21 +0000 (17:17 +0100)
One of the required effects of setting HCR_EL2.TGE is that when
SCR_EL3.NS is 1 then SCTLR_EL1.M must behave as if it is zero for
all purposes except direct reads. That is, it effectively disables
the MMU for the NS EL0/EL1 translation regime.

Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: 20180724115950[email protected]

target/arm/helper.c

index 7b438e43a906f01d5582f36a153e55380692ce2d..62f63e4e5b9b99c03e8e7ec34ed3f64944ef11f3 100644 (file)
@@ -8396,6 +8396,14 @@ static inline bool regime_translation_disabled(CPUARMState *env,
     if (mmu_idx == ARMMMUIdx_S2NS) {
         return (env->cp15.hcr_el2 & HCR_VM) == 0;
     }
+
+    if (env->cp15.hcr_el2 & HCR_TGE) {
+        /* TGE means that NS EL0/1 act as if SCTLR_EL1.M is zero */
+        if (!regime_is_secure(env, mmu_idx) && regime_el(env, mmu_idx) == 1) {
+            return true;
+        }
+    }
+
     return (regime_sctlr(env, mmu_idx) & SCTLR_M) == 0;
 }
 
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