target-arm: Reinsert missing return statement in ARM mode SRS decode

Since patch
   81465888c5306cd94abb9847e560796fd13d3c2f
   target-arm: factor out handling of SRS instruction
the ARM mode SRS instruction has not worked in QEMU.

The problem is a missing return directive that was removed in the
refactoring, so after decoding the instruction, qemu would fall through
to generate an UNDEF exception for an illegal instruction.

Signed-off-by: Peter Chubb <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 35a21be931c85e4df04813ca87a2fa55cf8b6ffa..a1b7b8c1a8fc07d68b4413d9076839c6d8fc7765 100644 (file)
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6762,6 +6762,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
             }
             ARCH(6);
             gen_srs(s, (insn & 0x1f), (insn >> 23) & 3, insn & (1 << 21));
+            return;
         } else if ((insn & 0x0e50ffe0) == 0x08100a00) {
             /* rfe */
             int32_t offset;