}
}
#else
- qemu_chr_write(s->chr, buf, len);
+ qemu_chr_fe_write(s->chr, buf, len);
#endif
}
scr_msg_header.type = htonl(type);
scr_msg_header.reader_id = htonl(reader_id);
scr_msg_header.length = htonl(length);
- qemu_chr_write(s->cs, (uint8_t *)&scr_msg_header, sizeof(VSCMsgHeader));
- qemu_chr_write(s->cs, payload, length);
+ qemu_chr_fe_write(s->cs, (uint8_t *)&scr_msg_header, sizeof(VSCMsgHeader));
+ qemu_chr_fe_write(s->cs, payload, length);
}
static void ccid_card_vscard_send_apdu(PassthruState *s,
printf("debugcon: write addr=0x%04x val=0x%02x\n", addr, val);
#endif
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
}
s->tx = val;
if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled
if (s->chr)
- qemu_chr_write(s->chr, &s->tx, 1);
+ qemu_chr_fe_write(s->chr, &s->tx, 1);
else if (s->type == kbd && !s->disabled) {
handle_kbd_command(s, val);
}
switch (addr)
{
case RW_DOUT:
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
s->regs[R_INTR] |= 3;
s->pending_tx = 1;
s->regs[addr] = value;
switch (addr) {
case DATA_OFFSET:
c = value & 0xFF;
- qemu_chr_write(uart->chr, &c, 1);
+ qemu_chr_fe_write(uart->chr, &c, 1);
return;
case STATUS_OFFSET:
s->jtx = jtx;
if (s->chr) {
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
}
}
switch (addr) {
case R_RXTX:
if (s->chr) {
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
}
break;
case R_IER:
{
if (s->tx_enabled && (s->sr & MCF_UART_TxEMP) == 0) {
if (s->chr)
- qemu_chr_write(s->chr, (unsigned char *)&s->tb, 1);
+ qemu_chr_fe_write(s->chr, (unsigned char *)&s->tb, 1);
s->sr |= MCF_UART_TxEMP;
}
if (s->tx_enabled) {
switch (addr) {
case R_RXTX:
if (s->chr) {
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
}
trace_milkymist_uart_pulse_irq_tx();
qemu_irq_pulse(s->tx_irq);
if (ch == STI_TRACE_CONTROL_CHANNEL) {
/* Flush channel <i>value</i>. */
- qemu_chr_write(s->chr, (const uint8_t *) "\r", 1);
+ qemu_chr_fe_write(s->chr, (const uint8_t *) "\r", 1);
} else if (ch == STI_TRACE_CONSOLE_CHANNEL || 1) {
if (value == 0xc0 || value == 0xc3) {
/* Open channel <i>ch</i>. */
} else if (value == 0x00)
- qemu_chr_write(s->chr, (const uint8_t *) "\n", 1);
+ qemu_chr_fe_write(s->chr, (const uint8_t *) "\n", 1);
else
- qemu_chr_write(s->chr, &byte, 1);
+ qemu_chr_fe_write(s->chr, &byte, 1);
}
}
if (val & PARA_CTR_STROBE) {
s->status &= ~PARA_STS_BUSY;
if ((s->control & PARA_CTR_STROBE) == 0)
- qemu_chr_write(s->chr, &s->dataw, 1);
+ qemu_chr_fe_write(s->chr, &s->dataw, 1);
} else {
if (s->control & PARA_CTR_INTEN) {
s->irq_pending = 1;
/* ??? Check if transmitter is enabled. */
ch = value;
if (s->chr)
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
s->int_level |= PL011_INT_TX;
pl011_update(s);
break;
else
ch = ~value;
if (s->chr && s->enable && (s->control[0] & (1 << 3))) /* TXE */
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
break;
case ICSR0:
s->status[0] &= ~(value & 0x66);
if (s->mcr & UART_MCR_LOOP) {
/* in loopback mode, say that we just received a char */
serial_receive1(s, &s->tsr, 1);
- } else if (qemu_chr_write(s->chr, &s->tsr, 1) != 1) {
+ } else if (qemu_chr_fe_write(s->chr, &s->tsr, 1) != 1) {
if ((s->tsr_retry > 0) && (s->tsr_retry <= MAX_XMIT_RETRY)) {
s->tsr_retry++;
qemu_mod_timer(s->transmit_timer, new_xmit_ts + s->char_transmit_time);
case 0x0c: /* FTDR / TDR */
if (s->chr) {
ch = val;
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
}
s->dr = val;
s->flags &= ~SH_SERIAL_FLAG_TDE;
{
VIOsPAPRVTYDevice *dev = (VIOsPAPRVTYDevice *)sdev;
- /* FIXME: should check the qemu_chr_write() return value */
- qemu_chr_write(dev->chardev, buf, len);
+ /* FIXME: should check the qemu_chr_fe_write() return value */
+ qemu_chr_fe_write(dev->chardev, buf, len);
}
static int spapr_vty_init(VIOsPAPRDevice *sdev)
if (s->utcr3 & UTCR3_LBM) /* loopback */ {
strongarm_uart_receive(s, &s->tx_fifo[s->tx_start], 1);
} else if (s->chr) {
- qemu_chr_write(s->chr, &s->tx_fifo[s->tx_start], 1);
+ qemu_chr_fe_write(s->chr, &s->tx_fifo[s->tx_start], 1);
}
s->tx_start = (s->tx_start + 1) % 8;
/* optimize later. Now, 1 byte per iteration */
while (count--) {
cpu_physical_memory_read(s->dma_tx_ptr, &ch, 1);
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
s->dma_tx_ptr++;
}
} else {
case SERIAL_DATA:
ch = value;
if (s->chr)
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
break;
case SERIAL_INT_ENABLE:
s->int_enable = value;
goto fail;
for (i = 0; i < p->iov.niov; i++) {
iov = p->iov.iov + i;
- qemu_chr_write(s->cs, iov->iov_base, iov->iov_len);
+ qemu_chr_fe_write(s->cs, iov->iov_base, iov->iov_len);
}
break;
VirtConsole *vcon = DO_UPCAST(VirtConsole, port, port);
ssize_t ret;
- ret = qemu_chr_write(vcon->chr, buf, len);
+ ret = qemu_chr_fe_write(vcon->chr, buf, len);
trace_virtio_console_flush_buf(port->id, len, ret);
if (ret < 0) {
size = con->buffer.size - con->buffer.consumed;
if (con->chr)
- len = qemu_chr_write(con->chr, con->buffer.data + con->buffer.consumed,
+ len = qemu_chr_fe_write(con->chr, con->buffer.data + con->buffer.consumed,
size);
else
len = size;
case R_TX:
if (s->chr)
- qemu_chr_write(s->chr, &ch, 1);
+ qemu_chr_fe_write(s->chr, &ch, 1);
s->regs[addr] = value;
void monitor_flush(Monitor *mon)
{
if (mon && mon->outbuf_index != 0 && !mon->mux_out) {
- qemu_chr_write(mon->chr, mon->outbuf, mon->outbuf_index);
+ qemu_chr_fe_write(mon->chr, mon->outbuf, mon->outbuf_index);
mon->outbuf_index = 0;
}
}
}
}
-int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len)
+int qemu_chr_fe_write(CharDriverState *s, const uint8_t *buf, int len)
{
return s->chr_write(s, buf, len);
}
va_list ap;
va_start(ap, fmt);
vsnprintf(buf, sizeof(buf), fmt, ap);
- qemu_chr_write(s, (uint8_t *)buf, strlen(buf));
+ qemu_chr_fe_write(s, (uint8_t *)buf, strlen(buf));
va_end(ap);
}
void qemu_chr_close(CharDriverState *chr);
void qemu_chr_printf(CharDriverState *s, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);
-int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
+int qemu_chr_fe_write(CharDriverState *s, const uint8_t *buf, int len);
void qemu_chr_send_event(CharDriverState *s, int event);
void qemu_chr_add_handlers(CharDriverState *s,
IOCanReadHandler *fd_can_read,
ssize_t slirp_send(struct socket *so, const void *buf, size_t len, int flags)
{
if (so->s == -1 && so->extra) {
- qemu_chr_write(so->extra, buf, len);
+ qemu_chr_fe_write(so->extra, buf, len);
return len;
}
{
USBRedirDevice *dev = priv;
- return qemu_chr_write(dev->cs, data, count);
+ return qemu_chr_fe_write(dev->cs, data, count);
}
/*