s->vram_size_mb);
return;
}
- vga_common_init(s, OBJECT(dev), true);
+ s->global_vmstate = true;
+ vga_common_init(s, OBJECT(dev));
cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0,
isa_address_space(isadev),
isa_address_space_io(isadev));
DEFINE_PROP_UINT32("vgamem_mb", struct ISACirrusVGAState,
cirrus_vga.vga.vram_size_mb, 4),
DEFINE_PROP_BOOL("blitter", struct ISACirrusVGAState,
- cirrus_vga.enable_blitter, true),
+ cirrus_vga.enable_blitter, true),
DEFINE_PROP_END_OF_LIST(),
};
return;
}
/* setup VGA */
- vga_common_init(&s->vga, OBJECT(dev), true);
+ vga_common_init(&s->vga, OBJECT(dev));
cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga);
cirrus_vga.vga.vram_size_mb, 4),
DEFINE_PROP_BOOL("blitter", struct PCICirrusVGAState,
cirrus_vga.enable_blitter, true),
+ DEFINE_PROP_BOOL("global-vmstate", struct PCICirrusVGAState,
+ cirrus_vga.vga.global_vmstate, false),
DEFINE_PROP_END_OF_LIST(),
};
qxl_init_ramsize(qxl);
vga->vbe_size = qxl->vgamem_size;
vga->vram_size_mb = qxl->vga.vram_size >> 20;
- vga_common_init(vga, OBJECT(dev), true);
+ vga_common_init(vga, OBJECT(dev));
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
portio_list_init(&qxl->vga_port_list, OBJECT(dev), qxl_vga_portio_list,
#endif
DEFINE_PROP_UINT32("xres", PCIQXLDevice, xres, 0),
DEFINE_PROP_UINT32("yres", PCIQXLDevice, yres, 0),
+ DEFINE_PROP_BOOL("global-vmstate", PCIQXLDevice, vga.global_vmstate, false),
DEFINE_PROP_END_OF_LIST(),
};
s = g_malloc0(sizeof(*s));
s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
- vga_common_init(&s->vga, NULL, true);
+ s->vga.global_vmstate = true;
+ vga_common_init(&s->vga, NULL);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s);
MemoryRegion *vga_io_memory;
const MemoryRegionPortio *vga_ports, *vbe_ports;
- vga_common_init(s, OBJECT(dev), true);
+ s->global_vmstate = true;
+ vga_common_init(s, OBJECT(dev));
s->legacy_address_space = isa_address_space(isadev);
vga_io_memory = vga_init_io(s, OBJECT(dev), &vga_ports, &vbe_ports);
isa_register_portio_list(isadev, &d->portio_vga,
bool qext = false;
/* vga + console init */
- vga_common_init(s, OBJECT(dev), true);
+ vga_common_init(s, OBJECT(dev));
vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev),
true);
bool qext = false;
/* vga + console init */
- vga_common_init(s, OBJECT(dev), false);
+ vga_common_init(s, OBJECT(dev));
s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s);
/* mmio bar */
DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true),
DEFINE_PROP_BIT("qemu-extended-regs",
PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true),
+ DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false),
DEFINE_PROP_END_OF_LIST(),
};
return val;
}
-void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate)
+void vga_common_init(VGACommonState *s, Object *obj)
{
int i, j, v, b;
s->is_vbe_vmstate = 1;
memory_region_init_ram_nomigrate(&s->vram, obj, "vga.vram", s->vram_size,
&error_fatal);
- vmstate_register_ram(&s->vram, global_vmstate ? NULL : DEVICE(obj));
+ vmstate_register_ram(&s->vram, s->global_vmstate ? NULL : DEVICE(obj));
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
s->get_bpp = vga_get_bpp;
bool full_update_gfx;
bool big_endian_fb;
bool default_endian_fb;
+ bool global_vmstate;
/* hardware mouse cursor support */
uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
uint32_t hw_cursor_x;
return (v << 2) | (b << 1) | b;
}
-void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate);
+void vga_common_init(VGACommonState *s, Object *obj);
void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
/* init vga compat bits */
vga->vram_size_mb = 8;
- vga_common_init(vga, OBJECT(vpci_dev), false);
+ vga_common_init(vga, OBJECT(vpci_dev));
vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
pci_address_space_io(&vpci_dev->pci_dev), true);
pci_register_bar(&vpci_dev->pci_dev, 0,
&error_fatal);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
- vga_common_init(&s->vga, OBJECT(dev), true);
+ vga_common_init(&s->vga, OBJECT(dev));
vga_init(&s->vga, OBJECT(dev), address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
s->new_depth = 32;
static Property vga_vmware_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s,
chip.vga.vram_size_mb, 16),
+ DEFINE_PROP_BOOL("global-vmstate", struct pci_vmsvga_state_s,
+ chip.vga.global_vmstate, false),
DEFINE_PROP_END_OF_LIST(),
};
.driver = "hda-audio",\
.property = "use-timer",\
.value = "false",\
+ },{\
+ .driver = "cirrus-vga",\
+ .property = "global-vmstate",\
+ .value = "true",\
+ },{\
+ .driver = "VGA",\
+ .property = "global-vmstate",\
+ .value = "true",\
+ },{\
+ .driver = "vmware-svga",\
+ .property = "global-vmstate",\
+ .value = "true",\
+ },{\
+ .driver = "qxl-vga",\
+ .property = "global-vmstate",\
+ .value = "true",\
},
#define HW_COMPAT_2_11 \