register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
- vga_initialize(ds, phys_ram_base + ram_size, ram_size,
- vga_ram_size, pci_enabled);
+ if (cirrus_vga_enabled) {
+ if (pci_enabled) {
+ pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
+ vga_ram_size);
+ } else {
+ isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
+ vga_ram_size);
+ }
+ } else {
+ vga_initialize(ds, phys_ram_base + ram_size, ram_size,
+ vga_ram_size, pci_enabled);
+ }
rtc_state = rtc_init(0x70, 8);
register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
int pci_enabled = 0;
int prep_enabled = 0;
int rtc_utc = 1;
+int cirrus_vga_enabled = 0;
/***********************************************************/
/* x86 ISA bus support */
QEMU_OPTION_pci,
QEMU_OPTION_prep,
QEMU_OPTION_localtime,
+ QEMU_OPTION_cirrusvga,
};
typedef struct QEMUOption {
{ "hdachs", HAS_ARG, QEMU_OPTION_hdachs },
{ "L", HAS_ARG, QEMU_OPTION_L },
{ "no-code-copy", 0, QEMU_OPTION_no_code_copy },
-
- /* temporary options */
- { "pci", 0, QEMU_OPTION_pci },
#ifdef TARGET_PPC
{ "prep", 0, QEMU_OPTION_prep },
#endif
{ "localtime", 0, QEMU_OPTION_localtime },
+
+ /* temporary options */
+ { "pci", 0, QEMU_OPTION_pci },
+ { "cirrusvga", 0, QEMU_OPTION_cirrusvga },
{ NULL },
};
case QEMU_OPTION_localtime:
rtc_utc = 0;
break;
+ case QEMU_OPTION_cirrusvga:
+ cirrus_vga_enabled = 1;
+ break;
}
}
}