build: get dependency file directories from object file names

After commit dcff25f2cd8c11a9368cc2369aeb0319c32d9e26, Dependency file
are taken from the directories that have a Makefile.objs file.  This is
not enough, since files can be included from other directories.
So, pick them from directories that have an object file in them.

Signed-off-by: Paolo Bonzini <[email protected]>
Signed-off-by: Blue Swirl <[email protected]>

diff --git a/Makefile b/Makefile
index a20050346aeac243fb3cc0d2de7e4d7ad05460e4..a1195ffa77da4ac844b4fc3fdb729adca7b19cae 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -403,5 +403,5 @@ qemu-doc.dvi qemu-doc.html qemu-doc.info qemu-doc.pdf: \
 Makefile: $(GENERATED_HEADERS)
 
 # Include automatically generated dependency files
-# All subdir dependencies come automatically from our recursive subdir rules
--include $(wildcard *.d)
+# Dependencies in Makefile.objs files come from our recursive subdir rules
+-include $(wildcard *.d tests/*.d)

diff --git a/Makefile.dis b/Makefile.dis
index 09060f0a1aa74f6926a706ce8c27b2342007b7ab..2cfec6a3588870067f081fafaac9e7037643f756 100644 (file)
--- a/Makefile.dis
+++ b/Makefile.dis
@@ -18,6 +18,3 @@ all: $(libdis-y)
 
 clean:
        rm -f *.o *.d *.a *~
-
-# Include automatically generated dependency files
--include $(wildcard *.d)

diff --git a/Makefile.hw b/Makefile.hw
index 28fe100fbe331f7fec5efb3a80e2acfc5ed33005..59f5b4835040bd269fb4c41c9f04f99dfa77cea5 100644 (file)
--- a/Makefile.hw
+++ b/Makefile.hw
@@ -21,6 +21,3 @@ all: $(hw-obj-y)
 clean:
        rm -f $(addsuffix *.o, $(sort $(dir $(hw-obj-y))))
        rm -f $(addsuffix *.d, $(sort $(dir $(hw-obj-y))))
-
-# Include automatically generated dependency files
--include $(patsubst %.o, %.d, $(hw-obj-y))

diff --git a/Makefile.target b/Makefile.target
index 74f7a4a1706cd51caa3c0c7216a4b3e013937627..7892a8df6347fe2acfe71c9fe8e6eed27a940bf5 100644 (file)
--- a/Makefile.target
+++ b/Makefile.target
@@ -214,6 +214,3 @@ endif
 
 GENERATED_HEADERS += config-target.h
 Makefile: $(GENERATED_HEADERS)
-
-# Include automatically generated dependency files
--include $(wildcard *.d fpu/*.d tcg/*.d)

diff --git a/Makefile.user b/Makefile.user
index 1783b2a2572e8f286d29edb3cc5dc8c6d5b0199e..9302d33245a495bdb70e1d20da598d7803923d42 100644 (file)
--- a/Makefile.user
+++ b/Makefile.user
@@ -22,6 +22,3 @@ clean:
        for d in . trace; do \
        rm -f $$d/*.o $$d/*.d $$d/*.a $$d/*~; \
        done
-
-# Include automatically generated dependency files
--include $(wildcard *.d)

diff --git a/rules.mak b/rules.mak
index 60f3e96541fc6f0763d6a0080ef63fa3e89c459c..a28494679a6dd9e07cd6f1ffc1fe78ae92585c83 100644 (file)
--- a/rules.mak
+++ b/rules.mak
@@ -94,7 +94,6 @@ define unnest-dir
 $(foreach var,$(nested-vars),$(call push-var,$(var),$1/))
 $(eval obj := $(obj)/$1)
 $(eval include $(SRC_PATH)/$1/Makefile.objs)
-$(eval -include $(wildcard $1/*.d))
 $(eval obj := $(patsubst %/$1,%,$(obj)))
 $(foreach var,$(nested-vars),$(call pop-var,$(var),$1/))
 endef
@@ -113,4 +112,6 @@ define unnest-vars
 $(call unnest-vars-1)
 $(foreach var,$(nested-vars),$(eval $(var) := $(filter-out %/, $($(var)))))
 $(shell mkdir -p $(sort $(foreach var,$(nested-vars),$(dir $($(var))))))
+$(foreach var,$(nested-vars), $(eval \
+  -include $(addsuffix *.d, $(sort $(dir $($(var)))))))
 endef