target_phys_addr_t start_addr = section->offset_within_address_space;
ram_addr_t size = section->size;
target_phys_addr_t addr, end_addr;
- CPUState *env;
ram_addr_t orig_size = size;
subpage_t *subpage;
uint16_t section_index = phys_section_add(section);
}
addr += TARGET_PAGE_SIZE;
} while (addr != end_addr);
-
- /* since each CPU stores ram addresses in its TLB cache, we must
- reset the modified entries */
- /* XXX: slow ! */
- for(env = first_cpu; env != NULL; env = env->next_cpu) {
- tlb_flush(env, 1);
- }
}
void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size)
static void core_commit(MemoryListener *listener)
{
+ CPUState *env;
+
+ /* since each CPU stores ram addresses in its TLB cache, we must
+ reset the modified entries */
+ /* XXX: slow ! */
+ for(env = first_cpu; env != NULL; env = env->next_cpu) {
+ tlb_flush(env, 1);
+ }
}
static void core_region_add(MemoryListener *listener,