#define DMA_REGS 4
#define DMA_SIZE (4 * sizeof(uint32_t))
+/* We need the mask, because one instance of the device is not page
+ aligned (ledma, start address 0x0010) */
+#define DMA_MASK (DMA_SIZE - 1)
#define DMA_VER 0xa0000000
#define DMA_INTR 1
DMAState *s = opaque;
uint32_t saddr;
- saddr = addr >> 2;
+ saddr = (addr & DMA_MASK) >> 2;
DPRINTF("read dmareg " TARGET_FMT_plx ": 0x%8.8x\n", addr,
s->dmaregs[saddr]);
DMAState *s = opaque;
uint32_t saddr;
- saddr = addr >> 2;
+ saddr = (addr & DMA_MASK) >> 2;
DPRINTF("write dmareg " TARGET_FMT_plx ": 0x%8.8x -> 0x%8.8x\n", addr,
s->dmaregs[saddr], val);
switch (saddr) {