*edx = 0;
break;
case 0x8000001F:
- *eax = sev_enabled() ? 0x2 : 0;
- *eax |= sev_es_enabled() ? 0x8 : 0;
- *ebx = sev_get_cbit_position();
- *ebx |= sev_get_reduced_phys_bits() << 6;
- *ecx = 0;
- *edx = 0;
+ *eax = *ebx = *ecx = *edx = 0;
+ if (sev_enabled()) {
+ *eax = 0x2;
+ *eax |= sev_es_enabled() ? 0x8 : 0;
+ *ebx = sev_get_cbit_position();
+ *ebx |= sev_get_reduced_phys_bits() << 6;
+ }
break;
default:
/* reserved values: zero */
'xsave_helper.c',
'cpu-dump.c',
))
-i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c'), if_false: files('sev-stub.c'))
+i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c'))
# x86 cpu type
i386_ss.add(when: 'CONFIG_KVM', if_true: files('host-cpu.c'))
+++ /dev/null
-/*
- * QEMU SEV stub
- *
- * Copyright Advanced Micro Devices 2018
- *
- * Authors:
- *
- * This work is licensed under the terms of the GNU GPL, version 2 or later.
- * See the COPYING file in the top-level directory.
- *
- */
-
-#include "qemu/osdep.h"
-#include "qapi/error.h"
-#include "sev.h"
-
-bool sev_enabled(void)
-{
- return false;
-}
-
-uint32_t sev_get_cbit_position(void)
-{
- return 0;
-}
-
-uint32_t sev_get_reduced_phys_bits(void)
-{
- return 0;
-}
-
-bool sev_es_enabled(void)
-{
- return false;
-}
-
-bool sev_add_kernel_loader_hashes(SevKernelLoaderContext *ctx, Error **errp)
-{
- g_assert_not_reached();
-}
#ifndef QEMU_SEV_I386_H
#define QEMU_SEV_I386_H
+#ifndef CONFIG_USER_ONLY
+#include CONFIG_DEVICES /* CONFIG_SEV */
+#endif
+
#include "exec/confidential-guest-support.h"
#include "qapi/qapi-types-misc-target.h"
size_t cmdline_size;
} SevKernelLoaderContext;
+#ifdef CONFIG_SEV
bool sev_enabled(void);
-extern bool sev_es_enabled(void);
+bool sev_es_enabled(void);
+#else
+#define sev_enabled() 0
+#define sev_es_enabled() 0
+#endif
+
extern SevInfo *sev_get_info(void);
extern uint32_t sev_get_cbit_position(void);
extern uint32_t sev_get_reduced_phys_bits(void);