#endif
#include "qemu-common.h"
-#include "qemu/cache-utils.h"
#include "qemu/host-utils.h"
#include "qemu/timer.h"
uintptr_t func_len;
} DebugFrameFDEHeader;
+typedef struct QEMU_PACKED {
+ DebugFrameCIE cie;
+ DebugFrameFDEHeader fde;
+} DebugFrameHeader;
+
static void tcg_register_jit_int(void *buf, size_t size,
- void *debug_frame, size_t debug_frame_size)
+ const void *debug_frame,
+ size_t debug_frame_size)
__attribute__((unused));
/* Forward declarations for functions declared and used in tcg-target.c. */
static TCGRegSet tcg_target_call_clobber_regs;
#if TCG_TARGET_INSN_UNIT_SIZE == 1
-static inline void tcg_out8(TCGContext *s, uint8_t v)
+static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v)
{
*s->code_ptr++ = v;
}
-static inline void tcg_patch8(tcg_insn_unit *p, uint8_t v)
+static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p,
+ uint8_t v)
{
*p = v;
}
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 2
-static inline void tcg_out16(TCGContext *s, uint16_t v)
+static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
*s->code_ptr++ = v;
}
}
-static inline void tcg_patch16(tcg_insn_unit *p, uint16_t v)
+static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p,
+ uint16_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
*p = v;
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 4
-static inline void tcg_out32(TCGContext *s, uint32_t v)
+static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
*s->code_ptr++ = v;
}
}
-static inline void tcg_patch32(tcg_insn_unit *p, uint32_t v)
+static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p,
+ uint32_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
*p = v;
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 8
-static inline void tcg_out64(TCGContext *s, uint64_t v)
+static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
*s->code_ptr++ = v;
}
}
-static inline void tcg_patch64(tcg_insn_unit *p, uint64_t v)
+static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p,
+ uint64_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
*p = v;
typedef struct TCGHelperInfo {
void *func;
const char *name;
+ unsigned flags;
+ unsigned sizemask;
} TCGHelperInfo;
#include "exec/helper-proto.h"
for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) {
g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func,
- (gpointer)all_helpers[i].name);
+ (gpointer)&all_helpers[i]);
}
tcg_target_init(s);
/* Note: we convert the 64 bit args to 32 bit and do some alignment
and endian swap. Maybe it would be better to do the alignment
and endian swap in tcg_reg_alloc_call(). */
-void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags,
- int sizemask, TCGArg ret, int nargs, TCGArg *args)
+void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
+ int nargs, TCGArg *args)
{
- int i;
- int real_args;
- int nb_rets;
+ int i, real_args, nb_rets;
+ unsigned sizemask, flags;
TCGArg *nparam;
+ TCGHelperInfo *info;
+
+ info = g_hash_table_lookup(s->helpers, (gpointer)func);
+ flags = info->flags;
+ sizemask = info->sizemask;
#if defined(__sparc__) && !defined(__arch64__) \
&& !defined(CONFIG_TCG_INTERPRETER)
}
real_args = 0;
for (i = 0; i < nargs; i++) {
-#if TCG_TARGET_REG_BITS < 64
int is_64bit = sizemask & (1 << (i+1)*2);
- if (is_64bit) {
+ if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
#ifdef TCG_TARGET_CALL_ALIGN_ARGS
/* some targets want aligned 64 bit args */
if (real_args & 1) {
real_args += 2;
continue;
}
-#endif /* TCG_TARGET_REG_BITS < 64 */
*s->gen_opparam_ptr++ = args[i];
real_args++;
return op;
}
-static const TCGOpcode old_ld_opc[8] = {
- [MO_UB] = INDEX_op_qemu_ld8u,
- [MO_SB] = INDEX_op_qemu_ld8s,
- [MO_UW] = INDEX_op_qemu_ld16u,
- [MO_SW] = INDEX_op_qemu_ld16s,
-#if TCG_TARGET_REG_BITS == 32
- [MO_UL] = INDEX_op_qemu_ld32,
- [MO_SL] = INDEX_op_qemu_ld32,
-#else
- [MO_UL] = INDEX_op_qemu_ld32u,
- [MO_SL] = INDEX_op_qemu_ld32s,
-#endif
- [MO_Q] = INDEX_op_qemu_ld64,
-};
-
-static const TCGOpcode old_st_opc[4] = {
- [MO_UB] = INDEX_op_qemu_st8,
- [MO_UW] = INDEX_op_qemu_st16,
- [MO_UL] = INDEX_op_qemu_st32,
- [MO_Q] = INDEX_op_qemu_st64,
-};
-
void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 0, 0);
- if (TCG_TARGET_HAS_new_ldst) {
- *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i32;
- tcg_add_param_i32(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = memop;
- *tcg_ctx.gen_opparam_ptr++ = idx;
- return;
- }
-
- /* The old opcodes only support target-endian memory operations. */
- assert((memop & MO_BSWAP) == MO_TE || (memop & MO_SIZE) == MO_8);
- assert(old_ld_opc[memop & MO_SSIZE] != 0);
-
- if (TCG_TARGET_REG_BITS == 32) {
- *tcg_ctx.gen_opc_ptr++ = old_ld_opc[memop & MO_SSIZE];
- tcg_add_param_i32(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = idx;
- } else {
- TCGv_i64 val64 = tcg_temp_new_i64();
-
- *tcg_ctx.gen_opc_ptr++ = old_ld_opc[memop & MO_SSIZE];
- tcg_add_param_i64(val64);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = idx;
-
- tcg_gen_trunc_i64_i32(val, val64);
- tcg_temp_free_i64(val64);
- }
+ *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i32;
+ tcg_add_param_i32(val);
+ tcg_add_param_tl(addr);
+ *tcg_ctx.gen_opparam_ptr++ = memop;
+ *tcg_ctx.gen_opparam_ptr++ = idx;
}
void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 0, 1);
- if (TCG_TARGET_HAS_new_ldst) {
- *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_st_i32;
- tcg_add_param_i32(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = memop;
- *tcg_ctx.gen_opparam_ptr++ = idx;
- return;
- }
-
- /* The old opcodes only support target-endian memory operations. */
- assert((memop & MO_BSWAP) == MO_TE || (memop & MO_SIZE) == MO_8);
- assert(old_st_opc[memop & MO_SIZE] != 0);
-
- if (TCG_TARGET_REG_BITS == 32) {
- *tcg_ctx.gen_opc_ptr++ = old_st_opc[memop & MO_SIZE];
- tcg_add_param_i32(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = idx;
- } else {
- TCGv_i64 val64 = tcg_temp_new_i64();
-
- tcg_gen_extu_i32_i64(val64, val);
-
- *tcg_ctx.gen_opc_ptr++ = old_st_opc[memop & MO_SIZE];
- tcg_add_param_i64(val64);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = idx;
-
- tcg_temp_free_i64(val64);
- }
+ *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_st_i32;
+ tcg_add_param_i32(val);
+ tcg_add_param_tl(addr);
+ *tcg_ctx.gen_opparam_ptr++ = memop;
+ *tcg_ctx.gen_opparam_ptr++ = idx;
}
void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
}
#endif
- if (TCG_TARGET_HAS_new_ldst) {
- *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i64;
- tcg_add_param_i64(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = memop;
- *tcg_ctx.gen_opparam_ptr++ = idx;
- return;
- }
-
- /* The old opcodes only support target-endian memory operations. */
- assert((memop & MO_BSWAP) == MO_TE || (memop & MO_SIZE) == MO_8);
- assert(old_ld_opc[memop & MO_SSIZE] != 0);
-
- *tcg_ctx.gen_opc_ptr++ = old_ld_opc[memop & MO_SSIZE];
+ *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i64;
tcg_add_param_i64(val);
tcg_add_param_tl(addr);
+ *tcg_ctx.gen_opparam_ptr++ = memop;
*tcg_ctx.gen_opparam_ptr++ = idx;
}
}
#endif
- if (TCG_TARGET_HAS_new_ldst) {
- *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_st_i64;
- tcg_add_param_i64(val);
- tcg_add_param_tl(addr);
- *tcg_ctx.gen_opparam_ptr++ = memop;
- *tcg_ctx.gen_opparam_ptr++ = idx;
- return;
- }
-
- /* The old opcodes only support target-endian memory operations. */
- assert((memop & MO_BSWAP) == MO_TE || (memop & MO_SIZE) == MO_8);
- assert(old_st_opc[memop & MO_SIZE] != 0);
-
- *tcg_ctx.gen_opc_ptr++ = old_st_opc[memop & MO_SIZE];
+ *tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_st_i64;
tcg_add_param_i64(val);
tcg_add_param_tl(addr);
+ *tcg_ctx.gen_opparam_ptr++ = memop;
*tcg_ctx.gen_opparam_ptr++ = idx;
}
{
const char *ret = NULL;
if (s->helpers) {
- ret = g_hash_table_lookup(s->helpers, (gpointer)val);
+ TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val);
+ if (info) {
+ ret = info->name;
+ }
}
return ret;
}
}
static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
- void *debug_frame, size_t debug_frame_size)
+ const void *debug_frame,
+ size_t debug_frame_size)
{
struct __attribute__((packed)) DebugInfo {
uint32_t len;
uintptr_t buf = (uintptr_t)buf_ptr;
size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
+ DebugFrameHeader *dfh;
img = g_malloc(img_size);
*img = img_template;
- memcpy(img + 1, debug_frame, debug_frame_size);
img->phdr.p_vaddr = buf;
img->phdr.p_paddr = buf;
img->di.fn_low_pc = buf;
img->di.fn_high_pc = buf + buf_size;
+ dfh = (DebugFrameHeader *)(img + 1);
+ memcpy(dfh, debug_frame, debug_frame_size);
+ dfh->fde.func_start = buf;
+ dfh->fde.func_len = buf_size;
+
#ifdef DEBUG_JIT
/* Enable this block to be able to debug the ELF image file creation.
One can use readelf, objdump, or other inspection utilities. */
and implement the internal function we declared earlier. */
static void tcg_register_jit_int(void *buf, size_t size,
- void *debug_frame, size_t debug_frame_size)
+ const void *debug_frame,
+ size_t debug_frame_size)
{
}
projects / qemu.git / blobdiff