4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Generate inline load/store functions for all MMU modes (typically
21 * at least _user and _kernel) as well as _data versions, for all data
24 * Used by target op helpers.
26 * The syntax for the accessors is:
28 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
30 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
33 * (empty): for 32 and 64 bit sizes
43 * mmusuffix is one of the generic suffixes "data" or "code", or
44 * (for softmmu configs) a target-specific MMU mode suffix as defined
50 #if defined(CONFIG_USER_ONLY)
51 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
52 #define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + guest_base))
54 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
55 #define h2g_valid(x) 1
57 #define h2g_valid(x) ({ \
58 unsigned long __guest = (unsigned long)(x) - guest_base; \
59 (__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
60 (!reserved_va || (__guest < reserved_va)); \
64 #define h2g_nocheck(x) ({ \
65 unsigned long __ret = (unsigned long)(x) - guest_base; \
70 /* Check if given address fits target address space */ \
71 assert(h2g_valid(x)); \
77 #if defined(CONFIG_USER_ONLY)
79 /* In user-only mode we provide only the _code and _data accessors. */
81 #define MEMSUFFIX _data
83 #include "exec/cpu_ldst_useronly_template.h"
86 #include "exec/cpu_ldst_useronly_template.h"
89 #include "exec/cpu_ldst_useronly_template.h"
92 #include "exec/cpu_ldst_useronly_template.h"
95 #define MEMSUFFIX _code
98 #include "exec/cpu_ldst_useronly_template.h"
101 #include "exec/cpu_ldst_useronly_template.h"
104 #include "exec/cpu_ldst_useronly_template.h"
107 #include "exec/cpu_ldst_useronly_template.h"
113 /* The memory helpers for tcg-generated code need tcg_target_long etc. */
116 uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
117 uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
118 uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
119 uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
121 void helper_stb_mmu(CPUArchState *env, target_ulong addr,
122 uint8_t val, int mmu_idx);
123 void helper_stw_mmu(CPUArchState *env, target_ulong addr,
124 uint16_t val, int mmu_idx);
125 void helper_stl_mmu(CPUArchState *env, target_ulong addr,
126 uint32_t val, int mmu_idx);
127 void helper_stq_mmu(CPUArchState *env, target_ulong addr,
128 uint64_t val, int mmu_idx);
130 uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
131 uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
132 uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
133 uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
135 #ifdef MMU_MODE0_SUFFIX
136 #define CPU_MMU_INDEX 0
137 #define MEMSUFFIX MMU_MODE0_SUFFIX
139 #include "exec/cpu_ldst_template.h"
142 #include "exec/cpu_ldst_template.h"
145 #include "exec/cpu_ldst_template.h"
148 #include "exec/cpu_ldst_template.h"
153 #if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)
154 #define CPU_MMU_INDEX 1
155 #define MEMSUFFIX MMU_MODE1_SUFFIX
157 #include "exec/cpu_ldst_template.h"
160 #include "exec/cpu_ldst_template.h"
163 #include "exec/cpu_ldst_template.h"
166 #include "exec/cpu_ldst_template.h"
171 #if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)
173 #define CPU_MMU_INDEX 2
174 #define MEMSUFFIX MMU_MODE2_SUFFIX
176 #include "exec/cpu_ldst_template.h"
179 #include "exec/cpu_ldst_template.h"
182 #include "exec/cpu_ldst_template.h"
185 #include "exec/cpu_ldst_template.h"
188 #endif /* (NB_MMU_MODES >= 3) */
190 #if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)
192 #define CPU_MMU_INDEX 3
193 #define MEMSUFFIX MMU_MODE3_SUFFIX
195 #include "exec/cpu_ldst_template.h"
198 #include "exec/cpu_ldst_template.h"
201 #include "exec/cpu_ldst_template.h"
204 #include "exec/cpu_ldst_template.h"
207 #endif /* (NB_MMU_MODES >= 4) */
209 #if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)
211 #define CPU_MMU_INDEX 4
212 #define MEMSUFFIX MMU_MODE4_SUFFIX
214 #include "exec/cpu_ldst_template.h"
217 #include "exec/cpu_ldst_template.h"
220 #include "exec/cpu_ldst_template.h"
223 #include "exec/cpu_ldst_template.h"
226 #endif /* (NB_MMU_MODES >= 5) */
228 #if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)
230 #define CPU_MMU_INDEX 5
231 #define MEMSUFFIX MMU_MODE5_SUFFIX
233 #include "exec/cpu_ldst_template.h"
236 #include "exec/cpu_ldst_template.h"
239 #include "exec/cpu_ldst_template.h"
242 #include "exec/cpu_ldst_template.h"
245 #endif /* (NB_MMU_MODES >= 6) */
247 #if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
249 #define CPU_MMU_INDEX 6
250 #define MEMSUFFIX MMU_MODE6_SUFFIX
252 #include "exec/cpu_ldst_template.h"
255 #include "exec/cpu_ldst_template.h"
258 #include "exec/cpu_ldst_template.h"
261 #include "exec/cpu_ldst_template.h"
264 #endif /* (NB_MMU_MODES >= 7) */
266 #if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
268 #define CPU_MMU_INDEX 7
269 #define MEMSUFFIX MMU_MODE7_SUFFIX
271 #include "exec/cpu_ldst_template.h"
274 #include "exec/cpu_ldst_template.h"
277 #include "exec/cpu_ldst_template.h"
280 #include "exec/cpu_ldst_template.h"
283 #endif /* (NB_MMU_MODES >= 8) */
285 #if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
287 #define CPU_MMU_INDEX 8
288 #define MEMSUFFIX MMU_MODE8_SUFFIX
290 #include "exec/cpu_ldst_template.h"
293 #include "exec/cpu_ldst_template.h"
296 #include "exec/cpu_ldst_template.h"
299 #include "exec/cpu_ldst_template.h"
302 #endif /* (NB_MMU_MODES >= 9) */
304 #if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
306 #define CPU_MMU_INDEX 9
307 #define MEMSUFFIX MMU_MODE9_SUFFIX
309 #include "exec/cpu_ldst_template.h"
312 #include "exec/cpu_ldst_template.h"
315 #include "exec/cpu_ldst_template.h"
318 #include "exec/cpu_ldst_template.h"
321 #endif /* (NB_MMU_MODES >= 10) */
323 #if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
325 #define CPU_MMU_INDEX 10
326 #define MEMSUFFIX MMU_MODE10_SUFFIX
328 #include "exec/cpu_ldst_template.h"
331 #include "exec/cpu_ldst_template.h"
334 #include "exec/cpu_ldst_template.h"
337 #include "exec/cpu_ldst_template.h"
340 #endif /* (NB_MMU_MODES >= 11) */
342 #if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
344 #define CPU_MMU_INDEX 11
345 #define MEMSUFFIX MMU_MODE11_SUFFIX
347 #include "exec/cpu_ldst_template.h"
350 #include "exec/cpu_ldst_template.h"
353 #include "exec/cpu_ldst_template.h"
356 #include "exec/cpu_ldst_template.h"
359 #endif /* (NB_MMU_MODES >= 12) */
361 #if (NB_MMU_MODES > 12)
362 #error "NB_MMU_MODES > 12 is not supported for now"
363 #endif /* (NB_MMU_MODES > 12) */
365 /* these access are slower, they must be as rare as possible */
366 #define CPU_MMU_INDEX (cpu_mmu_index(env))
367 #define MEMSUFFIX _data
369 #include "exec/cpu_ldst_template.h"
372 #include "exec/cpu_ldst_template.h"
375 #include "exec/cpu_ldst_template.h"
378 #include "exec/cpu_ldst_template.h"
382 #define CPU_MMU_INDEX (cpu_mmu_index(env))
383 #define MEMSUFFIX _code
384 #define SOFTMMU_CODE_ACCESS
387 #include "exec/cpu_ldst_template.h"
390 #include "exec/cpu_ldst_template.h"
393 #include "exec/cpu_ldst_template.h"
396 #include "exec/cpu_ldst_template.h"
400 #undef SOFTMMU_CODE_ACCESS
402 #endif /* defined(CONFIG_USER_ONLY) */
407 * @addr: guest virtual address to look up
408 * @access_type: 0 for read, 1 for write, 2 for execute
409 * @mmu_idx: MMU index to use for lookup
411 * Look up the specified guest virtual index in the TCG softmmu TLB.
412 * If the TLB contains a host virtual address suitable for direct RAM
413 * access, then return it. Otherwise (TLB miss, TLB entry is for an
414 * I/O access, etc) return NULL.
416 * This is the equivalent of the initial fast-path code used by
417 * TCG backends for guest load and store accesses.
419 static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr,
420 int access_type, int mmu_idx)
422 #if defined(CONFIG_USER_ONLY)
425 int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
426 CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index];
427 target_ulong tlb_addr;
430 switch (access_type) {
432 tlb_addr = tlbentry->addr_read;
435 tlb_addr = tlbentry->addr_write;
438 tlb_addr = tlbentry->addr_code;
441 g_assert_not_reached();
444 if ((addr & TARGET_PAGE_MASK)
445 != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
446 /* TLB entry is for a different page */
450 if (tlb_addr & ~TARGET_PAGE_MASK) {
455 haddr = addr + env->tlb_table[mmu_idx][index].addend;
456 return (void *)haddr;
457 #endif /* defined(CONFIG_USER_ONLY) */
460 #endif /* CPU_LDST_H */