target-lm32/cpu.c

   1 /*
   2  * QEMU LatticeMico32 CPU
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "cpu.h"
  23 #include "qemu-common.h"
  24
  25
  26 static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
  27 {
  28     LM32CPU *cpu = LM32_CPU(cs);
  29
  30     cpu->env.pc = value;
  31 }
  32
  33 /* Sort alphabetically by type name. */
  34 static gint lm32_cpu_list_compare(gconstpointer a, gconstpointer b)
  35 {
  36     ObjectClass *class_a = (ObjectClass *)a;
  37     ObjectClass *class_b = (ObjectClass *)b;
  38     const char *name_a, *name_b;
  39
  40     name_a = object_class_get_name(class_a);
  41     name_b = object_class_get_name(class_b);
  42     return strcmp(name_a, name_b);
  43 }
  44
  45 static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
  46 {
  47     ObjectClass *oc = data;
  48     CPUListState *s = user_data;
  49     const char *typename = object_class_get_name(oc);
  50     char *name;
  51
  52     name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
  53     (*s->cpu_fprintf)(s->file, "  %s\n", name);
  54     g_free(name);
  55 }
  56
  57
  58 void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  59 {
  60     CPUListState s = {
  61         .file = f,
  62         .cpu_fprintf = cpu_fprintf,
  63     };
  64     GSList *list;
  65
  66     list = object_class_get_list(TYPE_LM32_CPU, false);
  67     list = g_slist_sort(list, lm32_cpu_list_compare);
  68     (*cpu_fprintf)(f, "Available CPUs:\n");
  69     g_slist_foreach(list, lm32_cpu_list_entry, &s);
  70     g_slist_free(list);
  71 }
  72
  73 static void lm32_cpu_init_cfg_reg(LM32CPU *cpu)
  74 {
  75     CPULM32State *env = &cpu->env;
  76     uint32_t cfg = 0;
  77
  78     if (cpu->features & LM32_FEATURE_MULTIPLY) {
  79         cfg |= CFG_M;
  80     }
  81
  82     if (cpu->features & LM32_FEATURE_DIVIDE) {
  83         cfg |= CFG_D;
  84     }
  85
  86     if (cpu->features & LM32_FEATURE_SHIFT) {
  87         cfg |= CFG_S;
  88     }
  89
  90     if (cpu->features & LM32_FEATURE_SIGN_EXTEND) {
  91         cfg |= CFG_X;
  92     }
  93
  94     if (cpu->features & LM32_FEATURE_I_CACHE) {
  95         cfg |= CFG_IC;
  96     }
  97
  98     if (cpu->features & LM32_FEATURE_D_CACHE) {
  99         cfg |= CFG_DC;
 100     }
 101
 102     if (cpu->features & LM32_FEATURE_CYCLE_COUNT) {
 103         cfg |= CFG_CC;
 104     }
 105
 106     cfg |= (cpu->num_interrupts << CFG_INT_SHIFT);
 107     cfg |= (cpu->num_breakpoints << CFG_BP_SHIFT);
 108     cfg |= (cpu->num_watchpoints << CFG_WP_SHIFT);
 109     cfg |= (cpu->revision << CFG_REV_SHIFT);
 110
 111     env->cfg = cfg;
 112 }
 113
 114 static bool lm32_cpu_has_work(CPUState *cs)
 115 {
 116     return cs->interrupt_request & CPU_INTERRUPT_HARD;
 117 }
 118
 119 /* CPUClass::reset() */
 120 static void lm32_cpu_reset(CPUState *s)
 121 {
 122     LM32CPU *cpu = LM32_CPU(s);
 123     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
 124     CPULM32State *env = &cpu->env;
 125
 126     lcc->parent_reset(s);
 127
 128     /* reset cpu state */
 129     memset(env, 0, offsetof(CPULM32State, eba));
 130
 131     lm32_cpu_init_cfg_reg(cpu);
 132     tlb_flush(s, 1);
 133 }
 134
 135 static void lm32_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
 136 {
 137     info->mach = bfd_mach_lm32;
 138     info->print_insn = print_insn_lm32;
 139 }
 140
 141 static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
 142 {
 143     CPUState *cs = CPU(dev);
 144     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
 145
 146     cpu_reset(cs);
 147
 148     qemu_init_vcpu(cs);
 149
 150     lcc->parent_realize(dev, errp);
 151 }
 152
 153 static void lm32_cpu_initfn(Object *obj)
 154 {
 155     CPUState *cs = CPU(obj);
 156     LM32CPU *cpu = LM32_CPU(obj);
 157     CPULM32State *env = &cpu->env;
 158     static bool tcg_initialized;
 159
 160     cs->env_ptr = env;
 161     cpu_exec_init(cs, &error_abort);
 162
 163     env->flags = 0;
 164
 165     if (tcg_enabled() && !tcg_initialized) {
 166         tcg_initialized = true;
 167         lm32_translate_init();
 168     }
 169 }
 170
 171 static void lm32_basic_cpu_initfn(Object *obj)
 172 {
 173     LM32CPU *cpu = LM32_CPU(obj);
 174
 175     cpu->revision = 3;
 176     cpu->num_interrupts = 32;
 177     cpu->num_breakpoints = 4;
 178     cpu->num_watchpoints = 4;
 179     cpu->features = LM32_FEATURE_SHIFT
 180                   | LM32_FEATURE_SIGN_EXTEND
 181                   | LM32_FEATURE_CYCLE_COUNT;
 182 }
 183
 184 static void lm32_standard_cpu_initfn(Object *obj)
 185 {
 186     LM32CPU *cpu = LM32_CPU(obj);
 187
 188     cpu->revision = 3;
 189     cpu->num_interrupts = 32;
 190     cpu->num_breakpoints = 4;
 191     cpu->num_watchpoints = 4;
 192     cpu->features = LM32_FEATURE_MULTIPLY
 193                   | LM32_FEATURE_DIVIDE
 194                   | LM32_FEATURE_SHIFT
 195                   | LM32_FEATURE_SIGN_EXTEND
 196                   | LM32_FEATURE_I_CACHE
 197                   | LM32_FEATURE_CYCLE_COUNT;
 198 }
 199
 200 static void lm32_full_cpu_initfn(Object *obj)
 201 {
 202     LM32CPU *cpu = LM32_CPU(obj);
 203
 204     cpu->revision = 3;
 205     cpu->num_interrupts = 32;
 206     cpu->num_breakpoints = 4;
 207     cpu->num_watchpoints = 4;
 208     cpu->features = LM32_FEATURE_MULTIPLY
 209                   | LM32_FEATURE_DIVIDE
 210                   | LM32_FEATURE_SHIFT
 211                   | LM32_FEATURE_SIGN_EXTEND
 212                   | LM32_FEATURE_I_CACHE
 213                   | LM32_FEATURE_D_CACHE
 214                   | LM32_FEATURE_CYCLE_COUNT;
 215 }
 216
 217 typedef struct LM32CPUInfo {
 218     const char *name;
 219     void (*initfn)(Object *obj);
 220 } LM32CPUInfo;
 221
 222 static const LM32CPUInfo lm32_cpus[] = {
 223     {
 224         .name = "lm32-basic",
 225         .initfn = lm32_basic_cpu_initfn,
 226     },
 227     {
 228         .name = "lm32-standard",
 229         .initfn = lm32_standard_cpu_initfn,
 230     },
 231     {
 232         .name = "lm32-full",
 233         .initfn = lm32_full_cpu_initfn,
 234     },
 235 };
 236
 237 static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
 238 {
 239     ObjectClass *oc;
 240     char *typename;
 241
 242     if (cpu_model == NULL) {
 243         return NULL;
 244     }
 245
 246     typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
 247     oc = object_class_by_name(typename);
 248     g_free(typename);
 249     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
 250                        object_class_is_abstract(oc))) {
 251         oc = NULL;
 252     }
 253     return oc;
 254 }
 255
 256 static void lm32_cpu_class_init(ObjectClass *oc, void *data)
 257 {
 258     LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
 259     CPUClass *cc = CPU_CLASS(oc);
 260     DeviceClass *dc = DEVICE_CLASS(oc);
 261
 262     lcc->parent_realize = dc->realize;
 263     dc->realize = lm32_cpu_realizefn;
 264
 265     lcc->parent_reset = cc->reset;
 266     cc->reset = lm32_cpu_reset;
 267
 268     cc->class_by_name = lm32_cpu_class_by_name;
 269     cc->has_work = lm32_cpu_has_work;
 270     cc->do_interrupt = lm32_cpu_do_interrupt;
 271     cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
 272     cc->dump_state = lm32_cpu_dump_state;
 273     cc->set_pc = lm32_cpu_set_pc;
 274     cc->gdb_read_register = lm32_cpu_gdb_read_register;
 275     cc->gdb_write_register = lm32_cpu_gdb_write_register;
 276 #ifdef CONFIG_USER_ONLY
 277     cc->handle_mmu_fault = lm32_cpu_handle_mmu_fault;
 278 #else
 279     cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
 280     cc->vmsd = &vmstate_lm32_cpu;
 281 #endif
 282     cc->gdb_num_core_regs = 32 + 7;
 283     cc->gdb_stop_before_watchpoint = true;
 284     cc->debug_excp_handler = lm32_debug_excp_handler;
 285     cc->disas_set_info = lm32_cpu_disas_set_info;
 286
 287     /*
 288      * Reason: lm32_cpu_initfn() calls cpu_exec_init(), which saves
 289      * the object in cpus -> dangling pointer after final
 290      * object_unref().
 291      */
 292     dc->cannot_destroy_with_object_finalize_yet = true;
 293 }
 294
 295 static void lm32_register_cpu_type(const LM32CPUInfo *info)
 296 {
 297     TypeInfo type_info = {
 298         .parent = TYPE_LM32_CPU,
 299         .instance_init = info->initfn,
 300     };
 301
 302     type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
 303     type_register(&type_info);
 304     g_free((void *)type_info.name);
 305 }
 306
 307 static const TypeInfo lm32_cpu_type_info = {
 308     .name = TYPE_LM32_CPU,
 309     .parent = TYPE_CPU,
 310     .instance_size = sizeof(LM32CPU),
 311     .instance_init = lm32_cpu_initfn,
 312     .abstract = true,
 313     .class_size = sizeof(LM32CPUClass),
 314     .class_init = lm32_cpu_class_init,
 315 };
 316
 317 static void lm32_cpu_register_types(void)
 318 {
 319     int i;
 320
 321     type_register_static(&lm32_cpu_type_info);
 322     for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
 323         lm32_register_cpu_type(&lm32_cpus[i]);
 324     }
 325 }
 326
 327 type_init(lm32_cpu_register_types)