2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qapi/visitor.h"
16 #include "qemu/error-report.h"
17 #include "qemu/bitops.h"
18 #include "qemu/error-report.h"
19 #include "exec/address-spaces.h"
21 #include "hw/s390x/ioinst.h"
22 #include "hw/s390x/css.h"
24 #include "hw/s390x/s390_flic.h"
25 #include "hw/s390x/s390-virtio-ccw.h"
27 typedef struct CrwContainer {
29 QTAILQ_ENTRY(CrwContainer) sibling;
32 static const VMStateDescription vmstate_crw = {
35 .minimum_version_id = 1,
36 .fields = (VMStateField[]) {
37 VMSTATE_UINT16(flags, CRW),
38 VMSTATE_UINT16(rsid, CRW),
43 static const VMStateDescription vmstate_crw_container = {
44 .name = "s390_crw_container",
46 .minimum_version_id = 1,
47 .fields = (VMStateField[]) {
48 VMSTATE_STRUCT(crw, CrwContainer, 0, vmstate_crw, CRW),
53 typedef struct ChpInfo {
59 static const VMStateDescription vmstate_chp_info = {
60 .name = "s390_chp_info",
62 .minimum_version_id = 1,
63 .fields = (VMStateField[]) {
64 VMSTATE_UINT8(in_use, ChpInfo),
65 VMSTATE_UINT8(type, ChpInfo),
66 VMSTATE_UINT8(is_virtual, ChpInfo),
71 typedef struct SubchSet {
72 SubchDev *sch[MAX_SCHID + 1];
73 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
74 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
77 static const VMStateDescription vmstate_scsw = {
80 .minimum_version_id = 1,
81 .fields = (VMStateField[]) {
82 VMSTATE_UINT16(flags, SCSW),
83 VMSTATE_UINT16(ctrl, SCSW),
84 VMSTATE_UINT32(cpa, SCSW),
85 VMSTATE_UINT8(dstat, SCSW),
86 VMSTATE_UINT8(cstat, SCSW),
87 VMSTATE_UINT16(count, SCSW),
92 static const VMStateDescription vmstate_pmcw = {
95 .minimum_version_id = 1,
96 .fields = (VMStateField[]) {
97 VMSTATE_UINT32(intparm, PMCW),
98 VMSTATE_UINT16(flags, PMCW),
99 VMSTATE_UINT16(devno, PMCW),
100 VMSTATE_UINT8(lpm, PMCW),
101 VMSTATE_UINT8(pnom, PMCW),
102 VMSTATE_UINT8(lpum, PMCW),
103 VMSTATE_UINT8(pim, PMCW),
104 VMSTATE_UINT16(mbi, PMCW),
105 VMSTATE_UINT8(pom, PMCW),
106 VMSTATE_UINT8(pam, PMCW),
107 VMSTATE_UINT8_ARRAY(chpid, PMCW, 8),
108 VMSTATE_UINT32(chars, PMCW),
109 VMSTATE_END_OF_LIST()
113 static const VMStateDescription vmstate_schib = {
114 .name = "s390_schib",
116 .minimum_version_id = 1,
117 .fields = (VMStateField[]) {
118 VMSTATE_STRUCT(pmcw, SCHIB, 0, vmstate_pmcw, PMCW),
119 VMSTATE_STRUCT(scsw, SCHIB, 0, vmstate_scsw, SCSW),
120 VMSTATE_UINT64(mba, SCHIB),
121 VMSTATE_UINT8_ARRAY(mda, SCHIB, 4),
122 VMSTATE_END_OF_LIST()
127 static const VMStateDescription vmstate_ccw1 = {
130 .minimum_version_id = 1,
131 .fields = (VMStateField[]) {
132 VMSTATE_UINT8(cmd_code, CCW1),
133 VMSTATE_UINT8(flags, CCW1),
134 VMSTATE_UINT16(count, CCW1),
135 VMSTATE_UINT32(cda, CCW1),
136 VMSTATE_END_OF_LIST()
140 static const VMStateDescription vmstate_ciw = {
143 .minimum_version_id = 1,
144 .fields = (VMStateField[]) {
145 VMSTATE_UINT8(type, CIW),
146 VMSTATE_UINT8(command, CIW),
147 VMSTATE_UINT16(count, CIW),
148 VMSTATE_END_OF_LIST()
152 static const VMStateDescription vmstate_sense_id = {
153 .name = "s390_sense_id",
155 .minimum_version_id = 1,
156 .fields = (VMStateField[]) {
157 VMSTATE_UINT8(reserved, SenseId),
158 VMSTATE_UINT16(cu_type, SenseId),
159 VMSTATE_UINT8(cu_model, SenseId),
160 VMSTATE_UINT16(dev_type, SenseId),
161 VMSTATE_UINT8(dev_model, SenseId),
162 VMSTATE_UINT8(unused, SenseId),
163 VMSTATE_STRUCT_ARRAY(ciw, SenseId, MAX_CIWS, 0, vmstate_ciw, CIW),
164 VMSTATE_END_OF_LIST()
168 static const VMStateDescription vmstate_orb = {
171 .minimum_version_id = 1,
172 .fields = (VMStateField[]) {
173 VMSTATE_UINT32(intparm, ORB),
174 VMSTATE_UINT16(ctrl0, ORB),
175 VMSTATE_UINT8(lpm, ORB),
176 VMSTATE_UINT8(ctrl1, ORB),
177 VMSTATE_UINT32(cpa, ORB),
178 VMSTATE_END_OF_LIST()
182 static bool vmstate_schdev_orb_needed(void *opaque)
184 return css_migration_enabled();
187 static const VMStateDescription vmstate_schdev_orb = {
188 .name = "s390_subch_dev/orb",
190 .minimum_version_id = 1,
191 .needed = vmstate_schdev_orb_needed,
192 .fields = (VMStateField[]) {
193 VMSTATE_STRUCT(orb, SubchDev, 1, vmstate_orb, ORB),
194 VMSTATE_END_OF_LIST()
198 static int subch_dev_post_load(void *opaque, int version_id);
199 static void subch_dev_pre_save(void *opaque);
201 const char err_hint_devno[] = "Devno mismatch, tried to load wrong section!"
202 " Likely reason: some sequences of plug and unplug can break"
203 " migration for machine versions prior to 2.7 (known design flaw).";
205 const VMStateDescription vmstate_subch_dev = {
206 .name = "s390_subch_dev",
208 .minimum_version_id = 1,
209 .post_load = subch_dev_post_load,
210 .pre_save = subch_dev_pre_save,
211 .fields = (VMStateField[]) {
212 VMSTATE_UINT8_EQUAL(cssid, SubchDev, "Bug!"),
213 VMSTATE_UINT8_EQUAL(ssid, SubchDev, "Bug!"),
214 VMSTATE_UINT16(migrated_schid, SubchDev),
215 VMSTATE_UINT16_EQUAL(devno, SubchDev, err_hint_devno),
216 VMSTATE_BOOL(thinint_active, SubchDev),
217 VMSTATE_STRUCT(curr_status, SubchDev, 0, vmstate_schib, SCHIB),
218 VMSTATE_UINT8_ARRAY(sense_data, SubchDev, 32),
219 VMSTATE_UINT64(channel_prog, SubchDev),
220 VMSTATE_STRUCT(last_cmd, SubchDev, 0, vmstate_ccw1, CCW1),
221 VMSTATE_BOOL(last_cmd_valid, SubchDev),
222 VMSTATE_STRUCT(id, SubchDev, 0, vmstate_sense_id, SenseId),
223 VMSTATE_BOOL(ccw_fmt_1, SubchDev),
224 VMSTATE_UINT8(ccw_no_data_cnt, SubchDev),
225 VMSTATE_END_OF_LIST()
227 .subsections = (const VMStateDescription * []) {
233 typedef struct IndAddrPtrTmp {
239 static int post_load_ind_addr(void *opaque, int version_id)
241 IndAddrPtrTmp *ptmp = opaque;
242 IndAddr **ind_addr = ptmp->parent;
244 if (ptmp->len != 0) {
245 *ind_addr = get_indicator(ptmp->addr, ptmp->len);
252 static void pre_save_ind_addr(void *opaque)
254 IndAddrPtrTmp *ptmp = opaque;
255 IndAddr *ind_addr = *(ptmp->parent);
257 if (ind_addr != NULL) {
258 ptmp->len = ind_addr->len;
259 ptmp->addr = ind_addr->addr;
266 const VMStateDescription vmstate_ind_addr_tmp = {
267 .name = "s390_ind_addr_tmp",
268 .pre_save = pre_save_ind_addr,
269 .post_load = post_load_ind_addr,
271 .fields = (VMStateField[]) {
272 VMSTATE_INT32(len, IndAddrPtrTmp),
273 VMSTATE_UINT64(addr, IndAddrPtrTmp),
274 VMSTATE_END_OF_LIST()
278 const VMStateDescription vmstate_ind_addr = {
279 .name = "s390_ind_addr_tmp",
280 .fields = (VMStateField[]) {
281 VMSTATE_WITH_TMP(IndAddr*, IndAddrPtrTmp, vmstate_ind_addr_tmp),
282 VMSTATE_END_OF_LIST()
286 typedef struct CssImage {
287 SubchSet *sch_set[MAX_SSID + 1];
288 ChpInfo chpids[MAX_CHPID + 1];
291 static const VMStateDescription vmstate_css_img = {
292 .name = "s390_css_img",
294 .minimum_version_id = 1,
295 .fields = (VMStateField[]) {
296 /* Subchannel sets have no relevant state. */
297 VMSTATE_STRUCT_ARRAY(chpids, CssImage, MAX_CHPID + 1, 0,
298 vmstate_chp_info, ChpInfo),
299 VMSTATE_END_OF_LIST()
304 typedef struct IoAdapter {
311 typedef struct ChannelSubSys {
312 QTAILQ_HEAD(, CrwContainer) pending_crws;
319 uint64_t chnmon_area;
320 CssImage *css[MAX_CSSID + 1];
321 uint8_t default_cssid;
322 /* don't migrate, see css_register_io_adapters */
323 IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
324 /* don't migrate, see get_indicator and IndAddrPtrTmp */
325 QTAILQ_HEAD(, IndAddr) indicator_addresses;
328 static const VMStateDescription vmstate_css = {
331 .minimum_version_id = 1,
332 .fields = (VMStateField[]) {
333 VMSTATE_QTAILQ_V(pending_crws, ChannelSubSys, 1, vmstate_crw_container,
334 CrwContainer, sibling),
335 VMSTATE_BOOL(sei_pending, ChannelSubSys),
336 VMSTATE_BOOL(do_crw_mchk, ChannelSubSys),
337 VMSTATE_BOOL(crws_lost, ChannelSubSys),
338 /* These were kind of migrated by virtio */
339 VMSTATE_UINT8(max_cssid, ChannelSubSys),
340 VMSTATE_UINT8(max_ssid, ChannelSubSys),
341 VMSTATE_BOOL(chnmon_active, ChannelSubSys),
342 VMSTATE_UINT64(chnmon_area, ChannelSubSys),
343 VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(css, ChannelSubSys, MAX_CSSID + 1,
344 0, vmstate_css_img, CssImage),
345 VMSTATE_UINT8(default_cssid, ChannelSubSys),
346 VMSTATE_END_OF_LIST()
350 static ChannelSubSys channel_subsys = {
351 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
353 .sei_pending = false,
356 .chnmon_active = false,
357 .indicator_addresses =
358 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
361 static void subch_dev_pre_save(void *opaque)
363 SubchDev *s = opaque;
365 /* Prepare remote_schid for save */
366 s->migrated_schid = s->schid;
369 static int subch_dev_post_load(void *opaque, int version_id)
372 SubchDev *s = opaque;
374 /* Re-assign the subchannel to remote_schid if necessary */
375 if (s->migrated_schid != s->schid) {
376 if (css_find_subch(true, s->cssid, s->ssid, s->schid) == s) {
378 * Cleanup the slot before moving to s->migrated_schid provided
379 * it still belongs to us, i.e. it was not changed by previous
380 * invocation of this function.
382 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, NULL);
384 /* It's OK to re-assign without a prior de-assign. */
385 s->schid = s->migrated_schid;
386 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
389 if (css_migration_enabled()) {
390 /* No compat voodoo to do ;) */
394 * Hack alert. If we don't migrate the channel subsystem status
395 * we still need to find out if the guest enabled mss/mcss-e.
396 * If the subchannel is enabled, it certainly was able to access it,
397 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
398 * values. This is not watertight, but better than nothing.
400 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
402 channel_subsys.max_ssid = MAX_SSID;
404 if (s->cssid != channel_subsys.default_cssid) {
405 channel_subsys.max_cssid = MAX_CSSID;
411 void css_register_vmstate(void)
413 vmstate_register(NULL, 0, &vmstate_css, &channel_subsys);
416 IndAddr *get_indicator(hwaddr ind_addr, int len)
420 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
421 if (indicator->addr == ind_addr) {
426 indicator = g_new0(IndAddr, 1);
427 indicator->addr = ind_addr;
428 indicator->len = len;
429 indicator->refcnt = 1;
430 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
435 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
438 S390FLICState *fs = s390_get_flic();
439 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
441 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
444 void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
446 assert(indicator->refcnt > 0);
448 if (indicator->refcnt > 0) {
451 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
452 if (indicator->map) {
453 s390_io_adapter_map(adapter, indicator->map, false);
458 int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
462 if (indicator->map) {
463 return 0; /* already mapped is not an error */
465 indicator->map = indicator->addr;
466 ret = s390_io_adapter_map(adapter, indicator->map, true);
467 if ((ret != 0) && (ret != -ENOSYS)) {
477 int css_create_css_image(uint8_t cssid, bool default_image)
479 trace_css_new_image(cssid, default_image ? "(default)" : "");
480 /* 255 is reserved */
484 if (channel_subsys.css[cssid]) {
487 channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
489 channel_subsys.default_cssid = cssid;
494 uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
496 if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
497 !channel_subsys.io_adapters[type][isc]) {
501 return channel_subsys.io_adapters[type][isc]->id;
505 * css_register_io_adapters: Register I/O adapters per ISC during init
507 * @swap: an indication if byte swap is needed.
508 * @maskable: an indication if the adapter is subject to the mask operation.
509 * @flags: further characteristics of the adapter.
510 * e.g. suppressible, an indication if the adapter is subject to AIS.
511 * @errp: location to store error information.
513 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
514 uint8_t flags, Error **errp)
519 S390FLICState *fs = s390_get_flic();
520 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
523 * Disallow multiple registrations for the same device type.
524 * Report an error if registering for an already registered type.
526 if (channel_subsys.io_adapters[type][0]) {
527 error_setg(errp, "Adapters for type %d already registered", type);
530 for (isc = 0; isc <= MAX_ISC; isc++) {
531 id = (type << 3) | isc;
532 ret = fsc->register_io_adapter(fs, id, isc, swap, maskable, flags);
534 adapter = g_new0(IoAdapter, 1);
537 adapter->type = type;
538 adapter->flags = flags;
539 channel_subsys.io_adapters[type][isc] = adapter;
541 error_setg_errno(errp, -ret, "Unexpected error %d when "
542 "registering adapter %d", ret, id);
548 * No need to free registered adapters in kvm: kvm will clean up
549 * when the machine goes away.
552 for (isc--; isc >= 0; isc--) {
553 g_free(channel_subsys.io_adapters[type][isc]);
554 channel_subsys.io_adapters[type][isc] = NULL;
560 static void css_clear_io_interrupt(uint16_t subchannel_id,
561 uint16_t subchannel_nr)
564 static bool no_clear_irq;
565 S390FLICState *fs = s390_get_flic();
566 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
569 if (unlikely(no_clear_irq)) {
572 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
579 * Ignore unavailability, as the user can't do anything
584 error_setg_errno(&err, -r, "unexpected error condition");
585 error_propagate(&error_abort, err);
589 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
591 if (channel_subsys.max_cssid > 0) {
592 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
594 return (ssid << 1) | 1;
597 uint16_t css_build_subchannel_id(SubchDev *sch)
599 return css_do_build_subchannel_id(sch->cssid, sch->ssid);
602 void css_inject_io_interrupt(SubchDev *sch)
604 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
606 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
607 sch->curr_status.pmcw.intparm, isc, "");
608 s390_io_interrupt(css_build_subchannel_id(sch),
610 sch->curr_status.pmcw.intparm,
614 void css_conditional_io_interrupt(SubchDev *sch)
617 * If the subchannel is not currently status pending, make it pending
620 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
621 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
623 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
624 sch->curr_status.pmcw.intparm, isc,
626 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
627 sch->curr_status.scsw.ctrl |=
628 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
629 /* Inject an I/O interrupt. */
630 s390_io_interrupt(css_build_subchannel_id(sch),
632 sch->curr_status.pmcw.intparm,
637 int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode)
639 S390FLICState *fs = s390_get_flic();
640 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
643 if (env->psw.mask & PSW_MASK_PSTATE) {
648 trace_css_do_sic(mode, isc);
650 case SIC_IRQ_MODE_ALL:
651 case SIC_IRQ_MODE_SINGLE:
658 r = fsc->modify_ais_mode(fs, isc, mode) ? -PGM_OPERATION : 0;
663 void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc)
665 S390FLICState *fs = s390_get_flic();
666 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
667 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
668 IoAdapter *adapter = channel_subsys.io_adapters[type][isc];
674 trace_css_adapter_interrupt(isc);
675 if (fs->ais_supported) {
676 if (fsc->inject_airq(fs, type, isc, adapter->flags)) {
677 error_report("Failed to inject airq with AIS supported");
681 s390_io_interrupt(0, 0, 0, io_int_word);
685 static void sch_handle_clear_func(SubchDev *sch)
687 PMCW *p = &sch->curr_status.pmcw;
688 SCSW *s = &sch->curr_status.scsw;
691 /* Path management: In our simple css, we always choose the only path. */
694 /* Reset values prior to 'issuing the clear signal'. */
697 s->flags &= ~SCSW_FLAGS_MASK_PNO;
699 /* We always 'attempt to issue the clear signal', and we always succeed. */
700 sch->channel_prog = 0x0;
701 sch->last_cmd_valid = false;
702 s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
703 s->ctrl |= SCSW_STCTL_STATUS_PEND;
711 static void sch_handle_halt_func(SubchDev *sch)
714 PMCW *p = &sch->curr_status.pmcw;
715 SCSW *s = &sch->curr_status.scsw;
716 hwaddr curr_ccw = sch->channel_prog;
719 /* Path management: In our simple css, we always choose the only path. */
722 /* We always 'attempt to issue the halt signal', and we always succeed. */
723 sch->channel_prog = 0x0;
724 sch->last_cmd_valid = false;
725 s->ctrl &= ~SCSW_ACTL_HALT_PEND;
726 s->ctrl |= SCSW_STCTL_STATUS_PEND;
728 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
729 !((s->ctrl & SCSW_ACTL_START_PEND) ||
730 (s->ctrl & SCSW_ACTL_SUSP))) {
731 s->dstat = SCSW_DSTAT_DEVICE_END;
733 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
734 (s->ctrl & SCSW_ACTL_SUSP)) {
735 s->cpa = curr_ccw + 8;
742 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
746 dest->reserved = src->reserved;
747 dest->cu_type = cpu_to_be16(src->cu_type);
748 dest->cu_model = src->cu_model;
749 dest->dev_type = cpu_to_be16(src->dev_type);
750 dest->dev_model = src->dev_model;
751 dest->unused = src->unused;
752 for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
753 dest->ciw[i].type = src->ciw[i].type;
754 dest->ciw[i].command = src->ciw[i].command;
755 dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
759 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
766 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
767 ret.cmd_code = tmp1.cmd_code;
768 ret.flags = tmp1.flags;
769 ret.count = be16_to_cpu(tmp1.count);
770 ret.cda = be32_to_cpu(tmp1.cda);
772 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
773 if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
774 ret.cmd_code = CCW_CMD_TIC;
778 ret.cmd_code = tmp0.cmd_code;
779 ret.flags = tmp0.flags;
780 ret.count = be16_to_cpu(tmp0.count);
782 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
787 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
788 bool suspend_allowed)
799 /* Translate everything to format-1 ccws - the information is the same. */
800 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
802 /* Check for invalid command codes. */
803 if ((ccw.cmd_code & 0x0f) == 0) {
806 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
807 ((ccw.cmd_code & 0xf0) != 0)) {
810 if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
811 (ccw.cmd_code != CCW_CMD_TIC)) {
815 /* We don't support MIDA. */
816 if (ccw.flags & CCW_FLAG_MIDA) {
820 if (ccw.flags & CCW_FLAG_SUSPEND) {
821 return suspend_allowed ? -EINPROGRESS : -EINVAL;
824 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
827 if (sch->ccw_no_data_cnt == 255) {
830 sch->ccw_no_data_cnt++;
833 /* Look at the command. */
834 switch (ccw.cmd_code) {
839 case CCW_CMD_BASIC_SENSE:
841 if (ccw.count != sizeof(sch->sense_data)) {
846 len = MIN(ccw.count, sizeof(sch->sense_data));
847 cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
848 sch->curr_status.scsw.count = ccw.count - len;
849 memset(sch->sense_data, 0, sizeof(sch->sense_data));
852 case CCW_CMD_SENSE_ID:
856 copy_sense_id_to_guest(&sense_id, &sch->id);
857 /* Sense ID information is device specific. */
859 if (ccw.count != sizeof(sense_id)) {
864 len = MIN(ccw.count, sizeof(sense_id));
866 * Only indicate 0xff in the first sense byte if we actually
867 * have enough place to store at least bytes 0-3.
870 sense_id.reserved = 0xff;
872 sense_id.reserved = 0;
874 cpu_physical_memory_write(ccw.cda, &sense_id, len);
875 sch->curr_status.scsw.count = ccw.count - len;
880 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
884 if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
888 sch->channel_prog = ccw.cda;
893 /* Handle device specific commands. */
894 ret = sch->ccw_cb(sch, ccw);
901 sch->last_cmd_valid = true;
903 if (ccw.flags & CCW_FLAG_CC) {
904 sch->channel_prog += 8;
912 static void sch_handle_start_func_virtual(SubchDev *sch, ORB *orb)
915 PMCW *p = &sch->curr_status.pmcw;
916 SCSW *s = &sch->curr_status.scsw;
919 bool suspend_allowed;
921 /* Path management: In our simple css, we always choose the only path. */
924 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
925 /* Start Function triggered via ssch, i.e. we have an ORB */
928 /* Look at the orb and try to execute the channel program. */
929 assert(orb != NULL); /* resume does not pass an orb */
930 p->intparm = orb->intparm;
931 if (!(orb->lpm & path)) {
932 /* Generate a deferred cc 3 condition. */
933 s->flags |= SCSW_FLAGS_MASK_CC;
934 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
935 s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
938 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
939 s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
940 sch->ccw_no_data_cnt = 0;
941 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
943 /* Start Function resumed via rsch, i.e. we don't have an
945 s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
946 /* The channel program had been suspended before. */
947 suspend_allowed = true;
949 sch->last_cmd_valid = false;
951 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
954 /* ccw chain, continue processing */
958 s->ctrl &= ~SCSW_ACTL_START_PEND;
959 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
960 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
961 SCSW_STCTL_STATUS_PEND;
962 s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
963 s->cpa = sch->channel_prog + 8;
966 /* I/O errors, status depends on specific devices */
969 /* unsupported command, generate unit check (command reject) */
970 s->ctrl &= ~SCSW_ACTL_START_PEND;
971 s->dstat = SCSW_DSTAT_UNIT_CHECK;
972 /* Set sense bit 0 in ecw0. */
973 sch->sense_data[0] = 0x80;
974 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
975 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
976 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
977 s->cpa = sch->channel_prog + 8;
980 /* memory problem, generate channel data check */
981 s->ctrl &= ~SCSW_ACTL_START_PEND;
982 s->cstat = SCSW_CSTAT_DATA_CHECK;
983 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
984 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
985 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
986 s->cpa = sch->channel_prog + 8;
989 /* subchannel busy, generate deferred cc 1 */
990 s->flags &= ~SCSW_FLAGS_MASK_CC;
991 s->flags |= (1 << 8);
992 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
993 s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
996 /* channel program has been suspended */
997 s->ctrl &= ~SCSW_ACTL_START_PEND;
998 s->ctrl |= SCSW_ACTL_SUSP;
1001 /* error, generate channel program check */
1002 s->ctrl &= ~SCSW_ACTL_START_PEND;
1003 s->cstat = SCSW_CSTAT_PROG_CHECK;
1004 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1005 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
1006 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
1007 s->cpa = sch->channel_prog + 8;
1010 } while (ret == -EAGAIN);
1014 static int sch_handle_start_func_passthrough(SubchDev *sch, ORB *orb)
1017 PMCW *p = &sch->curr_status.pmcw;
1018 SCSW *s = &sch->curr_status.scsw;
1021 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
1022 assert(orb != NULL);
1023 p->intparm = orb->intparm;
1027 * Only support prefetch enable mode.
1028 * Only support 64bit addressing idal.
1030 if (!(orb->ctrl0 & ORB_CTRL0_MASK_PFCH) ||
1031 !(orb->ctrl0 & ORB_CTRL0_MASK_C64)) {
1035 ret = s390_ccw_cmd_request(orb, s, sch->driver_data);
1037 /* Currently we don't update control block and just return the cc code. */
1045 /* Let's reflect an inaccessible host device by cc 3. */
1050 * All other return codes will trigger a program check,
1060 * On real machines, this would run asynchronously to the main vcpus.
1061 * We might want to make some parts of the ssch handling (interpreting
1062 * read/writes) asynchronous later on if we start supporting more than
1063 * our current very simple devices.
1065 int do_subchannel_work_virtual(SubchDev *sch, ORB *orb)
1068 SCSW *s = &sch->curr_status.scsw;
1070 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
1071 sch_handle_clear_func(sch);
1072 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
1073 sch_handle_halt_func(sch);
1074 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
1075 /* Triggered by both ssch and rsch. */
1076 sch_handle_start_func_virtual(sch, orb);
1078 /* Cannot happen. */
1081 css_inject_io_interrupt(sch);
1085 int do_subchannel_work_passthrough(SubchDev *sch, ORB *orb)
1088 SCSW *s = &sch->curr_status.scsw;
1090 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
1091 /* TODO: Clear handling */
1092 sch_handle_clear_func(sch);
1094 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
1095 /* TODO: Halt handling */
1096 sch_handle_halt_func(sch);
1098 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
1099 ret = sch_handle_start_func_passthrough(sch, orb);
1101 /* Cannot happen. */
1108 static int do_subchannel_work(SubchDev *sch, ORB *orb)
1110 if (sch->do_subchannel_work) {
1111 return sch->do_subchannel_work(sch, orb);
1117 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
1121 dest->intparm = cpu_to_be32(src->intparm);
1122 dest->flags = cpu_to_be16(src->flags);
1123 dest->devno = cpu_to_be16(src->devno);
1124 dest->lpm = src->lpm;
1125 dest->pnom = src->pnom;
1126 dest->lpum = src->lpum;
1127 dest->pim = src->pim;
1128 dest->mbi = cpu_to_be16(src->mbi);
1129 dest->pom = src->pom;
1130 dest->pam = src->pam;
1131 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1132 dest->chpid[i] = src->chpid[i];
1134 dest->chars = cpu_to_be32(src->chars);
1137 void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
1139 dest->flags = cpu_to_be16(src->flags);
1140 dest->ctrl = cpu_to_be16(src->ctrl);
1141 dest->cpa = cpu_to_be32(src->cpa);
1142 dest->dstat = src->dstat;
1143 dest->cstat = src->cstat;
1144 dest->count = cpu_to_be16(src->count);
1147 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
1151 copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
1152 copy_scsw_to_guest(&dest->scsw, &src->scsw);
1153 dest->mba = cpu_to_be64(src->mba);
1154 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1155 dest->mda[i] = src->mda[i];
1159 int css_do_stsch(SubchDev *sch, SCHIB *schib)
1161 /* Use current status. */
1162 copy_schib_to_guest(schib, &sch->curr_status);
1166 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
1170 dest->intparm = be32_to_cpu(src->intparm);
1171 dest->flags = be16_to_cpu(src->flags);
1172 dest->devno = be16_to_cpu(src->devno);
1173 dest->lpm = src->lpm;
1174 dest->pnom = src->pnom;
1175 dest->lpum = src->lpum;
1176 dest->pim = src->pim;
1177 dest->mbi = be16_to_cpu(src->mbi);
1178 dest->pom = src->pom;
1179 dest->pam = src->pam;
1180 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1181 dest->chpid[i] = src->chpid[i];
1183 dest->chars = be32_to_cpu(src->chars);
1186 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
1188 dest->flags = be16_to_cpu(src->flags);
1189 dest->ctrl = be16_to_cpu(src->ctrl);
1190 dest->cpa = be32_to_cpu(src->cpa);
1191 dest->dstat = src->dstat;
1192 dest->cstat = src->cstat;
1193 dest->count = be16_to_cpu(src->count);
1196 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
1200 copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
1201 copy_scsw_from_guest(&dest->scsw, &src->scsw);
1202 dest->mba = be64_to_cpu(src->mba);
1203 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1204 dest->mda[i] = src->mda[i];
1208 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
1210 SCSW *s = &sch->curr_status.scsw;
1211 PMCW *p = &sch->curr_status.pmcw;
1216 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
1221 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1227 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
1232 copy_schib_from_guest(&schib, orig_schib);
1233 /* Only update the program-modifiable fields. */
1234 p->intparm = schib.pmcw.intparm;
1235 oldflags = p->flags;
1236 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1237 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1238 PMCW_FLAGS_MASK_MP);
1239 p->flags |= schib.pmcw.flags &
1240 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1241 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1242 PMCW_FLAGS_MASK_MP);
1243 p->lpm = schib.pmcw.lpm;
1244 p->mbi = schib.pmcw.mbi;
1245 p->pom = schib.pmcw.pom;
1246 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1247 p->chars |= schib.pmcw.chars &
1248 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1249 sch->curr_status.mba = schib.mba;
1251 /* Has the channel been disabled? */
1252 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
1253 && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
1254 sch->disable_cb(sch);
1263 int css_do_xsch(SubchDev *sch)
1265 SCSW *s = &sch->curr_status.scsw;
1266 PMCW *p = &sch->curr_status.pmcw;
1269 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1274 if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
1275 ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1277 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
1278 (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
1283 if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
1288 /* Cancel the current operation. */
1289 s->ctrl &= ~(SCSW_FCTL_START_FUNC |
1290 SCSW_ACTL_RESUME_PEND |
1291 SCSW_ACTL_START_PEND |
1293 sch->channel_prog = 0x0;
1294 sch->last_cmd_valid = false;
1303 int css_do_csch(SubchDev *sch)
1305 SCSW *s = &sch->curr_status.scsw;
1306 PMCW *p = &sch->curr_status.pmcw;
1309 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1314 /* Trigger the clear function. */
1315 s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
1316 s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
1318 do_subchannel_work(sch, NULL);
1325 int css_do_hsch(SubchDev *sch)
1327 SCSW *s = &sch->curr_status.scsw;
1328 PMCW *p = &sch->curr_status.pmcw;
1331 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1336 if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
1337 (s->ctrl & (SCSW_STCTL_PRIMARY |
1338 SCSW_STCTL_SECONDARY |
1339 SCSW_STCTL_ALERT))) {
1344 if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
1349 /* Trigger the halt function. */
1350 s->ctrl |= SCSW_FCTL_HALT_FUNC;
1351 s->ctrl &= ~SCSW_FCTL_START_FUNC;
1352 if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
1353 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
1354 ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
1355 s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
1357 s->ctrl |= SCSW_ACTL_HALT_PEND;
1359 do_subchannel_work(sch, NULL);
1366 static void css_update_chnmon(SubchDev *sch)
1368 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
1372 /* The counter is conveniently located at the beginning of the struct. */
1373 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
1374 /* Format 1, per-subchannel area. */
1377 count = address_space_ldl(&address_space_memory,
1378 sch->curr_status.mba,
1379 MEMTXATTRS_UNSPECIFIED,
1382 address_space_stl(&address_space_memory, sch->curr_status.mba, count,
1383 MEMTXATTRS_UNSPECIFIED, NULL);
1385 /* Format 0, global area. */
1389 offset = sch->curr_status.pmcw.mbi << 5;
1390 count = address_space_lduw(&address_space_memory,
1391 channel_subsys.chnmon_area + offset,
1392 MEMTXATTRS_UNSPECIFIED,
1395 address_space_stw(&address_space_memory,
1396 channel_subsys.chnmon_area + offset, count,
1397 MEMTXATTRS_UNSPECIFIED, NULL);
1401 int css_do_ssch(SubchDev *sch, ORB *orb)
1403 SCSW *s = &sch->curr_status.scsw;
1404 PMCW *p = &sch->curr_status.pmcw;
1407 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1412 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1417 if (s->ctrl & (SCSW_FCTL_START_FUNC |
1418 SCSW_FCTL_HALT_FUNC |
1419 SCSW_FCTL_CLEAR_FUNC)) {
1424 /* If monitoring is active, update counter. */
1425 if (channel_subsys.chnmon_active) {
1426 css_update_chnmon(sch);
1429 sch->channel_prog = orb->cpa;
1430 /* Trigger the start function. */
1431 s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
1432 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1434 ret = do_subchannel_work(sch, orb);
1440 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
1444 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1445 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
1447 copy_scsw_to_guest(&dest->scsw, &src->scsw);
1449 for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
1450 dest->esw[i] = cpu_to_be32(src->esw[i]);
1452 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
1453 dest->ecw[i] = cpu_to_be32(src->ecw[i]);
1455 *irb_len = sizeof(*dest) - sizeof(dest->emw);
1457 /* extended measurements enabled? */
1458 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
1459 !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
1460 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
1463 /* extended measurements pending? */
1464 if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
1467 if ((stctl & SCSW_STCTL_PRIMARY) ||
1468 (stctl == SCSW_STCTL_SECONDARY) ||
1469 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
1470 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
1471 dest->emw[i] = cpu_to_be32(src->emw[i]);
1474 *irb_len = sizeof(*dest);
1477 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
1479 SCSW *s = &sch->curr_status.scsw;
1480 PMCW *p = &sch->curr_status.pmcw;
1484 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1488 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1490 /* Prepare the irb for the guest. */
1491 memset(&irb, 0, sizeof(IRB));
1493 /* Copy scsw from current status. */
1494 memcpy(&irb.scsw, s, sizeof(SCSW));
1495 if (stctl & SCSW_STCTL_STATUS_PEND) {
1496 if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
1497 SCSW_CSTAT_CHN_CTRL_CHK |
1498 SCSW_CSTAT_INTF_CTRL_CHK)) {
1499 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1500 irb.esw[0] = 0x04804000;
1502 irb.esw[0] = 0x00800000;
1504 /* If a unit check is pending, copy sense data. */
1505 if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
1506 (p->chars & PMCW_CHARS_MASK_CSENSE)) {
1509 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1510 /* Attention: sense_data is already BE! */
1511 memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1512 for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1513 irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1515 irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1518 /* Store the irb to the guest. */
1519 copy_irb_to_guest(target_irb, &irb, p, irb_len);
1521 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1524 void css_do_tsch_update_subch(SubchDev *sch)
1526 SCSW *s = &sch->curr_status.scsw;
1527 PMCW *p = &sch->curr_status.pmcw;
1532 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1533 fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
1534 actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
1536 /* Clear conditions on subchannel, if applicable. */
1537 if (stctl & SCSW_STCTL_STATUS_PEND) {
1538 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1539 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1540 ((fctl & SCSW_FCTL_HALT_FUNC) &&
1541 (actl & SCSW_ACTL_SUSP))) {
1542 s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
1544 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1545 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1546 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1547 SCSW_ACTL_START_PEND |
1548 SCSW_ACTL_HALT_PEND |
1549 SCSW_ACTL_CLEAR_PEND |
1552 if ((actl & SCSW_ACTL_SUSP) &&
1553 (fctl & SCSW_FCTL_START_FUNC)) {
1554 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1555 if (fctl & SCSW_FCTL_HALT_FUNC) {
1556 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1557 SCSW_ACTL_START_PEND |
1558 SCSW_ACTL_HALT_PEND |
1559 SCSW_ACTL_CLEAR_PEND |
1562 s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
1566 /* Clear pending sense data. */
1567 if (p->chars & PMCW_CHARS_MASK_CSENSE) {
1568 memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1573 static void copy_crw_to_guest(CRW *dest, const CRW *src)
1575 dest->flags = cpu_to_be16(src->flags);
1576 dest->rsid = cpu_to_be16(src->rsid);
1579 int css_do_stcrw(CRW *crw)
1581 CrwContainer *crw_cont;
1584 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1586 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1587 copy_crw_to_guest(crw, &crw_cont->crw);
1591 /* List was empty, turn crw machine checks on again. */
1592 memset(crw, 0, sizeof(*crw));
1593 channel_subsys.do_crw_mchk = true;
1600 static void copy_crw_from_guest(CRW *dest, const CRW *src)
1602 dest->flags = be16_to_cpu(src->flags);
1603 dest->rsid = be16_to_cpu(src->rsid);
1606 void css_undo_stcrw(CRW *crw)
1608 CrwContainer *crw_cont;
1610 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1612 channel_subsys.crws_lost = true;
1615 copy_crw_from_guest(&crw_cont->crw, crw);
1617 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1620 int css_do_tpi(IOIntCode *int_code, int lowcore)
1622 /* No pending interrupts for !KVM. */
1626 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1627 int rfmt, void *buf)
1631 uint32_t chpid_type_word;
1635 css = channel_subsys.css[channel_subsys.default_cssid];
1637 css = channel_subsys.css[cssid];
1643 for (i = f_chpid; i <= l_chpid; i++) {
1644 if (css->chpids[i].in_use) {
1645 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1647 words[0] = cpu_to_be32(chpid_type_word);
1649 memcpy(buf + desc_size, words, 8);
1651 } else if (rfmt == 1) {
1652 words[0] = cpu_to_be32(chpid_type_word);
1660 memcpy(buf + desc_size, words, 32);
1668 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1670 /* dct is currently ignored (not really meaningful for our devices) */
1671 /* TODO: Don't ignore mbk. */
1672 if (update && !channel_subsys.chnmon_active) {
1673 /* Enable measuring. */
1674 channel_subsys.chnmon_area = mbo;
1675 channel_subsys.chnmon_active = true;
1677 if (!update && channel_subsys.chnmon_active) {
1678 /* Disable measuring. */
1679 channel_subsys.chnmon_area = 0;
1680 channel_subsys.chnmon_active = false;
1684 int css_do_rsch(SubchDev *sch)
1686 SCSW *s = &sch->curr_status.scsw;
1687 PMCW *p = &sch->curr_status.pmcw;
1690 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1695 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1700 if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1701 (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1702 (!(s->ctrl & SCSW_ACTL_SUSP))) {
1707 /* If monitoring is active, update counter. */
1708 if (channel_subsys.chnmon_active) {
1709 css_update_chnmon(sch);
1712 s->ctrl |= SCSW_ACTL_RESUME_PEND;
1713 do_subchannel_work(sch, NULL);
1720 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1724 if (cssid > channel_subsys.max_cssid) {
1727 if (channel_subsys.max_cssid == 0) {
1728 real_cssid = channel_subsys.default_cssid;
1732 if (!channel_subsys.css[real_cssid]) {
1736 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1740 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1742 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1747 /* We don't really use a channel path, so we're done here. */
1748 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1749 channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1750 if (channel_subsys.max_cssid > 0) {
1751 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1756 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1761 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1762 if (ssid > MAX_SSID ||
1763 !channel_subsys.css[real_cssid] ||
1764 !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1767 set = channel_subsys.css[real_cssid]->sch_set[ssid];
1768 return schid > find_last_bit(set->schids_used,
1769 (MAX_SCHID + 1) / sizeof(unsigned long));
1772 unsigned int css_find_free_chpid(uint8_t cssid)
1774 CssImage *css = channel_subsys.css[cssid];
1778 return MAX_CHPID + 1;
1781 for (chpid = 0; chpid <= MAX_CHPID; chpid++) {
1782 /* skip reserved chpid */
1783 if (chpid == VIRTIO_CCW_CHPID) {
1786 if (!css->chpids[chpid].in_use) {
1790 return MAX_CHPID + 1;
1793 static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type,
1798 trace_css_chpid_add(cssid, chpid, type);
1799 css = channel_subsys.css[cssid];
1803 if (css->chpids[chpid].in_use) {
1806 css->chpids[chpid].in_use = 1;
1807 css->chpids[chpid].type = type;
1808 css->chpids[chpid].is_virtual = is_virt;
1810 css_generate_chp_crws(cssid, chpid);
1815 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1817 PMCW *p = &sch->curr_status.pmcw;
1818 SCSW *s = &sch->curr_status.scsw;
1820 CssImage *css = channel_subsys.css[sch->cssid];
1822 assert(css != NULL);
1823 memset(p, 0, sizeof(PMCW));
1824 p->flags |= PMCW_FLAGS_MASK_DNV;
1825 p->devno = sch->devno;
1830 p->chpid[0] = chpid;
1831 if (!css->chpids[chpid].in_use) {
1832 css_add_chpid(sch->cssid, chpid, type, true);
1835 memset(s, 0, sizeof(SCSW));
1836 sch->curr_status.mba = 0;
1837 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1838 sch->curr_status.mda[i] = 0;
1842 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1846 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1848 if (!channel_subsys.css[real_cssid]) {
1852 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1856 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1860 * Return free device number in subchannel set.
1862 * Return index of the first free device number in the subchannel set
1863 * identified by @p cssid and @p ssid, beginning the search at @p
1864 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1865 * MAX_SCHID if there are no free device numbers in the subchannel
1868 static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
1873 for (round = 0; round <= MAX_DEVNO; round++) {
1874 uint16_t devno = (start + round) % MAX_DEVNO;
1876 if (!css_devno_used(cssid, ssid, devno)) {
1880 return MAX_DEVNO + 1;
1884 * Return first free subchannel (id) in subchannel set.
1886 * Return index of the first free subchannel in the subchannel set
1887 * identified by @p cssid and @p ssid, if there is any. Return a value
1888 * exceeding MAX_SCHID if there are no free subchannels in the
1891 static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
1895 for (schid = 0; schid <= MAX_SCHID; schid++) {
1896 if (!css_find_subch(1, cssid, ssid, schid)) {
1900 return MAX_SCHID + 1;
1904 * Return first free subchannel (id) in subchannel set for a device number
1906 * Verify the device number @p devno is not used yet in the subchannel
1907 * set identified by @p cssid and @p ssid. Set @p schid to the index
1908 * of the first free subchannel in the subchannel set, if there is
1909 * any. Return true if everything succeeded and false otherwise.
1911 static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
1912 uint16_t devno, uint16_t *schid,
1915 uint32_t free_schid;
1918 if (css_devno_used(cssid, ssid, devno)) {
1919 error_setg(errp, "Device %x.%x.%04x already exists",
1920 cssid, ssid, devno);
1923 free_schid = css_find_free_subch(cssid, ssid);
1924 if (free_schid > MAX_SCHID) {
1925 error_setg(errp, "No free subchannel found for %x.%x.%04x",
1926 cssid, ssid, devno);
1929 *schid = free_schid;
1934 * Return first free subchannel (id) and device number
1936 * Locate the first free subchannel and first free device number in
1937 * any of the subchannel sets of the channel subsystem identified by
1938 * @p cssid. Return false if no free subchannel / device number could
1939 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
1940 * the available subchannel and device number and return true.
1942 * May modify @p ssid, @p devno and / or @p schid even if no free
1943 * subchannel / device number could be found.
1945 static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
1946 uint16_t *devno, uint16_t *schid,
1949 uint32_t free_schid, free_devno;
1951 assert(ssid && devno && schid);
1952 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
1953 free_schid = css_find_free_subch(cssid, *ssid);
1954 if (free_schid > MAX_SCHID) {
1957 free_devno = css_find_free_devno(cssid, *ssid, free_schid);
1958 if (free_devno > MAX_DEVNO) {
1961 *schid = free_schid;
1962 *devno = free_devno;
1965 error_setg(errp, "Virtual channel subsystem is full!");
1969 bool css_subch_visible(SubchDev *sch)
1971 if (sch->ssid > channel_subsys.max_ssid) {
1975 if (sch->cssid != channel_subsys.default_cssid) {
1976 return (channel_subsys.max_cssid > 0);
1982 bool css_present(uint8_t cssid)
1984 return (channel_subsys.css[cssid] != NULL);
1987 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1989 if (!channel_subsys.css[cssid]) {
1992 if (!channel_subsys.css[cssid]->sch_set[ssid]) {
1996 return !!test_bit(devno,
1997 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
2000 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
2001 uint16_t devno, SubchDev *sch)
2006 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
2008 if (!channel_subsys.css[cssid]) {
2010 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
2011 __func__, cssid, ssid, schid);
2014 css = channel_subsys.css[cssid];
2016 if (!css->sch_set[ssid]) {
2017 css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
2019 s_set = css->sch_set[ssid];
2021 s_set->sch[schid] = sch;
2023 set_bit(schid, s_set->schids_used);
2024 set_bit(devno, s_set->devnos_used);
2026 clear_bit(schid, s_set->schids_used);
2027 clear_bit(devno, s_set->devnos_used);
2031 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
2033 CrwContainer *crw_cont;
2035 trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
2036 /* TODO: Maybe use a static crw pool? */
2037 crw_cont = g_try_malloc0(sizeof(CrwContainer));
2039 channel_subsys.crws_lost = true;
2042 crw_cont->crw.flags = (rsc << 8) | erc;
2044 crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
2046 crw_cont->crw.rsid = rsid;
2047 if (channel_subsys.crws_lost) {
2048 crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
2049 channel_subsys.crws_lost = false;
2052 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
2054 if (channel_subsys.do_crw_mchk) {
2055 channel_subsys.do_crw_mchk = false;
2056 /* Inject crw pending machine check. */
2061 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
2062 int hotplugged, int add)
2064 uint8_t guest_cssid;
2067 if (add && !hotplugged) {
2070 if (channel_subsys.max_cssid == 0) {
2071 /* Default cssid shows up as 0. */
2072 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
2074 /* Show real cssid to the guest. */
2075 guest_cssid = cssid;
2078 * Only notify for higher subchannel sets/channel subsystems if the
2079 * guest has enabled it.
2081 if ((ssid > channel_subsys.max_ssid) ||
2082 (guest_cssid > channel_subsys.max_cssid) ||
2083 ((channel_subsys.max_cssid == 0) &&
2084 (cssid != channel_subsys.default_cssid))) {
2087 chain_crw = (channel_subsys.max_ssid > 0) ||
2088 (channel_subsys.max_cssid > 0);
2089 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
2091 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
2092 (guest_cssid << 8) | (ssid << 4));
2094 /* RW_ERC_IPI --> clear pending interrupts */
2095 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
2098 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
2103 void css_generate_css_crws(uint8_t cssid)
2105 if (!channel_subsys.sei_pending) {
2106 css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
2108 channel_subsys.sei_pending = true;
2111 void css_clear_sei_pending(void)
2113 channel_subsys.sei_pending = false;
2116 int css_enable_mcsse(void)
2118 trace_css_enable_facility("mcsse");
2119 channel_subsys.max_cssid = MAX_CSSID;
2123 int css_enable_mss(void)
2125 trace_css_enable_facility("mss");
2126 channel_subsys.max_ssid = MAX_SSID;
2130 void css_reset_sch(SubchDev *sch)
2132 PMCW *p = &sch->curr_status.pmcw;
2134 if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
2135 sch->disable_cb(sch);
2139 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
2140 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
2141 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
2142 p->flags |= PMCW_FLAGS_MASK_DNV;
2143 p->devno = sch->devno;
2151 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
2152 PMCW_CHARS_MASK_CSENSE);
2154 memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
2155 sch->curr_status.mba = 0;
2157 sch->channel_prog = 0x0;
2158 sch->last_cmd_valid = false;
2159 sch->thinint_active = false;
2162 void css_reset(void)
2164 CrwContainer *crw_cont;
2166 /* Clean up monitoring. */
2167 channel_subsys.chnmon_active = false;
2168 channel_subsys.chnmon_area = 0;
2170 /* Clear pending CRWs. */
2171 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
2172 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
2175 channel_subsys.sei_pending = false;
2176 channel_subsys.do_crw_mchk = true;
2177 channel_subsys.crws_lost = false;
2179 /* Reset maximum ids. */
2180 channel_subsys.max_cssid = 0;
2181 channel_subsys.max_ssid = 0;
2184 static void get_css_devid(Object *obj, Visitor *v, const char *name,
2185 void *opaque, Error **errp)
2187 DeviceState *dev = DEVICE(obj);
2188 Property *prop = opaque;
2189 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2190 char buffer[] = "xx.x.xxxx";
2194 if (dev_id->valid) {
2196 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
2197 dev_id->ssid, dev_id->devid);
2198 assert(r == sizeof(buffer) - 1);
2200 /* drop leading zero */
2201 if (dev_id->cssid <= 0xf) {
2205 snprintf(buffer, sizeof(buffer), "<unset>");
2208 visit_type_str(v, name, &p, errp);
2212 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
2214 static void set_css_devid(Object *obj, Visitor *v, const char *name,
2215 void *opaque, Error **errp)
2217 DeviceState *dev = DEVICE(obj);
2218 Property *prop = opaque;
2219 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2220 Error *local_err = NULL;
2223 unsigned int cssid, ssid, devid;
2225 if (dev->realized) {
2226 qdev_prop_set_after_realize(dev, name, errp);
2230 visit_type_str(v, name, &str, &local_err);
2232 error_propagate(errp, local_err);
2236 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
2237 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
2238 error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
2241 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
2242 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
2247 dev_id->cssid = cssid;
2248 dev_id->ssid = ssid;
2249 dev_id->devid = devid;
2250 dev_id->valid = true;
2256 PropertyInfo css_devid_propinfo = {
2258 .description = "Identifier of an I/O device in the channel "
2259 "subsystem, example: fe.1.23ab",
2260 .get = get_css_devid,
2261 .set = set_css_devid,
2264 PropertyInfo css_devid_ro_propinfo = {
2266 .description = "Read-only identifier of an I/O device in the channel "
2267 "subsystem, example: fe.1.23ab",
2268 .get = get_css_devid,
2271 SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss,
2278 if (is_virtual != (bus_id.cssid == VIRTUAL_CSSID)) {
2279 error_setg(errp, "cssid %hhx not valid for %s devices",
2281 (is_virtual ? "virtual" : "non-virtual"));
2288 bus_id.cssid = channel_subsys.default_cssid;
2289 } else if (!channel_subsys.css[bus_id.cssid]) {
2290 css_create_css_image(bus_id.cssid, false);
2293 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
2294 bus_id.devid, &schid, errp)) {
2297 } else if (squash_mcss || is_virtual) {
2298 bus_id.cssid = channel_subsys.default_cssid;
2300 if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2301 &bus_id.devid, &schid, errp)) {
2305 for (bus_id.cssid = 0; bus_id.cssid < MAX_CSSID; ++bus_id.cssid) {
2306 if (bus_id.cssid == VIRTUAL_CSSID) {
2310 if (!channel_subsys.css[bus_id.cssid]) {
2311 css_create_css_image(bus_id.cssid, false);
2314 if (css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2315 &bus_id.devid, &schid,
2319 if (bus_id.cssid == MAX_CSSID) {
2320 error_setg(errp, "Virtual channel subsystem is full!");
2326 sch = g_malloc0(sizeof(*sch));
2327 sch->cssid = bus_id.cssid;
2328 sch->ssid = bus_id.ssid;
2329 sch->devno = bus_id.devid;
2331 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
2335 static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id)
2341 PMCW *p = &sch->curr_status.pmcw;
2343 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
2344 dev_id->cssid, dev_id->ssid, dev_id->devid);
2345 fd = fopen(fid_path, "r");
2347 error_report("%s: open %s failed", __func__, fid_path);
2352 if (fscanf(fd, "%x %x %x %x %x %x %x %x",
2353 &chpid[0], &chpid[1], &chpid[2], &chpid[3],
2354 &chpid[4], &chpid[5], &chpid[6], &chpid[7]) != 8) {
2360 for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
2361 p->chpid[i] = chpid[i];
2370 static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id)
2374 uint32_t pim, pam, pom;
2375 PMCW *p = &sch->curr_status.pmcw;
2377 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
2378 dev_id->cssid, dev_id->ssid, dev_id->devid);
2379 fd = fopen(fid_path, "r");
2381 error_report("%s: open %s failed", __func__, fid_path);
2386 if (fscanf(fd, "%x %x %x", &pim, &pam, &pom) != 3) {
2401 static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type,
2407 fid_path = g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
2408 dev_id->cssid, chpid);
2409 fd = fopen(fid_path, "r");
2411 error_report("%s: open %s failed", __func__, fid_path);
2416 if (fscanf(fd, "%x", type) != 1) {
2429 * We currently retrieve the real device information from sysfs to build the
2430 * guest subchannel information block without considering the migration feature.
2431 * We need to revisit this problem when we want to add migration support.
2433 int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id)
2435 CssImage *css = channel_subsys.css[sch->cssid];
2436 PMCW *p = &sch->curr_status.pmcw;
2437 SCSW *s = &sch->curr_status.scsw;
2441 assert(css != NULL);
2442 memset(p, 0, sizeof(PMCW));
2443 p->flags |= PMCW_FLAGS_MASK_DNV;
2444 /* We are dealing with I/O subchannels only. */
2445 p->devno = sch->devno;
2447 /* Grab path mask from sysfs. */
2448 ret = css_sch_get_path_masks(sch, dev_id);
2453 /* Grab chpids from sysfs. */
2454 ret = css_sch_get_chpids(sch, dev_id);
2459 /* Build chpid type. */
2460 for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
2461 if (p->chpid[i] && !css->chpids[p->chpid[i]].in_use) {
2462 ret = css_sch_get_chpid_type(p->chpid[i], &type, dev_id);
2466 css_add_chpid(sch->cssid, p->chpid[i], type, false);
2470 memset(s, 0, sizeof(SCSW));
2471 sch->curr_status.mba = 0;
2472 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
2473 sch->curr_status.mda[i] = 0;