]> Git Repo - qemu.git/blob - target-i386/cpuid.c
x86: Allow multiple cpu feature matches of lookup_feature
[qemu.git] / target-i386 / cpuid.c
1 /*
2  *  i386 CPUID helper functions
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <string.h>
22 #include <inttypes.h>
23
24 #include "cpu.h"
25 #include "kvm.h"
26
27 #include "qemu-option.h"
28 #include "qemu-config.h"
29
30 /* feature flags taken from "Intel Processor Identification and the CPUID
31  * Instruction" and AMD's "CPUID Specification".  In cases of disagreement
32  * between feature naming conventions, aliases may be added.
33  */
34 static const char *feature_name[] = {
35     "fpu", "vme", "de", "pse",
36     "tsc", "msr", "pae", "mce",
37     "cx8", "apic", NULL, "sep",
38     "mtrr", "pge", "mca", "cmov",
39     "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
40     NULL, "ds" /* Intel dts */, "acpi", "mmx",
41     "fxsr", "sse", "sse2", "ss",
42     "ht" /* Intel htt */, "tm", "ia64", "pbe",
43 };
44 static const char *ext_feature_name[] = {
45     "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
46     "ds_cpl", "vmx", "smx", "est",
47     "tm2", "ssse3", "cid", NULL,
48     "fma", "cx16", "xtpr", "pdcm",
49     NULL, NULL, "dca", "sse4.1|sse4_1",
50     "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
51     NULL, "aes", "xsave", "osxsave",
52     "avx", NULL, NULL, "hypervisor",
53 };
54 static const char *ext2_feature_name[] = {
55     "fpu", "vme", "de", "pse",
56     "tsc", "msr", "pae", "mce",
57     "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
58     "mtrr", "pge", "mca", "cmov",
59     "pat", "pse36", NULL, NULL /* Linux mp */,
60     "nx" /* Intel xd */, NULL, "mmxext", "mmx",
61     "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
62     NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
63 };
64 static const char *ext3_feature_name[] = {
65     "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
66     "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
67     "3dnowprefetch", "osvw", "ibs", "xop",
68     "skinit", "wdt", NULL, NULL,
69     "fma4", NULL, "cvt16", "nodeid_msr",
70     NULL, NULL, NULL, NULL,
71     NULL, NULL, NULL, NULL,
72     NULL, NULL, NULL, NULL,
73 };
74
75 static const char *kvm_feature_name[] = {
76     "kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, "kvm_asyncpf", NULL, NULL, NULL,
77     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
78     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
79     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80 };
81
82 static const char *svm_feature_name[] = {
83     "npt", "lbrv", "svm_lock", "nrip_save",
84     "tsc_scale", "vmcb_clean",  "flushbyasid", "decodeassists",
85     NULL, NULL, "pause_filter", NULL,
86     "pfthreshold", NULL, NULL, NULL,
87     NULL, NULL, NULL, NULL,
88     NULL, NULL, NULL, NULL,
89     NULL, NULL, NULL, NULL,
90     NULL, NULL, NULL, NULL,
91 };
92
93 /* collects per-function cpuid data
94  */
95 typedef struct model_features_t {
96     uint32_t *guest_feat;
97     uint32_t *host_feat;
98     uint32_t check_feat;
99     const char **flag_names;
100     uint32_t cpuid;
101     } model_features_t;
102
103 int check_cpuid = 0;
104 int enforce_cpuid = 0;
105
106 void host_cpuid(uint32_t function, uint32_t count,
107                 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
108 {
109 #if defined(CONFIG_KVM)
110     uint32_t vec[4];
111
112 #ifdef __x86_64__
113     asm volatile("cpuid"
114                  : "=a"(vec[0]), "=b"(vec[1]),
115                    "=c"(vec[2]), "=d"(vec[3])
116                  : "0"(function), "c"(count) : "cc");
117 #else
118     asm volatile("pusha \n\t"
119                  "cpuid \n\t"
120                  "mov %%eax, 0(%2) \n\t"
121                  "mov %%ebx, 4(%2) \n\t"
122                  "mov %%ecx, 8(%2) \n\t"
123                  "mov %%edx, 12(%2) \n\t"
124                  "popa"
125                  : : "a"(function), "c"(count), "S"(vec)
126                  : "memory", "cc");
127 #endif
128
129     if (eax)
130         *eax = vec[0];
131     if (ebx)
132         *ebx = vec[1];
133     if (ecx)
134         *ecx = vec[2];
135     if (edx)
136         *edx = vec[3];
137 #endif
138 }
139
140 #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
141
142 /* general substring compare of *[s1..e1) and *[s2..e2).  sx is start of
143  * a substring.  ex if !NULL points to the first char after a substring,
144  * otherwise the string is assumed to sized by a terminating nul.
145  * Return lexical ordering of *s1:*s2.
146  */
147 static int sstrcmp(const char *s1, const char *e1, const char *s2,
148     const char *e2)
149 {
150     for (;;) {
151         if (!*s1 || !*s2 || *s1 != *s2)
152             return (*s1 - *s2);
153         ++s1, ++s2;
154         if (s1 == e1 && s2 == e2)
155             return (0);
156         else if (s1 == e1)
157             return (*s2);
158         else if (s2 == e2)
159             return (*s1);
160     }
161 }
162
163 /* compare *[s..e) to *altstr.  *altstr may be a simple string or multiple
164  * '|' delimited (possibly empty) strings in which case search for a match
165  * within the alternatives proceeds left to right.  Return 0 for success,
166  * non-zero otherwise.
167  */
168 static int altcmp(const char *s, const char *e, const char *altstr)
169 {
170     const char *p, *q;
171
172     for (q = p = altstr; ; ) {
173         while (*p && *p != '|')
174             ++p;
175         if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
176             return (0);
177         if (!*p)
178             return (1);
179         else
180             q = ++p;
181     }
182 }
183
184 /* search featureset for flag *[s..e), if found set corresponding bit in
185  * *pval and return true, otherwise return false
186  */
187 static bool lookup_feature(uint32_t *pval, const char *s, const char *e,
188                            const char **featureset)
189 {
190     uint32_t mask;
191     const char **ppc;
192     bool found = false;
193
194     for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) {
195         if (*ppc && !altcmp(s, e, *ppc)) {
196             *pval |= mask;
197             found = true;
198         }
199     }
200     return found;
201 }
202
203 static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
204                                     uint32_t *ext_features,
205                                     uint32_t *ext2_features,
206                                     uint32_t *ext3_features,
207                                     uint32_t *kvm_features,
208                                     uint32_t *svm_features)
209 {
210     if (!lookup_feature(features, flagname, NULL, feature_name) &&
211         !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
212         !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
213         !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
214         !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
215         !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
216             fprintf(stderr, "CPU feature %s not found\n", flagname);
217 }
218
219 typedef struct x86_def_t {
220     struct x86_def_t *next;
221     const char *name;
222     uint32_t level;
223     uint32_t vendor1, vendor2, vendor3;
224     int family;
225     int model;
226     int stepping;
227     uint32_t features, ext_features, ext2_features, ext3_features;
228     uint32_t kvm_features, svm_features;
229     uint32_t xlevel;
230     char model_id[48];
231     int vendor_override;
232     uint32_t flags;
233 } x86_def_t;
234
235 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
236 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
237           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
238 #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
239           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
240           CPUID_PSE36 | CPUID_FXSR)
241 #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
242 #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
243           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
244           CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
245           CPUID_PAE | CPUID_SEP | CPUID_APIC)
246 #define EXT2_FEATURE_MASK 0x0183F3FF
247
248 #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
249           CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
250           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
251           CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
252           CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
253           /* partly implemented:
254           CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
255           CPUID_PSE36 (needed for Solaris) */
256           /* missing:
257           CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
258 #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
259           CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
260           CPUID_EXT_HYPERVISOR)
261           /* missing:
262           CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
263           CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
264 #define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
265           CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
266           CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
267           /* missing:
268           CPUID_EXT2_PDPE1GB */
269 #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
270           CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
271 #define TCG_SVM_FEATURES 0
272
273 /* maintains list of cpu model definitions
274  */
275 static x86_def_t *x86_defs = {NULL};
276
277 /* built-in cpu model definitions (deprecated)
278  */
279 static x86_def_t builtin_x86_defs[] = {
280     {
281         .name = "qemu64",
282         .level = 4,
283         .vendor1 = CPUID_VENDOR_AMD_1,
284         .vendor2 = CPUID_VENDOR_AMD_2,
285         .vendor3 = CPUID_VENDOR_AMD_3,
286         .family = 6,
287         .model = 2,
288         .stepping = 3,
289         .features = PPRO_FEATURES |
290             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
291             CPUID_PSE36,
292         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
293         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
294             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
295         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
296             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
297         .xlevel = 0x8000000A,
298         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
299     },
300     {
301         .name = "phenom",
302         .level = 5,
303         .vendor1 = CPUID_VENDOR_AMD_1,
304         .vendor2 = CPUID_VENDOR_AMD_2,
305         .vendor3 = CPUID_VENDOR_AMD_3,
306         .family = 16,
307         .model = 2,
308         .stepping = 3,
309         .features = PPRO_FEATURES |
310             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
311             CPUID_PSE36 | CPUID_VME | CPUID_HT,
312         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
313             CPUID_EXT_POPCNT,
314         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
315             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
316             CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
317             CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
318         /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
319                     CPUID_EXT3_CR8LEG,
320                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
321                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
322         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
323             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
324         .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
325         .xlevel = 0x8000001A,
326         .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
327     },
328     {
329         .name = "core2duo",
330         .level = 10,
331         .family = 6,
332         .model = 15,
333         .stepping = 11,
334         .features = PPRO_FEATURES |
335             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
336             CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
337             CPUID_HT | CPUID_TM | CPUID_PBE,
338         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
339             CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
340             CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
341         .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
342         .ext3_features = CPUID_EXT3_LAHF_LM,
343         .xlevel = 0x80000008,
344         .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
345     },
346     {
347         .name = "kvm64",
348         .level = 5,
349         .vendor1 = CPUID_VENDOR_INTEL_1,
350         .vendor2 = CPUID_VENDOR_INTEL_2,
351         .vendor3 = CPUID_VENDOR_INTEL_3,
352         .family = 15,
353         .model = 6,
354         .stepping = 1,
355         /* Missing: CPUID_VME, CPUID_HT */
356         .features = PPRO_FEATURES |
357             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
358             CPUID_PSE36,
359         /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
360         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
361         /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
362         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
363             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
364         /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
365                     CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
366                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
367                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
368         .ext3_features = 0,
369         .xlevel = 0x80000008,
370         .model_id = "Common KVM processor"
371     },
372     {
373         .name = "qemu32",
374         .level = 4,
375         .family = 6,
376         .model = 3,
377         .stepping = 3,
378         .features = PPRO_FEATURES,
379         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
380         .xlevel = 0x80000004,
381         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
382     },
383     {
384         .name = "kvm32",
385         .level = 5,
386         .family = 15,
387         .model = 6,
388         .stepping = 1,
389         .features = PPRO_FEATURES |
390             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
391         .ext_features = CPUID_EXT_SSE3,
392         .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
393         .ext3_features = 0,
394         .xlevel = 0x80000008,
395         .model_id = "Common 32-bit KVM processor"
396     },
397     {
398         .name = "coreduo",
399         .level = 10,
400         .family = 6,
401         .model = 14,
402         .stepping = 8,
403         .features = PPRO_FEATURES | CPUID_VME |
404             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
405             CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
406         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
407             CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
408         .ext2_features = CPUID_EXT2_NX,
409         .xlevel = 0x80000008,
410         .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
411     },
412     {
413         .name = "486",
414         .level = 1,
415         .family = 4,
416         .model = 0,
417         .stepping = 0,
418         .features = I486_FEATURES,
419         .xlevel = 0,
420     },
421     {
422         .name = "pentium",
423         .level = 1,
424         .family = 5,
425         .model = 4,
426         .stepping = 3,
427         .features = PENTIUM_FEATURES,
428         .xlevel = 0,
429     },
430     {
431         .name = "pentium2",
432         .level = 2,
433         .family = 6,
434         .model = 5,
435         .stepping = 2,
436         .features = PENTIUM2_FEATURES,
437         .xlevel = 0,
438     },
439     {
440         .name = "pentium3",
441         .level = 2,
442         .family = 6,
443         .model = 7,
444         .stepping = 3,
445         .features = PENTIUM3_FEATURES,
446         .xlevel = 0,
447     },
448     {
449         .name = "athlon",
450         .level = 2,
451         .vendor1 = CPUID_VENDOR_AMD_1,
452         .vendor2 = CPUID_VENDOR_AMD_2,
453         .vendor3 = CPUID_VENDOR_AMD_3,
454         .family = 6,
455         .model = 2,
456         .stepping = 3,
457         .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
458         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
459         .xlevel = 0x80000008,
460         /* XXX: put another string ? */
461         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
462     },
463     {
464         .name = "n270",
465         /* original is on level 10 */
466         .level = 5,
467         .family = 6,
468         .model = 28,
469         .stepping = 2,
470         .features = PPRO_FEATURES |
471             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
472             CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
473             /* Some CPUs got no CPUID_SEP */
474         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
475             CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
476         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
477         .ext3_features = CPUID_EXT3_LAHF_LM,
478         .xlevel = 0x8000000A,
479         .model_id = "Intel(R) Atom(TM) CPU N270   @ 1.60GHz",
480     },
481 };
482
483 static int cpu_x86_fill_model_id(char *str)
484 {
485     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
486     int i;
487
488     for (i = 0; i < 3; i++) {
489         host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
490         memcpy(str + i * 16 +  0, &eax, 4);
491         memcpy(str + i * 16 +  4, &ebx, 4);
492         memcpy(str + i * 16 +  8, &ecx, 4);
493         memcpy(str + i * 16 + 12, &edx, 4);
494     }
495     return 0;
496 }
497
498 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
499 {
500     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
501
502     x86_cpu_def->name = "host";
503     host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
504     x86_cpu_def->level = eax;
505     x86_cpu_def->vendor1 = ebx;
506     x86_cpu_def->vendor2 = edx;
507     x86_cpu_def->vendor3 = ecx;
508
509     host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
510     x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
511     x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
512     x86_cpu_def->stepping = eax & 0x0F;
513     x86_cpu_def->ext_features = ecx;
514     x86_cpu_def->features = edx;
515
516     host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
517     x86_cpu_def->xlevel = eax;
518
519     host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
520     x86_cpu_def->ext2_features = edx;
521     x86_cpu_def->ext3_features = ecx;
522     cpu_x86_fill_model_id(x86_cpu_def->model_id);
523     x86_cpu_def->vendor_override = 0;
524
525
526     /*
527      * Every SVM feature requires emulation support in KVM - so we can't just
528      * read the host features here. KVM might even support SVM features not
529      * available on the host hardware. Just set all bits and mask out the
530      * unsupported ones later.
531      */
532     x86_cpu_def->svm_features = -1;
533
534     return 0;
535 }
536
537 static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
538 {
539     int i;
540
541     for (i = 0; i < 32; ++i)
542         if (1 << i & mask) {
543             fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
544                 " flag '%s' [0x%08x]\n",
545                 f->cpuid >> 16, f->cpuid & 0xffff,
546                 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
547             break;
548         }
549     return 0;
550 }
551
552 /* best effort attempt to inform user requested cpu flags aren't making
553  * their way to the guest.  Note: ft[].check_feat ideally should be
554  * specified via a guest_def field to suppress report of extraneous flags.
555  */
556 static int check_features_against_host(x86_def_t *guest_def)
557 {
558     x86_def_t host_def;
559     uint32_t mask;
560     int rv, i;
561     struct model_features_t ft[] = {
562         {&guest_def->features, &host_def.features,
563             ~0, feature_name, 0x00000000},
564         {&guest_def->ext_features, &host_def.ext_features,
565             ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
566         {&guest_def->ext2_features, &host_def.ext2_features,
567             ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
568         {&guest_def->ext3_features, &host_def.ext3_features,
569             ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
570
571     cpu_x86_fill_host(&host_def);
572     for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
573         for (mask = 1; mask; mask <<= 1)
574             if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
575                 !(*ft[i].host_feat & mask)) {
576                     unavailable_host_feature(&ft[i], mask);
577                     rv = 1;
578                 }
579     return rv;
580 }
581
582 static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
583 {
584     unsigned int i;
585     x86_def_t *def;
586
587     char *s = strdup(cpu_model);
588     char *featurestr, *name = strtok(s, ",");
589     /* Features to be added*/
590     uint32_t plus_features = 0, plus_ext_features = 0;
591     uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
592     uint32_t plus_kvm_features = 0, plus_svm_features = 0;
593     /* Features to be removed */
594     uint32_t minus_features = 0, minus_ext_features = 0;
595     uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
596     uint32_t minus_kvm_features = 0, minus_svm_features = 0;
597     uint32_t numvalue;
598
599     for (def = x86_defs; def; def = def->next)
600         if (!strcmp(name, def->name))
601             break;
602     if (kvm_enabled() && strcmp(name, "host") == 0) {
603         cpu_x86_fill_host(x86_cpu_def);
604     } else if (!def) {
605         goto error;
606     } else {
607         memcpy(x86_cpu_def, def, sizeof(*def));
608     }
609
610     plus_kvm_features = ~0; /* not supported bits will be filtered out later */
611
612     add_flagname_to_bitmaps("hypervisor", &plus_features,
613         &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
614         &plus_kvm_features, &plus_svm_features);
615
616     featurestr = strtok(NULL, ",");
617
618     while (featurestr) {
619         char *val;
620         if (featurestr[0] == '+') {
621             add_flagname_to_bitmaps(featurestr + 1, &plus_features,
622                             &plus_ext_features, &plus_ext2_features,
623                             &plus_ext3_features, &plus_kvm_features,
624                             &plus_svm_features);
625         } else if (featurestr[0] == '-') {
626             add_flagname_to_bitmaps(featurestr + 1, &minus_features,
627                             &minus_ext_features, &minus_ext2_features,
628                             &minus_ext3_features, &minus_kvm_features,
629                             &minus_svm_features);
630         } else if ((val = strchr(featurestr, '='))) {
631             *val = 0; val++;
632             if (!strcmp(featurestr, "family")) {
633                 char *err;
634                 numvalue = strtoul(val, &err, 0);
635                 if (!*val || *err) {
636                     fprintf(stderr, "bad numerical value %s\n", val);
637                     goto error;
638                 }
639                 x86_cpu_def->family = numvalue;
640             } else if (!strcmp(featurestr, "model")) {
641                 char *err;
642                 numvalue = strtoul(val, &err, 0);
643                 if (!*val || *err || numvalue > 0xff) {
644                     fprintf(stderr, "bad numerical value %s\n", val);
645                     goto error;
646                 }
647                 x86_cpu_def->model = numvalue;
648             } else if (!strcmp(featurestr, "stepping")) {
649                 char *err;
650                 numvalue = strtoul(val, &err, 0);
651                 if (!*val || *err || numvalue > 0xf) {
652                     fprintf(stderr, "bad numerical value %s\n", val);
653                     goto error;
654                 }
655                 x86_cpu_def->stepping = numvalue ;
656             } else if (!strcmp(featurestr, "level")) {
657                 char *err;
658                 numvalue = strtoul(val, &err, 0);
659                 if (!*val || *err) {
660                     fprintf(stderr, "bad numerical value %s\n", val);
661                     goto error;
662                 }
663                 x86_cpu_def->level = numvalue;
664             } else if (!strcmp(featurestr, "xlevel")) {
665                 char *err;
666                 numvalue = strtoul(val, &err, 0);
667                 if (!*val || *err) {
668                     fprintf(stderr, "bad numerical value %s\n", val);
669                     goto error;
670                 }
671                 if (numvalue < 0x80000000) {
672                     numvalue += 0x80000000;
673                 }
674                 x86_cpu_def->xlevel = numvalue;
675             } else if (!strcmp(featurestr, "vendor")) {
676                 if (strlen(val) != 12) {
677                     fprintf(stderr, "vendor string must be 12 chars long\n");
678                     goto error;
679                 }
680                 x86_cpu_def->vendor1 = 0;
681                 x86_cpu_def->vendor2 = 0;
682                 x86_cpu_def->vendor3 = 0;
683                 for(i = 0; i < 4; i++) {
684                     x86_cpu_def->vendor1 |= ((uint8_t)val[i    ]) << (8 * i);
685                     x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
686                     x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
687                 }
688                 x86_cpu_def->vendor_override = 1;
689             } else if (!strcmp(featurestr, "model_id")) {
690                 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
691                         val);
692             } else {
693                 fprintf(stderr, "unrecognized feature %s\n", featurestr);
694                 goto error;
695             }
696         } else if (!strcmp(featurestr, "check")) {
697             check_cpuid = 1;
698         } else if (!strcmp(featurestr, "enforce")) {
699             check_cpuid = enforce_cpuid = 1;
700         } else {
701             fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
702             goto error;
703         }
704         featurestr = strtok(NULL, ",");
705     }
706     x86_cpu_def->features |= plus_features;
707     x86_cpu_def->ext_features |= plus_ext_features;
708     x86_cpu_def->ext2_features |= plus_ext2_features;
709     x86_cpu_def->ext3_features |= plus_ext3_features;
710     x86_cpu_def->kvm_features |= plus_kvm_features;
711     x86_cpu_def->svm_features |= plus_svm_features;
712     x86_cpu_def->features &= ~minus_features;
713     x86_cpu_def->ext_features &= ~minus_ext_features;
714     x86_cpu_def->ext2_features &= ~minus_ext2_features;
715     x86_cpu_def->ext3_features &= ~minus_ext3_features;
716     x86_cpu_def->kvm_features &= ~minus_kvm_features;
717     x86_cpu_def->svm_features &= ~minus_svm_features;
718     if (check_cpuid) {
719         if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
720             goto error;
721     }
722     free(s);
723     return 0;
724
725 error:
726     free(s);
727     return -1;
728 }
729
730 /* generate a composite string into buf of all cpuid names in featureset
731  * selected by fbits.  indicate truncation at bufsize in the event of overflow.
732  * if flags, suppress names undefined in featureset.
733  */
734 static void listflags(char *buf, int bufsize, uint32_t fbits,
735     const char **featureset, uint32_t flags)
736 {
737     const char **p = &featureset[31];
738     char *q, *b, bit;
739     int nc;
740
741     b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
742     *buf = '\0';
743     for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
744         if (fbits & 1 << bit && (*p || !flags)) {
745             if (*p)
746                 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
747             else
748                 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
749             if (bufsize <= nc) {
750                 if (b) {
751                     memcpy(b, "...", sizeof("..."));
752                 }
753                 return;
754             }
755             q += nc;
756             bufsize -= nc;
757         }
758 }
759
760 /* generate CPU information:
761  * -?        list model names
762  * -?model   list model names/IDs
763  * -?dump    output all model (x86_def_t) data
764  * -?cpuid   list all recognized cpuid flag names
765  */
766 void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
767 {
768     unsigned char model = !strcmp("?model", optarg);
769     unsigned char dump = !strcmp("?dump", optarg);
770     unsigned char cpuid = !strcmp("?cpuid", optarg);
771     x86_def_t *def;
772     char buf[256];
773
774     if (cpuid) {
775         (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
776         listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
777         (*cpu_fprintf)(f, "  f_edx: %s\n", buf);
778         listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
779         (*cpu_fprintf)(f, "  f_ecx: %s\n", buf);
780         listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
781         (*cpu_fprintf)(f, "  extf_edx: %s\n", buf);
782         listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
783         (*cpu_fprintf)(f, "  extf_ecx: %s\n", buf);
784         return;
785     }
786     for (def = x86_defs; def; def = def->next) {
787         snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
788         if (model || dump) {
789             (*cpu_fprintf)(f, "x86 %16s  %-48s\n", buf, def->model_id);
790         } else {
791             (*cpu_fprintf)(f, "x86 %16s\n", buf);
792         }
793         if (dump) {
794             memcpy(buf, &def->vendor1, sizeof (def->vendor1));
795             memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
796             memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
797             buf[12] = '\0';
798             (*cpu_fprintf)(f,
799                 "  family %d model %d stepping %d level %d xlevel 0x%x"
800                 " vendor \"%s\"\n",
801                 def->family, def->model, def->stepping, def->level,
802                 def->xlevel, buf);
803             listflags(buf, sizeof (buf), def->features, feature_name, 0);
804             (*cpu_fprintf)(f, "  feature_edx %08x (%s)\n", def->features,
805                 buf);
806             listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
807                 0);
808             (*cpu_fprintf)(f, "  feature_ecx %08x (%s)\n", def->ext_features,
809                 buf);
810             listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
811                 0);
812             (*cpu_fprintf)(f, "  extfeature_edx %08x (%s)\n",
813                 def->ext2_features, buf);
814             listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
815                 0);
816             (*cpu_fprintf)(f, "  extfeature_ecx %08x (%s)\n",
817                 def->ext3_features, buf);
818             (*cpu_fprintf)(f, "\n");
819         }
820     }
821     if (kvm_enabled()) {
822         (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
823     }
824 }
825
826 int cpu_x86_register (CPUX86State *env, const char *cpu_model)
827 {
828     x86_def_t def1, *def = &def1;
829
830     memset(def, 0, sizeof(*def));
831
832     if (cpu_x86_find_by_name(def, cpu_model) < 0)
833         return -1;
834     if (def->vendor1) {
835         env->cpuid_vendor1 = def->vendor1;
836         env->cpuid_vendor2 = def->vendor2;
837         env->cpuid_vendor3 = def->vendor3;
838     } else {
839         env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
840         env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
841         env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
842     }
843     env->cpuid_vendor_override = def->vendor_override;
844     env->cpuid_level = def->level;
845     if (def->family > 0x0f)
846         env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
847     else
848         env->cpuid_version = def->family << 8;
849     env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
850     env->cpuid_version |= def->stepping;
851     env->cpuid_features = def->features;
852     env->cpuid_ext_features = def->ext_features;
853     env->cpuid_ext2_features = def->ext2_features;
854     env->cpuid_ext3_features = def->ext3_features;
855     env->cpuid_xlevel = def->xlevel;
856     env->cpuid_kvm_features = def->kvm_features;
857     env->cpuid_svm_features = def->svm_features;
858     if (!kvm_enabled()) {
859         env->cpuid_features &= TCG_FEATURES;
860         env->cpuid_ext_features &= TCG_EXT_FEATURES;
861         env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
862 #ifdef TARGET_X86_64
863             | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
864 #endif
865             );
866         env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
867         env->cpuid_svm_features &= TCG_SVM_FEATURES;
868     }
869     {
870         const char *model_id = def->model_id;
871         int c, len, i;
872         if (!model_id)
873             model_id = "";
874         len = strlen(model_id);
875         for(i = 0; i < 48; i++) {
876             if (i >= len)
877                 c = '\0';
878             else
879                 c = (uint8_t)model_id[i];
880             env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
881         }
882     }
883     return 0;
884 }
885
886 #if !defined(CONFIG_USER_ONLY)
887 /* copy vendor id string to 32 bit register, nul pad as needed
888  */
889 static void cpyid(const char *s, uint32_t *id)
890 {
891     char *d = (char *)id;
892     char i;
893
894     for (i = sizeof (*id); i--; )
895         *d++ = *s ? *s++ : '\0';
896 }
897
898 /* interpret radix and convert from string to arbitrary scalar,
899  * otherwise flag failure
900  */
901 #define setscalar(pval, str, perr)                      \
902 {                                                       \
903     char *pend;                                         \
904     unsigned long ul;                                   \
905                                                         \
906     ul = strtoul(str, &pend, 0);                        \
907     *str && !*pend ? (*pval = ul) : (*perr = 1);        \
908 }
909
910 /* map cpuid options to feature bits, otherwise return failure
911  * (option tags in *str are delimited by whitespace)
912  */
913 static void setfeatures(uint32_t *pval, const char *str,
914     const char **featureset, int *perr)
915 {
916     const char *p, *q;
917
918     for (q = p = str; *p || *q; q = p) {
919         while (iswhite(*p))
920             q = ++p;
921         while (*p && !iswhite(*p))
922             ++p;
923         if (!*q && !*p)
924             return;
925         if (!lookup_feature(pval, q, p, featureset)) {
926             fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
927                 (int)(p - q), q);
928             *perr = 1;
929             return;
930         }
931     }
932 }
933
934 /* map config file options to x86_def_t form
935  */
936 static int cpudef_setfield(const char *name, const char *str, void *opaque)
937 {
938     x86_def_t *def = opaque;
939     int err = 0;
940
941     if (!strcmp(name, "name")) {
942         def->name = strdup(str);
943     } else if (!strcmp(name, "model_id")) {
944         strncpy(def->model_id, str, sizeof (def->model_id));
945     } else if (!strcmp(name, "level")) {
946         setscalar(&def->level, str, &err)
947     } else if (!strcmp(name, "vendor")) {
948         cpyid(&str[0], &def->vendor1);
949         cpyid(&str[4], &def->vendor2);
950         cpyid(&str[8], &def->vendor3);
951     } else if (!strcmp(name, "family")) {
952         setscalar(&def->family, str, &err)
953     } else if (!strcmp(name, "model")) {
954         setscalar(&def->model, str, &err)
955     } else if (!strcmp(name, "stepping")) {
956         setscalar(&def->stepping, str, &err)
957     } else if (!strcmp(name, "feature_edx")) {
958         setfeatures(&def->features, str, feature_name, &err);
959     } else if (!strcmp(name, "feature_ecx")) {
960         setfeatures(&def->ext_features, str, ext_feature_name, &err);
961     } else if (!strcmp(name, "extfeature_edx")) {
962         setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
963     } else if (!strcmp(name, "extfeature_ecx")) {
964         setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
965     } else if (!strcmp(name, "xlevel")) {
966         setscalar(&def->xlevel, str, &err)
967     } else {
968         fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
969         return (1);
970     }
971     if (err) {
972         fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
973         return (1);
974     }
975     return (0);
976 }
977
978 /* register config file entry as x86_def_t
979  */
980 static int cpudef_register(QemuOpts *opts, void *opaque)
981 {
982     x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
983
984     qemu_opt_foreach(opts, cpudef_setfield, def, 1);
985     def->next = x86_defs;
986     x86_defs = def;
987     return (0);
988 }
989
990 void cpu_clear_apic_feature(CPUX86State *env)
991 {
992     env->cpuid_features &= ~CPUID_APIC;
993 }
994
995 #endif /* !CONFIG_USER_ONLY */
996
997 /* register "cpudef" models defined in configuration file.  Here we first
998  * preload any built-in definitions
999  */
1000 void x86_cpudef_setup(void)
1001 {
1002     int i;
1003
1004     for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1005         builtin_x86_defs[i].next = x86_defs;
1006         builtin_x86_defs[i].flags = 1;
1007         x86_defs = &builtin_x86_defs[i];
1008     }
1009 #if !defined(CONFIG_USER_ONLY)
1010     qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
1011 #endif
1012 }
1013
1014 static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1015                              uint32_t *ecx, uint32_t *edx)
1016 {
1017     *ebx = env->cpuid_vendor1;
1018     *edx = env->cpuid_vendor2;
1019     *ecx = env->cpuid_vendor3;
1020
1021     /* sysenter isn't supported on compatibility mode on AMD, syscall
1022      * isn't supported in compatibility mode on Intel.
1023      * Normally we advertise the actual cpu vendor, but you can override
1024      * this if you want to use KVM's sysenter/syscall emulation
1025      * in compatibility mode and when doing cross vendor migration
1026      */
1027     if (kvm_enabled() && ! env->cpuid_vendor_override) {
1028         host_cpuid(0, 0, NULL, ebx, ecx, edx);
1029     }
1030 }
1031
1032 void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1033                    uint32_t *eax, uint32_t *ebx,
1034                    uint32_t *ecx, uint32_t *edx)
1035 {
1036     /* test if maximum index reached */
1037     if (index & 0x80000000) {
1038         if (index > env->cpuid_xlevel)
1039             index = env->cpuid_level;
1040     } else {
1041         if (index > env->cpuid_level)
1042             index = env->cpuid_level;
1043     }
1044
1045     switch(index) {
1046     case 0:
1047         *eax = env->cpuid_level;
1048         get_cpuid_vendor(env, ebx, ecx, edx);
1049         break;
1050     case 1:
1051         *eax = env->cpuid_version;
1052         *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1053         *ecx = env->cpuid_ext_features;
1054         *edx = env->cpuid_features;
1055         if (env->nr_cores * env->nr_threads > 1) {
1056             *ebx |= (env->nr_cores * env->nr_threads) << 16;
1057             *edx |= 1 << 28;    /* HTT bit */
1058         }
1059         break;
1060     case 2:
1061         /* cache info: needed for Pentium Pro compatibility */
1062         *eax = 1;
1063         *ebx = 0;
1064         *ecx = 0;
1065         *edx = 0x2c307d;
1066         break;
1067     case 4:
1068         /* cache info: needed for Core compatibility */
1069         if (env->nr_cores > 1) {
1070             *eax = (env->nr_cores - 1) << 26;
1071         } else {
1072             *eax = 0;
1073         }
1074         switch (count) {
1075             case 0: /* L1 dcache info */
1076                 *eax |= 0x0000121;
1077                 *ebx = 0x1c0003f;
1078                 *ecx = 0x000003f;
1079                 *edx = 0x0000001;
1080                 break;
1081             case 1: /* L1 icache info */
1082                 *eax |= 0x0000122;
1083                 *ebx = 0x1c0003f;
1084                 *ecx = 0x000003f;
1085                 *edx = 0x0000001;
1086                 break;
1087             case 2: /* L2 cache info */
1088                 *eax |= 0x0000143;
1089                 if (env->nr_threads > 1) {
1090                     *eax |= (env->nr_threads - 1) << 14;
1091                 }
1092                 *ebx = 0x3c0003f;
1093                 *ecx = 0x0000fff;
1094                 *edx = 0x0000001;
1095                 break;
1096             default: /* end of info */
1097                 *eax = 0;
1098                 *ebx = 0;
1099                 *ecx = 0;
1100                 *edx = 0;
1101                 break;
1102         }
1103         break;
1104     case 5:
1105         /* mwait info: needed for Core compatibility */
1106         *eax = 0; /* Smallest monitor-line size in bytes */
1107         *ebx = 0; /* Largest monitor-line size in bytes */
1108         *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1109         *edx = 0;
1110         break;
1111     case 6:
1112         /* Thermal and Power Leaf */
1113         *eax = 0;
1114         *ebx = 0;
1115         *ecx = 0;
1116         *edx = 0;
1117         break;
1118     case 9:
1119         /* Direct Cache Access Information Leaf */
1120         *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1121         *ebx = 0;
1122         *ecx = 0;
1123         *edx = 0;
1124         break;
1125     case 0xA:
1126         /* Architectural Performance Monitoring Leaf */
1127         *eax = 0;
1128         *ebx = 0;
1129         *ecx = 0;
1130         *edx = 0;
1131         break;
1132     case 0xD:
1133         /* Processor Extended State */
1134         if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1135             *eax = 0;
1136             *ebx = 0;
1137             *ecx = 0;
1138             *edx = 0;
1139             break;
1140         }
1141         if (kvm_enabled()) {
1142             *eax = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EAX);
1143             *ebx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EBX);
1144             *ecx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_ECX);
1145             *edx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EDX);
1146         } else {
1147             *eax = 0;
1148             *ebx = 0;
1149             *ecx = 0;
1150             *edx = 0;
1151         }
1152         break;
1153     case 0x80000000:
1154         *eax = env->cpuid_xlevel;
1155         *ebx = env->cpuid_vendor1;
1156         *edx = env->cpuid_vendor2;
1157         *ecx = env->cpuid_vendor3;
1158         break;
1159     case 0x80000001:
1160         *eax = env->cpuid_version;
1161         *ebx = 0;
1162         *ecx = env->cpuid_ext3_features;
1163         *edx = env->cpuid_ext2_features;
1164
1165         /* The Linux kernel checks for the CMPLegacy bit and
1166          * discards multiple thread information if it is set.
1167          * So dont set it here for Intel to make Linux guests happy.
1168          */
1169         if (env->nr_cores * env->nr_threads > 1) {
1170             uint32_t tebx, tecx, tedx;
1171             get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1172             if (tebx != CPUID_VENDOR_INTEL_1 ||
1173                 tedx != CPUID_VENDOR_INTEL_2 ||
1174                 tecx != CPUID_VENDOR_INTEL_3) {
1175                 *ecx |= 1 << 1;    /* CmpLegacy bit */
1176             }
1177         }
1178         break;
1179     case 0x80000002:
1180     case 0x80000003:
1181     case 0x80000004:
1182         *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1183         *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1184         *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1185         *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1186         break;
1187     case 0x80000005:
1188         /* cache info (L1 cache) */
1189         *eax = 0x01ff01ff;
1190         *ebx = 0x01ff01ff;
1191         *ecx = 0x40020140;
1192         *edx = 0x40020140;
1193         break;
1194     case 0x80000006:
1195         /* cache info (L2 cache) */
1196         *eax = 0;
1197         *ebx = 0x42004200;
1198         *ecx = 0x02008140;
1199         *edx = 0;
1200         break;
1201     case 0x80000008:
1202         /* virtual & phys address size in low 2 bytes. */
1203 /* XXX: This value must match the one used in the MMU code. */
1204         if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1205             /* 64 bit processor */
1206 /* XXX: The physical address space is limited to 42 bits in exec.c. */
1207             *eax = 0x00003028;  /* 48 bits virtual, 40 bits physical */
1208         } else {
1209             if (env->cpuid_features & CPUID_PSE36)
1210                 *eax = 0x00000024; /* 36 bits physical */
1211             else
1212                 *eax = 0x00000020; /* 32 bits physical */
1213         }
1214         *ebx = 0;
1215         *ecx = 0;
1216         *edx = 0;
1217         if (env->nr_cores * env->nr_threads > 1) {
1218             *ecx |= (env->nr_cores * env->nr_threads) - 1;
1219         }
1220         break;
1221     case 0x8000000A:
1222         if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1223                 *eax = 0x00000001; /* SVM Revision */
1224                 *ebx = 0x00000010; /* nr of ASIDs */
1225                 *ecx = 0;
1226                 *edx = env->cpuid_svm_features; /* optional features */
1227         } else {
1228                 *eax = 0;
1229                 *ebx = 0;
1230                 *ecx = 0;
1231                 *edx = 0;
1232         }
1233         break;
1234     default:
1235         /* reserved values: zero */
1236         *eax = 0;
1237         *ebx = 0;
1238         *ecx = 0;
1239         *edx = 0;
1240         break;
1241     }
1242 }
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