2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 #include "qemu/osdep.h"
11 #include "hw/sysbus.h"
12 #include "migration/vmstate.h"
13 #include "hw/input/ps2.h"
16 #include "qemu/module.h"
17 #include "qom/object.h"
19 #define TYPE_PL050 "pl050"
20 OBJECT_DECLARE_SIMPLE_TYPE(PL050State, PL050)
23 SysBusDevice parent_obj;
35 static const VMStateDescription vmstate_pl050 = {
38 .minimum_version_id = 2,
39 .fields = (VMStateField[]) {
40 VMSTATE_UINT32(cr, PL050State),
41 VMSTATE_UINT32(clk, PL050State),
42 VMSTATE_UINT32(last, PL050State),
43 VMSTATE_INT32(pending, PL050State),
48 #define PL050_TXEMPTY (1 << 6)
49 #define PL050_TXBUSY (1 << 5)
50 #define PL050_RXFULL (1 << 4)
51 #define PL050_RXBUSY (1 << 3)
52 #define PL050_RXPARITY (1 << 2)
53 #define PL050_KMIC (1 << 1)
54 #define PL050_KMID (1 << 0)
56 static const unsigned char pl050_id[] =
57 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
59 static void pl050_update(void *opaque, int level)
61 PL050State *s = (PL050State *)opaque;
65 raise = (s->pending && (s->cr & 0x10) != 0)
66 || (s->cr & 0x08) != 0;
67 qemu_set_irq(s->irq, raise);
70 static uint64_t pl050_read(void *opaque, hwaddr offset,
73 PL050State *s = (PL050State *)opaque;
74 if (offset >= 0xfe0 && offset < 0x1000)
75 return pl050_id[(offset - 0xfe0) >> 2];
77 switch (offset >> 2) {
86 val = val ^ (val >> 4);
87 val = val ^ (val >> 2);
88 val = (val ^ (val >> 1)) & 1;
92 stat |= PL050_RXPARITY;
100 s->last = ps2_read_data(s->dev);
102 case 3: /* KMICLKDIV */
105 return s->pending | 2;
107 qemu_log_mask(LOG_GUEST_ERROR,
108 "pl050_read: Bad offset %x\n", (int)offset);
113 static void pl050_write(void *opaque, hwaddr offset,
114 uint64_t value, unsigned size)
116 PL050State *s = (PL050State *)opaque;
117 switch (offset >> 2) {
120 pl050_update(s, s->pending);
121 /* ??? Need to implement the enable/disable bit. */
123 case 2: /* KMIDATA */
124 /* ??? This should toggle the TX interrupt line. */
125 /* ??? This means kbd/mouse can block each other. */
127 ps2_write_mouse(s->dev, value);
129 ps2_write_keyboard(s->dev, value);
132 case 3: /* KMICLKDIV */
136 qemu_log_mask(LOG_GUEST_ERROR,
137 "pl050_write: Bad offset %x\n", (int)offset);
140 static const MemoryRegionOps pl050_ops = {
142 .write = pl050_write,
143 .endianness = DEVICE_NATIVE_ENDIAN,
146 static void pl050_realize(DeviceState *dev, Error **errp)
148 PL050State *s = PL050(dev);
149 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
151 memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
152 sysbus_init_mmio(sbd, &s->iomem);
153 sysbus_init_irq(sbd, &s->irq);
155 s->dev = ps2_mouse_init(pl050_update, s);
157 s->dev = ps2_kbd_init(pl050_update, s);
161 static void pl050_keyboard_init(Object *obj)
163 PL050State *s = PL050(obj);
168 static void pl050_mouse_init(Object *obj)
170 PL050State *s = PL050(obj);
175 static const TypeInfo pl050_kbd_info = {
176 .name = "pl050_keyboard",
177 .parent = TYPE_PL050,
178 .instance_init = pl050_keyboard_init,
181 static const TypeInfo pl050_mouse_info = {
182 .name = "pl050_mouse",
183 .parent = TYPE_PL050,
184 .instance_init = pl050_mouse_init,
187 static void pl050_class_init(ObjectClass *oc, void *data)
189 DeviceClass *dc = DEVICE_CLASS(oc);
191 dc->realize = pl050_realize;
192 dc->vmsd = &vmstate_pl050;
195 static const TypeInfo pl050_type_info = {
197 .parent = TYPE_SYS_BUS_DEVICE,
198 .instance_size = sizeof(PL050State),
200 .class_init = pl050_class_init,
203 static void pl050_register_types(void)
205 type_register_static(&pl050_type_info);
206 type_register_static(&pl050_kbd_info);
207 type_register_static(&pl050_mouse_info);
210 type_init(pl050_register_types)