1 #if !defined(__QEMU_MIPS_EXEC_H__)
2 #define __QEMU_MIPS_EXEC_H__
7 #include "dyngen-exec.h"
9 register struct CPUMIPSState *env asm(AREG0);
11 #if defined (USE_64BITS_REGS)
12 typedef int64_t host_int_t;
13 typedef uint64_t host_uint_t;
15 typedef int32_t host_int_t;
16 typedef uint32_t host_uint_t;
19 register host_uint_t T0 asm(AREG1);
20 register host_uint_t T1 asm(AREG2);
21 register host_uint_t T2 asm(AREG3);
22 register host_int_t Ts0 asm(AREG1);
23 register host_int_t Ts1 asm(AREG2);
24 register host_int_t Ts2 asm(AREG3);
26 #define PARAM(n) ((uint32_t)PARAM##n)
27 #define SPARAM(n) ((int32_t)PARAM##n)
29 #if defined (USE_HOST_FLOAT_REGS)
30 register double FT0 asm(FREG0);
31 register double FT1 asm(FREG1);
32 register double FT2 asm(FREG2);
33 register float FTS0 asm(FREG0);
34 register float FTS1 asm(FREG1);
35 register float FTS2 asm(FREG2);
37 #define FT0 (env->ft0.d)
38 #define FT1 (env->ft1.d)
39 #define FT2 (env->ft2.d)
40 #define FTS0 (env->ft0.f)
41 #define FTS1 (env->ft1.f)
42 #define FTS2 (env->ft2.f)
45 #if defined (DEBUG_OP)
46 #define RETURN() __asm__ __volatile__("nop");
48 #define RETURN() __asm__ __volatile__("");
54 #if !defined(CONFIG_USER_ONLY)
56 #define ldul_user ldl_user
57 #define ldul_kernel ldl_kernel
60 #define MEMSUFFIX _kernel
62 #include "softmmu_header.h"
65 #include "softmmu_header.h"
68 #include "softmmu_header.h"
71 #include "softmmu_header.h"
76 #define MEMSUFFIX _user
78 #include "softmmu_header.h"
81 #include "softmmu_header.h"
84 #include "softmmu_header.h"
87 #include "softmmu_header.h"
91 /* these access are slower, they must be as rare as possible */
93 #define MEMSUFFIX _data
95 #include "softmmu_header.h"
98 #include "softmmu_header.h"
101 #include "softmmu_header.h"
104 #include "softmmu_header.h"
108 #define ldub(p) ldub_data(p)
109 #define ldsb(p) ldsb_data(p)
110 #define lduw(p) lduw_data(p)
111 #define ldsw(p) ldsw_data(p)
112 #define ldl(p) ldl_data(p)
113 #define ldq(p) ldq_data(p)
115 #define stb(p, v) stb_data(p, v)
116 #define stw(p, v) stw_data(p, v)
117 #define stl(p, v) stl_data(p, v)
118 #define stq(p, v) stq_data(p, v)
120 #endif /* !defined(CONFIG_USER_ONLY) */
122 static inline void env_to_regs(void)
126 static inline void regs_to_env(void)
130 #if (HOST_LONG_BITS == 32)
132 void do_multu (void);
134 void do_maddu (void);
136 void do_msubu (void);
138 __attribute__ (( regparm(2) ))
139 void do_mfc0(int reg, int sel);
140 __attribute__ (( regparm(2) ))
141 void do_mtc0(int reg, int sel);
142 void do_tlbwi (void);
143 void do_tlbwr (void);
146 void do_lwl_raw (void);
147 void do_lwr_raw (void);
148 void do_swl_raw (void);
149 void do_swr_raw (void);
150 #if !defined(CONFIG_USER_ONLY)
151 void do_lwl_user (void);
152 void do_lwl_kernel (void);
153 void do_lwr_user (void);
154 void do_lwr_kernel (void);
155 void do_swl_user (void);
156 void do_swl_kernel (void);
157 void do_swr_user (void);
158 void do_swr_kernel (void);
160 __attribute__ (( regparm(1) ))
161 void do_pmon (int function);
163 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
164 int is_user, int is_softmmu);
165 void do_interrupt (CPUState *env);
167 void cpu_loop_exit(void);
168 __attribute__ (( regparm(2) ))
169 void do_raise_exception_err (uint32_t exception, int error_code);
170 __attribute__ (( regparm(1) ))
171 void do_raise_exception (uint32_t exception);
173 void cpu_dump_state(CPUState *env, FILE *f,
174 int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
176 void cpu_mips_irqctrl_init (void);
177 uint32_t cpu_mips_get_random (CPUState *env);
178 uint32_t cpu_mips_get_count (CPUState *env);
179 void cpu_mips_store_count (CPUState *env, uint32_t value);
180 void cpu_mips_store_compare (CPUState *env, uint32_t value);
181 void cpu_mips_clock_init (CPUState *env);
183 #endif /* !defined(__QEMU_MIPS_EXEC_H__) */