2 * QEMU PowerPC e500v2 ePAPR spinning code
4 * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 * This code is not really a device, but models an interface that usually
22 * firmware takes care of. It's used when QEMU plays the role of firmware.
26 * https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.1.pdf
37 typedef struct spin_info {
43 } __attribute__ ((packed)) SpinInfo;
45 typedef struct spin_state {
48 SpinInfo spin[MAX_CPUS];
51 typedef struct spin_kick {
56 static void spin_reset(void *opaque)
58 SpinState *s = opaque;
61 for (i = 0; i < MAX_CPUS; i++) {
62 SpinInfo *info = &s->spin[i];
70 /* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
71 static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
73 return (ffs(size >> 10) - 1) >> 1;
76 static void mmubooke_create_initial_mapping(CPUState *env,
78 target_phys_addr_t pa,
79 target_phys_addr_t len)
81 ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 1);
82 target_phys_addr_t size;
84 size = (booke206_page_size_to_tlb(len) << MAS1_TSIZE_SHIFT);
85 tlb->mas1 = MAS1_VALID | size;
86 tlb->mas2 = (va & TARGET_PAGE_MASK) | MAS2_M;
87 tlb->mas7_3 = pa & TARGET_PAGE_MASK;
88 tlb->mas7_3 |= MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW | MAS3_SX;
91 static void spin_kick(void *data)
93 SpinKick *kick = data;
94 CPUState *env = kick->env;
95 SpinInfo *curspin = kick->spin;
96 target_phys_addr_t map_size = 64 * 1024 * 1024;
97 target_phys_addr_t map_start;
99 cpu_synchronize_state(env);
100 stl_p(&curspin->pir, env->spr[SPR_PIR]);
101 env->nip = ldq_p(&curspin->addr) & (map_size - 1);
102 env->gpr[3] = ldq_p(&curspin->r3);
106 env->gpr[7] = map_size;
110 map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
111 mmubooke_create_initial_mapping(env, 0, map_start, map_size);
114 env->exception_index = -1;
118 static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
121 SpinState *s = opaque;
122 int env_idx = addr / sizeof(SpinInfo);
124 SpinInfo *curspin = &s->spin[env_idx];
125 uint8_t *curspin_p = (uint8_t*)curspin;
127 for (env = first_cpu; env != NULL; env = env->next_cpu) {
128 if (env->cpu_index == env_idx) {
138 if (!env->cpu_index) {
139 /* primary CPU doesn't spin */
143 curspin_p = &curspin_p[addr % sizeof(SpinInfo)];
146 stb_p(curspin_p, value);
149 stw_p(curspin_p, value);
152 stl_p(curspin_p, value);
156 if (!(ldq_p(&curspin->addr) & 1)) {
163 run_on_cpu(env, spin_kick, &kick);
167 static uint64_t spin_read(void *opaque, target_phys_addr_t addr, unsigned len)
169 SpinState *s = opaque;
170 uint8_t *spin_p = &((uint8_t*)s->spin)[addr];
174 return ldub_p(spin_p);
176 return lduw_p(spin_p);
178 return ldl_p(spin_p);
184 const MemoryRegionOps spin_rw_ops = {
187 .endianness = DEVICE_BIG_ENDIAN,
190 static int ppce500_spin_initfn(SysBusDevice *dev)
194 s = FROM_SYSBUS(SpinState, sysbus_from_qdev(dev));
196 memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
197 sizeof(SpinInfo) * MAX_CPUS);
198 sysbus_init_mmio_region(dev, &s->iomem);
200 qemu_register_reset(spin_reset, s);
205 static SysBusDeviceInfo ppce500_spin_info = {
206 .init = ppce500_spin_initfn,
207 .qdev.name = "e500-spin",
208 .qdev.size = sizeof(SpinState),
211 static void ppce500_spin_register(void)
213 sysbus_register_withprop(&ppce500_spin_info);
215 device_init(ppce500_spin_register);