2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
21 #include <linux/vfio.h>
22 #include <sys/ioctl.h>
25 #include <sys/types.h>
29 #include "hw/pci/msi.h"
30 #include "hw/pci/msix.h"
31 #include "hw/pci/pci_bridge.h"
32 #include "qemu/error-report.h"
33 #include "qemu/range.h"
34 #include "sysemu/kvm.h"
35 #include "sysemu/sysemu.h"
39 #define MSIX_CAP_LENGTH 12
41 static void vfio_disable_interrupts(VFIOPCIDevice *vdev);
42 static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled);
45 * Disabling BAR mmaping can be slow, but toggling it around INTx can
46 * also be a huge overhead. We try to get the best of both worlds by
47 * waiting until an interrupt to disable mmaps (subsequent transitions
48 * to the same state are effectively no overhead). If the interrupt has
49 * been serviced and the time gap is long enough, we re-enable mmaps for
50 * performance. This works well for things like graphics cards, which
51 * may not use their interrupt at all and are penalized to an unusable
52 * level by read/write BAR traps. Other devices, like NICs, have more
53 * regular interrupts and see much better latency by staying in non-mmap
54 * mode. We therefore set the default mmap_timeout such that a ping
55 * is just enough to keep the mmap disabled. Users can experiment with
56 * other options with the x-intx-mmap-timeout-ms parameter (a value of
57 * zero disables the timer).
59 static void vfio_intx_mmap_enable(void *opaque)
61 VFIOPCIDevice *vdev = opaque;
63 if (vdev->intx.pending) {
64 timer_mod(vdev->intx.mmap_timer,
65 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout);
69 vfio_mmap_set_enabled(vdev, true);
72 static void vfio_intx_interrupt(void *opaque)
74 VFIOPCIDevice *vdev = opaque;
76 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
80 trace_vfio_intx_interrupt(vdev->vbasedev.name, 'A' + vdev->intx.pin);
82 vdev->intx.pending = true;
83 pci_irq_assert(&vdev->pdev);
84 vfio_mmap_set_enabled(vdev, false);
85 if (vdev->intx.mmap_timeout) {
86 timer_mod(vdev->intx.mmap_timer,
87 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout);
91 static void vfio_intx_eoi(VFIODevice *vbasedev)
93 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
95 if (!vdev->intx.pending) {
99 trace_vfio_intx_eoi(vbasedev->name);
101 vdev->intx.pending = false;
102 pci_irq_deassert(&vdev->pdev);
103 vfio_unmask_single_irqindex(vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
106 static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev)
109 struct kvm_irqfd irqfd = {
110 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
111 .gsi = vdev->intx.route.irq,
112 .flags = KVM_IRQFD_FLAG_RESAMPLE,
114 struct vfio_irq_set *irq_set;
118 if (vdev->no_kvm_intx || !kvm_irqfds_enabled() ||
119 vdev->intx.route.mode != PCI_INTX_ENABLED ||
120 !kvm_resamplefds_enabled()) {
124 /* Get to a known interrupt state */
125 qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
126 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
127 vdev->intx.pending = false;
128 pci_irq_deassert(&vdev->pdev);
130 /* Get an eventfd for resample/unmask */
131 if (event_notifier_init(&vdev->intx.unmask, 0)) {
132 error_report("vfio: Error: event_notifier_init failed eoi");
136 /* KVM triggers it, VFIO listens for it */
137 irqfd.resamplefd = event_notifier_get_fd(&vdev->intx.unmask);
139 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
140 error_report("vfio: Error: Failed to setup resample irqfd: %m");
144 argsz = sizeof(*irq_set) + sizeof(*pfd);
146 irq_set = g_malloc0(argsz);
147 irq_set->argsz = argsz;
148 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNMASK;
149 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
152 pfd = (int32_t *)&irq_set->data;
154 *pfd = irqfd.resamplefd;
156 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
159 error_report("vfio: Error: Failed to setup INTx unmask fd: %m");
164 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
166 vdev->intx.kvm_accel = true;
168 trace_vfio_intx_enable_kvm(vdev->vbasedev.name);
173 irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN;
174 kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd);
176 event_notifier_cleanup(&vdev->intx.unmask);
178 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
179 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
183 static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev)
186 struct kvm_irqfd irqfd = {
187 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
188 .gsi = vdev->intx.route.irq,
189 .flags = KVM_IRQFD_FLAG_DEASSIGN,
192 if (!vdev->intx.kvm_accel) {
197 * Get to a known state, hardware masked, QEMU ready to accept new
198 * interrupts, QEMU IRQ de-asserted.
200 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
201 vdev->intx.pending = false;
202 pci_irq_deassert(&vdev->pdev);
204 /* Tell KVM to stop listening for an INTx irqfd */
205 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
206 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
209 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
210 event_notifier_cleanup(&vdev->intx.unmask);
212 /* QEMU starts listening for interrupt events. */
213 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
215 vdev->intx.kvm_accel = false;
217 /* If we've missed an event, let it re-fire through QEMU */
218 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
220 trace_vfio_intx_disable_kvm(vdev->vbasedev.name);
224 static void vfio_intx_update(PCIDevice *pdev)
226 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
229 if (vdev->interrupt != VFIO_INT_INTx) {
233 route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin);
235 if (!pci_intx_route_changed(&vdev->intx.route, &route)) {
236 return; /* Nothing changed */
239 trace_vfio_intx_update(vdev->vbasedev.name,
240 vdev->intx.route.irq, route.irq);
242 vfio_intx_disable_kvm(vdev);
244 vdev->intx.route = route;
246 if (route.mode != PCI_INTX_ENABLED) {
250 vfio_intx_enable_kvm(vdev);
252 /* Re-enable the interrupt in cased we missed an EOI */
253 vfio_intx_eoi(&vdev->vbasedev);
256 static int vfio_intx_enable(VFIOPCIDevice *vdev)
258 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
260 struct vfio_irq_set *irq_set;
267 vfio_disable_interrupts(vdev);
269 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
270 pci_config_set_interrupt_pin(vdev->pdev.config, pin);
274 * Only conditional to avoid generating error messages on platforms
275 * where we won't actually use the result anyway.
277 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
278 vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev,
283 ret = event_notifier_init(&vdev->intx.interrupt, 0);
285 error_report("vfio: Error: event_notifier_init failed");
289 argsz = sizeof(*irq_set) + sizeof(*pfd);
291 irq_set = g_malloc0(argsz);
292 irq_set->argsz = argsz;
293 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
294 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
297 pfd = (int32_t *)&irq_set->data;
299 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
300 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
302 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
305 error_report("vfio: Error: Failed to setup INTx fd: %m");
306 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
307 event_notifier_cleanup(&vdev->intx.interrupt);
311 vfio_intx_enable_kvm(vdev);
313 vdev->interrupt = VFIO_INT_INTx;
315 trace_vfio_intx_enable(vdev->vbasedev.name);
320 static void vfio_intx_disable(VFIOPCIDevice *vdev)
324 timer_del(vdev->intx.mmap_timer);
325 vfio_intx_disable_kvm(vdev);
326 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
327 vdev->intx.pending = false;
328 pci_irq_deassert(&vdev->pdev);
329 vfio_mmap_set_enabled(vdev, true);
331 fd = event_notifier_get_fd(&vdev->intx.interrupt);
332 qemu_set_fd_handler(fd, NULL, NULL, vdev);
333 event_notifier_cleanup(&vdev->intx.interrupt);
335 vdev->interrupt = VFIO_INT_NONE;
337 trace_vfio_intx_disable(vdev->vbasedev.name);
343 static void vfio_msi_interrupt(void *opaque)
345 VFIOMSIVector *vector = opaque;
346 VFIOPCIDevice *vdev = vector->vdev;
347 MSIMessage (*get_msg)(PCIDevice *dev, unsigned vector);
348 void (*notify)(PCIDevice *dev, unsigned vector);
350 int nr = vector - vdev->msi_vectors;
352 if (!event_notifier_test_and_clear(&vector->interrupt)) {
356 if (vdev->interrupt == VFIO_INT_MSIX) {
357 get_msg = msix_get_message;
358 notify = msix_notify;
359 } else if (vdev->interrupt == VFIO_INT_MSI) {
360 get_msg = msi_get_message;
366 msg = get_msg(&vdev->pdev, nr);
367 trace_vfio_msi_interrupt(vdev->vbasedev.name, nr, msg.address, msg.data);
368 notify(&vdev->pdev, nr);
371 static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix)
373 struct vfio_irq_set *irq_set;
374 int ret = 0, i, argsz;
377 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
379 irq_set = g_malloc0(argsz);
380 irq_set->argsz = argsz;
381 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
382 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
384 irq_set->count = vdev->nr_vectors;
385 fds = (int32_t *)&irq_set->data;
387 for (i = 0; i < vdev->nr_vectors; i++) {
391 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
392 * bits, therefore we always use the KVM signaling path when setup.
393 * MSI-X mask and pending bits are emulated, so we want to use the
394 * KVM signaling path only when configured and unmasked.
396 if (vdev->msi_vectors[i].use) {
397 if (vdev->msi_vectors[i].virq < 0 ||
398 (msix && msix_is_masked(&vdev->pdev, i))) {
399 fd = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
401 fd = event_notifier_get_fd(&vdev->msi_vectors[i].kvm_interrupt);
408 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
415 static void vfio_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vector,
416 MSIMessage *msg, bool msix)
420 if ((msix && vdev->no_kvm_msix) || (!msix && vdev->no_kvm_msi) || !msg) {
424 if (event_notifier_init(&vector->kvm_interrupt, 0)) {
428 virq = kvm_irqchip_add_msi_route(kvm_state, *msg, &vdev->pdev);
430 event_notifier_cleanup(&vector->kvm_interrupt);
434 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt,
436 kvm_irqchip_release_virq(kvm_state, virq);
437 event_notifier_cleanup(&vector->kvm_interrupt);
444 static void vfio_remove_kvm_msi_virq(VFIOMSIVector *vector)
446 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt,
448 kvm_irqchip_release_virq(kvm_state, vector->virq);
450 event_notifier_cleanup(&vector->kvm_interrupt);
453 static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg,
456 kvm_irqchip_update_msi_route(kvm_state, vector->virq, msg, pdev);
459 static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
460 MSIMessage *msg, IOHandler *handler)
462 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
463 VFIOMSIVector *vector;
466 trace_vfio_msix_vector_do_use(vdev->vbasedev.name, nr);
468 vector = &vdev->msi_vectors[nr];
473 if (event_notifier_init(&vector->interrupt, 0)) {
474 error_report("vfio: Error: event_notifier_init failed");
477 msix_vector_use(pdev, nr);
480 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
481 handler, NULL, vector);
484 * Attempt to enable route through KVM irqchip,
485 * default to userspace handling if unavailable.
487 if (vector->virq >= 0) {
489 vfio_remove_kvm_msi_virq(vector);
491 vfio_update_kvm_msi_virq(vector, *msg, pdev);
494 vfio_add_kvm_msi_virq(vdev, vector, msg, true);
498 * We don't want to have the host allocate all possible MSI vectors
499 * for a device if they're not in use, so we shutdown and incrementally
500 * increase them as needed.
502 if (vdev->nr_vectors < nr + 1) {
503 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX);
504 vdev->nr_vectors = nr + 1;
505 ret = vfio_enable_vectors(vdev, true);
507 error_report("vfio: failed to enable vectors, %d", ret);
511 struct vfio_irq_set *irq_set;
514 argsz = sizeof(*irq_set) + sizeof(*pfd);
516 irq_set = g_malloc0(argsz);
517 irq_set->argsz = argsz;
518 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
519 VFIO_IRQ_SET_ACTION_TRIGGER;
520 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
523 pfd = (int32_t *)&irq_set->data;
525 if (vector->virq >= 0) {
526 *pfd = event_notifier_get_fd(&vector->kvm_interrupt);
528 *pfd = event_notifier_get_fd(&vector->interrupt);
531 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
534 error_report("vfio: failed to modify vector, %d", ret);
541 static int vfio_msix_vector_use(PCIDevice *pdev,
542 unsigned int nr, MSIMessage msg)
544 return vfio_msix_vector_do_use(pdev, nr, &msg, vfio_msi_interrupt);
547 static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
549 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
550 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
552 trace_vfio_msix_vector_release(vdev->vbasedev.name, nr);
555 * There are still old guests that mask and unmask vectors on every
556 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
557 * the KVM setup in place, simply switch VFIO to use the non-bypass
558 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
559 * core will mask the interrupt and set pending bits, allowing it to
560 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
562 if (vector->virq >= 0) {
564 struct vfio_irq_set *irq_set;
567 argsz = sizeof(*irq_set) + sizeof(*pfd);
569 irq_set = g_malloc0(argsz);
570 irq_set->argsz = argsz;
571 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
572 VFIO_IRQ_SET_ACTION_TRIGGER;
573 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
576 pfd = (int32_t *)&irq_set->data;
578 *pfd = event_notifier_get_fd(&vector->interrupt);
580 ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
586 static void vfio_msix_enable(VFIOPCIDevice *vdev)
588 vfio_disable_interrupts(vdev);
590 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->msix->entries);
592 vdev->interrupt = VFIO_INT_MSIX;
595 * Some communication channels between VF & PF or PF & fw rely on the
596 * physical state of the device and expect that enabling MSI-X from the
597 * guest enables the same on the host. When our guest is Linux, the
598 * guest driver call to pci_enable_msix() sets the enabling bit in the
599 * MSI-X capability, but leaves the vector table masked. We therefore
600 * can't rely on a vector_use callback (from request_irq() in the guest)
601 * to switch the physical device into MSI-X mode because that may come a
602 * long time after pci_enable_msix(). This code enables vector 0 with
603 * triggering to userspace, then immediately release the vector, leaving
604 * the physical device with no vectors enabled, but MSI-X enabled, just
605 * like the guest view.
607 vfio_msix_vector_do_use(&vdev->pdev, 0, NULL, NULL);
608 vfio_msix_vector_release(&vdev->pdev, 0);
610 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
611 vfio_msix_vector_release, NULL)) {
612 error_report("vfio: msix_set_vector_notifiers failed");
615 trace_vfio_msix_enable(vdev->vbasedev.name);
618 static void vfio_msi_enable(VFIOPCIDevice *vdev)
622 vfio_disable_interrupts(vdev);
624 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
626 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->nr_vectors);
628 for (i = 0; i < vdev->nr_vectors; i++) {
629 VFIOMSIVector *vector = &vdev->msi_vectors[i];
630 MSIMessage msg = msi_get_message(&vdev->pdev, i);
636 if (event_notifier_init(&vector->interrupt, 0)) {
637 error_report("vfio: Error: event_notifier_init failed");
640 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
641 vfio_msi_interrupt, NULL, vector);
644 * Attempt to enable route through KVM irqchip,
645 * default to userspace handling if unavailable.
647 vfio_add_kvm_msi_virq(vdev, vector, &msg, false);
650 /* Set interrupt type prior to possible interrupts */
651 vdev->interrupt = VFIO_INT_MSI;
653 ret = vfio_enable_vectors(vdev, false);
656 error_report("vfio: Error: Failed to setup MSI fds: %m");
657 } else if (ret != vdev->nr_vectors) {
658 error_report("vfio: Error: Failed to enable %d "
659 "MSI vectors, retry with %d", vdev->nr_vectors, ret);
662 for (i = 0; i < vdev->nr_vectors; i++) {
663 VFIOMSIVector *vector = &vdev->msi_vectors[i];
664 if (vector->virq >= 0) {
665 vfio_remove_kvm_msi_virq(vector);
667 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
669 event_notifier_cleanup(&vector->interrupt);
672 g_free(vdev->msi_vectors);
674 if (ret > 0 && ret != vdev->nr_vectors) {
675 vdev->nr_vectors = ret;
678 vdev->nr_vectors = 0;
681 * Failing to setup MSI doesn't really fall within any specification.
682 * Let's try leaving interrupts disabled and hope the guest figures
683 * out to fall back to INTx for this device.
685 error_report("vfio: Error: Failed to enable MSI");
686 vdev->interrupt = VFIO_INT_NONE;
691 trace_vfio_msi_enable(vdev->vbasedev.name, vdev->nr_vectors);
694 static void vfio_msi_disable_common(VFIOPCIDevice *vdev)
698 for (i = 0; i < vdev->nr_vectors; i++) {
699 VFIOMSIVector *vector = &vdev->msi_vectors[i];
700 if (vdev->msi_vectors[i].use) {
701 if (vector->virq >= 0) {
702 vfio_remove_kvm_msi_virq(vector);
704 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
706 event_notifier_cleanup(&vector->interrupt);
710 g_free(vdev->msi_vectors);
711 vdev->msi_vectors = NULL;
712 vdev->nr_vectors = 0;
713 vdev->interrupt = VFIO_INT_NONE;
715 vfio_intx_enable(vdev);
718 static void vfio_msix_disable(VFIOPCIDevice *vdev)
722 msix_unset_vector_notifiers(&vdev->pdev);
725 * MSI-X will only release vectors if MSI-X is still enabled on the
726 * device, check through the rest and release it ourselves if necessary.
728 for (i = 0; i < vdev->nr_vectors; i++) {
729 if (vdev->msi_vectors[i].use) {
730 vfio_msix_vector_release(&vdev->pdev, i);
731 msix_vector_unuse(&vdev->pdev, i);
735 if (vdev->nr_vectors) {
736 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX);
739 vfio_msi_disable_common(vdev);
741 trace_vfio_msix_disable(vdev->vbasedev.name);
744 static void vfio_msi_disable(VFIOPCIDevice *vdev)
746 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSI_IRQ_INDEX);
747 vfio_msi_disable_common(vdev);
749 trace_vfio_msi_disable(vdev->vbasedev.name);
752 static void vfio_update_msi(VFIOPCIDevice *vdev)
756 for (i = 0; i < vdev->nr_vectors; i++) {
757 VFIOMSIVector *vector = &vdev->msi_vectors[i];
760 if (!vector->use || vector->virq < 0) {
764 msg = msi_get_message(&vdev->pdev, i);
765 vfio_update_kvm_msi_virq(vector, msg, &vdev->pdev);
769 static void vfio_pci_load_rom(VFIOPCIDevice *vdev)
771 struct vfio_region_info reg_info = {
772 .argsz = sizeof(reg_info),
773 .index = VFIO_PCI_ROM_REGION_INDEX
779 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
780 error_report("vfio: Error getting ROM info: %m");
784 trace_vfio_pci_load_rom(vdev->vbasedev.name, (unsigned long)reg_info.size,
785 (unsigned long)reg_info.offset,
786 (unsigned long)reg_info.flags);
788 vdev->rom_size = size = reg_info.size;
789 vdev->rom_offset = reg_info.offset;
791 if (!vdev->rom_size) {
792 vdev->rom_read_failed = true;
793 error_report("vfio-pci: Cannot read device rom at "
794 "%s", vdev->vbasedev.name);
795 error_printf("Device option ROM contents are probably invalid "
796 "(check dmesg).\nSkip option ROM probe with rombar=0, "
797 "or load from file with romfile=\n");
801 vdev->rom = g_malloc(size);
802 memset(vdev->rom, 0xff, size);
805 bytes = pread(vdev->vbasedev.fd, vdev->rom + off,
806 size, vdev->rom_offset + off);
809 } else if (bytes > 0) {
813 if (errno == EINTR || errno == EAGAIN) {
816 error_report("vfio: Error reading device ROM: %m");
822 static uint64_t vfio_rom_read(void *opaque, hwaddr addr, unsigned size)
824 VFIOPCIDevice *vdev = opaque;
833 /* Load the ROM lazily when the guest tries to read it */
834 if (unlikely(!vdev->rom && !vdev->rom_read_failed)) {
835 vfio_pci_load_rom(vdev);
838 memcpy(&val, vdev->rom + addr,
839 (addr < vdev->rom_size) ? MIN(size, vdev->rom_size - addr) : 0);
846 data = le16_to_cpu(val.word);
849 data = le32_to_cpu(val.dword);
852 hw_error("vfio: unsupported read size, %d bytes\n", size);
856 trace_vfio_rom_read(vdev->vbasedev.name, addr, size, data);
861 static void vfio_rom_write(void *opaque, hwaddr addr,
862 uint64_t data, unsigned size)
866 static const MemoryRegionOps vfio_rom_ops = {
867 .read = vfio_rom_read,
868 .write = vfio_rom_write,
869 .endianness = DEVICE_LITTLE_ENDIAN,
872 static void vfio_pci_size_rom(VFIOPCIDevice *vdev)
874 uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK);
875 off_t offset = vdev->config_offset + PCI_ROM_ADDRESS;
876 DeviceState *dev = DEVICE(vdev);
878 int fd = vdev->vbasedev.fd;
880 if (vdev->pdev.romfile || !vdev->pdev.rom_bar) {
881 /* Since pci handles romfile, just print a message and return */
882 if (vfio_blacklist_opt_rom(vdev) && vdev->pdev.romfile) {
883 error_printf("Warning : Device at %04x:%02x:%02x.%x "
884 "is known to cause system instability issues during "
885 "option rom execution. "
886 "Proceeding anyway since user specified romfile\n",
887 vdev->host.domain, vdev->host.bus, vdev->host.slot,
888 vdev->host.function);
894 * Use the same size ROM BAR as the physical device. The contents
895 * will get filled in later when the guest tries to read it.
897 if (pread(fd, &orig, 4, offset) != 4 ||
898 pwrite(fd, &size, 4, offset) != 4 ||
899 pread(fd, &size, 4, offset) != 4 ||
900 pwrite(fd, &orig, 4, offset) != 4) {
901 error_report("%s(%04x:%02x:%02x.%x) failed: %m",
902 __func__, vdev->host.domain, vdev->host.bus,
903 vdev->host.slot, vdev->host.function);
907 size = ~(le32_to_cpu(size) & PCI_ROM_ADDRESS_MASK) + 1;
913 if (vfio_blacklist_opt_rom(vdev)) {
914 if (dev->opts && qemu_opt_get(dev->opts, "rombar")) {
915 error_printf("Warning : Device at %04x:%02x:%02x.%x "
916 "is known to cause system instability issues during "
917 "option rom execution. "
918 "Proceeding anyway since user specified non zero value for "
920 vdev->host.domain, vdev->host.bus, vdev->host.slot,
921 vdev->host.function);
923 error_printf("Warning : Rom loading for device at "
924 "%04x:%02x:%02x.%x has been disabled due to "
925 "system instability issues. "
926 "Specify rombar=1 or romfile to force\n",
927 vdev->host.domain, vdev->host.bus, vdev->host.slot,
928 vdev->host.function);
933 trace_vfio_pci_size_rom(vdev->vbasedev.name, size);
935 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
936 vdev->host.domain, vdev->host.bus, vdev->host.slot,
937 vdev->host.function);
939 memory_region_init_io(&vdev->pdev.rom, OBJECT(vdev),
940 &vfio_rom_ops, vdev, name, size);
942 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT,
943 PCI_BASE_ADDRESS_SPACE_MEMORY, &vdev->pdev.rom);
945 vdev->pdev.has_rom = true;
946 vdev->rom_read_failed = false;
949 void vfio_vga_write(void *opaque, hwaddr addr,
950 uint64_t data, unsigned size)
952 VFIOVGARegion *region = opaque;
953 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]);
960 off_t offset = vga->fd_offset + region->offset + addr;
967 buf.word = cpu_to_le16(data);
970 buf.dword = cpu_to_le32(data);
973 hw_error("vfio: unsupported write size, %d bytes", size);
977 if (pwrite(vga->fd, &buf, size, offset) != size) {
978 error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m",
979 __func__, region->offset + addr, data, size);
982 trace_vfio_vga_write(region->offset + addr, data, size);
985 uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size)
987 VFIOVGARegion *region = opaque;
988 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]);
996 off_t offset = vga->fd_offset + region->offset + addr;
998 if (pread(vga->fd, &buf, size, offset) != size) {
999 error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m",
1000 __func__, region->offset + addr, size);
1001 return (uint64_t)-1;
1009 data = le16_to_cpu(buf.word);
1012 data = le32_to_cpu(buf.dword);
1015 hw_error("vfio: unsupported read size, %d bytes", size);
1019 trace_vfio_vga_read(region->offset + addr, size, data);
1024 static const MemoryRegionOps vfio_vga_ops = {
1025 .read = vfio_vga_read,
1026 .write = vfio_vga_write,
1027 .endianness = DEVICE_LITTLE_ENDIAN,
1033 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
1035 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
1036 uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
1038 memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
1039 emu_bits = le32_to_cpu(emu_bits);
1042 emu_val = pci_default_read_config(pdev, addr, len);
1045 if (~emu_bits & (0xffffffffU >> (32 - len * 8))) {
1048 ret = pread(vdev->vbasedev.fd, &phys_val, len,
1049 vdev->config_offset + addr);
1051 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m",
1052 __func__, vdev->host.domain, vdev->host.bus,
1053 vdev->host.slot, vdev->host.function, addr, len);
1056 phys_val = le32_to_cpu(phys_val);
1059 val = (emu_val & emu_bits) | (phys_val & ~emu_bits);
1061 trace_vfio_pci_read_config(vdev->vbasedev.name, addr, len, val);
1066 void vfio_pci_write_config(PCIDevice *pdev,
1067 uint32_t addr, uint32_t val, int len)
1069 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
1070 uint32_t val_le = cpu_to_le32(val);
1072 trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len);
1074 /* Write everything to VFIO, let it filter out what we can't write */
1075 if (pwrite(vdev->vbasedev.fd, &val_le, len, vdev->config_offset + addr)
1077 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m",
1078 __func__, vdev->host.domain, vdev->host.bus,
1079 vdev->host.slot, vdev->host.function, addr, val, len);
1082 /* MSI/MSI-X Enabling/Disabling */
1083 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
1084 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
1085 int is_enabled, was_enabled = msi_enabled(pdev);
1087 pci_default_write_config(pdev, addr, val, len);
1089 is_enabled = msi_enabled(pdev);
1093 vfio_msi_enable(vdev);
1097 vfio_msi_disable(vdev);
1099 vfio_update_msi(vdev);
1102 } else if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
1103 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
1104 int is_enabled, was_enabled = msix_enabled(pdev);
1106 pci_default_write_config(pdev, addr, val, len);
1108 is_enabled = msix_enabled(pdev);
1110 if (!was_enabled && is_enabled) {
1111 vfio_msix_enable(vdev);
1112 } else if (was_enabled && !is_enabled) {
1113 vfio_msix_disable(vdev);
1116 /* Write everything to QEMU to keep emulated bits correct */
1117 pci_default_write_config(pdev, addr, val, len);
1124 static void vfio_disable_interrupts(VFIOPCIDevice *vdev)
1127 * More complicated than it looks. Disabling MSI/X transitions the
1128 * device to INTx mode (if supported). Therefore we need to first
1129 * disable MSI/X and then cleanup by disabling INTx.
1131 if (vdev->interrupt == VFIO_INT_MSIX) {
1132 vfio_msix_disable(vdev);
1133 } else if (vdev->interrupt == VFIO_INT_MSI) {
1134 vfio_msi_disable(vdev);
1137 if (vdev->interrupt == VFIO_INT_INTx) {
1138 vfio_intx_disable(vdev);
1142 static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos)
1145 bool msi_64bit, msi_maskbit;
1148 if (pread(vdev->vbasedev.fd, &ctrl, sizeof(ctrl),
1149 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1152 ctrl = le16_to_cpu(ctrl);
1154 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1155 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1156 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1158 trace_vfio_msi_setup(vdev->vbasedev.name, pos);
1160 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1162 if (ret == -ENOTSUP) {
1165 error_report("vfio: msi_init failed");
1168 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1174 * We don't have any control over how pci_add_capability() inserts
1175 * capabilities into the chain. In order to setup MSI-X we need a
1176 * MemoryRegion for the BAR. In order to setup the BAR and not
1177 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1178 * need to first look for where the MSI-X table lives. So we
1179 * unfortunately split MSI-X setup across two functions.
1181 static int vfio_msix_early_setup(VFIOPCIDevice *vdev)
1185 uint32_t table, pba;
1186 int fd = vdev->vbasedev.fd;
1189 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1194 if (pread(fd, &ctrl, sizeof(ctrl),
1195 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1199 if (pread(fd, &table, sizeof(table),
1200 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1204 if (pread(fd, &pba, sizeof(pba),
1205 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1209 ctrl = le16_to_cpu(ctrl);
1210 table = le32_to_cpu(table);
1211 pba = le32_to_cpu(pba);
1213 msix = g_malloc0(sizeof(*msix));
1214 msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1215 msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1216 msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1217 msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1218 msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1221 * Test the size of the pba_offset variable and catch if it extends outside
1222 * of the specified BAR. If it is the case, we need to apply a hardware
1223 * specific quirk if the device is known or we have a broken configuration.
1225 if (msix->pba_offset >= vdev->bars[msix->pba_bar].region.size) {
1227 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1228 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1229 * the VF PBA offset while the BAR itself is only 8k. The correct value
1230 * is 0x1000, so we hard code that here.
1232 if (vdev->vendor_id == PCI_VENDOR_ID_CHELSIO &&
1233 (vdev->device_id & 0xff00) == 0x5800) {
1234 msix->pba_offset = 0x1000;
1236 error_report("vfio: Hardware reports invalid configuration, "
1237 "MSIX PBA outside of specified BAR");
1243 trace_vfio_msix_early_setup(vdev->vbasedev.name, pos, msix->table_bar,
1244 msix->table_offset, msix->entries);
1250 static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos)
1254 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1255 &vdev->bars[vdev->msix->table_bar].region.mem,
1256 vdev->msix->table_bar, vdev->msix->table_offset,
1257 &vdev->bars[vdev->msix->pba_bar].region.mem,
1258 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1260 if (ret == -ENOTSUP) {
1263 error_report("vfio: msix_init failed");
1270 static void vfio_teardown_msi(VFIOPCIDevice *vdev)
1272 msi_uninit(&vdev->pdev);
1275 msix_uninit(&vdev->pdev,
1276 &vdev->bars[vdev->msix->table_bar].region.mem,
1277 &vdev->bars[vdev->msix->pba_bar].region.mem);
1284 static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled)
1288 for (i = 0; i < PCI_ROM_SLOT; i++) {
1289 VFIOBAR *bar = &vdev->bars[i];
1291 if (!bar->region.size) {
1295 memory_region_set_enabled(&bar->region.mmap_mem, enabled);
1296 if (vdev->msix && vdev->msix->table_bar == i) {
1297 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled);
1302 static void vfio_unregister_bar(VFIOPCIDevice *vdev, int nr)
1304 VFIOBAR *bar = &vdev->bars[nr];
1306 if (!bar->region.size) {
1310 vfio_bar_quirk_teardown(vdev, nr);
1312 memory_region_del_subregion(&bar->region.mem, &bar->region.mmap_mem);
1314 if (vdev->msix && vdev->msix->table_bar == nr) {
1315 memory_region_del_subregion(&bar->region.mem, &vdev->msix->mmap_mem);
1319 static void vfio_unmap_bar(VFIOPCIDevice *vdev, int nr)
1321 VFIOBAR *bar = &vdev->bars[nr];
1323 if (!bar->region.size) {
1327 vfio_bar_quirk_free(vdev, nr);
1329 munmap(bar->region.mmap, memory_region_size(&bar->region.mmap_mem));
1331 if (vdev->msix && vdev->msix->table_bar == nr) {
1332 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));
1336 static void vfio_map_bar(VFIOPCIDevice *vdev, int nr)
1338 VFIOBAR *bar = &vdev->bars[nr];
1339 uint64_t size = bar->region.size;
1345 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1350 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d",
1351 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1352 vdev->host.function, nr);
1354 /* Determine what type of BAR this is for registration */
1355 ret = pread(vdev->vbasedev.fd, &pci_bar, sizeof(pci_bar),
1356 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1357 if (ret != sizeof(pci_bar)) {
1358 error_report("vfio: Failed to read BAR %d (%m)", nr);
1362 pci_bar = le32_to_cpu(pci_bar);
1363 bar->ioport = (pci_bar & PCI_BASE_ADDRESS_SPACE_IO);
1364 bar->mem64 = bar->ioport ? 0 : (pci_bar & PCI_BASE_ADDRESS_MEM_TYPE_64);
1365 type = pci_bar & (bar->ioport ? ~PCI_BASE_ADDRESS_IO_MASK :
1366 ~PCI_BASE_ADDRESS_MEM_MASK);
1368 /* A "slow" read/write mapping underlies all BARs */
1369 memory_region_init_io(&bar->region.mem, OBJECT(vdev), &vfio_region_ops,
1371 pci_register_bar(&vdev->pdev, nr, type, &bar->region.mem);
1374 * We can't mmap areas overlapping the MSIX vector table, so we
1375 * potentially insert a direct-mapped subregion before and after it.
1377 if (vdev->msix && vdev->msix->table_bar == nr) {
1378 size = vdev->msix->table_offset & qemu_real_host_page_mask;
1381 strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
1382 if (vfio_mmap_region(OBJECT(vdev), &bar->region, &bar->region.mem,
1383 &bar->region.mmap_mem, &bar->region.mmap,
1385 error_report("%s unsupported. Performance may be slow", name);
1388 if (vdev->msix && vdev->msix->table_bar == nr) {
1391 start = REAL_HOST_PAGE_ALIGN((uint64_t)vdev->msix->table_offset +
1392 (vdev->msix->entries *
1393 PCI_MSIX_ENTRY_SIZE));
1395 size = start < bar->region.size ? bar->region.size - start : 0;
1396 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
1397 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */
1398 if (vfio_mmap_region(OBJECT(vdev), &bar->region, &bar->region.mem,
1399 &vdev->msix->mmap_mem,
1400 &vdev->msix->mmap, size, start, name)) {
1401 error_report("%s unsupported. Performance may be slow", name);
1405 vfio_bar_quirk_setup(vdev, nr);
1408 static void vfio_map_bars(VFIOPCIDevice *vdev)
1412 for (i = 0; i < PCI_ROM_SLOT; i++) {
1413 vfio_map_bar(vdev, i);
1416 if (vdev->has_vga) {
1417 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem,
1418 OBJECT(vdev), &vfio_vga_ops,
1419 &vdev->vga.region[QEMU_PCI_VGA_MEM],
1420 "vfio-vga-mmio@0xa0000",
1421 QEMU_PCI_VGA_MEM_SIZE);
1422 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem,
1423 OBJECT(vdev), &vfio_vga_ops,
1424 &vdev->vga.region[QEMU_PCI_VGA_IO_LO],
1425 "vfio-vga-io@0x3b0",
1426 QEMU_PCI_VGA_IO_LO_SIZE);
1427 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem,
1428 OBJECT(vdev), &vfio_vga_ops,
1429 &vdev->vga.region[QEMU_PCI_VGA_IO_HI],
1430 "vfio-vga-io@0x3c0",
1431 QEMU_PCI_VGA_IO_HI_SIZE);
1433 pci_register_vga(&vdev->pdev, &vdev->vga.region[QEMU_PCI_VGA_MEM].mem,
1434 &vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem,
1435 &vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem);
1436 vfio_vga_quirk_setup(vdev);
1440 static void vfio_unregister_bars(VFIOPCIDevice *vdev)
1444 for (i = 0; i < PCI_ROM_SLOT; i++) {
1445 vfio_unregister_bar(vdev, i);
1448 if (vdev->has_vga) {
1449 vfio_vga_quirk_teardown(vdev);
1450 pci_unregister_vga(&vdev->pdev);
1454 static void vfio_unmap_bars(VFIOPCIDevice *vdev)
1458 for (i = 0; i < PCI_ROM_SLOT; i++) {
1459 vfio_unmap_bar(vdev, i);
1462 if (vdev->has_vga) {
1463 vfio_vga_quirk_free(vdev);
1470 static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1472 uint8_t tmp, next = 0xff;
1474 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1475 tmp = pdev->config[tmp + 1]) {
1476 if (tmp > pos && tmp < next) {
1484 static void vfio_set_word_bits(uint8_t *buf, uint16_t val, uint16_t mask)
1486 pci_set_word(buf, (pci_get_word(buf) & ~mask) | val);
1489 static void vfio_add_emulated_word(VFIOPCIDevice *vdev, int pos,
1490 uint16_t val, uint16_t mask)
1492 vfio_set_word_bits(vdev->pdev.config + pos, val, mask);
1493 vfio_set_word_bits(vdev->pdev.wmask + pos, ~mask, mask);
1494 vfio_set_word_bits(vdev->emulated_config_bits + pos, mask, mask);
1497 static void vfio_set_long_bits(uint8_t *buf, uint32_t val, uint32_t mask)
1499 pci_set_long(buf, (pci_get_long(buf) & ~mask) | val);
1502 static void vfio_add_emulated_long(VFIOPCIDevice *vdev, int pos,
1503 uint32_t val, uint32_t mask)
1505 vfio_set_long_bits(vdev->pdev.config + pos, val, mask);
1506 vfio_set_long_bits(vdev->pdev.wmask + pos, ~mask, mask);
1507 vfio_set_long_bits(vdev->emulated_config_bits + pos, mask, mask);
1510 static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size)
1515 flags = pci_get_word(vdev->pdev.config + pos + PCI_CAP_FLAGS);
1516 type = (flags & PCI_EXP_FLAGS_TYPE) >> 4;
1518 if (type != PCI_EXP_TYPE_ENDPOINT &&
1519 type != PCI_EXP_TYPE_LEG_END &&
1520 type != PCI_EXP_TYPE_RC_END) {
1522 error_report("vfio: Assignment of PCIe type 0x%x "
1523 "devices is not currently supported", type);
1527 if (!pci_bus_is_express(vdev->pdev.bus)) {
1528 PCIBus *bus = vdev->pdev.bus;
1532 * Traditionally PCI device assignment exposes the PCIe capability
1533 * as-is on non-express buses. The reason being that some drivers
1534 * simply assume that it's there, for example tg3. However when
1535 * we're running on a native PCIe machine type, like Q35, we need
1536 * to hide the PCIe capability. The reason for this is twofold;
1537 * first Windows guests get a Code 10 error when the PCIe capability
1538 * is exposed in this configuration. Therefore express devices won't
1539 * work at all unless they're attached to express buses in the VM.
1540 * Second, a native PCIe machine introduces the possibility of fine
1541 * granularity IOMMUs supporting both translation and isolation.
1542 * Guest code to discover the IOMMU visibility of a device, such as
1543 * IOMMU grouping code on Linux, is very aware of device types and
1544 * valid transitions between bus types. An express device on a non-
1545 * express bus is not a valid combination on bare metal systems.
1547 * Drivers that require a PCIe capability to make the device
1548 * functional are simply going to need to have their devices placed
1549 * on a PCIe bus in the VM.
1551 while (!pci_bus_is_root(bus)) {
1552 bridge = pci_bridge_get_device(bus);
1556 if (pci_bus_is_express(bus)) {
1560 } else if (pci_bus_is_root(vdev->pdev.bus)) {
1562 * On a Root Complex bus Endpoints become Root Complex Integrated
1563 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1565 if (type == PCI_EXP_TYPE_ENDPOINT) {
1566 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS,
1567 PCI_EXP_TYPE_RC_END << 4,
1568 PCI_EXP_FLAGS_TYPE);
1570 /* Link Capabilities, Status, and Control goes away */
1571 if (size > PCI_EXP_LNKCTL) {
1572 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, 0, ~0);
1573 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0);
1574 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, 0, ~0);
1576 #ifndef PCI_EXP_LNKCAP2
1577 #define PCI_EXP_LNKCAP2 44
1579 #ifndef PCI_EXP_LNKSTA2
1580 #define PCI_EXP_LNKSTA2 50
1582 /* Link 2 Capabilities, Status, and Control goes away */
1583 if (size > PCI_EXP_LNKCAP2) {
1584 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP2, 0, ~0);
1585 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL2, 0, ~0);
1586 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA2, 0, ~0);
1590 } else if (type == PCI_EXP_TYPE_LEG_END) {
1592 * Legacy endpoints don't belong on the root complex. Windows
1593 * seems to be happier with devices if we skip the capability.
1600 * Convert Root Complex Integrated Endpoints to regular endpoints.
1601 * These devices don't support LNK/LNK2 capabilities, so make them up.
1603 if (type == PCI_EXP_TYPE_RC_END) {
1604 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS,
1605 PCI_EXP_TYPE_ENDPOINT << 4,
1606 PCI_EXP_FLAGS_TYPE);
1607 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP,
1608 PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25, ~0);
1609 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0);
1612 /* Mark the Link Status bits as emulated to allow virtual negotiation */
1613 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA,
1614 pci_get_word(vdev->pdev.config + pos +
1616 PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_SLS);
1619 pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size);
1621 vdev->pdev.exp.exp_cap = pos;
1627 static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos)
1629 uint32_t cap = pci_get_long(vdev->pdev.config + pos + PCI_EXP_DEVCAP);
1631 if (cap & PCI_EXP_DEVCAP_FLR) {
1632 trace_vfio_check_pcie_flr(vdev->vbasedev.name);
1633 vdev->has_flr = true;
1637 static void vfio_check_pm_reset(VFIOPCIDevice *vdev, uint8_t pos)
1639 uint16_t csr = pci_get_word(vdev->pdev.config + pos + PCI_PM_CTRL);
1641 if (!(csr & PCI_PM_CTRL_NO_SOFT_RESET)) {
1642 trace_vfio_check_pm_reset(vdev->vbasedev.name);
1643 vdev->has_pm_reset = true;
1647 static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos)
1649 uint8_t cap = pci_get_byte(vdev->pdev.config + pos + PCI_AF_CAP);
1651 if ((cap & PCI_AF_CAP_TP) && (cap & PCI_AF_CAP_FLR)) {
1652 trace_vfio_check_af_flr(vdev->vbasedev.name);
1653 vdev->has_flr = true;
1657 static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos)
1659 PCIDevice *pdev = &vdev->pdev;
1660 uint8_t cap_id, next, size;
1663 cap_id = pdev->config[pos];
1664 next = pdev->config[pos + 1];
1667 * If it becomes important to configure capabilities to their actual
1668 * size, use this as the default when it's something we don't recognize.
1669 * Since QEMU doesn't actually handle many of the config accesses,
1670 * exact size doesn't seem worthwhile.
1672 size = vfio_std_cap_max_size(pdev, pos);
1675 * pci_add_capability always inserts the new capability at the head
1676 * of the chain. Therefore to end up with a chain that matches the
1677 * physical device, we insert from the end by making this recursive.
1678 * This is also why we pre-caclulate size above as cached config space
1679 * will be changed as we unwind the stack.
1682 ret = vfio_add_std_cap(vdev, next);
1687 /* Begin the rebuild, use QEMU emulated list bits */
1688 pdev->config[PCI_CAPABILITY_LIST] = 0;
1689 vdev->emulated_config_bits[PCI_CAPABILITY_LIST] = 0xff;
1690 vdev->emulated_config_bits[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
1693 /* Use emulated next pointer to allow dropping caps */
1694 pci_set_byte(vdev->emulated_config_bits + pos + 1, 0xff);
1697 case PCI_CAP_ID_MSI:
1698 ret = vfio_msi_setup(vdev, pos);
1700 case PCI_CAP_ID_EXP:
1701 vfio_check_pcie_flr(vdev, pos);
1702 ret = vfio_setup_pcie_cap(vdev, pos, size);
1704 case PCI_CAP_ID_MSIX:
1705 ret = vfio_msix_setup(vdev, pos);
1708 vfio_check_pm_reset(vdev, pos);
1710 ret = pci_add_capability(pdev, cap_id, pos, size);
1713 vfio_check_af_flr(vdev, pos);
1714 ret = pci_add_capability(pdev, cap_id, pos, size);
1717 ret = pci_add_capability(pdev, cap_id, pos, size);
1722 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability "
1723 "0x%x[0x%x]@0x%x: %d", vdev->host.domain,
1724 vdev->host.bus, vdev->host.slot, vdev->host.function,
1725 cap_id, size, pos, ret);
1732 static int vfio_add_capabilities(VFIOPCIDevice *vdev)
1734 PCIDevice *pdev = &vdev->pdev;
1736 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1737 !pdev->config[PCI_CAPABILITY_LIST]) {
1738 return 0; /* Nothing to add */
1741 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1744 static void vfio_pci_pre_reset(VFIOPCIDevice *vdev)
1746 PCIDevice *pdev = &vdev->pdev;
1749 vfio_disable_interrupts(vdev);
1751 /* Make sure the device is in D0 */
1756 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2);
1757 state = pmcsr & PCI_PM_CTRL_STATE_MASK;
1759 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
1760 vfio_pci_write_config(pdev, vdev->pm_cap + PCI_PM_CTRL, pmcsr, 2);
1761 /* vfio handles the necessary delay here */
1762 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2);
1763 state = pmcsr & PCI_PM_CTRL_STATE_MASK;
1765 error_report("vfio: Unable to power on device, stuck in D%d",
1772 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1773 * Also put INTx Disable in known state.
1775 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
1776 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1777 PCI_COMMAND_INTX_DISABLE);
1778 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
1781 static void vfio_pci_post_reset(VFIOPCIDevice *vdev)
1783 vfio_intx_enable(vdev);
1786 static bool vfio_pci_host_match(PCIHostDeviceAddress *host1,
1787 PCIHostDeviceAddress *host2)
1789 return (host1->domain == host2->domain && host1->bus == host2->bus &&
1790 host1->slot == host2->slot && host1->function == host2->function);
1793 static int vfio_pci_hot_reset(VFIOPCIDevice *vdev, bool single)
1796 struct vfio_pci_hot_reset_info *info;
1797 struct vfio_pci_dependent_device *devices;
1798 struct vfio_pci_hot_reset *reset;
1803 trace_vfio_pci_hot_reset(vdev->vbasedev.name, single ? "one" : "multi");
1805 vfio_pci_pre_reset(vdev);
1806 vdev->vbasedev.needs_reset = false;
1808 info = g_malloc0(sizeof(*info));
1809 info->argsz = sizeof(*info);
1811 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info);
1812 if (ret && errno != ENOSPC) {
1814 if (!vdev->has_pm_reset) {
1815 error_report("vfio: Cannot reset device %04x:%02x:%02x.%x, "
1816 "no available reset mechanism.", vdev->host.domain,
1817 vdev->host.bus, vdev->host.slot, vdev->host.function);
1822 count = info->count;
1823 info = g_realloc(info, sizeof(*info) + (count * sizeof(*devices)));
1824 info->argsz = sizeof(*info) + (count * sizeof(*devices));
1825 devices = &info->devices[0];
1827 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info);
1830 error_report("vfio: hot reset info failed: %m");
1834 trace_vfio_pci_hot_reset_has_dep_devices(vdev->vbasedev.name);
1836 /* Verify that we have all the groups required */
1837 for (i = 0; i < info->count; i++) {
1838 PCIHostDeviceAddress host;
1840 VFIODevice *vbasedev_iter;
1842 host.domain = devices[i].segment;
1843 host.bus = devices[i].bus;
1844 host.slot = PCI_SLOT(devices[i].devfn);
1845 host.function = PCI_FUNC(devices[i].devfn);
1847 trace_vfio_pci_hot_reset_dep_devices(host.domain,
1848 host.bus, host.slot, host.function, devices[i].group_id);
1850 if (vfio_pci_host_match(&host, &vdev->host)) {
1854 QLIST_FOREACH(group, &vfio_group_list, next) {
1855 if (group->groupid == devices[i].group_id) {
1861 if (!vdev->has_pm_reset) {
1862 error_report("vfio: Cannot reset device %s, "
1863 "depends on group %d which is not owned.",
1864 vdev->vbasedev.name, devices[i].group_id);
1870 /* Prep dependent devices for reset and clear our marker. */
1871 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
1872 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) {
1875 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev);
1876 if (vfio_pci_host_match(&host, &tmp->host)) {
1881 vfio_pci_pre_reset(tmp);
1882 tmp->vbasedev.needs_reset = false;
1889 if (!single && !multi) {
1894 /* Determine how many group fds need to be passed */
1896 QLIST_FOREACH(group, &vfio_group_list, next) {
1897 for (i = 0; i < info->count; i++) {
1898 if (group->groupid == devices[i].group_id) {
1905 reset = g_malloc0(sizeof(*reset) + (count * sizeof(*fds)));
1906 reset->argsz = sizeof(*reset) + (count * sizeof(*fds));
1907 fds = &reset->group_fds[0];
1909 /* Fill in group fds */
1910 QLIST_FOREACH(group, &vfio_group_list, next) {
1911 for (i = 0; i < info->count; i++) {
1912 if (group->groupid == devices[i].group_id) {
1913 fds[reset->count++] = group->fd;
1920 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_PCI_HOT_RESET, reset);
1923 trace_vfio_pci_hot_reset_result(vdev->vbasedev.name,
1924 ret ? "%m" : "Success");
1927 /* Re-enable INTx on affected devices */
1928 for (i = 0; i < info->count; i++) {
1929 PCIHostDeviceAddress host;
1931 VFIODevice *vbasedev_iter;
1933 host.domain = devices[i].segment;
1934 host.bus = devices[i].bus;
1935 host.slot = PCI_SLOT(devices[i].devfn);
1936 host.function = PCI_FUNC(devices[i].devfn);
1938 if (vfio_pci_host_match(&host, &vdev->host)) {
1942 QLIST_FOREACH(group, &vfio_group_list, next) {
1943 if (group->groupid == devices[i].group_id) {
1952 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
1953 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) {
1956 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev);
1957 if (vfio_pci_host_match(&host, &tmp->host)) {
1958 vfio_pci_post_reset(tmp);
1964 vfio_pci_post_reset(vdev);
1971 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
1972 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
1973 * of doing hot resets when there is only a single device per bus. The in-use
1974 * here refers to how many VFIODevices are affected. A hot reset that affects
1975 * multiple devices, but only a single in-use device, means that we can call
1976 * it from our bus ->reset() callback since the extent is effectively a single
1977 * device. This allows us to make use of it in the hotplug path. When there
1978 * are multiple in-use devices, we can only trigger the hot reset during a
1979 * system reset and thus from our reset handler. We separate _one vs _multi
1980 * here so that we don't overlap and do a double reset on the system reset
1981 * path where both our reset handler and ->reset() callback are used. Calling
1982 * _one() will only do a hot reset for the one in-use devices case, calling
1983 * _multi() will do nothing if a _one() would have been sufficient.
1985 static int vfio_pci_hot_reset_one(VFIOPCIDevice *vdev)
1987 return vfio_pci_hot_reset(vdev, true);
1990 static int vfio_pci_hot_reset_multi(VFIODevice *vbasedev)
1992 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
1993 return vfio_pci_hot_reset(vdev, false);
1996 static void vfio_pci_compute_needs_reset(VFIODevice *vbasedev)
1998 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
1999 if (!vbasedev->reset_works || (!vdev->has_flr && vdev->has_pm_reset)) {
2000 vbasedev->needs_reset = true;
2004 static VFIODeviceOps vfio_pci_ops = {
2005 .vfio_compute_needs_reset = vfio_pci_compute_needs_reset,
2006 .vfio_hot_reset_multi = vfio_pci_hot_reset_multi,
2007 .vfio_eoi = vfio_intx_eoi,
2010 static int vfio_populate_device(VFIOPCIDevice *vdev)
2012 VFIODevice *vbasedev = &vdev->vbasedev;
2013 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
2014 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) };
2017 /* Sanity check device */
2018 if (!(vbasedev->flags & VFIO_DEVICE_FLAGS_PCI)) {
2019 error_report("vfio: Um, this isn't a PCI device");
2023 if (vbasedev->num_regions < VFIO_PCI_CONFIG_REGION_INDEX + 1) {
2024 error_report("vfio: unexpected number of io regions %u",
2025 vbasedev->num_regions);
2029 if (vbasedev->num_irqs < VFIO_PCI_MSIX_IRQ_INDEX + 1) {
2030 error_report("vfio: unexpected number of irqs %u", vbasedev->num_irqs);
2034 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
2037 ret = ioctl(vbasedev->fd, VFIO_DEVICE_GET_REGION_INFO, ®_info);
2039 error_report("vfio: Error getting region %d info: %m", i);
2043 trace_vfio_populate_device_region(vbasedev->name, i,
2044 (unsigned long)reg_info.size,
2045 (unsigned long)reg_info.offset,
2046 (unsigned long)reg_info.flags);
2048 vdev->bars[i].region.vbasedev = vbasedev;
2049 vdev->bars[i].region.flags = reg_info.flags;
2050 vdev->bars[i].region.size = reg_info.size;
2051 vdev->bars[i].region.fd_offset = reg_info.offset;
2052 vdev->bars[i].region.nr = i;
2053 QLIST_INIT(&vdev->bars[i].quirks);
2056 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX;
2058 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, ®_info);
2060 error_report("vfio: Error getting config info: %m");
2064 trace_vfio_populate_device_config(vdev->vbasedev.name,
2065 (unsigned long)reg_info.size,
2066 (unsigned long)reg_info.offset,
2067 (unsigned long)reg_info.flags);
2069 vdev->config_size = reg_info.size;
2070 if (vdev->config_size == PCI_CONFIG_SPACE_SIZE) {
2071 vdev->pdev.cap_present &= ~QEMU_PCI_CAP_EXPRESS;
2073 vdev->config_offset = reg_info.offset;
2075 if ((vdev->features & VFIO_FEATURE_ENABLE_VGA) &&
2076 vbasedev->num_regions > VFIO_PCI_VGA_REGION_INDEX) {
2077 struct vfio_region_info vga_info = {
2078 .argsz = sizeof(vga_info),
2079 .index = VFIO_PCI_VGA_REGION_INDEX,
2082 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, &vga_info);
2085 "vfio: Device does not support requested feature x-vga");
2089 if (!(vga_info.flags & VFIO_REGION_INFO_FLAG_READ) ||
2090 !(vga_info.flags & VFIO_REGION_INFO_FLAG_WRITE) ||
2091 vga_info.size < 0xbffff + 1) {
2092 error_report("vfio: Unexpected VGA info, flags 0x%lx, size 0x%lx",
2093 (unsigned long)vga_info.flags,
2094 (unsigned long)vga_info.size);
2098 vdev->vga.fd_offset = vga_info.offset;
2099 vdev->vga.fd = vdev->vbasedev.fd;
2101 vdev->vga.region[QEMU_PCI_VGA_MEM].offset = QEMU_PCI_VGA_MEM_BASE;
2102 vdev->vga.region[QEMU_PCI_VGA_MEM].nr = QEMU_PCI_VGA_MEM;
2103 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_MEM].quirks);
2105 vdev->vga.region[QEMU_PCI_VGA_IO_LO].offset = QEMU_PCI_VGA_IO_LO_BASE;
2106 vdev->vga.region[QEMU_PCI_VGA_IO_LO].nr = QEMU_PCI_VGA_IO_LO;
2107 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].quirks);
2109 vdev->vga.region[QEMU_PCI_VGA_IO_HI].offset = QEMU_PCI_VGA_IO_HI_BASE;
2110 vdev->vga.region[QEMU_PCI_VGA_IO_HI].nr = QEMU_PCI_VGA_IO_HI;
2111 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].quirks);
2113 vdev->has_vga = true;
2116 irq_info.index = VFIO_PCI_ERR_IRQ_INDEX;
2118 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info);
2120 /* This can fail for an old kernel or legacy PCI dev */
2121 trace_vfio_populate_device_get_irq_info_failure();
2123 } else if (irq_info.count == 1) {
2124 vdev->pci_aer = true;
2126 error_report("vfio: %s "
2127 "Could not enable error recovery for the device",
2135 static void vfio_put_device(VFIOPCIDevice *vdev)
2137 g_free(vdev->vbasedev.name);
2139 object_unparent(OBJECT(&vdev->msix->mmap_mem));
2143 vfio_put_base_device(&vdev->vbasedev);
2146 static void vfio_err_notifier_handler(void *opaque)
2148 VFIOPCIDevice *vdev = opaque;
2150 if (!event_notifier_test_and_clear(&vdev->err_notifier)) {
2155 * TBD. Retrieve the error details and decide what action
2156 * needs to be taken. One of the actions could be to pass
2157 * the error to the guest and have the guest driver recover
2158 * from the error. This requires that PCIe capabilities be
2159 * exposed to the guest. For now, we just terminate the
2160 * guest to contain the error.
2163 error_report("%s(%04x:%02x:%02x.%x) Unrecoverable error detected. "
2164 "Please collect any data possible and then kill the guest",
2165 __func__, vdev->host.domain, vdev->host.bus,
2166 vdev->host.slot, vdev->host.function);
2168 vm_stop(RUN_STATE_INTERNAL_ERROR);
2172 * Registers error notifier for devices supporting error recovery.
2173 * If we encounter a failure in this function, we report an error
2174 * and continue after disabling error recovery support for the
2177 static void vfio_register_err_notifier(VFIOPCIDevice *vdev)
2181 struct vfio_irq_set *irq_set;
2184 if (!vdev->pci_aer) {
2188 if (event_notifier_init(&vdev->err_notifier, 0)) {
2189 error_report("vfio: Unable to init event notifier for error detection");
2190 vdev->pci_aer = false;
2194 argsz = sizeof(*irq_set) + sizeof(*pfd);
2196 irq_set = g_malloc0(argsz);
2197 irq_set->argsz = argsz;
2198 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2199 VFIO_IRQ_SET_ACTION_TRIGGER;
2200 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX;
2203 pfd = (int32_t *)&irq_set->data;
2205 *pfd = event_notifier_get_fd(&vdev->err_notifier);
2206 qemu_set_fd_handler(*pfd, vfio_err_notifier_handler, NULL, vdev);
2208 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
2210 error_report("vfio: Failed to set up error notification");
2211 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
2212 event_notifier_cleanup(&vdev->err_notifier);
2213 vdev->pci_aer = false;
2218 static void vfio_unregister_err_notifier(VFIOPCIDevice *vdev)
2221 struct vfio_irq_set *irq_set;
2225 if (!vdev->pci_aer) {
2229 argsz = sizeof(*irq_set) + sizeof(*pfd);
2231 irq_set = g_malloc0(argsz);
2232 irq_set->argsz = argsz;
2233 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2234 VFIO_IRQ_SET_ACTION_TRIGGER;
2235 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX;
2238 pfd = (int32_t *)&irq_set->data;
2241 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
2243 error_report("vfio: Failed to de-assign error fd: %m");
2246 qemu_set_fd_handler(event_notifier_get_fd(&vdev->err_notifier),
2248 event_notifier_cleanup(&vdev->err_notifier);
2251 static void vfio_req_notifier_handler(void *opaque)
2253 VFIOPCIDevice *vdev = opaque;
2255 if (!event_notifier_test_and_clear(&vdev->req_notifier)) {
2259 qdev_unplug(&vdev->pdev.qdev, NULL);
2262 static void vfio_register_req_notifier(VFIOPCIDevice *vdev)
2264 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info),
2265 .index = VFIO_PCI_REQ_IRQ_INDEX };
2267 struct vfio_irq_set *irq_set;
2270 if (!(vdev->features & VFIO_FEATURE_ENABLE_REQ)) {
2274 if (ioctl(vdev->vbasedev.fd,
2275 VFIO_DEVICE_GET_IRQ_INFO, &irq_info) < 0 || irq_info.count < 1) {
2279 if (event_notifier_init(&vdev->req_notifier, 0)) {
2280 error_report("vfio: Unable to init event notifier for device request");
2284 argsz = sizeof(*irq_set) + sizeof(*pfd);
2286 irq_set = g_malloc0(argsz);
2287 irq_set->argsz = argsz;
2288 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2289 VFIO_IRQ_SET_ACTION_TRIGGER;
2290 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX;
2293 pfd = (int32_t *)&irq_set->data;
2295 *pfd = event_notifier_get_fd(&vdev->req_notifier);
2296 qemu_set_fd_handler(*pfd, vfio_req_notifier_handler, NULL, vdev);
2298 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) {
2299 error_report("vfio: Failed to set up device request notification");
2300 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
2301 event_notifier_cleanup(&vdev->req_notifier);
2303 vdev->req_enabled = true;
2309 static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
2312 struct vfio_irq_set *irq_set;
2315 if (!vdev->req_enabled) {
2319 argsz = sizeof(*irq_set) + sizeof(*pfd);
2321 irq_set = g_malloc0(argsz);
2322 irq_set->argsz = argsz;
2323 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2324 VFIO_IRQ_SET_ACTION_TRIGGER;
2325 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX;
2328 pfd = (int32_t *)&irq_set->data;
2331 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) {
2332 error_report("vfio: Failed to de-assign device request fd: %m");
2335 qemu_set_fd_handler(event_notifier_get_fd(&vdev->req_notifier),
2337 event_notifier_cleanup(&vdev->req_notifier);
2339 vdev->req_enabled = false;
2342 static int vfio_initfn(PCIDevice *pdev)
2344 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2345 VFIODevice *vbasedev_iter;
2347 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name;
2353 /* Check that the host device exists */
2354 snprintf(path, sizeof(path),
2355 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/",
2356 vdev->host.domain, vdev->host.bus, vdev->host.slot,
2357 vdev->host.function);
2358 if (stat(path, &st) < 0) {
2359 error_report("vfio: error: no such host device: %s", path);
2363 vdev->vbasedev.ops = &vfio_pci_ops;
2365 vdev->vbasedev.type = VFIO_DEVICE_TYPE_PCI;
2366 vdev->vbasedev.name = g_strdup_printf("%04x:%02x:%02x.%01x",
2367 vdev->host.domain, vdev->host.bus,
2368 vdev->host.slot, vdev->host.function);
2370 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1);
2372 len = readlink(path, iommu_group_path, sizeof(path));
2373 if (len <= 0 || len >= sizeof(path)) {
2374 error_report("vfio: error no iommu_group for device");
2375 return len < 0 ? -errno : -ENAMETOOLONG;
2378 iommu_group_path[len] = 0;
2379 group_name = basename(iommu_group_path);
2381 if (sscanf(group_name, "%d", &groupid) != 1) {
2382 error_report("vfio: error reading %s: %m", path);
2386 trace_vfio_initfn(vdev->vbasedev.name, groupid);
2388 group = vfio_get_group(groupid, pci_device_iommu_address_space(pdev));
2390 error_report("vfio: failed to get group %d", groupid);
2394 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x",
2395 vdev->host.domain, vdev->host.bus, vdev->host.slot,
2396 vdev->host.function);
2398 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
2399 if (strcmp(vbasedev_iter->name, vdev->vbasedev.name) == 0) {
2400 error_report("vfio: error: device %s is already attached", path);
2401 vfio_put_group(group);
2406 ret = vfio_get_device(group, path, &vdev->vbasedev);
2408 error_report("vfio: failed to get device %s", path);
2409 vfio_put_group(group);
2413 ret = vfio_populate_device(vdev);
2418 /* Get a copy of config space */
2419 ret = pread(vdev->vbasedev.fd, vdev->pdev.config,
2420 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
2421 vdev->config_offset);
2422 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
2423 ret = ret < 0 ? -errno : -EFAULT;
2424 error_report("vfio: Failed to read device config space");
2428 /* vfio emulates a lot for us, but some bits need extra love */
2429 vdev->emulated_config_bits = g_malloc0(vdev->config_size);
2431 /* QEMU can choose to expose the ROM or not */
2432 memset(vdev->emulated_config_bits + PCI_ROM_ADDRESS, 0xff, 4);
2435 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2436 * device ID is managed by the vendor and need only be a 16-bit value.
2437 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2439 if (vdev->vendor_id != PCI_ANY_ID) {
2440 if (vdev->vendor_id >= 0xffff) {
2441 error_report("vfio: Invalid PCI vendor ID provided");
2444 vfio_add_emulated_word(vdev, PCI_VENDOR_ID, vdev->vendor_id, ~0);
2445 trace_vfio_pci_emulated_vendor_id(vdev->vbasedev.name, vdev->vendor_id);
2447 vdev->vendor_id = pci_get_word(pdev->config + PCI_VENDOR_ID);
2450 if (vdev->device_id != PCI_ANY_ID) {
2451 if (vdev->device_id > 0xffff) {
2452 error_report("vfio: Invalid PCI device ID provided");
2455 vfio_add_emulated_word(vdev, PCI_DEVICE_ID, vdev->device_id, ~0);
2456 trace_vfio_pci_emulated_device_id(vdev->vbasedev.name, vdev->device_id);
2458 vdev->device_id = pci_get_word(pdev->config + PCI_DEVICE_ID);
2461 if (vdev->sub_vendor_id != PCI_ANY_ID) {
2462 if (vdev->sub_vendor_id > 0xffff) {
2463 error_report("vfio: Invalid PCI subsystem vendor ID provided");
2466 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_VENDOR_ID,
2467 vdev->sub_vendor_id, ~0);
2468 trace_vfio_pci_emulated_sub_vendor_id(vdev->vbasedev.name,
2469 vdev->sub_vendor_id);
2472 if (vdev->sub_device_id != PCI_ANY_ID) {
2473 if (vdev->sub_device_id > 0xffff) {
2474 error_report("vfio: Invalid PCI subsystem device ID provided");
2477 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_ID, vdev->sub_device_id, ~0);
2478 trace_vfio_pci_emulated_sub_device_id(vdev->vbasedev.name,
2479 vdev->sub_device_id);
2482 /* QEMU can change multi-function devices to single function, or reverse */
2483 vdev->emulated_config_bits[PCI_HEADER_TYPE] =
2484 PCI_HEADER_TYPE_MULTI_FUNCTION;
2486 /* Restore or clear multifunction, this is always controlled by QEMU */
2487 if (vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
2488 vdev->pdev.config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION;
2490 vdev->pdev.config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION;
2494 * Clear host resource mapping info. If we choose not to register a
2495 * BAR, such as might be the case with the option ROM, we can get
2496 * confusing, unwritable, residual addresses from the host here.
2498 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
2499 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
2501 vfio_pci_size_rom(vdev);
2503 ret = vfio_msix_early_setup(vdev);
2508 vfio_map_bars(vdev);
2510 ret = vfio_add_capabilities(vdev);
2515 /* QEMU emulates all of MSI & MSIX */
2516 if (pdev->cap_present & QEMU_PCI_CAP_MSIX) {
2517 memset(vdev->emulated_config_bits + pdev->msix_cap, 0xff,
2521 if (pdev->cap_present & QEMU_PCI_CAP_MSI) {
2522 memset(vdev->emulated_config_bits + pdev->msi_cap, 0xff,
2523 vdev->msi_cap_size);
2526 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
2527 vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL,
2528 vfio_intx_mmap_enable, vdev);
2529 pci_device_set_intx_routing_notifier(&vdev->pdev, vfio_intx_update);
2530 ret = vfio_intx_enable(vdev);
2536 vfio_register_err_notifier(vdev);
2537 vfio_register_req_notifier(vdev);
2538 vfio_setup_resetfn_quirk(vdev);
2543 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2544 vfio_teardown_msi(vdev);
2545 vfio_unregister_bars(vdev);
2549 static void vfio_instance_finalize(Object *obj)
2551 PCIDevice *pci_dev = PCI_DEVICE(obj);
2552 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pci_dev);
2553 VFIOGroup *group = vdev->vbasedev.group;
2555 vfio_unmap_bars(vdev);
2556 g_free(vdev->emulated_config_bits);
2558 vfio_put_device(vdev);
2559 vfio_put_group(group);
2562 static void vfio_exitfn(PCIDevice *pdev)
2564 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2566 vfio_unregister_req_notifier(vdev);
2567 vfio_unregister_err_notifier(vdev);
2568 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2569 vfio_disable_interrupts(vdev);
2570 if (vdev->intx.mmap_timer) {
2571 timer_free(vdev->intx.mmap_timer);
2573 vfio_teardown_msi(vdev);
2574 vfio_unregister_bars(vdev);
2577 static void vfio_pci_reset(DeviceState *dev)
2579 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
2580 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2582 trace_vfio_pci_reset(vdev->vbasedev.name);
2584 vfio_pci_pre_reset(vdev);
2586 if (vdev->resetfn && !vdev->resetfn(vdev)) {
2590 if (vdev->vbasedev.reset_works &&
2591 (vdev->has_flr || !vdev->has_pm_reset) &&
2592 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) {
2593 trace_vfio_pci_reset_flr(vdev->vbasedev.name);
2597 /* See if we can do our own bus reset */
2598 if (!vfio_pci_hot_reset_one(vdev)) {
2602 /* If nothing else works and the device supports PM reset, use it */
2603 if (vdev->vbasedev.reset_works && vdev->has_pm_reset &&
2604 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) {
2605 trace_vfio_pci_reset_pm(vdev->vbasedev.name);
2610 vfio_pci_post_reset(vdev);
2613 static void vfio_instance_init(Object *obj)
2615 PCIDevice *pci_dev = PCI_DEVICE(obj);
2616 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, PCI_DEVICE(obj));
2618 device_add_bootindex_property(obj, &vdev->bootindex,
2620 &pci_dev->qdev, NULL);
2623 static Property vfio_pci_dev_properties[] = {
2624 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
2625 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice,
2626 intx.mmap_timeout, 1100),
2627 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
2628 VFIO_FEATURE_ENABLE_VGA_BIT, false),
2629 DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
2630 VFIO_FEATURE_ENABLE_REQ_BIT, true),
2631 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false),
2632 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false),
2633 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false),
2634 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false),
2635 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice, vendor_id, PCI_ANY_ID),
2636 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice, device_id, PCI_ANY_ID),
2637 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice,
2638 sub_vendor_id, PCI_ANY_ID),
2639 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice,
2640 sub_device_id, PCI_ANY_ID),
2642 * TODO - support passed fds... is this necessary?
2643 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
2644 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
2646 DEFINE_PROP_END_OF_LIST(),
2649 static const VMStateDescription vfio_pci_vmstate = {
2654 static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
2656 DeviceClass *dc = DEVICE_CLASS(klass);
2657 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
2659 dc->reset = vfio_pci_reset;
2660 dc->props = vfio_pci_dev_properties;
2661 dc->vmsd = &vfio_pci_vmstate;
2662 dc->desc = "VFIO-based PCI device assignment";
2663 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2664 pdc->init = vfio_initfn;
2665 pdc->exit = vfio_exitfn;
2666 pdc->config_read = vfio_pci_read_config;
2667 pdc->config_write = vfio_pci_write_config;
2668 pdc->is_express = 1; /* We might be */
2671 static const TypeInfo vfio_pci_dev_info = {
2673 .parent = TYPE_PCI_DEVICE,
2674 .instance_size = sizeof(VFIOPCIDevice),
2675 .class_init = vfio_pci_dev_class_init,
2676 .instance_init = vfio_instance_init,
2677 .instance_finalize = vfio_instance_finalize,
2680 static void register_vfio_pci_dev_type(void)
2682 type_register_static(&vfio_pci_dev_info);
2685 type_init(register_vfio_pci_dev_type)