4 * Generate inline load/store functions for one MMU mode and data
7 * Generate a store function as well as signed and unsigned loads. For
8 * 32 and 64 bit cases, also generate floating point functions with
11 * Not used directly but included from softmmu_exec.h and exec-all.h.
13 * Copyright (c) 2003 Fabrice Bellard
15 * This library is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU Lesser General Public
17 * License as published by the Free Software Foundation; either
18 * version 2 of the License, or (at your option) any later version.
20 * This library is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 * Lesser General Public License for more details.
25 * You should have received a copy of the GNU Lesser General Public
26 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
31 #define DATA_TYPE uint64_t
35 #define DATA_TYPE uint32_t
39 #define DATA_TYPE uint16_t
40 #define DATA_STYPE int16_t
44 #define DATA_TYPE uint8_t
45 #define DATA_STYPE int8_t
47 #error unsupported data size
50 #if ACCESS_TYPE < (NB_MMU_MODES)
52 #define CPU_MMU_INDEX ACCESS_TYPE
53 #define MMUSUFFIX _mmu
55 #elif ACCESS_TYPE == (NB_MMU_MODES)
57 #define CPU_MMU_INDEX (cpu_mmu_index(env))
58 #define MMUSUFFIX _mmu
60 #elif ACCESS_TYPE == (NB_MMU_MODES + 1)
62 #define CPU_MMU_INDEX (cpu_mmu_index(env))
63 #define MMUSUFFIX _cmmu
66 #error invalid ACCESS_TYPE
70 #define RES_TYPE uint64_t
72 #define RES_TYPE uint32_t
75 #if ACCESS_TYPE == (NB_MMU_MODES + 1)
76 #define ADDR_READ addr_code
78 #define ADDR_READ addr_read
81 /* generic load/store macros */
83 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
88 unsigned long physaddr;
92 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
93 mmu_idx = CPU_MMU_INDEX;
94 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
95 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
96 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
98 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
99 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
105 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
109 unsigned long physaddr;
113 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
114 mmu_idx = CPU_MMU_INDEX;
115 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
116 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
117 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
119 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
120 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
126 #if ACCESS_TYPE != (NB_MMU_MODES + 1)
128 /* generic store macro */
130 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
134 unsigned long physaddr;
138 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
139 mmu_idx = CPU_MMU_INDEX;
140 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
141 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
142 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
144 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
145 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
149 #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
151 #if ACCESS_TYPE != (NB_MMU_MODES + 1)
154 static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
160 u.i = glue(ldq, MEMSUFFIX)(ptr);
164 static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
171 glue(stq, MEMSUFFIX)(ptr, u.i);
173 #endif /* DATA_SIZE == 8 */
176 static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
182 u.i = glue(ldl, MEMSUFFIX)(ptr);
186 static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
193 glue(stl, MEMSUFFIX)(ptr, u.i);
195 #endif /* DATA_SIZE == 4 */
197 #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */