2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "sysemu/sysemu.h"
29 #include "hw/boards.h"
30 #include "hw/loader.h"
32 #include "exec/memory.h"
33 #include "exec/address-spaces.h"
34 #include "hw/char/serial.h"
36 #include "hw/sysbus.h"
37 #include "hw/block/flash.h"
38 #include "sysemu/blockdev.h"
39 #include "sysemu/char.h"
40 #include "bootparam.h"
42 typedef struct LxBoardDesc {
45 size_t flash_boot_base;
46 size_t flash_sector_size;
50 typedef struct Lx60FpgaState {
56 static void lx60_fpga_reset(void *opaque)
58 Lx60FpgaState *s = opaque;
64 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
67 Lx60FpgaState *s = opaque;
70 case 0x0: /*build date code*/
73 case 0x4: /*processor clock frequency, Hz*/
76 case 0x8: /*LEDs (off = 0, on = 1)*/
79 case 0xc: /*DIP switches (off = 0, on = 1)*/
85 static void lx60_fpga_write(void *opaque, hwaddr addr,
86 uint64_t val, unsigned size)
88 Lx60FpgaState *s = opaque;
91 case 0x8: /*LEDs (off = 0, on = 1)*/
95 case 0x10: /*board reset*/
97 qemu_system_reset_request();
103 static const MemoryRegionOps lx60_fpga_ops = {
104 .read = lx60_fpga_read,
105 .write = lx60_fpga_write,
106 .endianness = DEVICE_NATIVE_ENDIAN,
109 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
112 Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
114 memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
115 "lx60.fpga", 0x10000);
116 memory_region_add_subregion(address_space, base, &s->iomem);
118 qemu_register_reset(lx60_fpga_reset, s);
122 static void lx60_net_init(MemoryRegion *address_space,
126 qemu_irq irq, NICInfo *nd)
132 dev = qdev_create(NULL, "open_eth");
133 qdev_set_nic_properties(dev, nd);
134 qdev_init_nofail(dev);
136 s = SYS_BUS_DEVICE(dev);
137 sysbus_connect_irq(s, 0, irq);
138 memory_region_add_subregion(address_space, base,
139 sysbus_mmio_get_region(s, 0));
140 memory_region_add_subregion(address_space, descriptors,
141 sysbus_mmio_get_region(s, 1));
143 ram = g_malloc(sizeof(*ram));
144 memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384);
145 vmstate_register_ram_global(ram);
146 memory_region_add_subregion(address_space, buffers, ram);
149 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
151 XtensaCPU *cpu = opaque;
153 return cpu_get_phys_page_debug(CPU(cpu), addr);
156 static void lx60_reset(void *opaque)
158 XtensaCPU *cpu = opaque;
163 static void lx_init(const LxBoardDesc *board, MachineState *machine)
165 #ifdef TARGET_WORDS_BIGENDIAN
170 MemoryRegion *system_memory = get_system_memory();
171 XtensaCPU *cpu = NULL;
172 CPUXtensaState *env = NULL;
173 MemoryRegion *ram, *rom, *system_io;
175 pflash_t *flash = NULL;
176 const char *cpu_model = machine->cpu_model;
177 const char *kernel_filename = machine->kernel_filename;
178 const char *kernel_cmdline = machine->kernel_cmdline;
182 cpu_model = XTENSA_DEFAULT_CPU_MODEL;
185 for (n = 0; n < smp_cpus; n++) {
186 cpu = cpu_xtensa_init(cpu_model);
188 fprintf(stderr, "Unable to find CPU definition\n");
193 env->sregs[PRID] = n;
194 qemu_register_reset(lx60_reset, cpu);
195 /* Need MMU initialized prior to ELF loading,
196 * so that ELF gets loaded into virtual addresses
201 ram = g_malloc(sizeof(*ram));
202 memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size);
203 vmstate_register_ram_global(ram);
204 memory_region_add_subregion(system_memory, 0, ram);
206 system_io = g_malloc(sizeof(*system_io));
207 memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024);
208 memory_region_add_subregion(system_memory, 0xf0000000, system_io);
209 lx60_fpga_init(system_io, 0x0d020000);
210 if (nd_table[0].used) {
211 lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
212 xtensa_get_extint(env, 1), nd_table);
215 if (!serial_hds[0]) {
216 serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
219 serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
220 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
222 dinfo = drive_get(IF_PFLASH, 0, 0);
224 flash = pflash_cfi01_register(board->flash_base,
225 NULL, "lx60.io.flash", board->flash_size,
226 dinfo->bdrv, board->flash_sector_size,
227 board->flash_size / board->flash_sector_size,
228 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
230 fprintf(stderr, "Unable to mount pflash\n");
235 /* Use presence of kernel file name as 'boot from SRAM' switch. */
236 if (kernel_filename) {
237 rom = g_malloc(sizeof(*rom));
238 memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
239 vmstate_register_ram_global(rom);
240 memory_region_add_subregion(system_memory, 0xfe000000, rom);
242 /* Put kernel bootparameters to the end of that SRAM */
243 if (kernel_cmdline) {
244 size_t cmdline_size = strlen(kernel_cmdline) + 1;
245 size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
246 uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
248 env->regs[2] = tagptr;
250 tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
251 if (cmdline_size > 1) {
252 tagptr = put_tag(tagptr, 0x1001,
253 cmdline_size, kernel_cmdline);
255 tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
258 uint64_t elf_lowaddr;
259 int success = load_elf(kernel_filename, translate_phys_addr, cpu,
260 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
266 MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
267 MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
269 memory_region_init_alias(flash_io, NULL, "lx60.flash",
270 flash_mr, board->flash_boot_base,
271 board->flash_size - board->flash_boot_base < 0x02000000 ?
272 board->flash_size - board->flash_boot_base : 0x02000000);
273 memory_region_add_subregion(system_memory, 0xfe000000,
279 static void xtensa_lx60_init(MachineState *machine)
281 static const LxBoardDesc lx60_board = {
282 .flash_base = 0xf8000000,
283 .flash_size = 0x00400000,
284 .flash_sector_size = 0x10000,
285 .sram_size = 0x20000,
287 lx_init(&lx60_board, machine);
290 static void xtensa_lx200_init(MachineState *machine)
292 static const LxBoardDesc lx200_board = {
293 .flash_base = 0xf8000000,
294 .flash_size = 0x01000000,
295 .flash_sector_size = 0x20000,
296 .sram_size = 0x2000000,
298 lx_init(&lx200_board, machine);
301 static void xtensa_ml605_init(MachineState *machine)
303 static const LxBoardDesc ml605_board = {
304 .flash_base = 0xf8000000,
305 .flash_size = 0x02000000,
306 .flash_sector_size = 0x20000,
307 .sram_size = 0x2000000,
309 lx_init(&ml605_board, machine);
312 static void xtensa_kc705_init(MachineState *machine)
314 static const LxBoardDesc kc705_board = {
315 .flash_base = 0xf0000000,
316 .flash_size = 0x08000000,
317 .flash_boot_base = 0x06000000,
318 .flash_sector_size = 0x20000,
319 .sram_size = 0x2000000,
321 lx_init(&kc705_board, machine);
324 static QEMUMachine xtensa_lx60_machine = {
326 .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
327 .init = xtensa_lx60_init,
331 static QEMUMachine xtensa_lx200_machine = {
333 .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
334 .init = xtensa_lx200_init,
338 static QEMUMachine xtensa_ml605_machine = {
340 .desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
341 .init = xtensa_ml605_init,
345 static QEMUMachine xtensa_kc705_machine = {
347 .desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
348 .init = xtensa_kc705_init,
352 static void xtensa_lx_machines_init(void)
354 qemu_register_machine(&xtensa_lx60_machine);
355 qemu_register_machine(&xtensa_lx200_machine);
356 qemu_register_machine(&xtensa_ml605_machine);
357 qemu_register_machine(&xtensa_kc705_machine);
360 machine_init(xtensa_lx_machines_init);