2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
37 #include "arch_init.h"
42 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
43 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
44 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
46 static void ioapic_init(IsaIrqState *isa_irq_state)
52 dev = qdev_create(NULL, "ioapic");
53 qdev_init_nofail(dev);
54 d = sysbus_from_qdev(dev);
55 sysbus_mmio_map(d, 0, 0xfec00000);
57 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
58 isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
62 /* PC hardware initialisation */
63 static void pc_init1(ram_addr_t ram_size,
64 const char *boot_device,
65 const char *kernel_filename,
66 const char *kernel_cmdline,
67 const char *initrd_filename,
68 const char *cpu_model,
72 ram_addr_t below_4g_mem_size, above_4g_mem_size;
74 PCII440FXState *i440fx_state;
81 IsaIrqState *isa_irq_state;
82 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
83 FDCtrl *floppy_controller;
84 BusState *idebus[MAX_IDE_BUS];
87 pc_cpus_init(cpu_model);
91 /* allocate ram and load rom/bios */
92 pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
93 &below_4g_mem_size, &above_4g_mem_size);
95 cpu_irq = pc_allocate_cpu_irq();
96 i8259 = i8259_init(cpu_irq[0]);
97 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
98 isa_irq_state->i8259 = i8259;
100 ioapic_init(isa_irq_state);
102 isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
105 pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
111 isa_bus_irqs(isa_irq);
113 pc_register_ferr_irq(isa_reserve_irq(13));
115 pc_vga_init(pci_enabled? pci_bus: NULL);
117 /* init basic PC hardware */
118 pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
120 for(i = 0; i < nb_nics; i++) {
121 NICInfo *nd = &nd_table[i];
123 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
124 pc_init_ne2k_isa(nd);
126 pci_nic_init_nofail(nd, "e1000", NULL);
129 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
130 fprintf(stderr, "qemu: too many IDE bus\n");
134 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
135 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
140 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
141 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
142 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
144 for(i = 0; i < MAX_IDE_BUS; i++) {
146 dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
147 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
148 idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
152 audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
154 pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
155 idebus[0], idebus[1], floppy_controller, rtc_state);
157 if (pci_enabled && usb_enabled) {
158 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
161 if (pci_enabled && acpi_enabled) {
162 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
165 cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
166 smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
167 /* TODO: Populate SPD eeprom data. */
168 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
169 isa_reserve_irq(9), *cmos_s3, *smi_irq,
171 for (i = 0; i < 8; i++) {
173 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
174 qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
175 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
176 qdev_init_nofail(eeprom);
181 i440fx_init_memory_mappings(i440fx_state);
185 pc_pci_device_init(pci_bus);
189 static void pc_init_pci(ram_addr_t ram_size,
190 const char *boot_device,
191 const char *kernel_filename,
192 const char *kernel_cmdline,
193 const char *initrd_filename,
194 const char *cpu_model)
196 pc_init1(ram_size, boot_device,
197 kernel_filename, kernel_cmdline,
198 initrd_filename, cpu_model, 1);
201 static void pc_init_isa(ram_addr_t ram_size,
202 const char *boot_device,
203 const char *kernel_filename,
204 const char *kernel_cmdline,
205 const char *initrd_filename,
206 const char *cpu_model)
208 if (cpu_model == NULL)
210 pc_init1(ram_size, boot_device,
211 kernel_filename, kernel_cmdline,
212 initrd_filename, cpu_model, 0);
215 static QEMUMachine pc_machine = {
218 .desc = "Standard PC",
224 static QEMUMachine pc_machine_v0_13 = {
226 .desc = "Standard PC",
229 .compat_props = (GlobalProperty[]) {
231 .driver = "virtio-9p-pci",
232 .property = "vectors",
233 .value = stringify(0),
236 .property = "rombar",
237 .value = stringify(0),
239 .driver = "vmware-svga",
240 .property = "rombar",
241 .value = stringify(0),
244 .property = "command_serr_enable",
247 { /* end of list */ }
251 static QEMUMachine pc_machine_v0_12 = {
253 .desc = "Standard PC",
256 .compat_props = (GlobalProperty[]) {
258 .driver = "virtio-serial-pci",
259 .property = "max_ports",
260 .value = stringify(1),
262 .driver = "virtio-serial-pci",
263 .property = "vectors",
264 .value = stringify(0),
267 .property = "rombar",
268 .value = stringify(0),
270 .driver = "vmware-svga",
271 .property = "rombar",
272 .value = stringify(0),
275 .property = "command_serr_enable",
278 { /* end of list */ }
282 static QEMUMachine pc_machine_v0_11 = {
284 .desc = "Standard PC, qemu 0.11",
287 .compat_props = (GlobalProperty[]) {
289 .driver = "virtio-blk-pci",
290 .property = "vectors",
291 .value = stringify(0),
293 .driver = "virtio-serial-pci",
294 .property = "max_ports",
295 .value = stringify(1),
297 .driver = "virtio-serial-pci",
298 .property = "vectors",
299 .value = stringify(0),
301 .driver = "ide-drive",
305 .driver = "scsi-disk",
310 .property = "rombar",
311 .value = stringify(0),
314 .property = "command_serr_enable",
317 { /* end of list */ }
321 static QEMUMachine pc_machine_v0_10 = {
323 .desc = "Standard PC, qemu 0.10",
326 .compat_props = (GlobalProperty[]) {
328 .driver = "virtio-blk-pci",
330 .value = stringify(PCI_CLASS_STORAGE_OTHER),
332 .driver = "virtio-serial-pci",
334 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
336 .driver = "virtio-serial-pci",
337 .property = "max_ports",
338 .value = stringify(1),
340 .driver = "virtio-serial-pci",
341 .property = "vectors",
342 .value = stringify(0),
344 .driver = "virtio-net-pci",
345 .property = "vectors",
346 .value = stringify(0),
348 .driver = "virtio-blk-pci",
349 .property = "vectors",
350 .value = stringify(0),
352 .driver = "ide-drive",
356 .driver = "scsi-disk",
361 .property = "rombar",
362 .value = stringify(0),
365 .property = "command_serr_enable",
368 { /* end of list */ }
372 static QEMUMachine isapc_machine = {
374 .desc = "ISA-only PC",
379 static void pc_machine_init(void)
381 qemu_register_machine(&pc_machine);
382 qemu_register_machine(&pc_machine_v0_13);
383 qemu_register_machine(&pc_machine_v0_12);
384 qemu_register_machine(&pc_machine_v0_11);
385 qemu_register_machine(&pc_machine_v0_10);
386 qemu_register_machine(&isapc_machine);
389 machine_init(pc_machine_init);