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[qemu.git] / target-i386 / cpuid.c
1 /*
2  *  i386 CPUID helper functions
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <string.h>
22 #include <inttypes.h>
23
24 #include "cpu.h"
25 #include "kvm.h"
26
27 #include "qemu-option.h"
28 #include "qemu-config.h"
29
30 #include "hyperv.h"
31
32 /* feature flags taken from "Intel Processor Identification and the CPUID
33  * Instruction" and AMD's "CPUID Specification".  In cases of disagreement
34  * between feature naming conventions, aliases may be added.
35  */
36 static const char *feature_name[] = {
37     "fpu", "vme", "de", "pse",
38     "tsc", "msr", "pae", "mce",
39     "cx8", "apic", NULL, "sep",
40     "mtrr", "pge", "mca", "cmov",
41     "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
42     NULL, "ds" /* Intel dts */, "acpi", "mmx",
43     "fxsr", "sse", "sse2", "ss",
44     "ht" /* Intel htt */, "tm", "ia64", "pbe",
45 };
46 static const char *ext_feature_name[] = {
47     "pni|sse3" /* Intel,AMD sse3 */, "pclmulqdq|pclmuldq", "dtes64", "monitor",
48     "ds_cpl", "vmx", "smx", "est",
49     "tm2", "ssse3", "cid", NULL,
50     "fma", "cx16", "xtpr", "pdcm",
51     NULL, NULL, "dca", "sse4.1|sse4_1",
52     "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
53     "tsc-deadline", "aes", "xsave", "osxsave",
54     "avx", NULL, NULL, "hypervisor",
55 };
56 static const char *ext2_feature_name[] = {
57     "fpu", "vme", "de", "pse",
58     "tsc", "msr", "pae", "mce",
59     "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
60     "mtrr", "pge", "mca", "cmov",
61     "pat", "pse36", NULL, NULL /* Linux mp */,
62     "nx|xd", NULL, "mmxext", "mmx",
63     "fxsr", "fxsr_opt|ffxsr", "pdpe1gb" /* AMD Page1GB */, "rdtscp",
64     NULL, "lm|i64", "3dnowext", "3dnow",
65 };
66 static const char *ext3_feature_name[] = {
67     "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
68     "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
69     "3dnowprefetch", "osvw", "ibs", "xop",
70     "skinit", "wdt", NULL, NULL,
71     "fma4", NULL, "cvt16", "nodeid_msr",
72     NULL, NULL, NULL, NULL,
73     NULL, NULL, NULL, NULL,
74     NULL, NULL, NULL, NULL,
75 };
76
77 static const char *kvm_feature_name[] = {
78     "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, NULL, NULL,
79     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
81     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
82 };
83
84 static const char *svm_feature_name[] = {
85     "npt", "lbrv", "svm_lock", "nrip_save",
86     "tsc_scale", "vmcb_clean",  "flushbyasid", "decodeassists",
87     NULL, NULL, "pause_filter", NULL,
88     "pfthreshold", NULL, NULL, NULL,
89     NULL, NULL, NULL, NULL,
90     NULL, NULL, NULL, NULL,
91     NULL, NULL, NULL, NULL,
92     NULL, NULL, NULL, NULL,
93 };
94
95 /* collects per-function cpuid data
96  */
97 typedef struct model_features_t {
98     uint32_t *guest_feat;
99     uint32_t *host_feat;
100     uint32_t check_feat;
101     const char **flag_names;
102     uint32_t cpuid;
103     } model_features_t;
104
105 int check_cpuid = 0;
106 int enforce_cpuid = 0;
107
108 void host_cpuid(uint32_t function, uint32_t count,
109                 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
110 {
111 #if defined(CONFIG_KVM)
112     uint32_t vec[4];
113
114 #ifdef __x86_64__
115     asm volatile("cpuid"
116                  : "=a"(vec[0]), "=b"(vec[1]),
117                    "=c"(vec[2]), "=d"(vec[3])
118                  : "0"(function), "c"(count) : "cc");
119 #else
120     asm volatile("pusha \n\t"
121                  "cpuid \n\t"
122                  "mov %%eax, 0(%2) \n\t"
123                  "mov %%ebx, 4(%2) \n\t"
124                  "mov %%ecx, 8(%2) \n\t"
125                  "mov %%edx, 12(%2) \n\t"
126                  "popa"
127                  : : "a"(function), "c"(count), "S"(vec)
128                  : "memory", "cc");
129 #endif
130
131     if (eax)
132         *eax = vec[0];
133     if (ebx)
134         *ebx = vec[1];
135     if (ecx)
136         *ecx = vec[2];
137     if (edx)
138         *edx = vec[3];
139 #endif
140 }
141
142 #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
143
144 /* general substring compare of *[s1..e1) and *[s2..e2).  sx is start of
145  * a substring.  ex if !NULL points to the first char after a substring,
146  * otherwise the string is assumed to sized by a terminating nul.
147  * Return lexical ordering of *s1:*s2.
148  */
149 static int sstrcmp(const char *s1, const char *e1, const char *s2,
150     const char *e2)
151 {
152     for (;;) {
153         if (!*s1 || !*s2 || *s1 != *s2)
154             return (*s1 - *s2);
155         ++s1, ++s2;
156         if (s1 == e1 && s2 == e2)
157             return (0);
158         else if (s1 == e1)
159             return (*s2);
160         else if (s2 == e2)
161             return (*s1);
162     }
163 }
164
165 /* compare *[s..e) to *altstr.  *altstr may be a simple string or multiple
166  * '|' delimited (possibly empty) strings in which case search for a match
167  * within the alternatives proceeds left to right.  Return 0 for success,
168  * non-zero otherwise.
169  */
170 static int altcmp(const char *s, const char *e, const char *altstr)
171 {
172     const char *p, *q;
173
174     for (q = p = altstr; ; ) {
175         while (*p && *p != '|')
176             ++p;
177         if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
178             return (0);
179         if (!*p)
180             return (1);
181         else
182             q = ++p;
183     }
184 }
185
186 /* search featureset for flag *[s..e), if found set corresponding bit in
187  * *pval and return true, otherwise return false
188  */
189 static bool lookup_feature(uint32_t *pval, const char *s, const char *e,
190                            const char **featureset)
191 {
192     uint32_t mask;
193     const char **ppc;
194     bool found = false;
195
196     for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) {
197         if (*ppc && !altcmp(s, e, *ppc)) {
198             *pval |= mask;
199             found = true;
200         }
201     }
202     return found;
203 }
204
205 static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
206                                     uint32_t *ext_features,
207                                     uint32_t *ext2_features,
208                                     uint32_t *ext3_features,
209                                     uint32_t *kvm_features,
210                                     uint32_t *svm_features)
211 {
212     if (!lookup_feature(features, flagname, NULL, feature_name) &&
213         !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
214         !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
215         !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
216         !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
217         !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
218             fprintf(stderr, "CPU feature %s not found\n", flagname);
219 }
220
221 typedef struct x86_def_t {
222     struct x86_def_t *next;
223     const char *name;
224     uint32_t level;
225     uint32_t vendor1, vendor2, vendor3;
226     int family;
227     int model;
228     int stepping;
229     int tsc_khz;
230     uint32_t features, ext_features, ext2_features, ext3_features;
231     uint32_t kvm_features, svm_features;
232     uint32_t xlevel;
233     char model_id[48];
234     int vendor_override;
235     uint32_t flags;
236     /* Store the results of Centaur's CPUID instructions */
237     uint32_t ext4_features;
238     uint32_t xlevel2;
239 } x86_def_t;
240
241 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
242 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
243           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
244 #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
245           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
246           CPUID_PSE36 | CPUID_FXSR)
247 #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
248 #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
249           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
250           CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
251           CPUID_PAE | CPUID_SEP | CPUID_APIC)
252 #define EXT2_FEATURE_MASK 0x0183F3FF
253
254 #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
255           CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
256           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
257           CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
258           CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
259           /* partly implemented:
260           CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
261           CPUID_PSE36 (needed for Solaris) */
262           /* missing:
263           CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
264 #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
265           CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
266           CPUID_EXT_HYPERVISOR)
267           /* missing:
268           CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
269           CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
270 #define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
271           CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
272           CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
273           /* missing:
274           CPUID_EXT2_PDPE1GB */
275 #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
276           CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
277 #define TCG_SVM_FEATURES 0
278
279 /* maintains list of cpu model definitions
280  */
281 static x86_def_t *x86_defs = {NULL};
282
283 /* built-in cpu model definitions (deprecated)
284  */
285 static x86_def_t builtin_x86_defs[] = {
286     {
287         .name = "qemu64",
288         .level = 4,
289         .vendor1 = CPUID_VENDOR_AMD_1,
290         .vendor2 = CPUID_VENDOR_AMD_2,
291         .vendor3 = CPUID_VENDOR_AMD_3,
292         .family = 6,
293         .model = 2,
294         .stepping = 3,
295         .features = PPRO_FEATURES |
296             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
297             CPUID_PSE36,
298         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
299         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
300             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
301         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
302             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
303         .xlevel = 0x8000000A,
304         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
305     },
306     {
307         .name = "phenom",
308         .level = 5,
309         .vendor1 = CPUID_VENDOR_AMD_1,
310         .vendor2 = CPUID_VENDOR_AMD_2,
311         .vendor3 = CPUID_VENDOR_AMD_3,
312         .family = 16,
313         .model = 2,
314         .stepping = 3,
315         .features = PPRO_FEATURES |
316             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
317             CPUID_PSE36 | CPUID_VME | CPUID_HT,
318         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
319             CPUID_EXT_POPCNT,
320         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
321             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
322             CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
323             CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
324         /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
325                     CPUID_EXT3_CR8LEG,
326                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
327                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
328         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
329             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
330         .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
331         .xlevel = 0x8000001A,
332         .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
333     },
334     {
335         .name = "core2duo",
336         .level = 10,
337         .family = 6,
338         .model = 15,
339         .stepping = 11,
340         .features = PPRO_FEATURES |
341             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
342             CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
343             CPUID_HT | CPUID_TM | CPUID_PBE,
344         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
345             CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
346             CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
347         .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
348         .ext3_features = CPUID_EXT3_LAHF_LM,
349         .xlevel = 0x80000008,
350         .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
351     },
352     {
353         .name = "kvm64",
354         .level = 5,
355         .vendor1 = CPUID_VENDOR_INTEL_1,
356         .vendor2 = CPUID_VENDOR_INTEL_2,
357         .vendor3 = CPUID_VENDOR_INTEL_3,
358         .family = 15,
359         .model = 6,
360         .stepping = 1,
361         /* Missing: CPUID_VME, CPUID_HT */
362         .features = PPRO_FEATURES |
363             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
364             CPUID_PSE36,
365         /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
366         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
367         /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
368         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
369             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
370         /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
371                     CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
372                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
373                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
374         .ext3_features = 0,
375         .xlevel = 0x80000008,
376         .model_id = "Common KVM processor"
377     },
378     {
379         .name = "qemu32",
380         .level = 4,
381         .family = 6,
382         .model = 3,
383         .stepping = 3,
384         .features = PPRO_FEATURES,
385         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
386         .xlevel = 0x80000004,
387         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
388     },
389     {
390         .name = "kvm32",
391         .level = 5,
392         .family = 15,
393         .model = 6,
394         .stepping = 1,
395         .features = PPRO_FEATURES |
396             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
397         .ext_features = CPUID_EXT_SSE3,
398         .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
399         .ext3_features = 0,
400         .xlevel = 0x80000008,
401         .model_id = "Common 32-bit KVM processor"
402     },
403     {
404         .name = "coreduo",
405         .level = 10,
406         .family = 6,
407         .model = 14,
408         .stepping = 8,
409         .features = PPRO_FEATURES | CPUID_VME |
410             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
411             CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
412         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
413             CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
414         .ext2_features = CPUID_EXT2_NX,
415         .xlevel = 0x80000008,
416         .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
417     },
418     {
419         .name = "486",
420         .level = 1,
421         .family = 4,
422         .model = 0,
423         .stepping = 0,
424         .features = I486_FEATURES,
425         .xlevel = 0,
426     },
427     {
428         .name = "pentium",
429         .level = 1,
430         .family = 5,
431         .model = 4,
432         .stepping = 3,
433         .features = PENTIUM_FEATURES,
434         .xlevel = 0,
435     },
436     {
437         .name = "pentium2",
438         .level = 2,
439         .family = 6,
440         .model = 5,
441         .stepping = 2,
442         .features = PENTIUM2_FEATURES,
443         .xlevel = 0,
444     },
445     {
446         .name = "pentium3",
447         .level = 2,
448         .family = 6,
449         .model = 7,
450         .stepping = 3,
451         .features = PENTIUM3_FEATURES,
452         .xlevel = 0,
453     },
454     {
455         .name = "athlon",
456         .level = 2,
457         .vendor1 = CPUID_VENDOR_AMD_1,
458         .vendor2 = CPUID_VENDOR_AMD_2,
459         .vendor3 = CPUID_VENDOR_AMD_3,
460         .family = 6,
461         .model = 2,
462         .stepping = 3,
463         .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
464         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
465         .xlevel = 0x80000008,
466         /* XXX: put another string ? */
467         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
468     },
469     {
470         .name = "n270",
471         /* original is on level 10 */
472         .level = 5,
473         .family = 6,
474         .model = 28,
475         .stepping = 2,
476         .features = PPRO_FEATURES |
477             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
478             CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
479             /* Some CPUs got no CPUID_SEP */
480         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
481             CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
482         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
483         .ext3_features = CPUID_EXT3_LAHF_LM,
484         .xlevel = 0x8000000A,
485         .model_id = "Intel(R) Atom(TM) CPU N270   @ 1.60GHz",
486     },
487 };
488
489 static int cpu_x86_fill_model_id(char *str)
490 {
491     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
492     int i;
493
494     for (i = 0; i < 3; i++) {
495         host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
496         memcpy(str + i * 16 +  0, &eax, 4);
497         memcpy(str + i * 16 +  4, &ebx, 4);
498         memcpy(str + i * 16 +  8, &ecx, 4);
499         memcpy(str + i * 16 + 12, &edx, 4);
500     }
501     return 0;
502 }
503
504 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
505 {
506     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
507
508     x86_cpu_def->name = "host";
509     host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
510     x86_cpu_def->level = eax;
511     x86_cpu_def->vendor1 = ebx;
512     x86_cpu_def->vendor2 = edx;
513     x86_cpu_def->vendor3 = ecx;
514
515     host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
516     x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
517     x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
518     x86_cpu_def->stepping = eax & 0x0F;
519     x86_cpu_def->ext_features = ecx;
520     x86_cpu_def->features = edx;
521
522     host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
523     x86_cpu_def->xlevel = eax;
524
525     host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
526     x86_cpu_def->ext2_features = edx;
527     x86_cpu_def->ext3_features = ecx;
528     cpu_x86_fill_model_id(x86_cpu_def->model_id);
529     x86_cpu_def->vendor_override = 0;
530
531     /* Call Centaur's CPUID instruction. */
532     if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
533         x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
534         x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
535         host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
536         if (eax >= 0xC0000001) {
537             /* Support VIA max extended level */
538             x86_cpu_def->xlevel2 = eax;
539             host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
540             x86_cpu_def->ext4_features = edx;
541         }
542     }
543
544     /*
545      * Every SVM feature requires emulation support in KVM - so we can't just
546      * read the host features here. KVM might even support SVM features not
547      * available on the host hardware. Just set all bits and mask out the
548      * unsupported ones later.
549      */
550     x86_cpu_def->svm_features = -1;
551
552     return 0;
553 }
554
555 static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
556 {
557     int i;
558
559     for (i = 0; i < 32; ++i)
560         if (1 << i & mask) {
561             fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
562                 " flag '%s' [0x%08x]\n",
563                 f->cpuid >> 16, f->cpuid & 0xffff,
564                 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
565             break;
566         }
567     return 0;
568 }
569
570 /* best effort attempt to inform user requested cpu flags aren't making
571  * their way to the guest.  Note: ft[].check_feat ideally should be
572  * specified via a guest_def field to suppress report of extraneous flags.
573  */
574 static int check_features_against_host(x86_def_t *guest_def)
575 {
576     x86_def_t host_def;
577     uint32_t mask;
578     int rv, i;
579     struct model_features_t ft[] = {
580         {&guest_def->features, &host_def.features,
581             ~0, feature_name, 0x00000000},
582         {&guest_def->ext_features, &host_def.ext_features,
583             ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
584         {&guest_def->ext2_features, &host_def.ext2_features,
585             ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
586         {&guest_def->ext3_features, &host_def.ext3_features,
587             ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
588
589     cpu_x86_fill_host(&host_def);
590     for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
591         for (mask = 1; mask; mask <<= 1)
592             if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
593                 !(*ft[i].host_feat & mask)) {
594                     unavailable_host_feature(&ft[i], mask);
595                     rv = 1;
596                 }
597     return rv;
598 }
599
600 static void x86_cpuid_version_set_family(CPUX86State *env, int family)
601 {
602     env->cpuid_version &= ~0xff00f00;
603     if (family > 0x0f) {
604         env->cpuid_version |= 0xf00 | ((family - 0x0f) << 20);
605     } else {
606         env->cpuid_version |= family << 8;
607     }
608 }
609
610 static void x86_cpuid_version_set_model(CPUX86State *env, int model)
611 {
612     env->cpuid_version &= ~0xf00f0;
613     env->cpuid_version |= ((model & 0xf) << 4) | ((model >> 4) << 16);
614 }
615
616 static void x86_cpuid_version_set_stepping(CPUX86State *env, int stepping)
617 {
618     env->cpuid_version &= ~0xf;
619     env->cpuid_version |= stepping & 0xf;
620 }
621
622 static void x86_cpuid_set_model_id(CPUX86State *env, const char *model_id)
623 {
624     int c, len, i;
625
626     if (model_id == NULL) {
627         model_id = "";
628     }
629     len = strlen(model_id);
630     for (i = 0; i < 48; i++) {
631         if (i >= len) {
632             c = '\0';
633         } else {
634             c = (uint8_t)model_id[i];
635         }
636         env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
637     }
638 }
639
640 static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
641 {
642     unsigned int i;
643     x86_def_t *def;
644
645     char *s = g_strdup(cpu_model);
646     char *featurestr, *name = strtok(s, ",");
647     /* Features to be added*/
648     uint32_t plus_features = 0, plus_ext_features = 0;
649     uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
650     uint32_t plus_kvm_features = 0, plus_svm_features = 0;
651     /* Features to be removed */
652     uint32_t minus_features = 0, minus_ext_features = 0;
653     uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
654     uint32_t minus_kvm_features = 0, minus_svm_features = 0;
655     uint32_t numvalue;
656
657     for (def = x86_defs; def; def = def->next)
658         if (name && !strcmp(name, def->name))
659             break;
660     if (kvm_enabled() && name && strcmp(name, "host") == 0) {
661         cpu_x86_fill_host(x86_cpu_def);
662     } else if (!def) {
663         goto error;
664     } else {
665         memcpy(x86_cpu_def, def, sizeof(*def));
666     }
667
668     plus_kvm_features = ~0; /* not supported bits will be filtered out later */
669
670     add_flagname_to_bitmaps("hypervisor", &plus_features,
671         &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
672         &plus_kvm_features, &plus_svm_features);
673
674     featurestr = strtok(NULL, ",");
675
676     while (featurestr) {
677         char *val;
678         if (featurestr[0] == '+') {
679             add_flagname_to_bitmaps(featurestr + 1, &plus_features,
680                             &plus_ext_features, &plus_ext2_features,
681                             &plus_ext3_features, &plus_kvm_features,
682                             &plus_svm_features);
683         } else if (featurestr[0] == '-') {
684             add_flagname_to_bitmaps(featurestr + 1, &minus_features,
685                             &minus_ext_features, &minus_ext2_features,
686                             &minus_ext3_features, &minus_kvm_features,
687                             &minus_svm_features);
688         } else if ((val = strchr(featurestr, '='))) {
689             *val = 0; val++;
690             if (!strcmp(featurestr, "family")) {
691                 char *err;
692                 numvalue = strtoul(val, &err, 0);
693                 if (!*val || *err) {
694                     fprintf(stderr, "bad numerical value %s\n", val);
695                     goto error;
696                 }
697                 x86_cpu_def->family = numvalue;
698             } else if (!strcmp(featurestr, "model")) {
699                 char *err;
700                 numvalue = strtoul(val, &err, 0);
701                 if (!*val || *err || numvalue > 0xff) {
702                     fprintf(stderr, "bad numerical value %s\n", val);
703                     goto error;
704                 }
705                 x86_cpu_def->model = numvalue;
706             } else if (!strcmp(featurestr, "stepping")) {
707                 char *err;
708                 numvalue = strtoul(val, &err, 0);
709                 if (!*val || *err || numvalue > 0xf) {
710                     fprintf(stderr, "bad numerical value %s\n", val);
711                     goto error;
712                 }
713                 x86_cpu_def->stepping = numvalue ;
714             } else if (!strcmp(featurestr, "level")) {
715                 char *err;
716                 numvalue = strtoul(val, &err, 0);
717                 if (!*val || *err) {
718                     fprintf(stderr, "bad numerical value %s\n", val);
719                     goto error;
720                 }
721                 x86_cpu_def->level = numvalue;
722             } else if (!strcmp(featurestr, "xlevel")) {
723                 char *err;
724                 numvalue = strtoul(val, &err, 0);
725                 if (!*val || *err) {
726                     fprintf(stderr, "bad numerical value %s\n", val);
727                     goto error;
728                 }
729                 if (numvalue < 0x80000000) {
730                     numvalue += 0x80000000;
731                 }
732                 x86_cpu_def->xlevel = numvalue;
733             } else if (!strcmp(featurestr, "vendor")) {
734                 if (strlen(val) != 12) {
735                     fprintf(stderr, "vendor string must be 12 chars long\n");
736                     goto error;
737                 }
738                 x86_cpu_def->vendor1 = 0;
739                 x86_cpu_def->vendor2 = 0;
740                 x86_cpu_def->vendor3 = 0;
741                 for(i = 0; i < 4; i++) {
742                     x86_cpu_def->vendor1 |= ((uint8_t)val[i    ]) << (8 * i);
743                     x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
744                     x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
745                 }
746                 x86_cpu_def->vendor_override = 1;
747             } else if (!strcmp(featurestr, "model_id")) {
748                 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
749                         val);
750             } else if (!strcmp(featurestr, "tsc_freq")) {
751                 int64_t tsc_freq;
752                 char *err;
753
754                 tsc_freq = strtosz_suffix_unit(val, &err,
755                                                STRTOSZ_DEFSUFFIX_B, 1000);
756                 if (tsc_freq < 0 || *err) {
757                     fprintf(stderr, "bad numerical value %s\n", val);
758                     goto error;
759                 }
760                 x86_cpu_def->tsc_khz = tsc_freq / 1000;
761             } else if (!strcmp(featurestr, "hv_spinlocks")) {
762                 char *err;
763                 numvalue = strtoul(val, &err, 0);
764                 if (!*val || *err) {
765                     fprintf(stderr, "bad numerical value %s\n", val);
766                     goto error;
767                 }
768                 hyperv_set_spinlock_retries(numvalue);
769             } else {
770                 fprintf(stderr, "unrecognized feature %s\n", featurestr);
771                 goto error;
772             }
773         } else if (!strcmp(featurestr, "check")) {
774             check_cpuid = 1;
775         } else if (!strcmp(featurestr, "enforce")) {
776             check_cpuid = enforce_cpuid = 1;
777         } else if (!strcmp(featurestr, "hv_relaxed")) {
778             hyperv_enable_relaxed_timing(true);
779         } else if (!strcmp(featurestr, "hv_vapic")) {
780             hyperv_enable_vapic_recommended(true);
781         } else {
782             fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
783             goto error;
784         }
785         featurestr = strtok(NULL, ",");
786     }
787     x86_cpu_def->features |= plus_features;
788     x86_cpu_def->ext_features |= plus_ext_features;
789     x86_cpu_def->ext2_features |= plus_ext2_features;
790     x86_cpu_def->ext3_features |= plus_ext3_features;
791     x86_cpu_def->kvm_features |= plus_kvm_features;
792     x86_cpu_def->svm_features |= plus_svm_features;
793     x86_cpu_def->features &= ~minus_features;
794     x86_cpu_def->ext_features &= ~minus_ext_features;
795     x86_cpu_def->ext2_features &= ~minus_ext2_features;
796     x86_cpu_def->ext3_features &= ~minus_ext3_features;
797     x86_cpu_def->kvm_features &= ~minus_kvm_features;
798     x86_cpu_def->svm_features &= ~minus_svm_features;
799     if (check_cpuid) {
800         if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
801             goto error;
802     }
803     g_free(s);
804     return 0;
805
806 error:
807     g_free(s);
808     return -1;
809 }
810
811 /* generate a composite string into buf of all cpuid names in featureset
812  * selected by fbits.  indicate truncation at bufsize in the event of overflow.
813  * if flags, suppress names undefined in featureset.
814  */
815 static void listflags(char *buf, int bufsize, uint32_t fbits,
816     const char **featureset, uint32_t flags)
817 {
818     const char **p = &featureset[31];
819     char *q, *b, bit;
820     int nc;
821
822     b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
823     *buf = '\0';
824     for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
825         if (fbits & 1 << bit && (*p || !flags)) {
826             if (*p)
827                 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
828             else
829                 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
830             if (bufsize <= nc) {
831                 if (b) {
832                     memcpy(b, "...", sizeof("..."));
833                 }
834                 return;
835             }
836             q += nc;
837             bufsize -= nc;
838         }
839 }
840
841 /* generate CPU information:
842  * -?        list model names
843  * -?model   list model names/IDs
844  * -?dump    output all model (x86_def_t) data
845  * -?cpuid   list all recognized cpuid flag names
846  */
847 void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
848 {
849     unsigned char model = !strcmp("?model", optarg);
850     unsigned char dump = !strcmp("?dump", optarg);
851     unsigned char cpuid = !strcmp("?cpuid", optarg);
852     x86_def_t *def;
853     char buf[256];
854
855     if (cpuid) {
856         (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
857         listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
858         (*cpu_fprintf)(f, "  f_edx: %s\n", buf);
859         listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
860         (*cpu_fprintf)(f, "  f_ecx: %s\n", buf);
861         listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
862         (*cpu_fprintf)(f, "  extf_edx: %s\n", buf);
863         listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
864         (*cpu_fprintf)(f, "  extf_ecx: %s\n", buf);
865         return;
866     }
867     for (def = x86_defs; def; def = def->next) {
868         snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
869         if (model || dump) {
870             (*cpu_fprintf)(f, "x86 %16s  %-48s\n", buf, def->model_id);
871         } else {
872             (*cpu_fprintf)(f, "x86 %16s\n", buf);
873         }
874         if (dump) {
875             memcpy(buf, &def->vendor1, sizeof (def->vendor1));
876             memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
877             memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
878             buf[12] = '\0';
879             (*cpu_fprintf)(f,
880                 "  family %d model %d stepping %d level %d xlevel 0x%x"
881                 " vendor \"%s\"\n",
882                 def->family, def->model, def->stepping, def->level,
883                 def->xlevel, buf);
884             listflags(buf, sizeof (buf), def->features, feature_name, 0);
885             (*cpu_fprintf)(f, "  feature_edx %08x (%s)\n", def->features,
886                 buf);
887             listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
888                 0);
889             (*cpu_fprintf)(f, "  feature_ecx %08x (%s)\n", def->ext_features,
890                 buf);
891             listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
892                 0);
893             (*cpu_fprintf)(f, "  extfeature_edx %08x (%s)\n",
894                 def->ext2_features, buf);
895             listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
896                 0);
897             (*cpu_fprintf)(f, "  extfeature_ecx %08x (%s)\n",
898                 def->ext3_features, buf);
899             (*cpu_fprintf)(f, "\n");
900         }
901     }
902     if (kvm_enabled()) {
903         (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
904     }
905 }
906
907 int cpu_x86_register (CPUX86State *env, const char *cpu_model)
908 {
909     x86_def_t def1, *def = &def1;
910
911     memset(def, 0, sizeof(*def));
912
913     if (cpu_x86_find_by_name(def, cpu_model) < 0)
914         return -1;
915     if (def->vendor1) {
916         env->cpuid_vendor1 = def->vendor1;
917         env->cpuid_vendor2 = def->vendor2;
918         env->cpuid_vendor3 = def->vendor3;
919     } else {
920         env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
921         env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
922         env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
923     }
924     env->cpuid_vendor_override = def->vendor_override;
925     env->cpuid_level = def->level;
926     x86_cpuid_version_set_family(env, def->family);
927     x86_cpuid_version_set_model(env, def->model);
928     x86_cpuid_version_set_stepping(env, def->stepping);
929     env->cpuid_features = def->features;
930     env->cpuid_ext_features = def->ext_features;
931     env->cpuid_ext2_features = def->ext2_features;
932     env->cpuid_ext3_features = def->ext3_features;
933     env->cpuid_xlevel = def->xlevel;
934     env->cpuid_kvm_features = def->kvm_features;
935     env->cpuid_svm_features = def->svm_features;
936     env->cpuid_ext4_features = def->ext4_features;
937     env->cpuid_xlevel2 = def->xlevel2;
938     env->tsc_khz = def->tsc_khz;
939     if (!kvm_enabled()) {
940         env->cpuid_features &= TCG_FEATURES;
941         env->cpuid_ext_features &= TCG_EXT_FEATURES;
942         env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
943 #ifdef TARGET_X86_64
944             | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
945 #endif
946             );
947         env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
948         env->cpuid_svm_features &= TCG_SVM_FEATURES;
949     }
950     x86_cpuid_set_model_id(env, def->model_id);
951     return 0;
952 }
953
954 #if !defined(CONFIG_USER_ONLY)
955 /* copy vendor id string to 32 bit register, nul pad as needed
956  */
957 static void cpyid(const char *s, uint32_t *id)
958 {
959     char *d = (char *)id;
960     char i;
961
962     for (i = sizeof (*id); i--; )
963         *d++ = *s ? *s++ : '\0';
964 }
965
966 /* interpret radix and convert from string to arbitrary scalar,
967  * otherwise flag failure
968  */
969 #define setscalar(pval, str, perr)                      \
970 {                                                       \
971     char *pend;                                         \
972     unsigned long ul;                                   \
973                                                         \
974     ul = strtoul(str, &pend, 0);                        \
975     *str && !*pend ? (*pval = ul) : (*perr = 1);        \
976 }
977
978 /* map cpuid options to feature bits, otherwise return failure
979  * (option tags in *str are delimited by whitespace)
980  */
981 static void setfeatures(uint32_t *pval, const char *str,
982     const char **featureset, int *perr)
983 {
984     const char *p, *q;
985
986     for (q = p = str; *p || *q; q = p) {
987         while (iswhite(*p))
988             q = ++p;
989         while (*p && !iswhite(*p))
990             ++p;
991         if (!*q && !*p)
992             return;
993         if (!lookup_feature(pval, q, p, featureset)) {
994             fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
995                 (int)(p - q), q);
996             *perr = 1;
997             return;
998         }
999     }
1000 }
1001
1002 /* map config file options to x86_def_t form
1003  */
1004 static int cpudef_setfield(const char *name, const char *str, void *opaque)
1005 {
1006     x86_def_t *def = opaque;
1007     int err = 0;
1008
1009     if (!strcmp(name, "name")) {
1010         g_free((void *)def->name);
1011         def->name = g_strdup(str);
1012     } else if (!strcmp(name, "model_id")) {
1013         strncpy(def->model_id, str, sizeof (def->model_id));
1014     } else if (!strcmp(name, "level")) {
1015         setscalar(&def->level, str, &err)
1016     } else if (!strcmp(name, "vendor")) {
1017         cpyid(&str[0], &def->vendor1);
1018         cpyid(&str[4], &def->vendor2);
1019         cpyid(&str[8], &def->vendor3);
1020     } else if (!strcmp(name, "family")) {
1021         setscalar(&def->family, str, &err)
1022     } else if (!strcmp(name, "model")) {
1023         setscalar(&def->model, str, &err)
1024     } else if (!strcmp(name, "stepping")) {
1025         setscalar(&def->stepping, str, &err)
1026     } else if (!strcmp(name, "feature_edx")) {
1027         setfeatures(&def->features, str, feature_name, &err);
1028     } else if (!strcmp(name, "feature_ecx")) {
1029         setfeatures(&def->ext_features, str, ext_feature_name, &err);
1030     } else if (!strcmp(name, "extfeature_edx")) {
1031         setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
1032     } else if (!strcmp(name, "extfeature_ecx")) {
1033         setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
1034     } else if (!strcmp(name, "xlevel")) {
1035         setscalar(&def->xlevel, str, &err)
1036     } else {
1037         fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
1038         return (1);
1039     }
1040     if (err) {
1041         fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
1042         return (1);
1043     }
1044     return (0);
1045 }
1046
1047 /* register config file entry as x86_def_t
1048  */
1049 static int cpudef_register(QemuOpts *opts, void *opaque)
1050 {
1051     x86_def_t *def = g_malloc0(sizeof (x86_def_t));
1052
1053     qemu_opt_foreach(opts, cpudef_setfield, def, 1);
1054     def->next = x86_defs;
1055     x86_defs = def;
1056     return (0);
1057 }
1058
1059 void cpu_clear_apic_feature(CPUX86State *env)
1060 {
1061     env->cpuid_features &= ~CPUID_APIC;
1062 }
1063
1064 #endif /* !CONFIG_USER_ONLY */
1065
1066 /* register "cpudef" models defined in configuration file.  Here we first
1067  * preload any built-in definitions
1068  */
1069 void x86_cpudef_setup(void)
1070 {
1071     int i;
1072
1073     for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1074         builtin_x86_defs[i].next = x86_defs;
1075         builtin_x86_defs[i].flags = 1;
1076         x86_defs = &builtin_x86_defs[i];
1077     }
1078 #if !defined(CONFIG_USER_ONLY)
1079     qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
1080 #endif
1081 }
1082
1083 static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1084                              uint32_t *ecx, uint32_t *edx)
1085 {
1086     *ebx = env->cpuid_vendor1;
1087     *edx = env->cpuid_vendor2;
1088     *ecx = env->cpuid_vendor3;
1089
1090     /* sysenter isn't supported on compatibility mode on AMD, syscall
1091      * isn't supported in compatibility mode on Intel.
1092      * Normally we advertise the actual cpu vendor, but you can override
1093      * this if you want to use KVM's sysenter/syscall emulation
1094      * in compatibility mode and when doing cross vendor migration
1095      */
1096     if (kvm_enabled() && ! env->cpuid_vendor_override) {
1097         host_cpuid(0, 0, NULL, ebx, ecx, edx);
1098     }
1099 }
1100
1101 void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1102                    uint32_t *eax, uint32_t *ebx,
1103                    uint32_t *ecx, uint32_t *edx)
1104 {
1105     /* test if maximum index reached */
1106     if (index & 0x80000000) {
1107         if (index > env->cpuid_xlevel) {
1108             if (env->cpuid_xlevel2 > 0) {
1109                 /* Handle the Centaur's CPUID instruction. */
1110                 if (index > env->cpuid_xlevel2) {
1111                     index = env->cpuid_xlevel2;
1112                 } else if (index < 0xC0000000) {
1113                     index = env->cpuid_xlevel;
1114                 }
1115             } else {
1116                 index =  env->cpuid_xlevel;
1117             }
1118         }
1119     } else {
1120         if (index > env->cpuid_level)
1121             index = env->cpuid_level;
1122     }
1123
1124     switch(index) {
1125     case 0:
1126         *eax = env->cpuid_level;
1127         get_cpuid_vendor(env, ebx, ecx, edx);
1128         break;
1129     case 1:
1130         *eax = env->cpuid_version;
1131         *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1132         *ecx = env->cpuid_ext_features;
1133         *edx = env->cpuid_features;
1134         if (env->nr_cores * env->nr_threads > 1) {
1135             *ebx |= (env->nr_cores * env->nr_threads) << 16;
1136             *edx |= 1 << 28;    /* HTT bit */
1137         }
1138         break;
1139     case 2:
1140         /* cache info: needed for Pentium Pro compatibility */
1141         *eax = 1;
1142         *ebx = 0;
1143         *ecx = 0;
1144         *edx = 0x2c307d;
1145         break;
1146     case 4:
1147         /* cache info: needed for Core compatibility */
1148         if (env->nr_cores > 1) {
1149             *eax = (env->nr_cores - 1) << 26;
1150         } else {
1151             *eax = 0;
1152         }
1153         switch (count) {
1154             case 0: /* L1 dcache info */
1155                 *eax |= 0x0000121;
1156                 *ebx = 0x1c0003f;
1157                 *ecx = 0x000003f;
1158                 *edx = 0x0000001;
1159                 break;
1160             case 1: /* L1 icache info */
1161                 *eax |= 0x0000122;
1162                 *ebx = 0x1c0003f;
1163                 *ecx = 0x000003f;
1164                 *edx = 0x0000001;
1165                 break;
1166             case 2: /* L2 cache info */
1167                 *eax |= 0x0000143;
1168                 if (env->nr_threads > 1) {
1169                     *eax |= (env->nr_threads - 1) << 14;
1170                 }
1171                 *ebx = 0x3c0003f;
1172                 *ecx = 0x0000fff;
1173                 *edx = 0x0000001;
1174                 break;
1175             default: /* end of info */
1176                 *eax = 0;
1177                 *ebx = 0;
1178                 *ecx = 0;
1179                 *edx = 0;
1180                 break;
1181         }
1182         break;
1183     case 5:
1184         /* mwait info: needed for Core compatibility */
1185         *eax = 0; /* Smallest monitor-line size in bytes */
1186         *ebx = 0; /* Largest monitor-line size in bytes */
1187         *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1188         *edx = 0;
1189         break;
1190     case 6:
1191         /* Thermal and Power Leaf */
1192         *eax = 0;
1193         *ebx = 0;
1194         *ecx = 0;
1195         *edx = 0;
1196         break;
1197     case 7:
1198         if (kvm_enabled()) {
1199             KVMState *s = env->kvm_state;
1200
1201             *eax = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EAX);
1202             *ebx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EBX);
1203             *ecx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_ECX);
1204             *edx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EDX);
1205         } else {
1206             *eax = 0;
1207             *ebx = 0;
1208             *ecx = 0;
1209             *edx = 0;
1210         }
1211         break;
1212     case 9:
1213         /* Direct Cache Access Information Leaf */
1214         *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1215         *ebx = 0;
1216         *ecx = 0;
1217         *edx = 0;
1218         break;
1219     case 0xA:
1220         /* Architectural Performance Monitoring Leaf */
1221         if (kvm_enabled()) {
1222             KVMState *s = env->kvm_state;
1223
1224             *eax = kvm_arch_get_supported_cpuid(s, 0xA, count, R_EAX);
1225             *ebx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_EBX);
1226             *ecx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_ECX);
1227             *edx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_EDX);
1228         } else {
1229             *eax = 0;
1230             *ebx = 0;
1231             *ecx = 0;
1232             *edx = 0;
1233         }
1234         break;
1235     case 0xD:
1236         /* Processor Extended State */
1237         if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1238             *eax = 0;
1239             *ebx = 0;
1240             *ecx = 0;
1241             *edx = 0;
1242             break;
1243         }
1244         if (kvm_enabled()) {
1245             KVMState *s = env->kvm_state;
1246
1247             *eax = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EAX);
1248             *ebx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EBX);
1249             *ecx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_ECX);
1250             *edx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EDX);
1251         } else {
1252             *eax = 0;
1253             *ebx = 0;
1254             *ecx = 0;
1255             *edx = 0;
1256         }
1257         break;
1258     case 0x80000000:
1259         *eax = env->cpuid_xlevel;
1260         *ebx = env->cpuid_vendor1;
1261         *edx = env->cpuid_vendor2;
1262         *ecx = env->cpuid_vendor3;
1263         break;
1264     case 0x80000001:
1265         *eax = env->cpuid_version;
1266         *ebx = 0;
1267         *ecx = env->cpuid_ext3_features;
1268         *edx = env->cpuid_ext2_features;
1269
1270         /* The Linux kernel checks for the CMPLegacy bit and
1271          * discards multiple thread information if it is set.
1272          * So dont set it here for Intel to make Linux guests happy.
1273          */
1274         if (env->nr_cores * env->nr_threads > 1) {
1275             uint32_t tebx, tecx, tedx;
1276             get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1277             if (tebx != CPUID_VENDOR_INTEL_1 ||
1278                 tedx != CPUID_VENDOR_INTEL_2 ||
1279                 tecx != CPUID_VENDOR_INTEL_3) {
1280                 *ecx |= 1 << 1;    /* CmpLegacy bit */
1281             }
1282         }
1283         break;
1284     case 0x80000002:
1285     case 0x80000003:
1286     case 0x80000004:
1287         *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1288         *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1289         *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1290         *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1291         break;
1292     case 0x80000005:
1293         /* cache info (L1 cache) */
1294         *eax = 0x01ff01ff;
1295         *ebx = 0x01ff01ff;
1296         *ecx = 0x40020140;
1297         *edx = 0x40020140;
1298         break;
1299     case 0x80000006:
1300         /* cache info (L2 cache) */
1301         *eax = 0;
1302         *ebx = 0x42004200;
1303         *ecx = 0x02008140;
1304         *edx = 0;
1305         break;
1306     case 0x80000008:
1307         /* virtual & phys address size in low 2 bytes. */
1308 /* XXX: This value must match the one used in the MMU code. */
1309         if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1310             /* 64 bit processor */
1311 /* XXX: The physical address space is limited to 42 bits in exec.c. */
1312             *eax = 0x00003028;  /* 48 bits virtual, 40 bits physical */
1313         } else {
1314             if (env->cpuid_features & CPUID_PSE36)
1315                 *eax = 0x00000024; /* 36 bits physical */
1316             else
1317                 *eax = 0x00000020; /* 32 bits physical */
1318         }
1319         *ebx = 0;
1320         *ecx = 0;
1321         *edx = 0;
1322         if (env->nr_cores * env->nr_threads > 1) {
1323             *ecx |= (env->nr_cores * env->nr_threads) - 1;
1324         }
1325         break;
1326     case 0x8000000A:
1327         if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1328                 *eax = 0x00000001; /* SVM Revision */
1329                 *ebx = 0x00000010; /* nr of ASIDs */
1330                 *ecx = 0;
1331                 *edx = env->cpuid_svm_features; /* optional features */
1332         } else {
1333                 *eax = 0;
1334                 *ebx = 0;
1335                 *ecx = 0;
1336                 *edx = 0;
1337         }
1338         break;
1339     case 0xC0000000:
1340         *eax = env->cpuid_xlevel2;
1341         *ebx = 0;
1342         *ecx = 0;
1343         *edx = 0;
1344         break;
1345     case 0xC0000001:
1346         /* Support for VIA CPU's CPUID instruction */
1347         *eax = env->cpuid_version;
1348         *ebx = 0;
1349         *ecx = 0;
1350         *edx = env->cpuid_ext4_features;
1351         break;
1352     case 0xC0000002:
1353     case 0xC0000003:
1354     case 0xC0000004:
1355         /* Reserved for the future, and now filled with zero */
1356         *eax = 0;
1357         *ebx = 0;
1358         *ecx = 0;
1359         *edx = 0;
1360         break;
1361     default:
1362         /* reserved values: zero */
1363         *eax = 0;
1364         *ebx = 0;
1365         *ecx = 0;
1366         *edx = 0;
1367         break;
1368     }
1369 }
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