2 * ST M25P80 emulator. Emulate all SPI flash devices based on the m25p80 command
3 * set. Known devices table current as of Jun/2012 and taken from linux.
4 * See drivers/mtd/devices/m25p80.c.
8 * Copyright (C) 2012 PetaLogix
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 or
13 * (at your option) a later version of the License.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, see <http://www.gnu.org/licenses/>.
29 #ifdef M25P80_ERR_DEBUG
30 #define DB_PRINT(...) do { \
31 fprintf(stderr, ": %s: ", __func__); \
32 fprintf(stderr, ## __VA_ARGS__); \
38 /* Fields for FlashPartInfo->flags */
40 /* erase capabilities */
43 /* set to allow the page program command to write 0s back to 1. Useful for
44 * modelling EEPROM with SPI flash command set
48 typedef struct FlashPartInfo {
49 const char *part_name;
50 /* jedec code. (jedec >> 16) & 0xff is the 1st byte, >> 8 the 2nd etc */
52 /* extended jedec code */
54 /* there is confusion between manufacturers as to what a sector is. In this
55 * device model, a "sector" is the size that is erased by the ERASE_SECTOR
56 * command (opcode 0xd8).
64 /* adapted from linux */
66 #define INFO(_part_name, _jedec, _ext_jedec, _sector_size, _n_sectors, _flags)\
67 .part_name = (_part_name),\
69 .ext_jedec = (_ext_jedec),\
70 .sector_size = (_sector_size),\
71 .n_sectors = (_n_sectors),\
75 static const FlashPartInfo known_devices[] = {
76 /* Atmel -- some are (confusingly) marketed as "DataFlash" */
77 { INFO("at25fs010", 0x1f6601, 0, 32 << 10, 4, ER_4K) },
78 { INFO("at25fs040", 0x1f6604, 0, 64 << 10, 8, ER_4K) },
80 { INFO("at25df041a", 0x1f4401, 0, 64 << 10, 8, ER_4K) },
81 { INFO("at25df321a", 0x1f4701, 0, 64 << 10, 64, ER_4K) },
82 { INFO("at25df641", 0x1f4800, 0, 64 << 10, 128, ER_4K) },
84 { INFO("at26f004", 0x1f0400, 0, 64 << 10, 8, ER_4K) },
85 { INFO("at26df081a", 0x1f4501, 0, 64 << 10, 16, ER_4K) },
86 { INFO("at26df161a", 0x1f4601, 0, 64 << 10, 32, ER_4K) },
87 { INFO("at26df321", 0x1f4700, 0, 64 << 10, 64, ER_4K) },
90 { INFO("en25f32", 0x1c3116, 0, 64 << 10, 64, ER_4K) },
91 { INFO("en25p32", 0x1c2016, 0, 64 << 10, 64, 0) },
92 { INFO("en25q32b", 0x1c3016, 0, 64 << 10, 64, 0) },
93 { INFO("en25p64", 0x1c2017, 0, 64 << 10, 128, 0) },
95 /* Intel/Numonyx -- xxxs33b */
96 { INFO("160s33b", 0x898911, 0, 64 << 10, 32, 0) },
97 { INFO("320s33b", 0x898912, 0, 64 << 10, 64, 0) },
98 { INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) },
101 { INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) },
102 { INFO("mx25l8005", 0xc22014, 0, 64 << 10, 16, 0) },
103 { INFO("mx25l1606e", 0xc22015, 0, 64 << 10, 32, ER_4K) },
104 { INFO("mx25l3205d", 0xc22016, 0, 64 << 10, 64, 0) },
105 { INFO("mx25l6405d", 0xc22017, 0, 64 << 10, 128, 0) },
106 { INFO("mx25l12805d", 0xc22018, 0, 64 << 10, 256, 0) },
107 { INFO("mx25l12855e", 0xc22618, 0, 64 << 10, 256, 0) },
108 { INFO("mx25l25635e", 0xc22019, 0, 64 << 10, 512, 0) },
109 { INFO("mx25l25655e", 0xc22619, 0, 64 << 10, 512, 0) },
111 /* Spansion -- single (large) sector size only, at least
112 * for the chips listed here (without boot sectors).
114 { INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) },
115 { INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) },
116 { INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) },
117 { INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) },
118 { INFO("s25sl032p", 0x010215, 0x4d00, 64 << 10, 64, ER_4K) },
119 { INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) },
120 { INFO("s25fl256s0", 0x010219, 0x4d00, 256 << 10, 128, 0) },
121 { INFO("s25fl256s1", 0x010219, 0x4d01, 64 << 10, 512, 0) },
122 { INFO("s25fl512s", 0x010220, 0x4d00, 256 << 10, 256, 0) },
123 { INFO("s70fl01gs", 0x010221, 0x4d00, 256 << 10, 256, 0) },
124 { INFO("s25sl12800", 0x012018, 0x0300, 256 << 10, 64, 0) },
125 { INFO("s25sl12801", 0x012018, 0x0301, 64 << 10, 256, 0) },
126 { INFO("s25fl129p0", 0x012018, 0x4d00, 256 << 10, 64, 0) },
127 { INFO("s25fl129p1", 0x012018, 0x4d01, 64 << 10, 256, 0) },
128 { INFO("s25fl016k", 0xef4015, 0, 64 << 10, 32, ER_4K | ER_32K) },
129 { INFO("s25fl064k", 0xef4017, 0, 64 << 10, 128, ER_4K | ER_32K) },
131 /* SST -- large erase sizes are "overlays", "sectors" are 4<< 10 */
132 { INFO("sst25vf040b", 0xbf258d, 0, 64 << 10, 8, ER_4K) },
133 { INFO("sst25vf080b", 0xbf258e, 0, 64 << 10, 16, ER_4K) },
134 { INFO("sst25vf016b", 0xbf2541, 0, 64 << 10, 32, ER_4K) },
135 { INFO("sst25vf032b", 0xbf254a, 0, 64 << 10, 64, ER_4K) },
136 { INFO("sst25wf512", 0xbf2501, 0, 64 << 10, 1, ER_4K) },
137 { INFO("sst25wf010", 0xbf2502, 0, 64 << 10, 2, ER_4K) },
138 { INFO("sst25wf020", 0xbf2503, 0, 64 << 10, 4, ER_4K) },
139 { INFO("sst25wf040", 0xbf2504, 0, 64 << 10, 8, ER_4K) },
141 /* ST Microelectronics -- newer production may have feature updates */
142 { INFO("m25p05", 0x202010, 0, 32 << 10, 2, 0) },
143 { INFO("m25p10", 0x202011, 0, 32 << 10, 4, 0) },
144 { INFO("m25p20", 0x202012, 0, 64 << 10, 4, 0) },
145 { INFO("m25p40", 0x202013, 0, 64 << 10, 8, 0) },
146 { INFO("m25p80", 0x202014, 0, 64 << 10, 16, 0) },
147 { INFO("m25p16", 0x202015, 0, 64 << 10, 32, 0) },
148 { INFO("m25p32", 0x202016, 0, 64 << 10, 64, 0) },
149 { INFO("m25p64", 0x202017, 0, 64 << 10, 128, 0) },
150 { INFO("m25p128", 0x202018, 0, 256 << 10, 64, 0) },
152 { INFO("m45pe10", 0x204011, 0, 64 << 10, 2, 0) },
153 { INFO("m45pe80", 0x204014, 0, 64 << 10, 16, 0) },
154 { INFO("m45pe16", 0x204015, 0, 64 << 10, 32, 0) },
156 { INFO("m25pe80", 0x208014, 0, 64 << 10, 16, 0) },
157 { INFO("m25pe16", 0x208015, 0, 64 << 10, 32, ER_4K) },
159 { INFO("m25px32", 0x207116, 0, 64 << 10, 64, ER_4K) },
160 { INFO("m25px32-s0", 0x207316, 0, 64 << 10, 64, ER_4K) },
161 { INFO("m25px32-s1", 0x206316, 0, 64 << 10, 64, ER_4K) },
162 { INFO("m25px64", 0x207117, 0, 64 << 10, 128, 0) },
164 /* Winbond -- w25x "blocks" are 64k, "sectors" are 4KiB */
165 { INFO("w25x10", 0xef3011, 0, 64 << 10, 2, ER_4K) },
166 { INFO("w25x20", 0xef3012, 0, 64 << 10, 4, ER_4K) },
167 { INFO("w25x40", 0xef3013, 0, 64 << 10, 8, ER_4K) },
168 { INFO("w25x80", 0xef3014, 0, 64 << 10, 16, ER_4K) },
169 { INFO("w25x16", 0xef3015, 0, 64 << 10, 32, ER_4K) },
170 { INFO("w25x32", 0xef3016, 0, 64 << 10, 64, ER_4K) },
171 { INFO("w25q32", 0xef4016, 0, 64 << 10, 64, ER_4K) },
172 { INFO("w25x64", 0xef3017, 0, 64 << 10, 128, ER_4K) },
173 { INFO("w25q64", 0xef4017, 0, 64 << 10, 128, ER_4K) },
175 /* Numonyx -- n25q128 */
176 { INFO("n25q128", 0x20ba18, 0, 64 << 10, 256, 0) },
200 STATE_COLLECTING_DATA,
204 typedef struct Flash {
208 BlockDriverState *bdrv;
218 uint8_t needed_bytes;
219 uint8_t cmd_in_progress;
226 const FlashPartInfo *pi;
230 static void bdrv_sync_complete(void *opaque, int ret)
232 /* do nothing. Masters do not directly interact with the backing store,
233 * only the working copy so no mutexing required.
237 static void flash_sync_page(Flash *s, int page)
240 int bdrv_sector, nb_sectors;
243 bdrv_sector = (page * s->pi->page_size) / BDRV_SECTOR_SIZE;
244 nb_sectors = DIV_ROUND_UP(s->pi->page_size, BDRV_SECTOR_SIZE);
245 qemu_iovec_init(&iov, 1);
246 qemu_iovec_add(&iov, s->storage + bdrv_sector * BDRV_SECTOR_SIZE,
247 nb_sectors * BDRV_SECTOR_SIZE);
248 bdrv_aio_writev(s->bdrv, bdrv_sector, &iov, nb_sectors,
249 bdrv_sync_complete, NULL);
253 static inline void flash_sync_area(Flash *s, int64_t off, int64_t len)
255 int64_t start, end, nb_sectors;
262 assert(!(len % BDRV_SECTOR_SIZE));
263 start = off / BDRV_SECTOR_SIZE;
264 end = (off + len) / BDRV_SECTOR_SIZE;
265 nb_sectors = end - start;
266 qemu_iovec_init(&iov, 1);
267 qemu_iovec_add(&iov, s->storage + (start * BDRV_SECTOR_SIZE),
268 nb_sectors * BDRV_SECTOR_SIZE);
269 bdrv_aio_writev(s->bdrv, start, &iov, nb_sectors, bdrv_sync_complete, NULL);
272 static void flash_erase(Flash *s, int offset, FlashCMD cmd)
275 uint8_t capa_to_assert = 0;
280 capa_to_assert = ER_4K;
284 capa_to_assert = ER_32K;
287 len = s->pi->sector_size;
296 DB_PRINT("offset = %#x, len = %d\n", offset, len);
297 if ((s->pi->flags & capa_to_assert) != capa_to_assert) {
298 hw_error("m25p80: %dk erase size not supported by device\n", len);
301 if (!s->write_enable) {
302 DB_PRINT("erase with write protect!\n");
305 memset(s->storage + offset, 0xff, len);
306 flash_sync_area(s, offset, len);
309 static inline void flash_sync_dirty(Flash *s, int64_t newpage)
311 if (s->dirty_page >= 0 && s->dirty_page != newpage) {
312 flash_sync_page(s, s->dirty_page);
313 s->dirty_page = newpage;
318 void flash_write8(Flash *s, uint64_t addr, uint8_t data)
320 int64_t page = addr / s->pi->page_size;
321 uint8_t prev = s->storage[s->cur_addr];
323 if (!s->write_enable) {
324 DB_PRINT("write with write protect!\n");
327 if ((prev ^ data) & data) {
328 DB_PRINT("programming zero to one! addr=%lx %x -> %x\n",
332 if (s->pi->flags & WR_1) {
333 s->storage[s->cur_addr] = data;
335 s->storage[s->cur_addr] &= data;
338 flash_sync_dirty(s, page);
339 s->dirty_page = page;
342 static void complete_collecting_data(Flash *s)
344 s->cur_addr = s->data[0] << 16;
345 s->cur_addr |= s->data[1] << 8;
346 s->cur_addr |= s->data[2];
348 switch (s->cmd_in_progress) {
350 s->state = STATE_PAGE_PROGRAM;
354 s->state = STATE_READ;
359 flash_erase(s, s->cur_addr, s->cmd_in_progress);
366 static void decode_new_cmd(Flash *s, uint32_t value)
368 s->cmd_in_progress = value;
369 DB_PRINT("decoded new command:%x\n", value);
381 s->state = STATE_COLLECTING_DATA;
388 s->state = STATE_COLLECTING_DATA;
392 s->write_enable = false;
395 s->write_enable = true;
399 s->data[0] = (!!s->write_enable) << 1;
402 s->state = STATE_READING_DATA;
406 DB_PRINT("populated jedec code\n");
407 s->data[0] = (s->pi->jedec >> 16) & 0xff;
408 s->data[1] = (s->pi->jedec >> 8) & 0xff;
409 s->data[2] = s->pi->jedec & 0xff;
410 if (s->pi->ext_jedec) {
411 s->data[3] = (s->pi->ext_jedec >> 8) & 0xff;
412 s->data[4] = s->pi->ext_jedec & 0xff;
418 s->state = STATE_READING_DATA;
422 if (s->write_enable) {
423 DB_PRINT("chip erase\n");
424 flash_erase(s, 0, BULK_ERASE);
426 DB_PRINT("chip erase with write protect!\n");
432 DB_PRINT("Unknown cmd %x\n", value);
437 static int m25p80_cs(SSISlave *ss, bool select)
439 Flash *s = FROM_SSI_SLAVE(Flash, ss);
444 s->state = STATE_IDLE;
445 flash_sync_dirty(s, -1);
448 DB_PRINT("%sselect\n", select ? "de" : "");
453 static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t tx)
455 Flash *s = FROM_SSI_SLAVE(Flash, ss);
460 case STATE_PAGE_PROGRAM:
461 DB_PRINT("page program cur_addr=%lx data=%x\n", s->cur_addr,
463 flash_write8(s, s->cur_addr, (uint8_t)tx);
468 r = s->storage[s->cur_addr];
469 DB_PRINT("READ 0x%lx=%x\n", s->cur_addr, r);
470 s->cur_addr = (s->cur_addr + 1) % s->size;
473 case STATE_COLLECTING_DATA:
474 s->data[s->len] = (uint8_t)tx;
477 if (s->len == s->needed_bytes) {
478 complete_collecting_data(s);
482 case STATE_READING_DATA:
485 if (s->pos == s->len) {
487 s->state = STATE_IDLE;
493 decode_new_cmd(s, (uint8_t)tx);
500 static int m25p80_init(SSISlave *ss)
503 Flash *s = FROM_SSI_SLAVE(Flash, ss);
504 const FlashPartInfo *i;
506 if (!s->part_name) { /* default to actual m25p80 if no partname given */
507 s->part_name = (char *)"m25p80";
511 for (i = known_devices;; i++) {
514 fprintf(stderr, "Unknown SPI flash part: \"%s\"\n", s->part_name);
516 } else if (!strcmp(i->part_name, s->part_name)) {
522 s->size = s->pi->sector_size * s->pi->n_sectors;
524 s->storage = qemu_blockalign(s->bdrv, s->size);
526 dinfo = drive_get_next(IF_MTD);
528 if (dinfo && dinfo->bdrv) {
529 DB_PRINT("Binding to IF_MTD drive\n");
530 s->bdrv = dinfo->bdrv;
531 /* FIXME: Move to late init */
532 if (bdrv_read(s->bdrv, 0, s->storage, DIV_ROUND_UP(s->size,
533 BDRV_SECTOR_SIZE))) {
534 fprintf(stderr, "Failed to initialize SPI flash!\n");
538 memset(s->storage, 0xFF, s->size);
544 static void m25p80_pre_save(void *opaque)
546 flash_sync_dirty((Flash *)opaque, -1);
549 static const VMStateDescription vmstate_m25p80 = {
550 .name = "xilinx_spi",
552 .minimum_version_id = 1,
553 .minimum_version_id_old = 1,
554 .pre_save = m25p80_pre_save,
555 .fields = (VMStateField[]) {
556 VMSTATE_UINT8(state, Flash),
557 VMSTATE_UINT8_ARRAY(data, Flash, 16),
558 VMSTATE_UINT32(len, Flash),
559 VMSTATE_UINT32(pos, Flash),
560 VMSTATE_UINT8(needed_bytes, Flash),
561 VMSTATE_UINT8(cmd_in_progress, Flash),
562 VMSTATE_UINT64(cur_addr, Flash),
563 VMSTATE_BOOL(write_enable, Flash),
564 VMSTATE_END_OF_LIST()
568 static Property m25p80_properties[] = {
569 DEFINE_PROP_STRING("partname", Flash, part_name),
570 DEFINE_PROP_END_OF_LIST(),
573 static void m25p80_class_init(ObjectClass *klass, void *data)
575 DeviceClass *dc = DEVICE_CLASS(klass);
576 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
578 k->init = m25p80_init;
579 k->transfer = m25p80_transfer8;
580 k->set_cs = m25p80_cs;
581 k->cs_polarity = SSI_CS_LOW;
582 dc->props = m25p80_properties;
583 dc->vmsd = &vmstate_m25p80;
586 static const TypeInfo m25p80_info = {
588 .parent = TYPE_SSI_SLAVE,
589 .instance_size = sizeof(Flash),
590 .class_init = m25p80_class_init,
593 static void m25p80_register_types(void)
595 type_register_static(&m25p80_info);
598 type_init(m25p80_register_types)