2 * QEMU G364 framebuffer Emulator.
4 * Copyright (c) 2007-2011 Herve Poussineau
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
22 #include "pixel_ops.h"
26 typedef struct G364State {
31 MemoryRegion mem_vram;
32 MemoryRegion mem_ctrl;
34 uint8_t color_palette[256][3];
35 uint8_t cursor_palette[3][3];
37 uint32_t cursor_position;
39 uint32_t top_of_screen;
40 uint32_t width, height; /* in pixels */
41 /* display refresh support */
47 #define REG_BOOT 0x000000
48 #define REG_DISPLAY 0x000118
49 #define REG_VDISPLAY 0x000150
50 #define REG_CTLA 0x000300
51 #define REG_TOP 0x000400
52 #define REG_CURS_PAL 0x000508
53 #define REG_CURS_POS 0x000638
54 #define REG_CLR_PAL 0x000800
55 #define REG_CURS_PAT 0x001000
56 #define REG_RESET 0x100000
58 #define CTLA_FORCE_BLANK 0x00000400
59 #define CTLA_NO_CURSOR 0x00800000
61 #define G364_PAGE_SIZE 4096
63 static inline int check_dirty(G364State *s, ram_addr_t page)
65 return memory_region_get_dirty(&s->mem_vram, page, G364_PAGE_SIZE,
69 static inline void reset_dirty(G364State *s,
70 ram_addr_t page_min, ram_addr_t page_max)
72 memory_region_reset_dirty(&s->mem_vram,
74 page_max + G364_PAGE_SIZE - page_min - 1,
78 static void g364fb_draw_graphic8(G364State *s)
82 uint8_t *data_display, *dd;
83 ram_addr_t page, page_min, page_max;
88 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b);
90 switch (ds_get_bits_per_pixel(s->ds)) {
92 rgb_to_pixel = rgb_to_pixel8;
96 rgb_to_pixel = rgb_to_pixel15;
100 rgb_to_pixel = rgb_to_pixel16;
104 rgb_to_pixel = rgb_to_pixel32;
108 hw_error("g364: unknown host depth %d",
109 ds_get_bits_per_pixel(s->ds));
114 page_min = (ram_addr_t)-1;
123 if (!(s->ctla & CTLA_NO_CURSOR)) {
124 xcursor = s->cursor_position >> 12;
125 ycursor = s->cursor_position & 0xfff;
127 xcursor = ycursor = -65;
130 vram = s->vram + s->top_of_screen;
131 /* XXX: out of range in vram? */
132 data_display = dd = ds_get_data(s->ds);
133 while (y < s->height) {
134 if (check_dirty(s, page)) {
137 if (page_min == (ram_addr_t)-1)
142 for (i = 0; i < G364_PAGE_SIZE; i++) {
145 if (unlikely((y >= ycursor && y < ycursor + 64) &&
146 (x >= xcursor && x < xcursor + 64))) {
148 int xdiff = x - xcursor;
149 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8];
150 int op = (curs >> ((xdiff & 7) * 2)) & 3;
151 if (likely(op == 0)) {
154 color = (*rgb_to_pixel)(
155 s->color_palette[index][0],
156 s->color_palette[index][1],
157 s->color_palette[index][2]);
159 /* get cursor color */
161 color = (*rgb_to_pixel)(
162 s->cursor_palette[index][0],
163 s->cursor_palette[index][1],
164 s->cursor_palette[index][2]);
169 color = (*rgb_to_pixel)(
170 s->color_palette[index][0],
171 s->color_palette[index][1],
172 s->color_palette[index][2]);
174 memcpy(dd, &color, w);
181 if (y == s->height) {
182 ymax = s->height - 1;
185 data_display = dd = data_display + ds_get_linesize(s->ds);
196 if (page_min != (ram_addr_t)-1) {
197 reset_dirty(s, page_min, page_max);
198 page_min = (ram_addr_t)-1;
200 dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
210 vram += G364_PAGE_SIZE;
211 data_display += dy * ds_get_linesize(s->ds);
212 dd = data_display + x * w;
214 page += G364_PAGE_SIZE;
218 if (page_min != (ram_addr_t)-1) {
219 dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
220 reset_dirty(s, page_min, page_max);
224 static void g364fb_draw_blank(G364State *s)
230 /* Screen is already blank. No need to redraw it */
234 w = s->width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
235 d = ds_get_data(s->ds);
236 for (i = 0; i < s->height; i++) {
238 d += ds_get_linesize(s->ds);
241 dpy_update(s->ds, 0, 0, s->width, s->height);
245 static void g364fb_update_display(void *opaque)
247 G364State *s = opaque;
249 qemu_flush_coalesced_mmio_buffer();
251 if (s->width == 0 || s->height == 0)
254 if (s->width != ds_get_width(s->ds) || s->height != ds_get_height(s->ds)) {
255 qemu_console_resize(s->ds, s->width, s->height);
258 if (s->ctla & CTLA_FORCE_BLANK) {
259 g364fb_draw_blank(s);
260 } else if (s->depth == 8) {
261 g364fb_draw_graphic8(s);
263 error_report("g364: unknown guest depth %d", s->depth);
266 qemu_irq_raise(s->irq);
269 static inline void g364fb_invalidate_display(void *opaque)
271 G364State *s = opaque;
274 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size);
277 static void g364fb_reset(G364State *s)
279 qemu_irq_lower(s->irq);
281 memset(s->color_palette, 0, sizeof(s->color_palette));
282 memset(s->cursor_palette, 0, sizeof(s->cursor_palette));
283 memset(s->cursor, 0, sizeof(s->cursor));
284 s->cursor_position = 0;
286 s->top_of_screen = 0;
287 s->width = s->height = 0;
288 memset(s->vram, 0, s->vram_size);
289 g364fb_invalidate_display(s);
292 static void g364fb_screen_dump(void *opaque, const char *filename, bool cswitch,
295 G364State *s = opaque;
298 uint8_t *data_buffer;
301 qemu_flush_coalesced_mmio_buffer();
304 error_setg(errp, "g364: unknown guest depth %d", s->depth);
308 f = fopen(filename, "wb");
310 error_setg(errp, "failed to open file '%s': %s", filename,
315 if (s->ctla & CTLA_FORCE_BLANK) {
317 ret = fprintf(f, "P4\n%d %d\n", s->width, s->height);
321 for (y = 0; y < s->height; y++)
322 for (x = 0; x < s->width; x++) {
329 data_buffer = s->vram + s->top_of_screen;
330 ret = fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255);
334 for (y = 0; y < s->height; y++)
335 for (x = 0; x < s->width; x++, data_buffer++) {
336 index = *data_buffer;
337 ret = fputc(s->color_palette[index][0], f);
341 ret = fputc(s->color_palette[index][1], f);
345 ret = fputc(s->color_palette[index][2], f);
357 error_setg(errp, "failed to write to file '%s': %s", filename,
363 /* called for accesses to io ports */
364 static uint64_t g364fb_ctrl_read(void *opaque,
365 target_phys_addr_t addr,
368 G364State *s = opaque;
371 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
373 int idx = (addr - REG_CURS_PAT) >> 3;
374 val = s->cursor[idx];
375 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
377 int idx = (addr - REG_CURS_PAL) >> 3;
378 val = ((uint32_t)s->cursor_palette[idx][0] << 16);
379 val |= ((uint32_t)s->cursor_palette[idx][1] << 8);
380 val |= ((uint32_t)s->cursor_palette[idx][2] << 0);
394 error_report("g364: invalid read at [" TARGET_FMT_plx "]",
402 trace_g364fb_read(addr, val);
407 static void g364fb_update_depth(G364State *s)
409 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 };
410 s->depth = depths[(s->ctla & 0x00700000) >> 20];
413 static void g364_invalidate_cursor_position(G364State *s)
415 int ymin, ymax, start, end;
417 /* invalidate only near the cursor */
418 ymin = s->cursor_position & 0xfff;
419 ymax = MIN(s->height, ymin + 64);
420 start = ymin * ds_get_linesize(s->ds);
421 end = (ymax + 1) * ds_get_linesize(s->ds);
423 memory_region_set_dirty(&s->mem_vram, start, end - start);
426 static void g364fb_ctrl_write(void *opaque,
427 target_phys_addr_t addr,
431 G364State *s = opaque;
433 trace_g364fb_write(addr, val);
435 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) {
437 int idx = (addr - REG_CLR_PAL) >> 3;
438 s->color_palette[idx][0] = (val >> 16) & 0xff;
439 s->color_palette[idx][1] = (val >> 8) & 0xff;
440 s->color_palette[idx][2] = val & 0xff;
441 g364fb_invalidate_display(s);
442 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
444 int idx = (addr - REG_CURS_PAT) >> 3;
445 s->cursor[idx] = val;
446 g364fb_invalidate_display(s);
447 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
449 int idx = (addr - REG_CURS_PAL) >> 3;
450 s->cursor_palette[idx][0] = (val >> 16) & 0xff;
451 s->cursor_palette[idx][1] = (val >> 8) & 0xff;
452 s->cursor_palette[idx][2] = val & 0xff;
453 g364fb_invalidate_display(s);
456 case REG_BOOT: /* Boot timing */
457 case 0x00108: /* Line timing: half sync */
458 case 0x00110: /* Line timing: back porch */
459 case 0x00120: /* Line timing: short display */
460 case 0x00128: /* Frame timing: broad pulse */
461 case 0x00130: /* Frame timing: v sync */
462 case 0x00138: /* Frame timing: v preequalise */
463 case 0x00140: /* Frame timing: v postequalise */
464 case 0x00148: /* Frame timing: v blank */
465 case 0x00158: /* Line timing: line time */
466 case 0x00160: /* Frame store: line start */
467 case 0x00168: /* vram cycle: mem init */
468 case 0x00170: /* vram cycle: transfer delay */
469 case 0x00200: /* vram cycle: mask register */
473 s->top_of_screen = val;
474 g364fb_invalidate_display(s);
484 g364fb_update_depth(s);
485 g364fb_invalidate_display(s);
488 g364_invalidate_cursor_position(s);
489 s->cursor_position = val;
490 g364_invalidate_cursor_position(s);
496 error_report("g364: invalid write of 0x%" PRIx64
497 " at [" TARGET_FMT_plx "]", val, addr);
501 qemu_irq_lower(s->irq);
504 static const MemoryRegionOps g364fb_ctrl_ops = {
505 .read = g364fb_ctrl_read,
506 .write = g364fb_ctrl_write,
507 .endianness = DEVICE_LITTLE_ENDIAN,
508 .impl.min_access_size = 4,
509 .impl.max_access_size = 4,
512 static int g364fb_post_load(void *opaque, int version_id)
514 G364State *s = opaque;
517 g364fb_update_depth(s);
518 g364fb_invalidate_display(s);
523 static const VMStateDescription vmstate_g364fb = {
526 .minimum_version_id = 1,
527 .minimum_version_id_old = 1,
528 .post_load = g364fb_post_load,
529 .fields = (VMStateField[]) {
530 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, 0, vram_size),
531 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3),
532 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9),
533 VMSTATE_UINT16_ARRAY(cursor, G364State, 512),
534 VMSTATE_UINT32(cursor_position, G364State),
535 VMSTATE_UINT32(ctla, G364State),
536 VMSTATE_UINT32(top_of_screen, G364State),
537 VMSTATE_UINT32(width, G364State),
538 VMSTATE_UINT32(height, G364State),
539 VMSTATE_END_OF_LIST()
543 static void g364fb_init(DeviceState *dev, G364State *s)
545 s->vram = g_malloc0(s->vram_size);
547 s->ds = graphic_console_init(g364fb_update_display,
548 g364fb_invalidate_display,
549 g364fb_screen_dump, NULL, s);
551 memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
552 memory_region_init_ram_ptr(&s->mem_vram, "vram",
553 s->vram_size, s->vram);
554 vmstate_register_ram(&s->mem_vram, dev);
555 memory_region_set_coalescing(&s->mem_vram);
563 static int g364fb_sysbus_init(SysBusDevice *dev)
565 G364State *s = &FROM_SYSBUS(G364SysBusState, dev)->g364;
567 g364fb_init(&dev->qdev, s);
568 sysbus_init_irq(dev, &s->irq);
569 sysbus_init_mmio(dev, &s->mem_ctrl);
570 sysbus_init_mmio(dev, &s->mem_vram);
575 static void g364fb_sysbus_reset(DeviceState *d)
577 G364SysBusState *s = DO_UPCAST(G364SysBusState, busdev.qdev, d);
578 g364fb_reset(&s->g364);
581 static Property g364fb_sysbus_properties[] = {
582 DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
584 DEFINE_PROP_END_OF_LIST(),
587 static void g364fb_sysbus_class_init(ObjectClass *klass, void *data)
589 DeviceClass *dc = DEVICE_CLASS(klass);
590 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
592 k->init = g364fb_sysbus_init;
593 dc->desc = "G364 framebuffer";
594 dc->reset = g364fb_sysbus_reset;
595 dc->vmsd = &vmstate_g364fb;
596 dc->props = g364fb_sysbus_properties;
599 static TypeInfo g364fb_sysbus_info = {
600 .name = "sysbus-g364",
601 .parent = TYPE_SYS_BUS_DEVICE,
602 .instance_size = sizeof(G364SysBusState),
603 .class_init = g364fb_sysbus_class_init,
606 static void g364fb_register_types(void)
608 type_register_static(&g364fb_sysbus_info);
611 type_init(g364fb_register_types)