2 * PowerMac NewWorld MacIO GPIO emulation
4 * Copyright (c) 2016 Benjamin Herrenschmidt
5 * Copyright (c) 2018 Mark Cave-Ayland
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu/osdep.h"
27 #include "hw/qdev-properties.h"
28 #include "migration/vmstate.h"
29 #include "hw/misc/macio/macio.h"
30 #include "hw/misc/macio/gpio.h"
33 #include "qemu/module.h"
37 void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state)
41 trace_macio_set_gpio(gpio, state);
43 if (s->gpio_regs[gpio] & 4) {
44 qemu_log_mask(LOG_GUEST_ERROR,
45 "GPIO: Setting GPIO %d while it's an output\n", gpio);
48 new_reg = s->gpio_regs[gpio] & ~2;
53 if (new_reg == s->gpio_regs[gpio]) {
57 s->gpio_regs[gpio] = new_reg;
60 * Note that we probably need to get access to the MPIC config to
61 * decode polarity since qemu always use "raise" regardless.
63 * For now, we hard wire known GPIOs
70 trace_macio_gpio_irq_assert(gpio);
71 qemu_irq_raise(s->gpio_extirqs[gpio]);
73 trace_macio_gpio_irq_deassert(gpio);
74 qemu_irq_lower(s->gpio_extirqs[gpio]);
79 /* Edge, triggered by NMI below */
81 trace_macio_gpio_irq_assert(gpio);
82 qemu_irq_raise(s->gpio_extirqs[gpio]);
84 trace_macio_gpio_irq_deassert(gpio);
85 qemu_irq_lower(s->gpio_extirqs[gpio]);
90 qemu_log_mask(LOG_UNIMP, "GPIO: setting unimplemented GPIO %d", gpio);
94 static void macio_gpio_write(void *opaque, hwaddr addr, uint64_t value,
97 MacIOGPIOState *s = opaque;
100 trace_macio_gpio_write(addr, value);
102 /* Levels regs are read-only */
112 ibit = (value & 1) << 1;
114 ibit = s->gpio_regs[addr] & 2;
117 s->gpio_regs[addr] = value | ibit;
121 static uint64_t macio_gpio_read(void *opaque, hwaddr addr, unsigned size)
123 MacIOGPIOState *s = opaque;
128 val = s->gpio_levels[addr];
133 val = s->gpio_regs[addr];
137 trace_macio_gpio_write(addr, val);
141 static const MemoryRegionOps macio_gpio_ops = {
142 .read = macio_gpio_read,
143 .write = macio_gpio_write,
144 .endianness = DEVICE_LITTLE_ENDIAN,
146 .min_access_size = 1,
147 .max_access_size = 1,
151 static void macio_gpio_init(Object *obj)
153 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
154 MacIOGPIOState *s = MACIO_GPIO(obj);
157 for (i = 0; i < 10; i++) {
158 sysbus_init_irq(sbd, &s->gpio_extirqs[i]);
161 memory_region_init_io(&s->gpiomem, OBJECT(s), &macio_gpio_ops, obj,
163 sysbus_init_mmio(sbd, &s->gpiomem);
166 static const VMStateDescription vmstate_macio_gpio = {
167 .name = "macio_gpio",
169 .minimum_version_id = 0,
170 .fields = (VMStateField[]) {
171 VMSTATE_UINT8_ARRAY(gpio_levels, MacIOGPIOState, 8),
172 VMSTATE_UINT8_ARRAY(gpio_regs, MacIOGPIOState, 36),
173 VMSTATE_END_OF_LIST()
177 static void macio_gpio_reset(DeviceState *dev)
179 MacIOGPIOState *s = MACIO_GPIO(dev);
181 /* GPIO 1 is up by default */
182 macio_set_gpio(s, 1, true);
185 static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp)
187 macio_set_gpio(MACIO_GPIO(n), 9, true);
188 macio_set_gpio(MACIO_GPIO(n), 9, false);
191 static void macio_gpio_class_init(ObjectClass *oc, void *data)
193 DeviceClass *dc = DEVICE_CLASS(oc);
194 NMIClass *nc = NMI_CLASS(oc);
196 dc->reset = macio_gpio_reset;
197 dc->vmsd = &vmstate_macio_gpio;
198 nc->nmi_monitor_handler = macio_gpio_nmi;
201 static const TypeInfo macio_gpio_init_info = {
202 .name = TYPE_MACIO_GPIO,
203 .parent = TYPE_SYS_BUS_DEVICE,
204 .instance_size = sizeof(MacIOGPIOState),
205 .instance_init = macio_gpio_init,
206 .class_init = macio_gpio_class_init,
207 .interfaces = (InterfaceInfo[]) {
213 static void macio_gpio_register_types(void)
215 type_register_static(&macio_gpio_init_info);
218 type_init(macio_gpio_register_types)