]> Git Repo - qemu.git/blob - target-lm32/cpu.c
Merge remote-tracking branch 'remotes/kvm/uq/master' into staging
[qemu.git] / target-lm32 / cpu.c
1 /*
2  * QEMU LatticeMico32 CPU
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see
18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
19  */
20
21 #include "cpu.h"
22 #include "qemu-common.h"
23
24
25 static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
26 {
27     LM32CPU *cpu = LM32_CPU(cs);
28
29     cpu->env.pc = value;
30 }
31
32 /* Sort alphabetically by type name. */
33 static gint lm32_cpu_list_compare(gconstpointer a, gconstpointer b)
34 {
35     ObjectClass *class_a = (ObjectClass *)a;
36     ObjectClass *class_b = (ObjectClass *)b;
37     const char *name_a, *name_b;
38
39     name_a = object_class_get_name(class_a);
40     name_b = object_class_get_name(class_b);
41     return strcmp(name_a, name_b);
42 }
43
44 static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
45 {
46     ObjectClass *oc = data;
47     CPUListState *s = user_data;
48     const char *typename = object_class_get_name(oc);
49     char *name;
50
51     name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
52     (*s->cpu_fprintf)(s->file, "  %s\n", name);
53     g_free(name);
54 }
55
56
57 void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf)
58 {
59     CPUListState s = {
60         .file = f,
61         .cpu_fprintf = cpu_fprintf,
62     };
63     GSList *list;
64
65     list = object_class_get_list(TYPE_LM32_CPU, false);
66     list = g_slist_sort(list, lm32_cpu_list_compare);
67     (*cpu_fprintf)(f, "Available CPUs:\n");
68     g_slist_foreach(list, lm32_cpu_list_entry, &s);
69     g_slist_free(list);
70 }
71
72 static void lm32_cpu_init_cfg_reg(LM32CPU *cpu)
73 {
74     CPULM32State *env = &cpu->env;
75     uint32_t cfg = 0;
76
77     if (cpu->features & LM32_FEATURE_MULTIPLY) {
78         cfg |= CFG_M;
79     }
80
81     if (cpu->features & LM32_FEATURE_DIVIDE) {
82         cfg |= CFG_D;
83     }
84
85     if (cpu->features & LM32_FEATURE_SHIFT) {
86         cfg |= CFG_S;
87     }
88
89     if (cpu->features & LM32_FEATURE_SIGN_EXTEND) {
90         cfg |= CFG_X;
91     }
92
93     if (cpu->features & LM32_FEATURE_I_CACHE) {
94         cfg |= CFG_IC;
95     }
96
97     if (cpu->features & LM32_FEATURE_D_CACHE) {
98         cfg |= CFG_DC;
99     }
100
101     if (cpu->features & LM32_FEATURE_CYCLE_COUNT) {
102         cfg |= CFG_CC;
103     }
104
105     cfg |= (cpu->num_interrupts << CFG_INT_SHIFT);
106     cfg |= (cpu->num_breakpoints << CFG_BP_SHIFT);
107     cfg |= (cpu->num_watchpoints << CFG_WP_SHIFT);
108     cfg |= (cpu->revision << CFG_REV_SHIFT);
109
110     env->cfg = cfg;
111 }
112
113 /* CPUClass::reset() */
114 static void lm32_cpu_reset(CPUState *s)
115 {
116     LM32CPU *cpu = LM32_CPU(s);
117     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
118     CPULM32State *env = &cpu->env;
119
120     lcc->parent_reset(s);
121
122     /* reset cpu state */
123     memset(env, 0, offsetof(CPULM32State, breakpoints));
124
125     lm32_cpu_init_cfg_reg(cpu);
126     tlb_flush(env, 1);
127 }
128
129 static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
130 {
131     CPUState *cs = CPU(dev);
132     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
133
134     cpu_reset(cs);
135
136     qemu_init_vcpu(cs);
137
138     lcc->parent_realize(dev, errp);
139 }
140
141 static void lm32_cpu_initfn(Object *obj)
142 {
143     CPUState *cs = CPU(obj);
144     LM32CPU *cpu = LM32_CPU(obj);
145     CPULM32State *env = &cpu->env;
146     static bool tcg_initialized;
147
148     cs->env_ptr = env;
149     cpu_exec_init(env);
150
151     env->flags = 0;
152
153     if (tcg_enabled() && !tcg_initialized) {
154         tcg_initialized = true;
155         lm32_translate_init();
156         cpu_set_debug_excp_handler(lm32_debug_excp_handler);
157     }
158 }
159
160 static void lm32_basic_cpu_initfn(Object *obj)
161 {
162     LM32CPU *cpu = LM32_CPU(obj);
163
164     cpu->revision = 3;
165     cpu->num_interrupts = 32;
166     cpu->num_breakpoints = 4;
167     cpu->num_watchpoints = 4;
168     cpu->features = LM32_FEATURE_SHIFT
169                   | LM32_FEATURE_SIGN_EXTEND
170                   | LM32_FEATURE_CYCLE_COUNT;
171 }
172
173 static void lm32_standard_cpu_initfn(Object *obj)
174 {
175     LM32CPU *cpu = LM32_CPU(obj);
176
177     cpu->revision = 3;
178     cpu->num_interrupts = 32;
179     cpu->num_breakpoints = 4;
180     cpu->num_watchpoints = 4;
181     cpu->features = LM32_FEATURE_MULTIPLY
182                   | LM32_FEATURE_DIVIDE
183                   | LM32_FEATURE_SHIFT
184                   | LM32_FEATURE_SIGN_EXTEND
185                   | LM32_FEATURE_I_CACHE
186                   | LM32_FEATURE_CYCLE_COUNT;
187 }
188
189 static void lm32_full_cpu_initfn(Object *obj)
190 {
191     LM32CPU *cpu = LM32_CPU(obj);
192
193     cpu->revision = 3;
194     cpu->num_interrupts = 32;
195     cpu->num_breakpoints = 4;
196     cpu->num_watchpoints = 4;
197     cpu->features = LM32_FEATURE_MULTIPLY
198                   | LM32_FEATURE_DIVIDE
199                   | LM32_FEATURE_SHIFT
200                   | LM32_FEATURE_SIGN_EXTEND
201                   | LM32_FEATURE_I_CACHE
202                   | LM32_FEATURE_D_CACHE
203                   | LM32_FEATURE_CYCLE_COUNT;
204 }
205
206 typedef struct LM32CPUInfo {
207     const char *name;
208     void (*initfn)(Object *obj);
209 } LM32CPUInfo;
210
211 static const LM32CPUInfo lm32_cpus[] = {
212     {
213         .name = "lm32-basic",
214         .initfn = lm32_basic_cpu_initfn,
215     },
216     {
217         .name = "lm32-standard",
218         .initfn = lm32_standard_cpu_initfn,
219     },
220     {
221         .name = "lm32-full",
222         .initfn = lm32_full_cpu_initfn,
223     },
224 };
225
226 static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
227 {
228     ObjectClass *oc;
229     char *typename;
230
231     if (cpu_model == NULL) {
232         return NULL;
233     }
234
235     typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
236     oc = object_class_by_name(typename);
237     g_free(typename);
238     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
239                        object_class_is_abstract(oc))) {
240         oc = NULL;
241     }
242     return oc;
243 }
244
245 static void lm32_cpu_class_init(ObjectClass *oc, void *data)
246 {
247     LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
248     CPUClass *cc = CPU_CLASS(oc);
249     DeviceClass *dc = DEVICE_CLASS(oc);
250
251     lcc->parent_realize = dc->realize;
252     dc->realize = lm32_cpu_realizefn;
253
254     lcc->parent_reset = cc->reset;
255     cc->reset = lm32_cpu_reset;
256
257     cc->class_by_name = lm32_cpu_class_by_name;
258     cc->do_interrupt = lm32_cpu_do_interrupt;
259     cc->dump_state = lm32_cpu_dump_state;
260     cc->set_pc = lm32_cpu_set_pc;
261     cc->gdb_read_register = lm32_cpu_gdb_read_register;
262     cc->gdb_write_register = lm32_cpu_gdb_write_register;
263 #ifndef CONFIG_USER_ONLY
264     cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
265     cc->vmsd = &vmstate_lm32_cpu;
266 #endif
267     cc->gdb_num_core_regs = 32 + 7;
268 }
269
270 static void lm32_register_cpu_type(const LM32CPUInfo *info)
271 {
272     TypeInfo type_info = {
273         .parent = TYPE_LM32_CPU,
274         .instance_init = info->initfn,
275     };
276
277     type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
278     type_register(&type_info);
279     g_free((void *)type_info.name);
280 }
281
282 static const TypeInfo lm32_cpu_type_info = {
283     .name = TYPE_LM32_CPU,
284     .parent = TYPE_CPU,
285     .instance_size = sizeof(LM32CPU),
286     .instance_init = lm32_cpu_initfn,
287     .abstract = true,
288     .class_size = sizeof(LM32CPUClass),
289     .class_init = lm32_cpu_class_init,
290 };
291
292 static void lm32_cpu_register_types(void)
293 {
294     int i;
295
296     type_register_static(&lm32_cpu_type_info);
297     for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
298         lm32_register_cpu_type(&lm32_cpus[i]);
299     }
300 }
301
302 type_init(lm32_cpu_register_types)
This page took 0.039658 seconds and 4 git commands to generate.