2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
30 #ifndef CONFIG_DEBUG_TCG
31 /* define it to suppress various consistency checks (faster) */
47 #include "qemu-common.h"
48 #include "cache-utils.h"
49 #include "host-utils.h"
51 /* Note: the long term plan is to reduce the dependancies on the QEMU
52 CPU definitions. Currently they are used for qemu_ld/st
54 #define NO_CPU_IO_DEFS
61 #if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
62 #error GUEST_BASE not supported on this host.
65 static void patch_reloc(uint8_t *code_ptr, int type,
66 tcg_target_long value, tcg_target_long addend);
68 static TCGOpDef tcg_op_defs[] = {
69 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
70 #define DEF2(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags, 0 },
76 static TCGRegSet tcg_target_available_regs[2];
77 static TCGRegSet tcg_target_call_clobber_regs;
79 /* XXX: move that inside the context */
80 uint16_t *gen_opc_ptr;
81 TCGArg *gen_opparam_ptr;
83 static inline void tcg_out8(TCGContext *s, uint8_t v)
88 static inline void tcg_out16(TCGContext *s, uint16_t v)
90 *(uint16_t *)s->code_ptr = v;
94 static inline void tcg_out32(TCGContext *s, uint32_t v)
96 *(uint32_t *)s->code_ptr = v;
100 /* label relocation processing */
102 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
103 int label_index, long addend)
108 l = &s->labels[label_index];
110 /* FIXME: This may break relocations on RISC targets that
111 modify instruction fields in place. The caller may not have
112 written the initial value. */
113 patch_reloc(code_ptr, type, l->u.value, addend);
115 /* add a new relocation entry */
116 r = tcg_malloc(sizeof(TCGRelocation));
120 r->next = l->u.first_reloc;
121 l->u.first_reloc = r;
125 static void tcg_out_label(TCGContext *s, int label_index,
126 tcg_target_long value)
131 l = &s->labels[label_index];
134 r = l->u.first_reloc;
136 patch_reloc(r->ptr, r->type, value, r->addend);
143 int gen_new_label(void)
145 TCGContext *s = &tcg_ctx;
149 if (s->nb_labels >= TCG_MAX_LABELS)
151 idx = s->nb_labels++;
154 l->u.first_reloc = NULL;
158 #include "tcg-target.c"
160 /* pool based memory allocation */
161 void *tcg_malloc_internal(TCGContext *s, int size)
166 if (size > TCG_POOL_CHUNK_SIZE) {
167 /* big malloc: insert a new pool (XXX: could optimize) */
168 p = qemu_malloc(sizeof(TCGPool) + size);
171 s->pool_current->next = p;
174 p->next = s->pool_current;
184 pool_size = TCG_POOL_CHUNK_SIZE;
185 p = qemu_malloc(sizeof(TCGPool) + pool_size);
189 s->pool_current->next = p;
198 s->pool_cur = p->data + size;
199 s->pool_end = p->data + p->size;
203 void tcg_pool_reset(TCGContext *s)
205 s->pool_cur = s->pool_end = NULL;
206 s->pool_current = NULL;
209 void tcg_context_init(TCGContext *s)
211 int op, total_args, n;
213 TCGArgConstraint *args_ct;
216 memset(s, 0, sizeof(*s));
217 s->temps = s->static_temps;
220 /* Count total number of arguments and allocate the corresponding
223 for(op = 0; op < NB_OPS; op++) {
224 def = &tcg_op_defs[op];
225 n = def->nb_iargs + def->nb_oargs;
229 args_ct = qemu_malloc(sizeof(TCGArgConstraint) * total_args);
230 sorted_args = qemu_malloc(sizeof(int) * total_args);
232 for(op = 0; op < NB_OPS; op++) {
233 def = &tcg_op_defs[op];
234 def->args_ct = args_ct;
235 def->sorted_args = sorted_args;
236 n = def->nb_iargs + def->nb_oargs;
243 /* init global prologue and epilogue */
244 s->code_buf = code_gen_prologue;
245 s->code_ptr = s->code_buf;
246 tcg_target_qemu_prologue(s);
247 flush_icache_range((unsigned long)s->code_buf,
248 (unsigned long)s->code_ptr);
251 void tcg_set_frame(TCGContext *s, int reg,
252 tcg_target_long start, tcg_target_long size)
254 s->frame_start = start;
255 s->frame_end = start + size;
259 void tcg_func_start(TCGContext *s)
263 s->nb_temps = s->nb_globals;
264 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
265 s->first_free_temp[i] = -1;
266 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
268 s->current_frame_offset = s->frame_start;
270 gen_opc_ptr = gen_opc_buf;
271 gen_opparam_ptr = gen_opparam_buf;
274 static inline void tcg_temp_alloc(TCGContext *s, int n)
276 if (n > TCG_MAX_TEMPS)
280 static inline int tcg_global_reg_new_internal(TCGType type, int reg,
283 TCGContext *s = &tcg_ctx;
287 #if TCG_TARGET_REG_BITS == 32
288 if (type != TCG_TYPE_I32)
291 if (tcg_regset_test_reg(s->reserved_regs, reg))
294 tcg_temp_alloc(s, s->nb_globals + 1);
295 ts = &s->temps[s->nb_globals];
296 ts->base_type = type;
302 tcg_regset_set_reg(s->reserved_regs, reg);
306 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
310 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
311 return MAKE_TCGV_I32(idx);
314 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
318 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
319 return MAKE_TCGV_I64(idx);
322 static inline int tcg_global_mem_new_internal(TCGType type, int reg,
323 tcg_target_long offset,
326 TCGContext *s = &tcg_ctx;
331 #if TCG_TARGET_REG_BITS == 32
332 if (type == TCG_TYPE_I64) {
334 tcg_temp_alloc(s, s->nb_globals + 2);
335 ts = &s->temps[s->nb_globals];
336 ts->base_type = type;
337 ts->type = TCG_TYPE_I32;
339 ts->mem_allocated = 1;
341 #ifdef TCG_TARGET_WORDS_BIGENDIAN
342 ts->mem_offset = offset + 4;
344 ts->mem_offset = offset;
346 pstrcpy(buf, sizeof(buf), name);
347 pstrcat(buf, sizeof(buf), "_0");
348 ts->name = strdup(buf);
351 ts->base_type = type;
352 ts->type = TCG_TYPE_I32;
354 ts->mem_allocated = 1;
356 #ifdef TCG_TARGET_WORDS_BIGENDIAN
357 ts->mem_offset = offset;
359 ts->mem_offset = offset + 4;
361 pstrcpy(buf, sizeof(buf), name);
362 pstrcat(buf, sizeof(buf), "_1");
363 ts->name = strdup(buf);
369 tcg_temp_alloc(s, s->nb_globals + 1);
370 ts = &s->temps[s->nb_globals];
371 ts->base_type = type;
374 ts->mem_allocated = 1;
376 ts->mem_offset = offset;
383 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
388 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
389 return MAKE_TCGV_I32(idx);
392 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
397 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
398 return MAKE_TCGV_I64(idx);
401 static inline int tcg_temp_new_internal(TCGType type, int temp_local)
403 TCGContext *s = &tcg_ctx;
410 idx = s->first_free_temp[k];
412 /* There is already an available temp with the
415 s->first_free_temp[k] = ts->next_free_temp;
416 ts->temp_allocated = 1;
417 assert(ts->temp_local == temp_local);
420 #if TCG_TARGET_REG_BITS == 32
421 if (type == TCG_TYPE_I64) {
422 tcg_temp_alloc(s, s->nb_temps + 2);
423 ts = &s->temps[s->nb_temps];
424 ts->base_type = type;
425 ts->type = TCG_TYPE_I32;
426 ts->temp_allocated = 1;
427 ts->temp_local = temp_local;
430 ts->base_type = TCG_TYPE_I32;
431 ts->type = TCG_TYPE_I32;
432 ts->temp_allocated = 1;
433 ts->temp_local = temp_local;
439 tcg_temp_alloc(s, s->nb_temps + 1);
440 ts = &s->temps[s->nb_temps];
441 ts->base_type = type;
443 ts->temp_allocated = 1;
444 ts->temp_local = temp_local;
452 TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
456 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
457 return MAKE_TCGV_I32(idx);
460 TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
464 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
465 return MAKE_TCGV_I64(idx);
468 static inline void tcg_temp_free_internal(int idx)
470 TCGContext *s = &tcg_ctx;
474 assert(idx >= s->nb_globals && idx < s->nb_temps);
476 assert(ts->temp_allocated != 0);
477 ts->temp_allocated = 0;
481 ts->next_free_temp = s->first_free_temp[k];
482 s->first_free_temp[k] = idx;
485 void tcg_temp_free_i32(TCGv_i32 arg)
487 tcg_temp_free_internal(GET_TCGV_I32(arg));
490 void tcg_temp_free_i64(TCGv_i64 arg)
492 tcg_temp_free_internal(GET_TCGV_I64(arg));
495 TCGv_i32 tcg_const_i32(int32_t val)
498 t0 = tcg_temp_new_i32();
499 tcg_gen_movi_i32(t0, val);
503 TCGv_i64 tcg_const_i64(int64_t val)
506 t0 = tcg_temp_new_i64();
507 tcg_gen_movi_i64(t0, val);
511 TCGv_i32 tcg_const_local_i32(int32_t val)
514 t0 = tcg_temp_local_new_i32();
515 tcg_gen_movi_i32(t0, val);
519 TCGv_i64 tcg_const_local_i64(int64_t val)
522 t0 = tcg_temp_local_new_i64();
523 tcg_gen_movi_i64(t0, val);
527 void tcg_register_helper(void *func, const char *name)
529 TCGContext *s = &tcg_ctx;
531 if ((s->nb_helpers + 1) > s->allocated_helpers) {
532 n = s->allocated_helpers;
538 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
539 s->allocated_helpers = n;
541 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
542 s->helpers[s->nb_helpers].name = name;
546 /* Note: we convert the 64 bit args to 32 bit and do some alignment
547 and endian swap. Maybe it would be better to do the alignment
548 and endian swap in tcg_reg_alloc_call(). */
549 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
550 int sizemask, TCGArg ret, int nargs, TCGArg *args)
557 *gen_opc_ptr++ = INDEX_op_call;
558 nparam = gen_opparam_ptr++;
559 call_type = (flags & TCG_CALL_TYPE_MASK);
560 if (ret != TCG_CALL_DUMMY_ARG) {
561 #if TCG_TARGET_REG_BITS < 64
563 #ifdef TCG_TARGET_WORDS_BIGENDIAN
564 *gen_opparam_ptr++ = ret + 1;
565 *gen_opparam_ptr++ = ret;
567 *gen_opparam_ptr++ = ret;
568 *gen_opparam_ptr++ = ret + 1;
574 *gen_opparam_ptr++ = ret;
581 for (i = 0; i < nargs; i++) {
582 #if TCG_TARGET_REG_BITS < 64
583 if (sizemask & (2 << i)) {
584 #ifdef TCG_TARGET_I386
585 /* REGPARM case: if the third parameter is 64 bit, it is
586 allocated on the stack */
587 if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
588 call_type = TCG_CALL_TYPE_REGPARM_2;
589 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
592 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
593 /* some targets want aligned 64 bit args */
595 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
599 #ifdef TCG_TARGET_WORDS_BIGENDIAN
600 *gen_opparam_ptr++ = args[i] + 1;
601 *gen_opparam_ptr++ = args[i];
603 *gen_opparam_ptr++ = args[i];
604 *gen_opparam_ptr++ = args[i] + 1;
610 *gen_opparam_ptr++ = args[i];
614 *gen_opparam_ptr++ = GET_TCGV_PTR(func);
616 *gen_opparam_ptr++ = flags;
618 *nparam = (nb_rets << 16) | (real_args + 1);
620 /* total parameters, needed to go backward in the instruction stream */
621 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
624 #if TCG_TARGET_REG_BITS == 32
625 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
626 int c, int right, int arith)
629 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
630 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
631 } else if (c >= 32) {
635 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
636 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
638 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
639 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
642 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
643 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
648 t0 = tcg_temp_new_i32();
649 t1 = tcg_temp_new_i32();
651 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
653 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
655 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
656 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
657 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
658 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
660 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
661 /* Note: ret can be the same as arg1, so we use t1 */
662 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
663 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
664 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
665 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
667 tcg_temp_free_i32(t0);
668 tcg_temp_free_i32(t1);
674 static void tcg_reg_alloc_start(TCGContext *s)
678 for(i = 0; i < s->nb_globals; i++) {
681 ts->val_type = TEMP_VAL_REG;
683 ts->val_type = TEMP_VAL_MEM;
686 for(i = s->nb_globals; i < s->nb_temps; i++) {
688 ts->val_type = TEMP_VAL_DEAD;
689 ts->mem_allocated = 0;
692 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
693 s->reg_to_temp[i] = -1;
697 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
703 if (idx < s->nb_globals) {
704 pstrcpy(buf, buf_size, ts->name);
707 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
709 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
714 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
716 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
719 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
721 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
724 static int helper_cmp(const void *p1, const void *p2)
726 const TCGHelperInfo *th1 = p1;
727 const TCGHelperInfo *th2 = p2;
728 if (th1->func < th2->func)
730 else if (th1->func == th2->func)
736 /* find helper definition (Note: A hash table would be better) */
737 static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
743 if (unlikely(!s->helpers_sorted)) {
744 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
746 s->helpers_sorted = 1;
751 m_max = s->nb_helpers - 1;
752 while (m_min <= m_max) {
753 m = (m_min + m_max) >> 1;
767 static const char * const cond_name[] =
769 [TCG_COND_EQ] = "eq",
770 [TCG_COND_NE] = "ne",
771 [TCG_COND_LT] = "lt",
772 [TCG_COND_GE] = "ge",
773 [TCG_COND_LE] = "le",
774 [TCG_COND_GT] = "gt",
775 [TCG_COND_LTU] = "ltu",
776 [TCG_COND_GEU] = "geu",
777 [TCG_COND_LEU] = "leu",
778 [TCG_COND_GTU] = "gtu"
781 void tcg_dump_ops(TCGContext *s, FILE *outfile)
783 const uint16_t *opc_ptr;
786 int c, i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
791 opc_ptr = gen_opc_buf;
792 args = gen_opparam_buf;
793 while (opc_ptr < gen_opc_ptr) {
795 def = &tcg_op_defs[c];
796 if (c == INDEX_op_debug_insn_start) {
798 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
799 pc = ((uint64_t)args[1] << 32) | args[0];
804 fprintf(outfile, "\n");
805 fprintf(outfile, " ---- 0x%" PRIx64, pc);
807 nb_oargs = def->nb_oargs;
808 nb_iargs = def->nb_iargs;
809 nb_cargs = def->nb_cargs;
810 } else if (c == INDEX_op_call) {
813 /* variable number of arguments */
815 nb_oargs = arg >> 16;
816 nb_iargs = arg & 0xffff;
817 nb_cargs = def->nb_cargs;
819 fprintf(outfile, " %s ", def->name);
822 fprintf(outfile, "%s",
823 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
825 fprintf(outfile, ",$0x%" TCG_PRIlx,
826 args[nb_oargs + nb_iargs]);
828 fprintf(outfile, ",$%d", nb_oargs);
829 for(i = 0; i < nb_oargs; i++) {
830 fprintf(outfile, ",");
831 fprintf(outfile, "%s",
832 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
834 for(i = 0; i < (nb_iargs - 1); i++) {
835 fprintf(outfile, ",");
836 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
837 fprintf(outfile, "<dummy>");
839 fprintf(outfile, "%s",
840 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
843 } else if (c == INDEX_op_movi_i32
844 #if TCG_TARGET_REG_BITS == 64
845 || c == INDEX_op_movi_i64
848 tcg_target_ulong val;
851 nb_oargs = def->nb_oargs;
852 nb_iargs = def->nb_iargs;
853 nb_cargs = def->nb_cargs;
854 fprintf(outfile, " %s %s,$", def->name,
855 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
857 th = tcg_find_helper(s, val);
859 fprintf(outfile, "%s", th->name);
861 if (c == INDEX_op_movi_i32)
862 fprintf(outfile, "0x%x", (uint32_t)val);
864 fprintf(outfile, "0x%" PRIx64 , (uint64_t)val);
867 fprintf(outfile, " %s ", def->name);
868 if (c == INDEX_op_nopn) {
869 /* variable number of arguments */
874 nb_oargs = def->nb_oargs;
875 nb_iargs = def->nb_iargs;
876 nb_cargs = def->nb_cargs;
880 for(i = 0; i < nb_oargs; i++) {
882 fprintf(outfile, ",");
883 fprintf(outfile, "%s",
884 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
886 for(i = 0; i < nb_iargs; i++) {
888 fprintf(outfile, ",");
889 fprintf(outfile, "%s",
890 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
893 case INDEX_op_brcond_i32:
894 #if TCG_TARGET_REG_BITS == 32
895 case INDEX_op_brcond2_i32:
896 #elif TCG_TARGET_REG_BITS == 64
897 case INDEX_op_brcond_i64:
899 case INDEX_op_setcond_i32:
900 #if TCG_TARGET_REG_BITS == 32
901 case INDEX_op_setcond2_i32:
902 #elif TCG_TARGET_REG_BITS == 64
903 case INDEX_op_setcond_i64:
905 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])
906 fprintf(outfile, ",%s", cond_name[args[k++]]);
908 fprintf(outfile, ",$0x%" TCG_PRIlx, args[k++]);
915 for(; i < nb_cargs; i++) {
917 fprintf(outfile, ",");
919 fprintf(outfile, "$0x%" TCG_PRIlx, arg);
922 fprintf(outfile, "\n");
923 args += nb_iargs + nb_oargs + nb_cargs;
927 /* we give more priority to constraints with less registers */
928 static int get_constraint_priority(const TCGOpDef *def, int k)
930 const TCGArgConstraint *arg_ct;
933 arg_ct = &def->args_ct[k];
934 if (arg_ct->ct & TCG_CT_ALIAS) {
935 /* an alias is equivalent to a single register */
938 if (!(arg_ct->ct & TCG_CT_REG))
941 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
942 if (tcg_regset_test_reg(arg_ct->u.regs, i))
946 return TCG_TARGET_NB_REGS - n + 1;
949 /* sort from highest priority to lowest */
950 static void sort_constraints(TCGOpDef *def, int start, int n)
952 int i, j, p1, p2, tmp;
954 for(i = 0; i < n; i++)
955 def->sorted_args[start + i] = start + i;
958 for(i = 0; i < n - 1; i++) {
959 for(j = i + 1; j < n; j++) {
960 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
961 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
963 tmp = def->sorted_args[start + i];
964 def->sorted_args[start + i] = def->sorted_args[start + j];
965 def->sorted_args[start + j] = tmp;
971 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
982 assert(op >= 0 && op < NB_OPS);
983 def = &tcg_op_defs[op];
984 #if defined(CONFIG_DEBUG_TCG)
985 /* Duplicate entry in op definitions? */
989 nb_args = def->nb_iargs + def->nb_oargs;
990 for(i = 0; i < nb_args; i++) {
991 ct_str = tdefs->args_ct_str[i];
992 /* Incomplete TCGTargetOpDef entry? */
993 assert(ct_str != NULL);
994 tcg_regset_clear(def->args_ct[i].u.regs);
995 def->args_ct[i].ct = 0;
996 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
998 oarg = ct_str[0] - '0';
999 assert(oarg < def->nb_oargs);
1000 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1001 /* TCG_CT_ALIAS is for the output arguments. The input
1002 argument is tagged with TCG_CT_IALIAS. */
1003 def->args_ct[i] = def->args_ct[oarg];
1004 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1005 def->args_ct[oarg].alias_index = i;
1006 def->args_ct[i].ct |= TCG_CT_IALIAS;
1007 def->args_ct[i].alias_index = oarg;
1010 if (*ct_str == '\0')
1014 def->args_ct[i].ct |= TCG_CT_CONST;
1018 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1019 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1020 ct_str, i, def->name);
1028 /* TCGTargetOpDef entry with too much information? */
1029 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1031 /* sort the constraints (XXX: this is just an heuristic) */
1032 sort_constraints(def, 0, def->nb_oargs);
1033 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1039 printf("%s: sorted=", def->name);
1040 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1041 printf(" %d", def->sorted_args[i]);
1048 #if defined(CONFIG_DEBUG_TCG)
1049 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
1050 if (op < INDEX_op_call || op == INDEX_op_debug_insn_start) {
1051 /* Wrong entry in op definitions? */
1052 assert(!tcg_op_defs[op].used);
1054 /* Missing entry in op definitions? */
1055 assert(tcg_op_defs[op].used);
1061 #ifdef USE_LIVENESS_ANALYSIS
1063 /* set a nop for an operation using 'nb_args' */
1064 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1065 TCGArg *args, int nb_args)
1068 *opc_ptr = INDEX_op_nop;
1070 *opc_ptr = INDEX_op_nopn;
1072 args[nb_args - 1] = nb_args;
1076 /* liveness analysis: end of function: globals are live, temps are
1078 /* XXX: at this stage, not used as there would be little gains because
1079 most TBs end with a conditional jump. */
1080 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps)
1082 memset(dead_temps, 0, s->nb_globals);
1083 memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals);
1086 /* liveness analysis: end of basic block: globals are live, temps are
1087 dead, local temps are live. */
1088 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps)
1093 memset(dead_temps, 0, s->nb_globals);
1094 ts = &s->temps[s->nb_globals];
1095 for(i = s->nb_globals; i < s->nb_temps; i++) {
1104 /* Liveness analysis : update the opc_dead_iargs array to tell if a
1105 given input arguments is dead. Instructions updating dead
1106 temporaries are removed. */
1107 static void tcg_liveness_analysis(TCGContext *s)
1109 int i, op_index, op, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1111 const TCGOpDef *def;
1112 uint8_t *dead_temps;
1113 unsigned int dead_iargs;
1115 gen_opc_ptr++; /* skip end */
1117 nb_ops = gen_opc_ptr - gen_opc_buf;
1119 s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
1121 dead_temps = tcg_malloc(s->nb_temps);
1122 memset(dead_temps, 1, s->nb_temps);
1124 args = gen_opparam_ptr;
1125 op_index = nb_ops - 1;
1126 while (op_index >= 0) {
1127 op = gen_opc_buf[op_index];
1128 def = &tcg_op_defs[op];
1136 nb_iargs = args[0] & 0xffff;
1137 nb_oargs = args[0] >> 16;
1139 call_flags = args[nb_oargs + nb_iargs];
1141 /* pure functions can be removed if their result is not
1143 if (call_flags & TCG_CALL_PURE) {
1144 for(i = 0; i < nb_oargs; i++) {
1146 if (!dead_temps[arg])
1147 goto do_not_remove_call;
1149 tcg_set_nop(s, gen_opc_buf + op_index,
1154 /* output args are dead */
1155 for(i = 0; i < nb_oargs; i++) {
1157 dead_temps[arg] = 1;
1160 if (!(call_flags & TCG_CALL_CONST)) {
1161 /* globals are live (they may be used by the call) */
1162 memset(dead_temps, 0, s->nb_globals);
1165 /* input args are live */
1167 for(i = 0; i < nb_iargs; i++) {
1168 arg = args[i + nb_oargs];
1169 if (arg != TCG_CALL_DUMMY_ARG) {
1170 if (dead_temps[arg]) {
1171 dead_iargs |= (1 << i);
1173 dead_temps[arg] = 0;
1176 s->op_dead_iargs[op_index] = dead_iargs;
1181 case INDEX_op_set_label:
1183 /* mark end of basic block */
1184 tcg_la_bb_end(s, dead_temps);
1186 case INDEX_op_debug_insn_start:
1187 args -= def->nb_args;
1193 case INDEX_op_discard:
1195 /* mark the temporary as dead */
1196 dead_temps[args[0]] = 1;
1200 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1202 args -= def->nb_args;
1203 nb_iargs = def->nb_iargs;
1204 nb_oargs = def->nb_oargs;
1206 /* Test if the operation can be removed because all
1207 its outputs are dead. We assume that nb_oargs == 0
1208 implies side effects */
1209 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1210 for(i = 0; i < nb_oargs; i++) {
1212 if (!dead_temps[arg])
1215 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
1216 #ifdef CONFIG_PROFILER
1222 /* output args are dead */
1223 for(i = 0; i < nb_oargs; i++) {
1225 dead_temps[arg] = 1;
1228 /* if end of basic block, update */
1229 if (def->flags & TCG_OPF_BB_END) {
1230 tcg_la_bb_end(s, dead_temps);
1231 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
1232 /* globals are live */
1233 memset(dead_temps, 0, s->nb_globals);
1236 /* input args are live */
1238 for(i = 0; i < nb_iargs; i++) {
1239 arg = args[i + nb_oargs];
1240 if (dead_temps[arg]) {
1241 dead_iargs |= (1 << i);
1243 dead_temps[arg] = 0;
1245 s->op_dead_iargs[op_index] = dead_iargs;
1252 if (args != gen_opparam_buf)
1256 /* dummy liveness analysis */
1257 void tcg_liveness_analysis(TCGContext *s)
1260 nb_ops = gen_opc_ptr - gen_opc_buf;
1262 s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
1263 memset(s->op_dead_iargs, 0, nb_ops * sizeof(uint16_t));
1268 static void dump_regs(TCGContext *s)
1274 for(i = 0; i < s->nb_temps; i++) {
1276 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
1277 switch(ts->val_type) {
1279 printf("%s", tcg_target_reg_names[ts->reg]);
1282 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1284 case TEMP_VAL_CONST:
1285 printf("$0x%" TCG_PRIlx, ts->val);
1297 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1298 if (s->reg_to_temp[i] >= 0) {
1300 tcg_target_reg_names[i],
1301 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
1306 static void check_regs(TCGContext *s)
1312 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1313 k = s->reg_to_temp[reg];
1316 if (ts->val_type != TEMP_VAL_REG ||
1318 printf("Inconsistency for register %s:\n",
1319 tcg_target_reg_names[reg]);
1324 for(k = 0; k < s->nb_temps; k++) {
1326 if (ts->val_type == TEMP_VAL_REG &&
1328 s->reg_to_temp[ts->reg] != k) {
1329 printf("Inconsistency for temp %s:\n",
1330 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1332 printf("reg state:\n");
1340 static void temp_allocate_frame(TCGContext *s, int temp)
1343 ts = &s->temps[temp];
1344 s->current_frame_offset = (s->current_frame_offset + sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1);
1345 if (s->current_frame_offset + sizeof(tcg_target_long) > s->frame_end)
1347 ts->mem_offset = s->current_frame_offset;
1348 ts->mem_reg = s->frame_reg;
1349 ts->mem_allocated = 1;
1350 s->current_frame_offset += sizeof(tcg_target_long);
1353 /* free register 'reg' by spilling the corresponding temporary if necessary */
1354 static void tcg_reg_free(TCGContext *s, int reg)
1359 temp = s->reg_to_temp[reg];
1361 ts = &s->temps[temp];
1362 assert(ts->val_type == TEMP_VAL_REG);
1363 if (!ts->mem_coherent) {
1364 if (!ts->mem_allocated)
1365 temp_allocate_frame(s, temp);
1366 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1368 ts->val_type = TEMP_VAL_MEM;
1369 s->reg_to_temp[reg] = -1;
1373 /* Allocate a register belonging to reg1 & ~reg2 */
1374 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1379 tcg_regset_andnot(reg_ct, reg1, reg2);
1381 /* first try free registers */
1382 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1383 reg = tcg_target_reg_alloc_order[i];
1384 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1388 /* XXX: do better spill choice */
1389 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1390 reg = tcg_target_reg_alloc_order[i];
1391 if (tcg_regset_test_reg(reg_ct, reg)) {
1392 tcg_reg_free(s, reg);
1400 /* save a temporary to memory. 'allocated_regs' is used in case a
1401 temporary registers needs to be allocated to store a constant. */
1402 static void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1407 ts = &s->temps[temp];
1408 if (!ts->fixed_reg) {
1409 switch(ts->val_type) {
1411 tcg_reg_free(s, ts->reg);
1414 ts->val_type = TEMP_VAL_MEM;
1416 case TEMP_VAL_CONST:
1417 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1419 if (!ts->mem_allocated)
1420 temp_allocate_frame(s, temp);
1421 tcg_out_movi(s, ts->type, reg, ts->val);
1422 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1423 ts->val_type = TEMP_VAL_MEM;
1433 /* save globals to their cannonical location and assume they can be
1434 modified be the following code. 'allocated_regs' is used in case a
1435 temporary registers needs to be allocated to store a constant. */
1436 static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
1440 for(i = 0; i < s->nb_globals; i++) {
1441 temp_save(s, i, allocated_regs);
1445 /* at the end of a basic block, we assume all temporaries are dead and
1446 all globals are stored at their canonical location. */
1447 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
1452 for(i = s->nb_globals; i < s->nb_temps; i++) {
1454 if (ts->temp_local) {
1455 temp_save(s, i, allocated_regs);
1457 if (ts->val_type == TEMP_VAL_REG) {
1458 s->reg_to_temp[ts->reg] = -1;
1460 ts->val_type = TEMP_VAL_DEAD;
1464 save_globals(s, allocated_regs);
1467 #define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1469 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args)
1472 tcg_target_ulong val;
1474 ots = &s->temps[args[0]];
1477 if (ots->fixed_reg) {
1478 /* for fixed registers, we do not do any constant
1480 tcg_out_movi(s, ots->type, ots->reg, val);
1482 /* The movi is not explicitly generated here */
1483 if (ots->val_type == TEMP_VAL_REG)
1484 s->reg_to_temp[ots->reg] = -1;
1485 ots->val_type = TEMP_VAL_CONST;
1490 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1492 unsigned int dead_iargs)
1496 const TCGArgConstraint *arg_ct;
1498 ots = &s->temps[args[0]];
1499 ts = &s->temps[args[1]];
1500 arg_ct = &def->args_ct[0];
1502 /* XXX: always mark arg dead if IS_DEAD_IARG(0) */
1503 if (ts->val_type == TEMP_VAL_REG) {
1504 if (IS_DEAD_IARG(0) && !ts->fixed_reg && !ots->fixed_reg) {
1505 /* the mov can be suppressed */
1506 if (ots->val_type == TEMP_VAL_REG)
1507 s->reg_to_temp[ots->reg] = -1;
1509 s->reg_to_temp[reg] = -1;
1510 ts->val_type = TEMP_VAL_DEAD;
1512 if (ots->val_type == TEMP_VAL_REG) {
1515 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1517 if (ts->reg != reg) {
1518 tcg_out_mov(s, reg, ts->reg);
1521 } else if (ts->val_type == TEMP_VAL_MEM) {
1522 if (ots->val_type == TEMP_VAL_REG) {
1525 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1527 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1528 } else if (ts->val_type == TEMP_VAL_CONST) {
1529 if (ots->fixed_reg) {
1531 tcg_out_movi(s, ots->type, reg, ts->val);
1533 /* propagate constant */
1534 if (ots->val_type == TEMP_VAL_REG)
1535 s->reg_to_temp[ots->reg] = -1;
1536 ots->val_type = TEMP_VAL_CONST;
1543 s->reg_to_temp[reg] = args[0];
1545 ots->val_type = TEMP_VAL_REG;
1546 ots->mem_coherent = 0;
1549 static void tcg_reg_alloc_op(TCGContext *s,
1550 const TCGOpDef *def, int opc,
1552 unsigned int dead_iargs)
1554 TCGRegSet allocated_regs;
1555 int i, k, nb_iargs, nb_oargs, reg;
1557 const TCGArgConstraint *arg_ct;
1559 TCGArg new_args[TCG_MAX_OP_ARGS];
1560 int const_args[TCG_MAX_OP_ARGS];
1562 nb_oargs = def->nb_oargs;
1563 nb_iargs = def->nb_iargs;
1565 /* copy constants */
1566 memcpy(new_args + nb_oargs + nb_iargs,
1567 args + nb_oargs + nb_iargs,
1568 sizeof(TCGArg) * def->nb_cargs);
1570 /* satisfy input constraints */
1571 tcg_regset_set(allocated_regs, s->reserved_regs);
1572 for(k = 0; k < nb_iargs; k++) {
1573 i = def->sorted_args[nb_oargs + k];
1575 arg_ct = &def->args_ct[i];
1576 ts = &s->temps[arg];
1577 if (ts->val_type == TEMP_VAL_MEM) {
1578 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1579 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1580 ts->val_type = TEMP_VAL_REG;
1582 ts->mem_coherent = 1;
1583 s->reg_to_temp[reg] = arg;
1584 } else if (ts->val_type == TEMP_VAL_CONST) {
1585 if (tcg_target_const_match(ts->val, arg_ct)) {
1586 /* constant is OK for instruction */
1588 new_args[i] = ts->val;
1591 /* need to move to a register */
1592 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1593 tcg_out_movi(s, ts->type, reg, ts->val);
1594 ts->val_type = TEMP_VAL_REG;
1596 ts->mem_coherent = 0;
1597 s->reg_to_temp[reg] = arg;
1600 assert(ts->val_type == TEMP_VAL_REG);
1601 if (arg_ct->ct & TCG_CT_IALIAS) {
1602 if (ts->fixed_reg) {
1603 /* if fixed register, we must allocate a new register
1604 if the alias is not the same register */
1605 if (arg != args[arg_ct->alias_index])
1606 goto allocate_in_reg;
1608 /* if the input is aliased to an output and if it is
1609 not dead after the instruction, we must allocate
1610 a new register and move it */
1611 if (!IS_DEAD_IARG(i - nb_oargs))
1612 goto allocate_in_reg;
1616 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1617 /* nothing to do : the constraint is satisfied */
1620 /* allocate a new register matching the constraint
1621 and move the temporary register into it */
1622 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1623 tcg_out_mov(s, reg, ts->reg);
1627 tcg_regset_set_reg(allocated_regs, reg);
1631 if (def->flags & TCG_OPF_BB_END) {
1632 tcg_reg_alloc_bb_end(s, allocated_regs);
1634 /* mark dead temporaries and free the associated registers */
1635 for(i = 0; i < nb_iargs; i++) {
1636 arg = args[nb_oargs + i];
1637 if (IS_DEAD_IARG(i)) {
1638 ts = &s->temps[arg];
1639 if (!ts->fixed_reg) {
1640 if (ts->val_type == TEMP_VAL_REG)
1641 s->reg_to_temp[ts->reg] = -1;
1642 ts->val_type = TEMP_VAL_DEAD;
1647 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1648 /* XXX: permit generic clobber register list ? */
1649 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1650 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1651 tcg_reg_free(s, reg);
1654 /* XXX: for load/store we could do that only for the slow path
1655 (i.e. when a memory callback is called) */
1657 /* store globals and free associated registers (we assume the insn
1658 can modify any global. */
1659 save_globals(s, allocated_regs);
1662 /* satisfy the output constraints */
1663 tcg_regset_set(allocated_regs, s->reserved_regs);
1664 for(k = 0; k < nb_oargs; k++) {
1665 i = def->sorted_args[k];
1667 arg_ct = &def->args_ct[i];
1668 ts = &s->temps[arg];
1669 if (arg_ct->ct & TCG_CT_ALIAS) {
1670 reg = new_args[arg_ct->alias_index];
1672 /* if fixed register, we try to use it */
1674 if (ts->fixed_reg &&
1675 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1678 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1680 tcg_regset_set_reg(allocated_regs, reg);
1681 /* if a fixed register is used, then a move will be done afterwards */
1682 if (!ts->fixed_reg) {
1683 if (ts->val_type == TEMP_VAL_REG)
1684 s->reg_to_temp[ts->reg] = -1;
1685 ts->val_type = TEMP_VAL_REG;
1687 /* temp value is modified, so the value kept in memory is
1688 potentially not the same */
1689 ts->mem_coherent = 0;
1690 s->reg_to_temp[reg] = arg;
1697 /* emit instruction */
1698 tcg_out_op(s, opc, new_args, const_args);
1700 /* move the outputs in the correct register if needed */
1701 for(i = 0; i < nb_oargs; i++) {
1702 ts = &s->temps[args[i]];
1704 if (ts->fixed_reg && ts->reg != reg) {
1705 tcg_out_mov(s, ts->reg, reg);
1710 #ifdef TCG_TARGET_STACK_GROWSUP
1711 #define STACK_DIR(x) (-(x))
1713 #define STACK_DIR(x) (x)
1716 static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
1717 int opc, const TCGArg *args,
1718 unsigned int dead_iargs)
1720 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1721 TCGArg arg, func_arg;
1723 tcg_target_long stack_offset, call_stack_size, func_addr;
1724 int const_func_arg, allocate_args;
1725 TCGRegSet allocated_regs;
1726 const TCGArgConstraint *arg_ct;
1730 nb_oargs = arg >> 16;
1731 nb_iargs = arg & 0xffff;
1732 nb_params = nb_iargs - 1;
1734 flags = args[nb_oargs + nb_iargs];
1736 nb_regs = tcg_target_get_call_iarg_regs_count(flags);
1737 if (nb_regs > nb_params)
1738 nb_regs = nb_params;
1740 /* assign stack slots first */
1741 /* XXX: preallocate call stack */
1742 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1743 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1744 ~(TCG_TARGET_STACK_ALIGN - 1);
1745 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1746 if (allocate_args) {
1747 tcg_out_addi(s, TCG_REG_CALL_STACK, -STACK_DIR(call_stack_size));
1750 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
1751 for(i = nb_regs; i < nb_params; i++) {
1752 arg = args[nb_oargs + i];
1753 #ifdef TCG_TARGET_STACK_GROWSUP
1754 stack_offset -= sizeof(tcg_target_long);
1756 if (arg != TCG_CALL_DUMMY_ARG) {
1757 ts = &s->temps[arg];
1758 if (ts->val_type == TEMP_VAL_REG) {
1759 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1760 } else if (ts->val_type == TEMP_VAL_MEM) {
1761 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1763 /* XXX: not correct if reading values from the stack */
1764 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1765 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1766 } else if (ts->val_type == TEMP_VAL_CONST) {
1767 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1769 /* XXX: sign extend may be needed on some targets */
1770 tcg_out_movi(s, ts->type, reg, ts->val);
1771 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1776 #ifndef TCG_TARGET_STACK_GROWSUP
1777 stack_offset += sizeof(tcg_target_long);
1781 /* assign input registers */
1782 tcg_regset_set(allocated_regs, s->reserved_regs);
1783 for(i = 0; i < nb_regs; i++) {
1784 arg = args[nb_oargs + i];
1785 if (arg != TCG_CALL_DUMMY_ARG) {
1786 ts = &s->temps[arg];
1787 reg = tcg_target_call_iarg_regs[i];
1788 tcg_reg_free(s, reg);
1789 if (ts->val_type == TEMP_VAL_REG) {
1790 if (ts->reg != reg) {
1791 tcg_out_mov(s, reg, ts->reg);
1793 } else if (ts->val_type == TEMP_VAL_MEM) {
1794 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1795 } else if (ts->val_type == TEMP_VAL_CONST) {
1796 /* XXX: sign extend ? */
1797 tcg_out_movi(s, ts->type, reg, ts->val);
1801 tcg_regset_set_reg(allocated_regs, reg);
1805 /* assign function address */
1806 func_arg = args[nb_oargs + nb_iargs - 1];
1807 arg_ct = &def->args_ct[0];
1808 ts = &s->temps[func_arg];
1809 func_addr = ts->val;
1811 if (ts->val_type == TEMP_VAL_MEM) {
1812 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1813 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1815 tcg_regset_set_reg(allocated_regs, reg);
1816 } else if (ts->val_type == TEMP_VAL_REG) {
1818 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1819 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1820 tcg_out_mov(s, reg, ts->reg);
1823 tcg_regset_set_reg(allocated_regs, reg);
1824 } else if (ts->val_type == TEMP_VAL_CONST) {
1825 if (tcg_target_const_match(func_addr, arg_ct)) {
1827 func_arg = func_addr;
1829 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1830 tcg_out_movi(s, ts->type, reg, func_addr);
1832 tcg_regset_set_reg(allocated_regs, reg);
1839 /* mark dead temporaries and free the associated registers */
1840 for(i = 0; i < nb_iargs; i++) {
1841 arg = args[nb_oargs + i];
1842 if (IS_DEAD_IARG(i)) {
1843 ts = &s->temps[arg];
1844 if (!ts->fixed_reg) {
1845 if (ts->val_type == TEMP_VAL_REG)
1846 s->reg_to_temp[ts->reg] = -1;
1847 ts->val_type = TEMP_VAL_DEAD;
1852 /* clobber call registers */
1853 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1854 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1855 tcg_reg_free(s, reg);
1859 /* store globals and free associated registers (we assume the call
1860 can modify any global. */
1861 if (!(flags & TCG_CALL_CONST)) {
1862 save_globals(s, allocated_regs);
1865 tcg_out_op(s, opc, &func_arg, &const_func_arg);
1867 if (allocate_args) {
1868 tcg_out_addi(s, TCG_REG_CALL_STACK, STACK_DIR(call_stack_size));
1871 /* assign output registers and emit moves if needed */
1872 for(i = 0; i < nb_oargs; i++) {
1874 ts = &s->temps[arg];
1875 reg = tcg_target_call_oarg_regs[i];
1876 assert(s->reg_to_temp[reg] == -1);
1877 if (ts->fixed_reg) {
1878 if (ts->reg != reg) {
1879 tcg_out_mov(s, ts->reg, reg);
1882 if (ts->val_type == TEMP_VAL_REG)
1883 s->reg_to_temp[ts->reg] = -1;
1884 ts->val_type = TEMP_VAL_REG;
1886 ts->mem_coherent = 0;
1887 s->reg_to_temp[reg] = arg;
1891 return nb_iargs + nb_oargs + def->nb_cargs + 1;
1894 #ifdef CONFIG_PROFILER
1896 static int64_t tcg_table_op_count[NB_OPS];
1898 static void dump_op_count(void)
1902 f = fopen("/tmp/op.log", "w");
1903 for(i = INDEX_op_end; i < NB_OPS; i++) {
1904 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
1911 static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
1915 const TCGOpDef *def;
1916 unsigned int dead_iargs;
1920 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
1922 tcg_dump_ops(s, logfile);
1927 #ifdef CONFIG_PROFILER
1928 s->la_time -= profile_getclock();
1930 tcg_liveness_analysis(s);
1931 #ifdef CONFIG_PROFILER
1932 s->la_time += profile_getclock();
1936 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
1937 qemu_log("OP after liveness analysis:\n");
1938 tcg_dump_ops(s, logfile);
1943 tcg_reg_alloc_start(s);
1945 s->code_buf = gen_code_buf;
1946 s->code_ptr = gen_code_buf;
1948 args = gen_opparam_buf;
1952 opc = gen_opc_buf[op_index];
1953 #ifdef CONFIG_PROFILER
1954 tcg_table_op_count[opc]++;
1956 def = &tcg_op_defs[opc];
1958 printf("%s: %d %d %d\n", def->name,
1959 def->nb_oargs, def->nb_iargs, def->nb_cargs);
1963 case INDEX_op_mov_i32:
1964 #if TCG_TARGET_REG_BITS == 64
1965 case INDEX_op_mov_i64:
1967 dead_iargs = s->op_dead_iargs[op_index];
1968 tcg_reg_alloc_mov(s, def, args, dead_iargs);
1970 case INDEX_op_movi_i32:
1971 #if TCG_TARGET_REG_BITS == 64
1972 case INDEX_op_movi_i64:
1974 tcg_reg_alloc_movi(s, args);
1976 case INDEX_op_debug_insn_start:
1977 /* debug instruction */
1987 case INDEX_op_discard:
1990 ts = &s->temps[args[0]];
1991 /* mark the temporary as dead */
1992 if (!ts->fixed_reg) {
1993 if (ts->val_type == TEMP_VAL_REG)
1994 s->reg_to_temp[ts->reg] = -1;
1995 ts->val_type = TEMP_VAL_DEAD;
1999 case INDEX_op_set_label:
2000 tcg_reg_alloc_bb_end(s, s->reserved_regs);
2001 tcg_out_label(s, args[0], (long)s->code_ptr);
2004 dead_iargs = s->op_dead_iargs[op_index];
2005 args += tcg_reg_alloc_call(s, def, opc, args, dead_iargs);
2010 /* Note: in order to speed up the code, it would be much
2011 faster to have specialized register allocator functions for
2012 some common argument patterns */
2013 dead_iargs = s->op_dead_iargs[op_index];
2014 tcg_reg_alloc_op(s, def, opc, args, dead_iargs);
2017 args += def->nb_args;
2019 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
2031 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
2033 #ifdef CONFIG_PROFILER
2036 n = (gen_opc_ptr - gen_opc_buf);
2038 if (n > s->op_count_max)
2039 s->op_count_max = n;
2041 s->temp_count += s->nb_temps;
2042 if (s->nb_temps > s->temp_count_max)
2043 s->temp_count_max = s->nb_temps;
2047 tcg_gen_code_common(s, gen_code_buf, -1);
2049 /* flush instruction cache */
2050 flush_icache_range((unsigned long)gen_code_buf,
2051 (unsigned long)s->code_ptr);
2052 return s->code_ptr - gen_code_buf;
2055 /* Return the index of the micro operation such as the pc after is <
2056 offset bytes from the start of the TB. The contents of gen_code_buf must
2057 not be changed, though writing the same values is ok.
2058 Return -1 if not found. */
2059 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
2061 return tcg_gen_code_common(s, gen_code_buf, offset);
2064 #ifdef CONFIG_PROFILER
2065 void tcg_dump_info(FILE *f,
2066 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2068 TCGContext *s = &tcg_ctx;
2071 tot = s->interm_time + s->code_time;
2072 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2074 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2076 s->tb_count1 - s->tb_count,
2077 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2078 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2079 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
2080 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2082 (double)s->del_op_count / s->tb_count : 0);
2083 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2085 (double)s->temp_count / s->tb_count : 0,
2088 cpu_fprintf(f, "cycles/op %0.1f\n",
2089 s->op_count ? (double)tot / s->op_count : 0);
2090 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2091 s->code_in_len ? (double)tot / s->code_in_len : 0);
2092 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2093 s->code_out_len ? (double)tot / s->code_out_len : 0);
2096 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2097 (double)s->interm_time / tot * 100.0);
2098 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2099 (double)s->code_time / tot * 100.0);
2100 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2101 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2102 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2104 cpu_fprintf(f, " avg cycles %0.1f\n",
2105 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
2110 void tcg_dump_info(FILE *f,
2111 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2113 cpu_fprintf(f, "[TCG profiler not compiled]\n");