hw/arm_boot.c

   1 /*
   2  * ARM kernel loader.
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "config.h"
  11 #include "hw.h"
  12 #include "arm-misc.h"
  13 #include "sysemu.h"
  14 #include "boards.h"
  15 #include "loader.h"
  16 #include "elf.h"
  17 #include "device_tree.h"
  18
  19 #define KERNEL_ARGS_ADDR 0x100
  20 #define KERNEL_LOAD_ADDR 0x00010000
  21 #define INITRD_LOAD_ADDR 0x00d00000
  22
  23 /* The worlds second smallest bootloader.  Set r0-r2, then jump to kernel.  */
  24 static uint32_t bootloader[] = {
  25   0xe3a00000, /* mov     r0, #0 */
  26   0xe59f1004, /* ldr     r1, [pc, #4] */
  27   0xe59f2004, /* ldr     r2, [pc, #4] */
  28   0xe59ff004, /* ldr     pc, [pc, #4] */
  29   0, /* Board ID */
  30   0, /* Address of kernel args.  Set by integratorcp_init.  */
  31   0  /* Kernel entry point.  Set by integratorcp_init.  */
  32 };
  33
  34 /* Handling for secondary CPU boot in a multicore system.
  35  * Unlike the uniprocessor/primary CPU boot, this is platform
  36  * dependent. The default code here is based on the secondary
  37  * CPU boot protocol used on realview/vexpress boards, with
  38  * some parameterisation to increase its flexibility.
  39  * QEMU platform models for which this code is not appropriate
  40  * should override write_secondary_boot and secondary_cpu_reset_hook
  41  * instead.
  42  *
  43  * This code enables the interrupt controllers for the secondary
  44  * CPUs and then puts all the secondary CPUs into a loop waiting
  45  * for an interprocessor interrupt and polling a configurable
  46  * location for the kernel secondary CPU entry point.
  47  */
  48 static uint32_t smpboot[] = {
  49   0xe59f201c, /* ldr r2, gic_cpu_if */
  50   0xe59f001c, /* ldr r0, startaddr */
  51   0xe3a01001, /* mov r1, #1 */
  52   0xe5821000, /* str r1, [r2] */
  53   0xe320f003, /* wfi */
  54   0xe5901000, /* ldr     r1, [r0] */
  55   0xe1110001, /* tst     r1, r1 */
  56   0x0afffffb, /* beq     <wfi> */
  57   0xe12fff11, /* bx      r1 */
  58   0,          /* gic_cpu_if: base address of GIC CPU interface */
  59   0           /* bootreg: Boot register address is held here */
  60 };
  61
  62 static void default_write_secondary(ARMCPU *cpu,
  63                                     const struct arm_boot_info *info)
  64 {
  65     int n;
  66     smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
  67     smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
  68     for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
  69         smpboot[n] = tswap32(smpboot[n]);
  70     }
  71     rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
  72                        info->smp_loader_start);
  73 }
  74
  75 static void default_reset_secondary(ARMCPU *cpu,
  76                                     const struct arm_boot_info *info)
  77 {
  78     CPUARMState *env = &cpu->env;
  79
  80     stl_phys_notdirty(info->smp_bootreg_addr, 0);
  81     env->regs[15] = info->smp_loader_start;
  82 }
  83
  84 #define WRITE_WORD(p, value) do { \
  85     stl_phys_notdirty(p, value);  \
  86     p += 4;                       \
  87 } while (0)
  88
  89 static void set_kernel_args(const struct arm_boot_info *info)
  90 {
  91     int initrd_size = info->initrd_size;
  92     target_phys_addr_t base = info->loader_start;
  93     target_phys_addr_t p;
  94
  95     p = base + KERNEL_ARGS_ADDR;
  96     /* ATAG_CORE */
  97     WRITE_WORD(p, 5);
  98     WRITE_WORD(p, 0x54410001);
  99     WRITE_WORD(p, 1);
 100     WRITE_WORD(p, 0x1000);
 101     WRITE_WORD(p, 0);
 102     /* ATAG_MEM */
 103     /* TODO: handle multiple chips on one ATAG list */
 104     WRITE_WORD(p, 4);
 105     WRITE_WORD(p, 0x54410002);
 106     WRITE_WORD(p, info->ram_size);
 107     WRITE_WORD(p, info->loader_start);
 108     if (initrd_size) {
 109         /* ATAG_INITRD2 */
 110         WRITE_WORD(p, 4);
 111         WRITE_WORD(p, 0x54420005);
 112         WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
 113         WRITE_WORD(p, initrd_size);
 114     }
 115     if (info->kernel_cmdline && *info->kernel_cmdline) {
 116         /* ATAG_CMDLINE */
 117         int cmdline_size;
 118
 119         cmdline_size = strlen(info->kernel_cmdline);
 120         cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
 121                                   cmdline_size + 1);
 122         cmdline_size = (cmdline_size >> 2) + 1;
 123         WRITE_WORD(p, cmdline_size + 2);
 124         WRITE_WORD(p, 0x54410009);
 125         p += cmdline_size * 4;
 126     }
 127     if (info->atag_board) {
 128         /* ATAG_BOARD */
 129         int atag_board_len;
 130         uint8_t atag_board_buf[0x1000];
 131
 132         atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
 133         WRITE_WORD(p, (atag_board_len + 8) >> 2);
 134         WRITE_WORD(p, 0x414f4d50);
 135         cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
 136         p += atag_board_len;
 137     }
 138     /* ATAG_END */
 139     WRITE_WORD(p, 0);
 140     WRITE_WORD(p, 0);
 141 }
 142
 143 static void set_kernel_args_old(const struct arm_boot_info *info)
 144 {
 145     target_phys_addr_t p;
 146     const char *s;
 147     int initrd_size = info->initrd_size;
 148     target_phys_addr_t base = info->loader_start;
 149
 150     /* see linux/include/asm-arm/setup.h */
 151     p = base + KERNEL_ARGS_ADDR;
 152     /* page_size */
 153     WRITE_WORD(p, 4096);
 154     /* nr_pages */
 155     WRITE_WORD(p, info->ram_size / 4096);
 156     /* ramdisk_size */
 157     WRITE_WORD(p, 0);
 158 #define FLAG_READONLY   1
 159 #define FLAG_RDLOAD     4
 160 #define FLAG_RDPROMPT   8
 161     /* flags */
 162     WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
 163     /* rootdev */
 164     WRITE_WORD(p, (31 << 8) | 0);       /* /dev/mtdblock0 */
 165     /* video_num_cols */
 166     WRITE_WORD(p, 0);
 167     /* video_num_rows */
 168     WRITE_WORD(p, 0);
 169     /* video_x */
 170     WRITE_WORD(p, 0);
 171     /* video_y */
 172     WRITE_WORD(p, 0);
 173     /* memc_control_reg */
 174     WRITE_WORD(p, 0);
 175     /* unsigned char sounddefault */
 176     /* unsigned char adfsdrives */
 177     /* unsigned char bytes_per_char_h */
 178     /* unsigned char bytes_per_char_v */
 179     WRITE_WORD(p, 0);
 180     /* pages_in_bank[4] */
 181     WRITE_WORD(p, 0);
 182     WRITE_WORD(p, 0);
 183     WRITE_WORD(p, 0);
 184     WRITE_WORD(p, 0);
 185     /* pages_in_vram */
 186     WRITE_WORD(p, 0);
 187     /* initrd_start */
 188     if (initrd_size)
 189         WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
 190     else
 191         WRITE_WORD(p, 0);
 192     /* initrd_size */
 193     WRITE_WORD(p, initrd_size);
 194     /* rd_start */
 195     WRITE_WORD(p, 0);
 196     /* system_rev */
 197     WRITE_WORD(p, 0);
 198     /* system_serial_low */
 199     WRITE_WORD(p, 0);
 200     /* system_serial_high */
 201     WRITE_WORD(p, 0);
 202     /* mem_fclk_21285 */
 203     WRITE_WORD(p, 0);
 204     /* zero unused fields */
 205     while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
 206         WRITE_WORD(p, 0);
 207     }
 208     s = info->kernel_cmdline;
 209     if (s) {
 210         cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
 211     } else {
 212         WRITE_WORD(p, 0);
 213     }
 214 }
 215
 216 static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
 217 {
 218 #ifdef CONFIG_FDT
 219     uint32_t mem_reg_property[] = { cpu_to_be32(binfo->loader_start),
 220                                     cpu_to_be32(binfo->ram_size) };
 221     void *fdt = NULL;
 222     char *filename;
 223     int size, rc;
 224
 225     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
 226     if (!filename) {
 227         fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
 228         return -1;
 229     }
 230
 231     fdt = load_device_tree(filename, &size);
 232     if (!fdt) {
 233         fprintf(stderr, "Couldn't open dtb file %s\n", filename);
 234         g_free(filename);
 235         return -1;
 236     }
 237     g_free(filename);
 238
 239     rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
 240                                sizeof(mem_reg_property));
 241     if (rc < 0) {
 242         fprintf(stderr, "couldn't set /memory/reg\n");
 243     }
 244
 245     if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
 246         rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 247                                           binfo->kernel_cmdline);
 248         if (rc < 0) {
 249             fprintf(stderr, "couldn't set /chosen/bootargs\n");
 250         }
 251     }
 252
 253     if (binfo->initrd_size) {
 254         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 255                 binfo->loader_start + INITRD_LOAD_ADDR);
 256         if (rc < 0) {
 257             fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 258         }
 259
 260         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 261                     binfo->loader_start + INITRD_LOAD_ADDR +
 262                     binfo->initrd_size);
 263         if (rc < 0) {
 264             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 265         }
 266     }
 267
 268     cpu_physical_memory_write(addr, fdt, size);
 269
 270     return 0;
 271
 272 #else
 273     fprintf(stderr, "Device tree requested, "
 274                 "but qemu was compiled without fdt support\n");
 275     return -1;
 276 #endif
 277 }
 278
 279 static void do_cpu_reset(void *opaque)
 280 {
 281     ARMCPU *cpu = opaque;
 282     CPUARMState *env = &cpu->env;
 283     const struct arm_boot_info *info = env->boot_info;
 284
 285     cpu_reset(CPU(cpu));
 286     if (info) {
 287         if (!info->is_linux) {
 288             /* Jump to the entry point.  */
 289             env->regs[15] = info->entry & 0xfffffffe;
 290             env->thumb = info->entry & 1;
 291         } else {
 292             if (env == first_cpu) {
 293                 env->regs[15] = info->loader_start;
 294                 if (!info->dtb_filename) {
 295                     if (old_param) {
 296                         set_kernel_args_old(info);
 297                     } else {
 298                         set_kernel_args(info);
 299                     }
 300                 }
 301             } else {
 302                 info->secondary_cpu_reset_hook(cpu, info);
 303             }
 304         }
 305     }
 306 }
 307
 308 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
 309 {
 310     CPUARMState *env = &cpu->env;
 311     int kernel_size;
 312     int initrd_size;
 313     int n;
 314     int is_linux = 0;
 315     uint64_t elf_entry;
 316     target_phys_addr_t entry;
 317     int big_endian;
 318     QemuOpts *machine_opts;
 319
 320     /* Load the kernel.  */
 321     if (!info->kernel_filename) {
 322         fprintf(stderr, "Kernel image must be specified\n");
 323         exit(1);
 324     }
 325
 326     machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
 327     if (machine_opts) {
 328         info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
 329     } else {
 330         info->dtb_filename = NULL;
 331     }
 332
 333     if (!info->secondary_cpu_reset_hook) {
 334         info->secondary_cpu_reset_hook = default_reset_secondary;
 335     }
 336     if (!info->write_secondary_boot) {
 337         info->write_secondary_boot = default_write_secondary;
 338     }
 339
 340     if (info->nb_cpus == 0)
 341         info->nb_cpus = 1;
 342
 343 #ifdef TARGET_WORDS_BIGENDIAN
 344     big_endian = 1;
 345 #else
 346     big_endian = 0;
 347 #endif
 348
 349     /* Assume that raw images are linux kernels, and ELF images are not.  */
 350     kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
 351                            NULL, NULL, big_endian, ELF_MACHINE, 1);
 352     entry = elf_entry;
 353     if (kernel_size < 0) {
 354         kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
 355                                   &is_linux);
 356     }
 357     if (kernel_size < 0) {
 358         entry = info->loader_start + KERNEL_LOAD_ADDR;
 359         kernel_size = load_image_targphys(info->kernel_filename, entry,
 360                                           ram_size - KERNEL_LOAD_ADDR);
 361         is_linux = 1;
 362     }
 363     if (kernel_size < 0) {
 364         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 365                 info->kernel_filename);
 366         exit(1);
 367     }
 368     info->entry = entry;
 369     if (is_linux) {
 370         if (info->initrd_filename) {
 371             initrd_size = load_image_targphys(info->initrd_filename,
 372                                               info->loader_start
 373                                               + INITRD_LOAD_ADDR,
 374                                               ram_size - INITRD_LOAD_ADDR);
 375             if (initrd_size < 0) {
 376                 fprintf(stderr, "qemu: could not load initrd '%s'\n",
 377                         info->initrd_filename);
 378                 exit(1);
 379             }
 380         } else {
 381             initrd_size = 0;
 382         }
 383         info->initrd_size = initrd_size;
 384
 385         bootloader[4] = info->board_id;
 386
 387         /* for device tree boot, we pass the DTB directly in r2. Otherwise
 388          * we point to the kernel args.
 389          */
 390         if (info->dtb_filename) {
 391             /* Place the DTB after the initrd in memory */
 392             target_phys_addr_t dtb_start = TARGET_PAGE_ALIGN(info->loader_start
 393                                                              + INITRD_LOAD_ADDR
 394                                                              + initrd_size);
 395             if (load_dtb(dtb_start, info)) {
 396                 exit(1);
 397             }
 398             bootloader[5] = dtb_start;
 399         } else {
 400             bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
 401         }
 402         bootloader[6] = entry;
 403         for (n = 0; n < sizeof(bootloader) / 4; n++) {
 404             bootloader[n] = tswap32(bootloader[n]);
 405         }
 406         rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
 407                            info->loader_start);
 408         if (info->nb_cpus > 1) {
 409             info->write_secondary_boot(cpu, info);
 410         }
 411     }
 412     info->is_linux = is_linux;
 413
 414     for (; env; env = env->next_cpu) {
 415         cpu = arm_env_get_cpu(env);
 416         env->boot_info = info;
 417         qemu_register_reset(do_cpu_reset, cpu);
 418     }
 419 }