2 * QEMU<->ACPI BIOS PCI hotplug interface
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
9 * Copyright (c) 2006 Fabrice Bellard
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "hw/acpi/pcihp.h"
30 #include "hw/i386/pc.h"
31 #include "hw/pci/pci.h"
32 #include "hw/acpi/acpi.h"
33 #include "sysemu/sysemu.h"
34 #include "qemu/range.h"
35 #include "exec/ioport.h"
36 #include "exec/address-spaces.h"
37 #include "hw/pci/pci_bus.h"
38 #include "qom/qom-qobject.h"
39 #include "qapi/qmp/qint.h"
44 # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
46 # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
49 #define PCI_HOTPLUG_ADDR 0xae00
50 #define PCI_HOTPLUG_SIZE 0x0014
51 #define PCI_UP_BASE 0xae00
52 #define PCI_DOWN_BASE 0xae04
53 #define PCI_EJ_BASE 0xae08
54 #define PCI_RMV_BASE 0xae0c
55 #define PCI_SEL_BASE 0xae10
57 typedef struct AcpiPciHpFind {
62 static int acpi_pcihp_get_bsel(PCIBus *bus)
64 QObject *o = object_property_get_qobject(OBJECT(bus),
65 ACPI_PCIHP_PROP_BSEL, NULL);
68 bsel = qint_get_int(qobject_to_qint(o));
76 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
78 AcpiPciHpFind *find = opaque;
79 if (find->bsel == acpi_pcihp_get_bsel(bus)) {
84 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
86 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
92 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
94 /* Make bsel 0 eject root bus if bsel property is not set,
95 * for compatibility with non acpi setups.
96 * TODO: really needed?
98 if (!bsel && !find.bus) {
104 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
106 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
108 * ACPI doesn't allow hotplug of bridge devices. Don't allow
109 * hot-unplug of bridge devices unless they were added by hotplug
110 * (and so, not described by acpi).
112 return (pc->is_bridge && !dev->qdev.hotplugged) || pc->no_hotplug;
115 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
117 BusChild *kid, *next;
118 int slot = ffs(slots) - 1;
119 bool slot_free = true;
120 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
126 /* Mark request as complete */
127 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
129 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
130 DeviceState *qdev = kid->child;
131 PCIDevice *dev = PCI_DEVICE(qdev);
132 if (PCI_SLOT(dev->devfn) == slot) {
133 if (acpi_pcihp_pc_no_hotplug(s, dev)) {
136 object_unparent(OBJECT(qdev));
141 s->acpi_pcihp_pci_status[bsel].device_present &= ~(1U << slot);
145 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
147 BusChild *kid, *next;
148 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
150 /* Execute any pending removes during reset */
151 while (s->acpi_pcihp_pci_status[bsel].down) {
152 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
155 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
156 s->acpi_pcihp_pci_status[bsel].device_present = 0;
161 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
162 DeviceState *qdev = kid->child;
163 PCIDevice *pdev = PCI_DEVICE(qdev);
164 int slot = PCI_SLOT(pdev->devfn);
166 if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
167 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
170 s->acpi_pcihp_pci_status[bsel].device_present |= (1U << slot);
174 static void acpi_pcihp_update(AcpiPciHpState *s)
178 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
179 acpi_pcihp_update_hotplug_bus(s, i);
183 void acpi_pcihp_reset(AcpiPciHpState *s)
185 acpi_pcihp_update(s);
188 static void enable_device(AcpiPciHpState *s, unsigned bsel, int slot)
190 s->acpi_pcihp_pci_status[bsel].device_present |= (1U << slot);
193 static void disable_device(AcpiPciHpState *s, unsigned bsel, int slot)
195 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
198 int acpi_pcihp_device_hotplug(AcpiPciHpState *s, PCIDevice *dev,
199 PCIHotplugState state)
201 int slot = PCI_SLOT(dev->devfn);
202 int bsel = acpi_pcihp_get_bsel(dev->bus);
207 /* Don't send event when device is enabled during qemu machine creation:
208 * it is present on boot, no hotplug event is necessary. We do send an
209 * event when the device is disabled later. */
210 if (state == PCI_COLDPLUG_ENABLED) {
211 s->acpi_pcihp_pci_status[bsel].device_present |= (1U << slot);
215 if (state == PCI_HOTPLUG_ENABLED) {
216 enable_device(s, bsel, slot);
218 disable_device(s, bsel, slot);
224 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
226 AcpiPciHpState *s = opaque;
228 int bsel = s->hotplug_select;
230 if (bsel < 0 || bsel > ACPI_PCIHP_MAX_HOTPLUG_BUS) {
235 case PCI_UP_BASE - PCI_HOTPLUG_ADDR:
236 /* Manufacture an "up" value to cause a device check on any hotplug
237 * slot with a device. Extra device checks are harmless. */
238 val = s->acpi_pcihp_pci_status[bsel].device_present &
239 s->acpi_pcihp_pci_status[bsel].hotplug_enable;
240 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
242 case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR:
243 val = s->acpi_pcihp_pci_status[bsel].down;
244 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
246 case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
247 /* No feature defined yet */
248 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
250 case PCI_RMV_BASE - PCI_HOTPLUG_ADDR:
251 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
252 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
254 case PCI_SEL_BASE - PCI_HOTPLUG_ADDR:
255 val = s->hotplug_select;
256 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
264 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
267 AcpiPciHpState *s = opaque;
269 case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
270 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
273 acpi_pcihp_eject_slot(s, s->hotplug_select, data);
274 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
277 case PCI_SEL_BASE - PCI_HOTPLUG_ADDR:
278 s->hotplug_select = data;
279 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
286 static const MemoryRegionOps acpi_pcihp_io_ops = {
289 .endianness = DEVICE_LITTLE_ENDIAN,
291 .min_access_size = 4,
292 .max_access_size = 4,
296 void acpi_pcihp_init(AcpiPciHpState *s, PCIBus *root_bus,
297 MemoryRegion *address_space_io)
300 memory_region_init_io(&s->io, NULL, &acpi_pcihp_io_ops, s,
303 memory_region_add_subregion(address_space_io, PCI_HOTPLUG_ADDR, &s->io);
306 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
307 .name = "acpi_pcihp_pci_status",
309 .minimum_version_id = 1,
310 .minimum_version_id_old = 1,
311 .fields = (VMStateField []) {
312 VMSTATE_UINT32(up, AcpiPciHpPciStatus),
313 VMSTATE_UINT32(down, AcpiPciHpPciStatus),
314 VMSTATE_END_OF_LIST()