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1 /*
2  * QEMU sPAPR IOMMU (TCE) code
3  *
4  * Copyright (c) 2010 David Gibson, IBM Corporation <[email protected]>
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #include "hw/hw.h"
20 #include "sysemu/kvm.h"
21 #include "hw/qdev.h"
22 #include "kvm_ppc.h"
23 #include "sysemu/dma.h"
24 #include "exec/address-spaces.h"
25 #include "trace.h"
26
27 #include "hw/ppc/spapr.h"
28
29 #include <libfdt.h>
30
31 enum sPAPRTCEAccess {
32     SPAPR_TCE_FAULT = 0,
33     SPAPR_TCE_RO = 1,
34     SPAPR_TCE_WO = 2,
35     SPAPR_TCE_RW = 3,
36 };
37
38 #define IOMMU_PAGE_SIZE(shift)      (1ULL << (shift))
39 #define IOMMU_PAGE_MASK(shift)      (~(IOMMU_PAGE_SIZE(shift) - 1))
40
41 static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables;
42
43 static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
44 {
45     sPAPRTCETable *tcet;
46
47     if (liobn & 0xFFFFFFFF00000000ULL) {
48         hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n",
49                       liobn);
50         return NULL;
51     }
52
53     QLIST_FOREACH(tcet, &spapr_tce_tables, list) {
54         if (tcet->liobn == liobn) {
55             return tcet;
56         }
57     }
58
59     return NULL;
60 }
61
62 static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
63 {
64     sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
65     uint64_t tce;
66     IOMMUTLBEntry ret = {
67         .target_as = &address_space_memory,
68         .iova = 0,
69         .translated_addr = 0,
70         .addr_mask = ~(hwaddr)0,
71         .perm = IOMMU_NONE,
72     };
73
74     if (tcet->bypass) {
75         ret.perm = IOMMU_RW;
76     } else if ((addr >> tcet->page_shift) < tcet->nb_table) {
77         /* Check if we are in bound */
78         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
79
80         tce = tcet->table[addr >> tcet->page_shift];
81         ret.iova = addr & page_mask;
82         ret.translated_addr = tce & page_mask;
83         ret.addr_mask = ~page_mask;
84         ret.perm = tce;
85     }
86     trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
87                             ret.addr_mask);
88
89     return ret;
90 }
91
92 static const VMStateDescription vmstate_spapr_tce_table = {
93     .name = "spapr_iommu",
94     .version_id = 2,
95     .minimum_version_id = 2,
96     .fields      = (VMStateField []) {
97         /* Sanity check */
98         VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
99         VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable),
100
101         /* IOMMU state */
102         VMSTATE_BOOL(bypass, sPAPRTCETable),
103         VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t),
104
105         VMSTATE_END_OF_LIST()
106     },
107 };
108
109 static MemoryRegionIOMMUOps spapr_iommu_ops = {
110     .translate = spapr_tce_translate_iommu,
111 };
112
113 static int spapr_tce_table_realize(DeviceState *dev)
114 {
115     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
116
117     if (kvm_enabled()) {
118         tcet->table = kvmppc_create_spapr_tce(tcet->liobn,
119                                               tcet->nb_table <<
120                                               tcet->page_shift,
121                                               &tcet->fd);
122     }
123
124     if (!tcet->table) {
125         size_t table_size = tcet->nb_table * sizeof(uint64_t);
126         tcet->table = g_malloc0(table_size);
127     }
128
129     trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
130
131     memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
132                              "iommu-spapr", ram_size);
133
134     QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
135
136     vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table,
137                      tcet);
138
139     return 0;
140 }
141
142 sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
143                                    uint64_t bus_offset,
144                                    uint32_t page_shift,
145                                    uint32_t nb_table)
146 {
147     sPAPRTCETable *tcet;
148
149     if (spapr_tce_find_by_liobn(liobn)) {
150         fprintf(stderr, "Attempted to create TCE table with duplicate"
151                 " LIOBN 0x%x\n", liobn);
152         return NULL;
153     }
154
155     if (!nb_table) {
156         return NULL;
157     }
158
159     tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE));
160     tcet->liobn = liobn;
161     tcet->bus_offset = bus_offset;
162     tcet->page_shift = page_shift;
163     tcet->nb_table = nb_table;
164
165     object_property_add_child(OBJECT(owner), "tce-table", OBJECT(tcet), NULL);
166
167     object_property_set_bool(OBJECT(tcet), true, "realized", NULL);
168
169     return tcet;
170 }
171
172 static void spapr_tce_table_finalize(Object *obj)
173 {
174     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(obj);
175
176     QLIST_REMOVE(tcet, list);
177
178     if (!kvm_enabled() ||
179         (kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
180                                  tcet->nb_table) != 0)) {
181         g_free(tcet->table);
182     }
183 }
184
185 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
186 {
187     return &tcet->iommu;
188 }
189
190 void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
191 {
192     tcet->bypass = bypass;
193 }
194
195 static void spapr_tce_reset(DeviceState *dev)
196 {
197     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
198     size_t table_size = tcet->nb_table * sizeof(uint64_t);
199
200     tcet->bypass = false;
201     memset(tcet->table, 0, table_size);
202 }
203
204 static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
205                                 target_ulong tce)
206 {
207     IOMMUTLBEntry entry;
208     hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
209     unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
210
211     if (index >= tcet->nb_table) {
212         hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
213                       TARGET_FMT_lx "\n", ioba);
214         return H_PARAMETER;
215     }
216
217     tcet->table[index] = tce;
218
219     entry.target_as = &address_space_memory,
220     entry.iova = ioba & page_mask;
221     entry.translated_addr = tce & page_mask;
222     entry.addr_mask = ~page_mask;
223     entry.perm = tce;
224     memory_region_notify_iommu(&tcet->iommu, entry);
225
226     return H_SUCCESS;
227 }
228
229 static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
230                                        sPAPREnvironment *spapr,
231                                        target_ulong opcode, target_ulong *args)
232 {
233     int i;
234     target_ulong liobn = args[0];
235     target_ulong ioba = args[1];
236     target_ulong ioba1 = ioba;
237     target_ulong tce_list = args[2];
238     target_ulong npages = args[3];
239     target_ulong ret = H_PARAMETER;
240     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
241     CPUState *cs = CPU(cpu);
242     hwaddr page_mask, page_size;
243
244     if (!tcet) {
245         return H_PARAMETER;
246     }
247
248     if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) {
249         return H_PARAMETER;
250     }
251
252     page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
253     page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
254     ioba &= page_mask;
255
256     for (i = 0; i < npages; ++i, ioba += page_size) {
257         target_ulong off = (tce_list & ~SPAPR_TCE_RW) +
258                                 i * sizeof(target_ulong);
259         target_ulong tce = ldq_phys(cs->as, off);
260
261         ret = put_tce_emu(tcet, ioba, tce);
262         if (ret) {
263             break;
264         }
265     }
266
267     /* Trace last successful or the first problematic entry */
268     i = i ? (i - 1) : 0;
269     trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i,
270                                ldq_phys(cs->as,
271                                tce_list + i * sizeof(target_ulong)),
272                                ret);
273
274     return ret;
275 }
276
277 static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
278                               target_ulong opcode, target_ulong *args)
279 {
280     int i;
281     target_ulong liobn = args[0];
282     target_ulong ioba = args[1];
283     target_ulong tce_value = args[2];
284     target_ulong npages = args[3];
285     target_ulong ret = H_PARAMETER;
286     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
287     hwaddr page_mask, page_size;
288
289     if (!tcet) {
290         return H_PARAMETER;
291     }
292
293     if (npages > tcet->nb_table) {
294         return H_PARAMETER;
295     }
296
297     page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
298     page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
299     ioba &= page_mask;
300
301     for (i = 0; i < npages; ++i, ioba += page_size) {
302         ret = put_tce_emu(tcet, ioba, tce_value);
303         if (ret) {
304             break;
305         }
306     }
307     trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
308
309     return ret;
310 }
311
312 static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
313                               target_ulong opcode, target_ulong *args)
314 {
315     target_ulong liobn = args[0];
316     target_ulong ioba = args[1];
317     target_ulong tce = args[2];
318     target_ulong ret = H_PARAMETER;
319     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
320
321     if (tcet) {
322         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
323
324         ioba &= page_mask;
325
326         ret = put_tce_emu(tcet, ioba, tce);
327     }
328     trace_spapr_iommu_put(liobn, ioba, tce, ret);
329
330     return ret;
331 }
332
333 static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
334                                 target_ulong *tce)
335 {
336     unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
337
338     if (index >= tcet->nb_table) {
339         hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
340                       TARGET_FMT_lx "\n", ioba);
341         return H_PARAMETER;
342     }
343
344     *tce = tcet->table[index];
345
346     return H_SUCCESS;
347 }
348
349 static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
350                               target_ulong opcode, target_ulong *args)
351 {
352     target_ulong liobn = args[0];
353     target_ulong ioba = args[1];
354     target_ulong tce = 0;
355     target_ulong ret = H_PARAMETER;
356     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
357
358     if (tcet) {
359         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
360
361         ioba &= page_mask;
362
363         ret = get_tce_emu(tcet, ioba, &tce);
364         if (!ret) {
365             args[0] = tce;
366         }
367     }
368     trace_spapr_iommu_get(liobn, ioba, ret, tce);
369
370     return ret;
371 }
372
373 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
374                  uint32_t liobn, uint64_t window, uint32_t size)
375 {
376     uint32_t dma_prop[5];
377     int ret;
378
379     dma_prop[0] = cpu_to_be32(liobn);
380     dma_prop[1] = cpu_to_be32(window >> 32);
381     dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
382     dma_prop[3] = 0; /* window size is 32 bits */
383     dma_prop[4] = cpu_to_be32(size);
384
385     ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
386     if (ret < 0) {
387         return ret;
388     }
389
390     ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
391     if (ret < 0) {
392         return ret;
393     }
394
395     ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
396     if (ret < 0) {
397         return ret;
398     }
399
400     return 0;
401 }
402
403 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
404                       sPAPRTCETable *tcet)
405 {
406     if (!tcet) {
407         return 0;
408     }
409
410     return spapr_dma_dt(fdt, node_off, propname,
411                         tcet->liobn, 0, tcet->nb_table << tcet->page_shift);
412 }
413
414 static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
415 {
416     DeviceClass *dc = DEVICE_CLASS(klass);
417     dc->init = spapr_tce_table_realize;
418     dc->reset = spapr_tce_reset;
419
420     QLIST_INIT(&spapr_tce_tables);
421
422     /* hcall-tce */
423     spapr_register_hypercall(H_PUT_TCE, h_put_tce);
424     spapr_register_hypercall(H_GET_TCE, h_get_tce);
425     spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect);
426     spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce);
427 }
428
429 static TypeInfo spapr_tce_table_info = {
430     .name = TYPE_SPAPR_TCE_TABLE,
431     .parent = TYPE_DEVICE,
432     .instance_size = sizeof(sPAPRTCETable),
433     .class_init = spapr_tce_table_class_init,
434     .instance_finalize = spapr_tce_table_finalize,
435 };
436
437 static void register_types(void)
438 {
439     type_register_static(&spapr_tce_table_info);
440 }
441
442 type_init(register_types);
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