3 # tool for querying VMX capabilities
5 # Copyright 2009-2010 Red Hat, Inc.
10 # This work is licensed under the terms of the GNU GPL, version 2. See
11 # the COPYING file in the top-level directory.
13 MSR_IA32_VMX_BASIC = 0x480
14 MSR_IA32_VMX_PINBASED_CTLS = 0x481
15 MSR_IA32_VMX_PROCBASED_CTLS = 0x482
16 MSR_IA32_VMX_EXIT_CTLS = 0x483
17 MSR_IA32_VMX_ENTRY_CTLS = 0x484
18 MSR_IA32_VMX_MISC_CTLS = 0x485
19 MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
20 MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
21 MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
22 MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
23 MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
24 MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
25 MSR_IA32_VMX_VMFUNC = 0x491
30 self.f = open('/dev/cpu/0/msr', 'r', 0)
32 self.f = open('/dev/msr0', 'r', 0)
33 def read(self, index, default = None):
37 return struct.unpack('Q', self.f.read(8))[0]
41 class Control(object):
42 def __init__(self, name, bits, cap_msr, true_cap_msr = None):
45 self.cap_msr = cap_msr
46 self.true_cap_msr = true_cap_msr
50 return (val & 0xffffffff, val >> 32)
53 mbz, mb1 = self.read2(self.cap_msr)
56 tmbz, tmb1 = self.read2(self.true_cap_msr)
57 for bit in sorted(self.bits.keys()):
58 zero = not (mbz & (1 << bit))
59 one = mb1 & (1 << bit)
60 true_zero = not (tmbz & (1 << bit))
61 true_one = tmb1 & (1 << bit)
63 if (self.true_cap_msr and true_zero and true_one
64 and one and not zero):
66 elif zero and not one:
68 elif one and not zero:
72 print ' %-40s %s' % (self.bits[bit], s)
75 def __init__(self, name, bits, msr):
81 value = msr().read(self.msr, 0)
83 if type(key) is tuple:
87 for bits in sorted(self.bits.keys(), key = first_bit):
88 if type(bits) is tuple:
94 return { True: 'yes', False: 'no' }[x]
95 v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
96 print ' %-40s %s' % (self.bits[bits], fmt(v))
100 name = 'Basic VMX Information',
103 (32,44): 'VMCS size',
104 48: 'VMCS restricted to 32 bit addresses',
105 49: 'Dual-monitor support',
106 (50, 53): 'VMCS memory type',
107 54: 'INS/OUTS instruction information',
108 55: 'IA32_VMX_TRUE_*_CTLS support',
110 msr = MSR_IA32_VMX_BASIC,
113 name = 'pin-based controls',
115 0: 'External interrupt exiting',
118 6: 'Activate VMX-preemption timer',
119 7: 'Process posted interrupts',
121 cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
122 true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
126 name = 'primary processor-based controls',
128 2: 'Interrupt window exiting',
129 3: 'Use TSC offsetting',
135 15: 'CR3-load exiting',
136 16: 'CR3-store exiting',
137 19: 'CR8-load exiting',
138 20: 'CR8-store exiting',
139 21: 'Use TPR shadow',
140 22: 'NMI-window exiting',
141 23: 'MOV-DR exiting',
142 24: 'Unconditional I/O exiting',
143 25: 'Use I/O bitmaps',
144 27: 'Monitor trap flag',
145 28: 'Use MSR bitmaps',
146 29: 'MONITOR exiting',
148 31: 'Activate secondary control',
150 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
151 true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
155 name = 'secondary processor-based controls',
157 0: 'Virtualize APIC accesses',
159 2: 'Descriptor-table exiting',
161 4: 'Virtualize x2APIC mode',
164 7: 'Unrestricted guest',
165 8: 'APIC register emulation',
166 9: 'Virtual interrupt delivery',
167 10: 'PAUSE-loop exiting',
168 11: 'RDRAND exiting',
169 12: 'Enable INVPCID',
170 13: 'Enable VM functions',
171 14: 'VMCS shadowing',
172 18: 'EPT-violation #VE'
174 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
178 name = 'VM-Exit controls',
180 2: 'Save debug controls',
181 9: 'Host address-space size',
182 12: 'Load IA32_PERF_GLOBAL_CTRL',
183 15: 'Acknowledge interrupt on exit',
186 20: 'Save IA32_EFER',
187 21: 'Load IA32_EFER',
188 22: 'Save VMX-preemption timer value',
190 cap_msr = MSR_IA32_VMX_EXIT_CTLS,
191 true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
195 name = 'VM-Entry controls',
197 2: 'Load debug controls',
198 9: 'IA-64 mode guest',
200 11: 'Deactivate dual-monitor treatment',
201 13: 'Load IA32_PERF_GLOBAL_CTRL',
203 15: 'Load IA32_EFER',
205 cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
206 true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
210 name = 'Miscellaneous data',
212 (0,4): 'VMX-preemption timer scale (log2)',
213 5: 'Store EFER.LMA into IA-32e mode guest control',
214 6: 'HLT activity state',
215 7: 'Shutdown activity state',
216 8: 'Wait-for-SIPI activity state',
217 15: 'IA32_SMBASE support',
218 (16,24): 'Number of CR3-target values',
219 (25,27): 'MSR-load/store count recommenation',
220 28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
221 29: 'VMWRITE to VM-exit information fields',
222 (32,63): 'MSEG revision identifier',
224 msr = MSR_IA32_VMX_MISC_CTLS,
228 name = 'VPID and EPT capabilities',
230 0: 'Execute-only EPT translations',
231 6: 'Page-walk length 4',
232 8: 'Paging-structure memory type UC',
233 14: 'Paging-structure memory type WB',
236 20: 'INVEPT supported',
237 21: 'EPT accessed and dirty flags',
238 25: 'Single-context INVEPT',
239 26: 'All-context INVEPT',
240 32: 'INVVPID supported',
241 40: 'Individual-address INVVPID',
242 41: 'Single-context INVVPID',
243 42: 'All-context INVVPID',
244 43: 'Single-context-retaining-globals INVVPID',
246 msr = MSR_IA32_VMX_EPT_VPID_CAP,
249 name = 'VM Functions',
253 msr = MSR_IA32_VMX_VMFUNC,