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osdep: protect qemu/osdep.h with extern "C"
[qemu.git] / hw / misc / puv3_pm.c
1 /*
2  * Power Management device simulation in PKUnity SoC
3  *
4  * Copyright (C) 2010-2012 Guan Xuetao
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation, or any later version.
9  * See the COPYING file in the top-level directory.
10  */
11
12 #include "qemu/osdep.h"
13 #include "hw/sysbus.h"
14 #include "qom/object.h"
15
16 #undef DEBUG_PUV3
17 #include "hw/unicore32/puv3.h"
18 #include "qemu/module.h"
19 #include "qemu/log.h"
20
21 #define TYPE_PUV3_PM "puv3_pm"
22 OBJECT_DECLARE_SIMPLE_TYPE(PUV3PMState, PUV3_PM)
23
24 struct PUV3PMState {
25     SysBusDevice parent_obj;
26
27     MemoryRegion iomem;
28
29     uint32_t reg_PMCR;
30     uint32_t reg_PCGR;
31     uint32_t reg_PLL_SYS_CFG;
32     uint32_t reg_PLL_DDR_CFG;
33     uint32_t reg_PLL_VGA_CFG;
34     uint32_t reg_DIVCFG;
35 };
36
37 static uint64_t puv3_pm_read(void *opaque, hwaddr offset,
38         unsigned size)
39 {
40     PUV3PMState *s = opaque;
41     uint32_t ret = 0;
42
43     switch (offset) {
44     case 0x14:
45         ret = s->reg_PCGR;
46         break;
47     case 0x18:
48         ret = s->reg_PLL_SYS_CFG;
49         break;
50     case 0x1c:
51         ret = s->reg_PLL_DDR_CFG;
52         break;
53     case 0x20:
54         ret = s->reg_PLL_VGA_CFG;
55         break;
56     case 0x24:
57         ret = s->reg_DIVCFG;
58         break;
59     case 0x28: /* PLL SYS STATUS */
60         ret = 0x00002401;
61         break;
62     case 0x2c: /* PLL DDR STATUS */
63         ret = 0x00100c00;
64         break;
65     case 0x30: /* PLL VGA STATUS */
66         ret = 0x00003801;
67         break;
68     case 0x34: /* DIV STATUS */
69         ret = 0x22f52015;
70         break;
71     case 0x38: /* SW RESET */
72         ret = 0x0;
73         break;
74     case 0x44: /* PLL DFC DONE */
75         ret = 0x7;
76         break;
77     default:
78         qemu_log_mask(LOG_GUEST_ERROR,
79                       "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
80                       __func__, offset);
81     }
82     DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
83
84     return ret;
85 }
86
87 static void puv3_pm_write(void *opaque, hwaddr offset,
88         uint64_t value, unsigned size)
89 {
90     PUV3PMState *s = opaque;
91
92     switch (offset) {
93     case 0x0:
94         s->reg_PMCR = value;
95         break;
96     case 0x14:
97         s->reg_PCGR = value;
98         break;
99     case 0x18:
100         s->reg_PLL_SYS_CFG = value;
101         break;
102     case 0x1c:
103         s->reg_PLL_DDR_CFG = value;
104         break;
105     case 0x20:
106         s->reg_PLL_VGA_CFG = value;
107         break;
108     case 0x24:
109     case 0x38:
110         break;
111     default:
112         qemu_log_mask(LOG_GUEST_ERROR,
113                       "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
114                       __func__, offset);
115     }
116     DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
117 }
118
119 static const MemoryRegionOps puv3_pm_ops = {
120     .read = puv3_pm_read,
121     .write = puv3_pm_write,
122     .impl = {
123         .min_access_size = 4,
124         .max_access_size = 4,
125     },
126     .endianness = DEVICE_NATIVE_ENDIAN,
127 };
128
129 static void puv3_pm_realize(DeviceState *dev, Error **errp)
130 {
131     PUV3PMState *s = PUV3_PM(dev);
132
133     s->reg_PCGR = 0x0;
134
135     memory_region_init_io(&s->iomem, OBJECT(s), &puv3_pm_ops, s, "puv3_pm",
136             PUV3_REGS_OFFSET);
137     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
138 }
139
140 static void puv3_pm_class_init(ObjectClass *klass, void *data)
141 {
142     DeviceClass *dc = DEVICE_CLASS(klass);
143
144     dc->realize = puv3_pm_realize;
145 }
146
147 static const TypeInfo puv3_pm_info = {
148     .name = TYPE_PUV3_PM,
149     .parent = TYPE_SYS_BUS_DEVICE,
150     .instance_size = sizeof(PUV3PMState),
151     .class_init = puv3_pm_class_init,
152 };
153
154 static void puv3_pm_register_type(void)
155 {
156     type_register_static(&puv3_pm_info);
157 }
158
159 type_init(puv3_pm_register_type)
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