2 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 /* The controller can support a variety of different displays, but we only
11 implement one. Most of the commends relating to brightness and geometry
14 #include "qemu/osdep.h"
15 #include "hw/ssi/ssi.h"
16 #include "migration/vmstate.h"
17 #include "qemu/module.h"
18 #include "ui/console.h"
19 #include "qom/object.h"
21 //#define DEBUG_SSD0323 1
24 #define DPRINTF(fmt, ...) \
25 do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
26 #define BADF(fmt, ...) \
28 fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
31 #define DPRINTF(fmt, ...) do {} while(0)
32 #define BADF(fmt, ...) \
33 do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
36 /* Scaling factor for pixels. */
39 #define REMAP_SWAP_COLUMN 0x01
40 #define REMAP_SWAP_NYBBLE 0x02
41 #define REMAP_VERTICAL 0x04
42 #define REMAP_SWAP_COM 0x10
43 #define REMAP_SPLIT_COM 0x40
51 struct ssd0323_state {
67 uint8_t framebuffer[128 * 80 / 2];
70 #define TYPE_SSD0323 "ssd0323"
71 OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
74 static uint32_t ssd0323_transfer(SSIPeripheral *dev, uint32_t data)
76 ssd0323_state *s = SSD0323(dev);
80 DPRINTF("data 0x%02x\n", data);
81 s->framebuffer[s->col + s->row * 64] = data;
82 if (s->remap & REMAP_VERTICAL) {
84 if (s->row > s->row_end) {
85 s->row = s->row_start;
88 if (s->col > s->col_end) {
89 s->col = s->col_start;
93 if (s->col > s->col_end) {
95 s->col = s->col_start;
97 if (s->row > s->row_end) {
98 s->row = s->row_start;
104 DPRINTF("cmd 0x%02x\n", data);
105 if (s->cmd_len == 0) {
108 s->cmd_data[s->cmd_len - 1] = data;
112 #define DATA(x) if (s->cmd_len <= (x)) return 0
113 case 0x15: /* Set column. */
115 s->col = s->col_start = s->cmd_data[0] % 64;
116 s->col_end = s->cmd_data[1] % 64;
118 case 0x75: /* Set row. */
120 s->row = s->row_start = s->cmd_data[0] % 80;
121 s->row_end = s->cmd_data[1] % 80;
123 case 0x81: /* Set contrast */
126 case 0x84: case 0x85: case 0x86: /* Max current. */
129 case 0xa0: /* Set remapping. */
130 /* FIXME: Implement this. */
132 s->remap = s->cmd_data[0];
134 case 0xa1: /* Set display start line. */
135 case 0xa2: /* Set display offset. */
136 /* FIXME: Implement these. */
139 case 0xa4: /* Normal mode. */
140 case 0xa5: /* All on. */
141 case 0xa6: /* All off. */
142 case 0xa7: /* Inverse. */
143 /* FIXME: Implement these. */
146 case 0xa8: /* Set multiplex ratio. */
147 case 0xad: /* Set DC-DC converter. */
149 /* Ignored. Don't care. */
151 case 0xae: /* Display off. */
152 case 0xaf: /* Display on. */
154 /* TODO: Implement power control. */
156 case 0xb1: /* Set phase length. */
157 case 0xb2: /* Set row period. */
158 case 0xb3: /* Set clock rate. */
159 case 0xbc: /* Set precharge. */
160 case 0xbe: /* Set VCOMH. */
161 case 0xbf: /* Set segment low. */
163 /* Ignored. Don't care. */
165 case 0xb8: /* Set grey scale table. */
166 /* FIXME: Implement this. */
169 case 0xe3: /* NOP. */
172 case 0xff: /* Nasty hack because we don't handle chip selects
176 BADF("Unknown command: 0x%x\n", data);
184 static void ssd0323_update_display(void *opaque)
186 ssd0323_state *s = (ssd0323_state *)opaque;
187 DisplaySurface *surface = qemu_console_surface(s->con);
195 char colortab[MAGNIFY * 64];
202 switch (surface_bits_per_pixel(surface)) {
218 BADF("Bad color depth\n");
222 for (i = 0; i < 16; i++) {
225 switch (surface_bits_per_pixel(surface)) {
227 n = i * 2 + (i >> 3);
229 p[1] = (n << 2) | (n >> 3);
232 n = i * 2 + (i >> 3);
233 p[0] = n | (n << 6) | ((n << 1) & 0x20);
234 p[1] = (n << 3) | (n >> 2);
239 p[0] = p[1] = p[2] = n;
242 BADF("Bad color depth\n");
247 /* TODO: Implement row/column remapping. */
248 dest = surface_data(surface);
249 for (y = 0; y < 64; y++) {
251 src = s->framebuffer + 64 * line;
252 for (x = 0; x < 64; x++) {
255 for (i = 0; i < MAGNIFY; i++) {
256 memcpy(dest, colors[val], dest_width);
260 for (i = 0; i < MAGNIFY; i++) {
261 memcpy(dest, colors[val], dest_width);
266 for (i = 1; i < MAGNIFY; i++) {
267 memcpy(dest, dest - dest_width * MAGNIFY * 128,
268 dest_width * 128 * MAGNIFY);
269 dest += dest_width * 128 * MAGNIFY;
273 dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
276 static void ssd0323_invalidate_display(void * opaque)
278 ssd0323_state *s = (ssd0323_state *)opaque;
282 /* Command/data input. */
283 static void ssd0323_cd(void *opaque, int n, int level)
285 ssd0323_state *s = (ssd0323_state *)opaque;
286 DPRINTF("%s mode\n", level ? "Data" : "Command");
287 s->mode = level ? SSD0323_DATA : SSD0323_CMD;
290 static int ssd0323_post_load(void *opaque, int version_id)
292 ssd0323_state *s = (ssd0323_state *)opaque;
294 if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
297 if (s->row < 0 || s->row >= 80) {
300 if (s->row_start < 0 || s->row_start >= 80) {
303 if (s->row_end < 0 || s->row_end >= 80) {
306 if (s->col < 0 || s->col >= 64) {
309 if (s->col_start < 0 || s->col_start >= 64) {
312 if (s->col_end < 0 || s->col_end >= 64) {
315 if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
322 static const VMStateDescription vmstate_ssd0323 = {
323 .name = "ssd0323_oled",
325 .minimum_version_id = 2,
326 .post_load = ssd0323_post_load,
327 .fields = (VMStateField []) {
328 VMSTATE_UINT32(cmd_len, ssd0323_state),
329 VMSTATE_INT32(cmd, ssd0323_state),
330 VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
331 VMSTATE_INT32(row, ssd0323_state),
332 VMSTATE_INT32(row_start, ssd0323_state),
333 VMSTATE_INT32(row_end, ssd0323_state),
334 VMSTATE_INT32(col, ssd0323_state),
335 VMSTATE_INT32(col_start, ssd0323_state),
336 VMSTATE_INT32(col_end, ssd0323_state),
337 VMSTATE_INT32(redraw, ssd0323_state),
338 VMSTATE_INT32(remap, ssd0323_state),
339 VMSTATE_UINT32(mode, ssd0323_state),
340 VMSTATE_BUFFER(framebuffer, ssd0323_state),
341 VMSTATE_SSI_PERIPHERAL(ssidev, ssd0323_state),
342 VMSTATE_END_OF_LIST()
346 static const GraphicHwOps ssd0323_ops = {
347 .invalidate = ssd0323_invalidate_display,
348 .gfx_update = ssd0323_update_display,
351 static void ssd0323_realize(SSIPeripheral *d, Error **errp)
353 DeviceState *dev = DEVICE(d);
354 ssd0323_state *s = SSD0323(d);
358 s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
359 qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
361 qdev_init_gpio_in(dev, ssd0323_cd, 1);
364 static void ssd0323_class_init(ObjectClass *klass, void *data)
366 DeviceClass *dc = DEVICE_CLASS(klass);
367 SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
369 k->realize = ssd0323_realize;
370 k->transfer = ssd0323_transfer;
371 k->cs_polarity = SSI_CS_HIGH;
372 dc->vmsd = &vmstate_ssd0323;
373 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
376 static const TypeInfo ssd0323_info = {
377 .name = TYPE_SSD0323,
378 .parent = TYPE_SSI_PERIPHERAL,
379 .instance_size = sizeof(ssd0323_state),
380 .class_init = ssd0323_class_init,
383 static void ssd03232_register_types(void)
385 type_register_static(&ssd0323_info);
388 type_init(ssd03232_register_types)