2 * QEMU model of the Milkymist SD Card Controller.
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Specification available at:
21 * http://milkymist.walle.cc/socdoc/memcard.pdf
24 #include "qemu/osdep.h"
27 #include "hw/sysbus.h"
28 #include "sysemu/sysemu.h"
30 #include "include/qapi/error.h"
31 #include "sysemu/block-backend.h"
32 #include "sysemu/blockdev.h"
36 ENABLE_CMD_TX = (1<<0),
37 ENABLE_CMD_RX = (1<<1),
38 ENABLE_DAT_TX = (1<<2),
39 ENABLE_DAT_RX = (1<<3),
43 PENDING_CMD_TX = (1<<0),
44 PENDING_CMD_RX = (1<<1),
45 PENDING_DAT_TX = (1<<2),
46 PENDING_DAT_RX = (1<<3),
50 START_CMD_TX = (1<<0),
51 START_DAT_RX = (1<<1),
64 #define TYPE_MILKYMIST_MEMCARD "milkymist-memcard"
65 #define MILKYMIST_MEMCARD(obj) \
66 OBJECT_CHECK(MilkymistMemcardState, (obj), TYPE_MILKYMIST_MEMCARD)
68 struct MilkymistMemcardState {
69 SysBusDevice parent_obj;
71 MemoryRegion regs_region;
74 int command_write_ptr;
75 int response_read_ptr;
83 typedef struct MilkymistMemcardState MilkymistMemcardState;
85 static void update_pending_bits(MilkymistMemcardState *s)
87 /* transmits are instantaneous, thus tx pending bits are never set */
88 s->regs[R_PENDING] = 0;
89 /* if rx is enabled the corresponding pending bits are always set */
90 if (s->regs[R_ENABLE] & ENABLE_CMD_RX) {
91 s->regs[R_PENDING] |= PENDING_CMD_RX;
93 if (s->regs[R_ENABLE] & ENABLE_DAT_RX) {
94 s->regs[R_PENDING] |= PENDING_DAT_RX;
98 static void memcard_sd_command(MilkymistMemcardState *s)
102 req.cmd = s->command[0] & 0x3f;
103 req.arg = (s->command[1] << 24) | (s->command[2] << 16)
104 | (s->command[3] << 8) | s->command[4];
105 req.crc = s->command[5];
107 s->response[0] = req.cmd;
108 s->response_len = sd_do_command(s->card, &req, s->response+1);
109 s->response_read_ptr = 0;
111 if (s->response_len == 16) {
113 s->response[0] = 0x3f;
114 s->response_len += 1;
115 } else if (s->response_len == 4) {
116 /* no crc calculation, insert dummy byte */
118 s->response_len += 2;
122 /* next write is a dummy byte to clock the initialization of the sd
124 s->ignore_next_cmd = 1;
128 static uint64_t memcard_read(void *opaque, hwaddr addr,
131 MilkymistMemcardState *s = opaque;
140 r = s->response[s->response_read_ptr++];
141 if (s->response_read_ptr > s->response_len) {
142 qemu_log_mask(LOG_GUEST_ERROR, "milkymist_memcard: "
143 "read more cmd bytes than available. Clipping.");
144 s->response_read_ptr = 0;
153 r |= sd_read_data(s->card) << 24;
154 r |= sd_read_data(s->card) << 16;
155 r |= sd_read_data(s->card) << 8;
156 r |= sd_read_data(s->card);
167 qemu_log_mask(LOG_UNIMP, "milkymist_memcard: "
168 "read access to unknown register 0x%" HWADDR_PRIx "\n",
173 trace_milkymist_memcard_memory_read(addr << 2, r);
178 static void memcard_write(void *opaque, hwaddr addr, uint64_t value,
181 MilkymistMemcardState *s = opaque;
183 trace_milkymist_memcard_memory_write(addr, value);
188 /* clear rx pending bits */
189 s->regs[R_PENDING] &= ~(value & (PENDING_CMD_RX | PENDING_DAT_RX));
190 update_pending_bits(s);
196 if (s->ignore_next_cmd) {
197 s->ignore_next_cmd = 0;
200 s->command[s->command_write_ptr] = value & 0xff;
201 s->command_write_ptr = (s->command_write_ptr + 1) % 6;
202 if (s->command_write_ptr == 0) {
203 memcard_sd_command(s);
210 sd_write_data(s->card, (value >> 24) & 0xff);
211 sd_write_data(s->card, (value >> 16) & 0xff);
212 sd_write_data(s->card, (value >> 8) & 0xff);
213 sd_write_data(s->card, value & 0xff);
216 s->regs[addr] = value;
217 update_pending_bits(s);
221 s->regs[addr] = value;
225 qemu_log_mask(LOG_UNIMP, "milkymist_memcard: "
226 "write access to unknown register 0x%" HWADDR_PRIx " "
227 "(value 0x%" PRIx64 ")\n", addr << 2, value);
232 static const MemoryRegionOps memcard_mmio_ops = {
233 .read = memcard_read,
234 .write = memcard_write,
236 .min_access_size = 4,
237 .max_access_size = 4,
239 .endianness = DEVICE_NATIVE_ENDIAN,
242 static void milkymist_memcard_reset(DeviceState *d)
244 MilkymistMemcardState *s = MILKYMIST_MEMCARD(d);
247 s->command_write_ptr = 0;
248 s->response_read_ptr = 0;
251 for (i = 0; i < R_MAX; i++) {
254 /* Since we're still using the legacy SD API the card is not plugged
255 * into any bus, and we must reset it manually.
257 device_reset(DEVICE(s->card));
260 static void milkymist_memcard_init(Object *obj)
262 MilkymistMemcardState *s = MILKYMIST_MEMCARD(obj);
263 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
265 memory_region_init_io(&s->regs_region, OBJECT(s), &memcard_mmio_ops, s,
266 "milkymist-memcard", R_MAX * 4);
267 sysbus_init_mmio(dev, &s->regs_region);
270 static void milkymist_memcard_realize(DeviceState *dev, Error **errp)
272 MilkymistMemcardState *s = MILKYMIST_MEMCARD(dev);
276 /* FIXME use a qdev drive property instead of drive_get_next() */
277 dinfo = drive_get_next(IF_SD);
278 blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
279 s->card = sd_init(blk, false);
280 if (s->card == NULL) {
281 error_setg(errp, "failed to init SD card");
284 s->enabled = blk && blk_is_inserted(blk);
287 static const VMStateDescription vmstate_milkymist_memcard = {
288 .name = "milkymist-memcard",
290 .minimum_version_id = 1,
291 .fields = (VMStateField[]) {
292 VMSTATE_INT32(command_write_ptr, MilkymistMemcardState),
293 VMSTATE_INT32(response_read_ptr, MilkymistMemcardState),
294 VMSTATE_INT32(response_len, MilkymistMemcardState),
295 VMSTATE_INT32(ignore_next_cmd, MilkymistMemcardState),
296 VMSTATE_INT32(enabled, MilkymistMemcardState),
297 VMSTATE_UINT8_ARRAY(command, MilkymistMemcardState, 6),
298 VMSTATE_UINT8_ARRAY(response, MilkymistMemcardState, 17),
299 VMSTATE_UINT32_ARRAY(regs, MilkymistMemcardState, R_MAX),
300 VMSTATE_END_OF_LIST()
304 static void milkymist_memcard_class_init(ObjectClass *klass, void *data)
306 DeviceClass *dc = DEVICE_CLASS(klass);
308 dc->realize = milkymist_memcard_realize;
309 dc->reset = milkymist_memcard_reset;
310 dc->vmsd = &vmstate_milkymist_memcard;
311 /* Reason: init() method uses drive_get_next() */
312 dc->user_creatable = false;
315 static const TypeInfo milkymist_memcard_info = {
316 .name = TYPE_MILKYMIST_MEMCARD,
317 .parent = TYPE_SYS_BUS_DEVICE,
318 .instance_size = sizeof(MilkymistMemcardState),
319 .instance_init = milkymist_memcard_init,
320 .class_init = milkymist_memcard_class_init,
323 static void milkymist_memcard_register_types(void)
325 type_register_static(&milkymist_memcard_info);
328 type_init(milkymist_memcard_register_types)