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target/mips: Unroll loops for MSA float max/min instructions
[qemu.git] / target / lm32 / op_helper.c
1 #include "qemu/osdep.h"
2 #include "cpu.h"
3 #include "exec/helper-proto.h"
4 #include "qemu/host-utils.h"
5
6 #include "hw/lm32/lm32_pic.h"
7 #include "hw/char/lm32_juart.h"
8
9 #include "exec/exec-all.h"
10 #include "exec/cpu_ldst.h"
11
12 #ifndef CONFIG_USER_ONLY
13 #include "sysemu/sysemu.h"
14 #endif
15
16 #if !defined(CONFIG_USER_ONLY)
17 void raise_exception(CPULM32State *env, int index)
18 {
19     CPUState *cs = env_cpu(env);
20
21     cs->exception_index = index;
22     cpu_loop_exit(cs);
23 }
24
25 void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
26 {
27     raise_exception(env, index);
28 }
29
30 void HELPER(hlt)(CPULM32State *env)
31 {
32     CPUState *cs = env_cpu(env);
33
34     cs->halted = 1;
35     cs->exception_index = EXCP_HLT;
36     cpu_loop_exit(cs);
37 }
38
39 void HELPER(ill)(CPULM32State *env)
40 {
41 #ifndef CONFIG_USER_ONLY
42     CPUState *cs = env_cpu(env);
43     fprintf(stderr, "VM paused due to illegal instruction. "
44             "Connect a debugger or switch to the monitor console "
45             "to find out more.\n");
46     vm_stop(RUN_STATE_PAUSED);
47     cs->halted = 1;
48     raise_exception(env, EXCP_HALTED);
49 #endif
50 }
51
52 void HELPER(wcsr_bp)(CPULM32State *env, uint32_t bp, uint32_t idx)
53 {
54     uint32_t addr = bp & ~1;
55
56     assert(idx < 4);
57
58     env->bp[idx] = bp;
59     lm32_breakpoint_remove(env, idx);
60     if (bp & 1) {
61         lm32_breakpoint_insert(env, idx, addr);
62     }
63 }
64
65 void HELPER(wcsr_wp)(CPULM32State *env, uint32_t wp, uint32_t idx)
66 {
67     lm32_wp_t wp_type;
68
69     assert(idx < 4);
70
71     env->wp[idx] = wp;
72
73     wp_type = lm32_wp_type(env->dc, idx);
74     lm32_watchpoint_remove(env, idx);
75     if (wp_type != LM32_WP_DISABLED) {
76         lm32_watchpoint_insert(env, idx, wp, wp_type);
77     }
78 }
79
80 void HELPER(wcsr_dc)(CPULM32State *env, uint32_t dc)
81 {
82     uint32_t old_dc;
83     int i;
84     lm32_wp_t old_type;
85     lm32_wp_t new_type;
86
87     old_dc = env->dc;
88     env->dc = dc;
89
90     for (i = 0; i < 4; i++) {
91         old_type = lm32_wp_type(old_dc, i);
92         new_type = lm32_wp_type(dc, i);
93
94         if (old_type != new_type) {
95             lm32_watchpoint_remove(env, i);
96             if (new_type != LM32_WP_DISABLED) {
97                 lm32_watchpoint_insert(env, i, env->wp[i], new_type);
98             }
99         }
100     }
101 }
102
103 void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
104 {
105     qemu_mutex_lock_iothread();
106     lm32_pic_set_im(env->pic_state, im);
107     qemu_mutex_unlock_iothread();
108 }
109
110 void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
111 {
112     qemu_mutex_lock_iothread();
113     lm32_pic_set_ip(env->pic_state, im);
114     qemu_mutex_unlock_iothread();
115 }
116
117 void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
118 {
119     lm32_juart_set_jtx(env->juart_state, jtx);
120 }
121
122 void HELPER(wcsr_jrx)(CPULM32State *env, uint32_t jrx)
123 {
124     lm32_juart_set_jrx(env->juart_state, jrx);
125 }
126
127 uint32_t HELPER(rcsr_im)(CPULM32State *env)
128 {
129     return lm32_pic_get_im(env->pic_state);
130 }
131
132 uint32_t HELPER(rcsr_ip)(CPULM32State *env)
133 {
134     return lm32_pic_get_ip(env->pic_state);
135 }
136
137 uint32_t HELPER(rcsr_jtx)(CPULM32State *env)
138 {
139     return lm32_juart_get_jtx(env->juart_state);
140 }
141
142 uint32_t HELPER(rcsr_jrx)(CPULM32State *env)
143 {
144     return lm32_juart_get_jrx(env->juart_state);
145 }
146 #endif
147
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