hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "kvmclock.h"
  36 #include "sysemu.h"
  37 #include "sysbus.h"
  38 #include "arch_init.h"
  39 #include "blockdev.h"
  40
  41 #define MAX_IDE_BUS 2
  42
  43 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  44 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  45 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  46
  47 static void ioapic_init(IsaIrqState *isa_irq_state)
  48 {
  49     DeviceState *dev;
  50     SysBusDevice *d;
  51     unsigned int i;
  52
  53     dev = qdev_create(NULL, "ioapic");
  54     qdev_init_nofail(dev);
  55     d = sysbus_from_qdev(dev);
  56     sysbus_mmio_map(d, 0, 0xfec00000);
  57
  58     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  59         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  60     }
  61 }
  62
  63 /* PC hardware initialisation */
  64 static void pc_init1(ram_addr_t ram_size,
  65                      const char *boot_device,
  66                      const char *kernel_filename,
  67                      const char *kernel_cmdline,
  68                      const char *initrd_filename,
  69                      const char *cpu_model,
  70                      int pci_enabled,
  71                      int kvmclock_enabled)
  72 {
  73     int i;
  74     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  75     PCIBus *pci_bus;
  76     PCII440FXState *i440fx_state;
  77     int piix3_devfn = -1;
  78     qemu_irq *cpu_irq;
  79     qemu_irq *isa_irq;
  80     qemu_irq *i8259;
  81     qemu_irq *cmos_s3;
  82     qemu_irq *smi_irq;
  83     IsaIrqState *isa_irq_state;
  84     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  85     FDCtrl *floppy_controller;
  86     BusState *idebus[MAX_IDE_BUS];
  87     ISADevice *rtc_state;
  88
  89     pc_cpus_init(cpu_model);
  90
  91     if (kvmclock_enabled) {
  92         kvmclock_create();
  93     }
  94
  95     /* allocate ram and load rom/bios */
  96     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
  97                    &below_4g_mem_size, &above_4g_mem_size);
  98
  99     cpu_irq = pc_allocate_cpu_irq();
 100     i8259 = i8259_init(cpu_irq[0]);
 101     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 102     isa_irq_state->i8259 = i8259;
 103     if (pci_enabled) {
 104         ioapic_init(isa_irq_state);
 105     }
 106     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 107
 108     if (pci_enabled) {
 109         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 110     } else {
 111         pci_bus = NULL;
 112         i440fx_state = NULL;
 113         isa_bus_new(NULL);
 114     }
 115     isa_bus_irqs(isa_irq);
 116
 117     pc_register_ferr_irq(isa_reserve_irq(13));
 118
 119     pc_vga_init(pci_enabled? pci_bus: NULL);
 120
 121     /* init basic PC hardware */
 122     pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
 123
 124     for(i = 0; i < nb_nics; i++) {
 125         NICInfo *nd = &nd_table[i];
 126
 127         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 128             pc_init_ne2k_isa(nd);
 129         else
 130             pci_nic_init_nofail(nd, "e1000", NULL);
 131     }
 132
 133     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 134         fprintf(stderr, "qemu: too many IDE bus\n");
 135         exit(1);
 136     }
 137
 138     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 139         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 140     }
 141
 142     if (pci_enabled) {
 143         PCIDevice *dev;
 144         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 145         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 146         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 147     } else {
 148         for(i = 0; i < MAX_IDE_BUS; i++) {
 149             ISADevice *dev;
 150             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 151                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 152             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 153         }
 154     }
 155
 156     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 157
 158     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 159                  idebus[0], idebus[1], floppy_controller, rtc_state);
 160
 161     if (pci_enabled && usb_enabled) {
 162         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 163     }
 164
 165     if (pci_enabled && acpi_enabled) {
 166         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 167         i2c_bus *smbus;
 168
 169         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 170         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 171         /* TODO: Populate SPD eeprom data.  */
 172         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 173                               isa_reserve_irq(9), *cmos_s3, *smi_irq,
 174                               kvm_enabled());
 175         for (i = 0; i < 8; i++) {
 176             DeviceState *eeprom;
 177             eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
 178             qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
 179             qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
 180             qdev_init_nofail(eeprom);
 181         }
 182     }
 183
 184     if (i440fx_state) {
 185         i440fx_init_memory_mappings(i440fx_state);
 186     }
 187
 188     if (pci_enabled) {
 189         pc_pci_device_init(pci_bus);
 190     }
 191 }
 192
 193 static void pc_init_pci(ram_addr_t ram_size,
 194                         const char *boot_device,
 195                         const char *kernel_filename,
 196                         const char *kernel_cmdline,
 197                         const char *initrd_filename,
 198                         const char *cpu_model)
 199 {
 200     pc_init1(ram_size, boot_device,
 201              kernel_filename, kernel_cmdline,
 202              initrd_filename, cpu_model, 1, 1);
 203 }
 204
 205 static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
 206                                     const char *boot_device,
 207                                     const char *kernel_filename,
 208                                     const char *kernel_cmdline,
 209                                     const char *initrd_filename,
 210                                     const char *cpu_model)
 211 {
 212     pc_init1(ram_size, boot_device,
 213              kernel_filename, kernel_cmdline,
 214              initrd_filename, cpu_model, 1, 0);
 215 }
 216
 217 static void pc_init_isa(ram_addr_t ram_size,
 218                         const char *boot_device,
 219                         const char *kernel_filename,
 220                         const char *kernel_cmdline,
 221                         const char *initrd_filename,
 222                         const char *cpu_model)
 223 {
 224     if (cpu_model == NULL)
 225         cpu_model = "486";
 226     pc_init1(ram_size, boot_device,
 227              kernel_filename, kernel_cmdline,
 228              initrd_filename, cpu_model, 0, 1);
 229 }
 230
 231 static QEMUMachine pc_machine = {
 232     .name = "pc-0.14",
 233     .alias = "pc",
 234     .desc = "Standard PC",
 235     .init = pc_init_pci,
 236     .max_cpus = 255,
 237     .is_default = 1,
 238 };
 239
 240 static QEMUMachine pc_machine_v0_13 = {
 241     .name = "pc-0.13",
 242     .desc = "Standard PC",
 243     .init = pc_init_pci_no_kvmclock,
 244     .max_cpus = 255,
 245     .compat_props = (GlobalProperty[]) {
 246         {
 247             .driver   = "virtio-9p-pci",
 248             .property = "vectors",
 249             .value    = stringify(0),
 250         },{
 251             .driver   = "VGA",
 252             .property = "rombar",
 253             .value    = stringify(0),
 254         },{
 255             .driver   = "vmware-svga",
 256             .property = "rombar",
 257             .value    = stringify(0),
 258         },{
 259             .driver   = "PCI",
 260             .property = "command_serr_enable",
 261             .value    = "off",
 262         },
 263         { /* end of list */ }
 264     },
 265 };
 266
 267 static QEMUMachine pc_machine_v0_12 = {
 268     .name = "pc-0.12",
 269     .desc = "Standard PC",
 270     .init = pc_init_pci_no_kvmclock,
 271     .max_cpus = 255,
 272     .compat_props = (GlobalProperty[]) {
 273         {
 274             .driver   = "virtio-serial-pci",
 275             .property = "max_ports",
 276             .value    = stringify(1),
 277         },{
 278             .driver   = "virtio-serial-pci",
 279             .property = "vectors",
 280             .value    = stringify(0),
 281         },{
 282             .driver   = "VGA",
 283             .property = "rombar",
 284             .value    = stringify(0),
 285         },{
 286             .driver   = "vmware-svga",
 287             .property = "rombar",
 288             .value    = stringify(0),
 289         },{
 290             .driver   = "PCI",
 291             .property = "command_serr_enable",
 292             .value    = "off",
 293         },
 294         { /* end of list */ }
 295     }
 296 };
 297
 298 static QEMUMachine pc_machine_v0_11 = {
 299     .name = "pc-0.11",
 300     .desc = "Standard PC, qemu 0.11",
 301     .init = pc_init_pci_no_kvmclock,
 302     .max_cpus = 255,
 303     .compat_props = (GlobalProperty[]) {
 304         {
 305             .driver   = "virtio-blk-pci",
 306             .property = "vectors",
 307             .value    = stringify(0),
 308         },{
 309             .driver   = "virtio-serial-pci",
 310             .property = "max_ports",
 311             .value    = stringify(1),
 312         },{
 313             .driver   = "virtio-serial-pci",
 314             .property = "vectors",
 315             .value    = stringify(0),
 316         },{
 317             .driver   = "ide-drive",
 318             .property = "ver",
 319             .value    = "0.11",
 320         },{
 321             .driver   = "scsi-disk",
 322             .property = "ver",
 323             .value    = "0.11",
 324         },{
 325             .driver   = "PCI",
 326             .property = "rombar",
 327             .value    = stringify(0),
 328         },{
 329             .driver   = "PCI",
 330             .property = "command_serr_enable",
 331             .value    = "off",
 332         },
 333         { /* end of list */ }
 334     }
 335 };
 336
 337 static QEMUMachine pc_machine_v0_10 = {
 338     .name = "pc-0.10",
 339     .desc = "Standard PC, qemu 0.10",
 340     .init = pc_init_pci_no_kvmclock,
 341     .max_cpus = 255,
 342     .compat_props = (GlobalProperty[]) {
 343         {
 344             .driver   = "virtio-blk-pci",
 345             .property = "class",
 346             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 347         },{
 348             .driver   = "virtio-serial-pci",
 349             .property = "class",
 350             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 351         },{
 352             .driver   = "virtio-serial-pci",
 353             .property = "max_ports",
 354             .value    = stringify(1),
 355         },{
 356             .driver   = "virtio-serial-pci",
 357             .property = "vectors",
 358             .value    = stringify(0),
 359         },{
 360             .driver   = "virtio-net-pci",
 361             .property = "vectors",
 362             .value    = stringify(0),
 363         },{
 364             .driver   = "virtio-blk-pci",
 365             .property = "vectors",
 366             .value    = stringify(0),
 367         },{
 368             .driver   = "ide-drive",
 369             .property = "ver",
 370             .value    = "0.10",
 371         },{
 372             .driver   = "scsi-disk",
 373             .property = "ver",
 374             .value    = "0.10",
 375         },{
 376             .driver   = "PCI",
 377             .property = "rombar",
 378             .value    = stringify(0),
 379         },{
 380             .driver   = "PCI",
 381             .property = "command_serr_enable",
 382             .value    = "off",
 383         },
 384         { /* end of list */ }
 385     },
 386 };
 387
 388 static QEMUMachine isapc_machine = {
 389     .name = "isapc",
 390     .desc = "ISA-only PC",
 391     .init = pc_init_isa,
 392     .max_cpus = 1,
 393 };
 394
 395 static void pc_machine_init(void)
 396 {
 397     qemu_register_machine(&pc_machine);
 398     qemu_register_machine(&pc_machine_v0_13);
 399     qemu_register_machine(&pc_machine_v0_12);
 400     qemu_register_machine(&pc_machine_v0_11);
 401     qemu_register_machine(&pc_machine_v0_10);
 402     qemu_register_machine(&isapc_machine);
 403 }
 404
 405 machine_init(pc_machine_init);