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memory: allow MemoryListeners to observe a specific address space
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1 /*
2  * Physical memory management
3  *
4  * Copyright 2011 Red Hat, Inc. and/or its affiliates
5  *
6  * Authors:
7  *  Avi Kivity <[email protected]>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2.  See
10  * the COPYING file in the top-level directory.
11  *
12  * Contributions after 2012-01-13 are licensed under the terms of the
13  * GNU GPL, version 2 or (at your option) any later version.
14  */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31     = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36  * Note using signed integers limits us to physical addresses at most
37  * 63 bits wide.  They are needed for negative offsetting in aliases
38  * (large MemoryRegion::alias_offset).
39  */
40 struct AddrRange {
41     Int128 start;
42     Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47     return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52     return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57     return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62     int128_addto(&range.start, delta);
63     return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68     return int128_ge(addr, range.start)
69         && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74     return addrrange_contains(r1, r2.start)
75         || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80     Int128 start = int128_max(r1.start, r2.start);
81     Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82     return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 static bool memory_listener_match(MemoryListener *listener,
88                                   MemoryRegionSection *section)
89 {
90     return !listener->address_space_filter
91         || listener->address_space_filter == section->address_space;
92 }
93
94 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
95     do {                                                                \
96         MemoryListener *_listener;                                      \
97                                                                         \
98         switch (_direction) {                                           \
99         case Forward:                                                   \
100             QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
101                 _listener->_callback(_listener, ##_args);               \
102             }                                                           \
103             break;                                                      \
104         case Reverse:                                                   \
105             QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
106                                    memory_listeners, link) {            \
107                 _listener->_callback(_listener, ##_args);               \
108             }                                                           \
109             break;                                                      \
110         default:                                                        \
111             abort();                                                    \
112         }                                                               \
113     } while (0)
114
115 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
116     do {                                                                \
117         MemoryListener *_listener;                                      \
118                                                                         \
119         switch (_direction) {                                           \
120         case Forward:                                                   \
121             QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
122                 if (memory_listener_match(_listener, _section)) {       \
123                     _listener->_callback(_listener, _section, ##_args); \
124                 }                                                       \
125             }                                                           \
126             break;                                                      \
127         case Reverse:                                                   \
128             QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
129                                    memory_listeners, link) {            \
130                 if (memory_listener_match(_listener, _section)) {       \
131                     _listener->_callback(_listener, _section, ##_args); \
132                 }                                                       \
133             }                                                           \
134             break;                                                      \
135         default:                                                        \
136             abort();                                                    \
137         }                                                               \
138     } while (0)
139
140 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback)            \
141     MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) {       \
142         .mr = (fr)->mr,                                                 \
143         .address_space = (as)->root,                                    \
144         .offset_within_region = (fr)->offset_in_region,                 \
145         .size = int128_get64((fr)->addr.size),                          \
146         .offset_within_address_space = int128_get64((fr)->addr.start),  \
147         .readonly = (fr)->readonly,                                     \
148               }))
149
150 struct CoalescedMemoryRange {
151     AddrRange addr;
152     QTAILQ_ENTRY(CoalescedMemoryRange) link;
153 };
154
155 struct MemoryRegionIoeventfd {
156     AddrRange addr;
157     bool match_data;
158     uint64_t data;
159     int fd;
160 };
161
162 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
163                                            MemoryRegionIoeventfd b)
164 {
165     if (int128_lt(a.addr.start, b.addr.start)) {
166         return true;
167     } else if (int128_gt(a.addr.start, b.addr.start)) {
168         return false;
169     } else if (int128_lt(a.addr.size, b.addr.size)) {
170         return true;
171     } else if (int128_gt(a.addr.size, b.addr.size)) {
172         return false;
173     } else if (a.match_data < b.match_data) {
174         return true;
175     } else  if (a.match_data > b.match_data) {
176         return false;
177     } else if (a.match_data) {
178         if (a.data < b.data) {
179             return true;
180         } else if (a.data > b.data) {
181             return false;
182         }
183     }
184     if (a.fd < b.fd) {
185         return true;
186     } else if (a.fd > b.fd) {
187         return false;
188     }
189     return false;
190 }
191
192 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
193                                           MemoryRegionIoeventfd b)
194 {
195     return !memory_region_ioeventfd_before(a, b)
196         && !memory_region_ioeventfd_before(b, a);
197 }
198
199 typedef struct FlatRange FlatRange;
200 typedef struct FlatView FlatView;
201
202 /* Range of memory in the global map.  Addresses are absolute. */
203 struct FlatRange {
204     MemoryRegion *mr;
205     target_phys_addr_t offset_in_region;
206     AddrRange addr;
207     uint8_t dirty_log_mask;
208     bool readable;
209     bool readonly;
210 };
211
212 /* Flattened global view of current active memory hierarchy.  Kept in sorted
213  * order.
214  */
215 struct FlatView {
216     FlatRange *ranges;
217     unsigned nr;
218     unsigned nr_allocated;
219 };
220
221 typedef struct AddressSpace AddressSpace;
222 typedef struct AddressSpaceOps AddressSpaceOps;
223
224 /* A system address space - I/O, memory, etc. */
225 struct AddressSpace {
226     MemoryRegion *root;
227     FlatView current_map;
228     int ioeventfd_nb;
229     MemoryRegionIoeventfd *ioeventfds;
230 };
231
232 #define FOR_EACH_FLAT_RANGE(var, view)          \
233     for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
234
235 static bool flatrange_equal(FlatRange *a, FlatRange *b)
236 {
237     return a->mr == b->mr
238         && addrrange_equal(a->addr, b->addr)
239         && a->offset_in_region == b->offset_in_region
240         && a->readable == b->readable
241         && a->readonly == b->readonly;
242 }
243
244 static void flatview_init(FlatView *view)
245 {
246     view->ranges = NULL;
247     view->nr = 0;
248     view->nr_allocated = 0;
249 }
250
251 /* Insert a range into a given position.  Caller is responsible for maintaining
252  * sorting order.
253  */
254 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
255 {
256     if (view->nr == view->nr_allocated) {
257         view->nr_allocated = MAX(2 * view->nr, 10);
258         view->ranges = g_realloc(view->ranges,
259                                     view->nr_allocated * sizeof(*view->ranges));
260     }
261     memmove(view->ranges + pos + 1, view->ranges + pos,
262             (view->nr - pos) * sizeof(FlatRange));
263     view->ranges[pos] = *range;
264     ++view->nr;
265 }
266
267 static void flatview_destroy(FlatView *view)
268 {
269     g_free(view->ranges);
270 }
271
272 static bool can_merge(FlatRange *r1, FlatRange *r2)
273 {
274     return int128_eq(addrrange_end(r1->addr), r2->addr.start)
275         && r1->mr == r2->mr
276         && int128_eq(int128_add(int128_make64(r1->offset_in_region),
277                                 r1->addr.size),
278                      int128_make64(r2->offset_in_region))
279         && r1->dirty_log_mask == r2->dirty_log_mask
280         && r1->readable == r2->readable
281         && r1->readonly == r2->readonly;
282 }
283
284 /* Attempt to simplify a view by merging ajacent ranges */
285 static void flatview_simplify(FlatView *view)
286 {
287     unsigned i, j;
288
289     i = 0;
290     while (i < view->nr) {
291         j = i + 1;
292         while (j < view->nr
293                && can_merge(&view->ranges[j-1], &view->ranges[j])) {
294             int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
295             ++j;
296         }
297         ++i;
298         memmove(&view->ranges[i], &view->ranges[j],
299                 (view->nr - j) * sizeof(view->ranges[j]));
300         view->nr -= j - i;
301     }
302 }
303
304 static void memory_region_read_accessor(void *opaque,
305                                         target_phys_addr_t addr,
306                                         uint64_t *value,
307                                         unsigned size,
308                                         unsigned shift,
309                                         uint64_t mask)
310 {
311     MemoryRegion *mr = opaque;
312     uint64_t tmp;
313
314     tmp = mr->ops->read(mr->opaque, addr, size);
315     *value |= (tmp & mask) << shift;
316 }
317
318 static void memory_region_write_accessor(void *opaque,
319                                          target_phys_addr_t addr,
320                                          uint64_t *value,
321                                          unsigned size,
322                                          unsigned shift,
323                                          uint64_t mask)
324 {
325     MemoryRegion *mr = opaque;
326     uint64_t tmp;
327
328     tmp = (*value >> shift) & mask;
329     mr->ops->write(mr->opaque, addr, tmp, size);
330 }
331
332 static void access_with_adjusted_size(target_phys_addr_t addr,
333                                       uint64_t *value,
334                                       unsigned size,
335                                       unsigned access_size_min,
336                                       unsigned access_size_max,
337                                       void (*access)(void *opaque,
338                                                      target_phys_addr_t addr,
339                                                      uint64_t *value,
340                                                      unsigned size,
341                                                      unsigned shift,
342                                                      uint64_t mask),
343                                       void *opaque)
344 {
345     uint64_t access_mask;
346     unsigned access_size;
347     unsigned i;
348
349     if (!access_size_min) {
350         access_size_min = 1;
351     }
352     if (!access_size_max) {
353         access_size_max = 4;
354     }
355     access_size = MAX(MIN(size, access_size_max), access_size_min);
356     access_mask = -1ULL >> (64 - access_size * 8);
357     for (i = 0; i < size; i += access_size) {
358         /* FIXME: big-endian support */
359         access(opaque, addr + i, value, access_size, i * 8, access_mask);
360     }
361 }
362
363 static AddressSpace address_space_memory;
364
365 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
366                                              unsigned width, bool write)
367 {
368     const MemoryRegionPortio *mrp;
369
370     for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
371         if (offset >= mrp->offset && offset < mrp->offset + mrp->len
372             && width == mrp->size
373             && (write ? (bool)mrp->write : (bool)mrp->read)) {
374             return mrp;
375         }
376     }
377     return NULL;
378 }
379
380 static void memory_region_iorange_read(IORange *iorange,
381                                        uint64_t offset,
382                                        unsigned width,
383                                        uint64_t *data)
384 {
385     MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
386
387     if (mr->ops->old_portio) {
388         const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
389
390         *data = ((uint64_t)1 << (width * 8)) - 1;
391         if (mrp) {
392             *data = mrp->read(mr->opaque, offset);
393         } else if (width == 2) {
394             mrp = find_portio(mr, offset, 1, false);
395             assert(mrp);
396             *data = mrp->read(mr->opaque, offset) |
397                     (mrp->read(mr->opaque, offset + 1) << 8);
398         }
399         return;
400     }
401     *data = 0;
402     access_with_adjusted_size(offset, data, width,
403                               mr->ops->impl.min_access_size,
404                               mr->ops->impl.max_access_size,
405                               memory_region_read_accessor, mr);
406 }
407
408 static void memory_region_iorange_write(IORange *iorange,
409                                         uint64_t offset,
410                                         unsigned width,
411                                         uint64_t data)
412 {
413     MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
414
415     if (mr->ops->old_portio) {
416         const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
417
418         if (mrp) {
419             mrp->write(mr->opaque, offset, data);
420         } else if (width == 2) {
421             mrp = find_portio(mr, offset, 1, false);
422             assert(mrp);
423             mrp->write(mr->opaque, offset, data & 0xff);
424             mrp->write(mr->opaque, offset + 1, data >> 8);
425         }
426         return;
427     }
428     access_with_adjusted_size(offset, &data, width,
429                               mr->ops->impl.min_access_size,
430                               mr->ops->impl.max_access_size,
431                               memory_region_write_accessor, mr);
432 }
433
434 const IORangeOps memory_region_iorange_ops = {
435     .read = memory_region_iorange_read,
436     .write = memory_region_iorange_write,
437 };
438
439 static AddressSpace address_space_io;
440
441 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
442 {
443     while (mr->parent) {
444         mr = mr->parent;
445     }
446     if (mr == address_space_memory.root) {
447         return &address_space_memory;
448     }
449     if (mr == address_space_io.root) {
450         return &address_space_io;
451     }
452     abort();
453 }
454
455 /* Render a memory region into the global view.  Ranges in @view obscure
456  * ranges in @mr.
457  */
458 static void render_memory_region(FlatView *view,
459                                  MemoryRegion *mr,
460                                  Int128 base,
461                                  AddrRange clip,
462                                  bool readonly)
463 {
464     MemoryRegion *subregion;
465     unsigned i;
466     target_phys_addr_t offset_in_region;
467     Int128 remain;
468     Int128 now;
469     FlatRange fr;
470     AddrRange tmp;
471
472     if (!mr->enabled) {
473         return;
474     }
475
476     int128_addto(&base, int128_make64(mr->addr));
477     readonly |= mr->readonly;
478
479     tmp = addrrange_make(base, mr->size);
480
481     if (!addrrange_intersects(tmp, clip)) {
482         return;
483     }
484
485     clip = addrrange_intersection(tmp, clip);
486
487     if (mr->alias) {
488         int128_subfrom(&base, int128_make64(mr->alias->addr));
489         int128_subfrom(&base, int128_make64(mr->alias_offset));
490         render_memory_region(view, mr->alias, base, clip, readonly);
491         return;
492     }
493
494     /* Render subregions in priority order. */
495     QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
496         render_memory_region(view, subregion, base, clip, readonly);
497     }
498
499     if (!mr->terminates) {
500         return;
501     }
502
503     offset_in_region = int128_get64(int128_sub(clip.start, base));
504     base = clip.start;
505     remain = clip.size;
506
507     /* Render the region itself into any gaps left by the current view. */
508     for (i = 0; i < view->nr && int128_nz(remain); ++i) {
509         if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
510             continue;
511         }
512         if (int128_lt(base, view->ranges[i].addr.start)) {
513             now = int128_min(remain,
514                              int128_sub(view->ranges[i].addr.start, base));
515             fr.mr = mr;
516             fr.offset_in_region = offset_in_region;
517             fr.addr = addrrange_make(base, now);
518             fr.dirty_log_mask = mr->dirty_log_mask;
519             fr.readable = mr->readable;
520             fr.readonly = readonly;
521             flatview_insert(view, i, &fr);
522             ++i;
523             int128_addto(&base, now);
524             offset_in_region += int128_get64(now);
525             int128_subfrom(&remain, now);
526         }
527         if (int128_eq(base, view->ranges[i].addr.start)) {
528             now = int128_min(remain, view->ranges[i].addr.size);
529             int128_addto(&base, now);
530             offset_in_region += int128_get64(now);
531             int128_subfrom(&remain, now);
532         }
533     }
534     if (int128_nz(remain)) {
535         fr.mr = mr;
536         fr.offset_in_region = offset_in_region;
537         fr.addr = addrrange_make(base, remain);
538         fr.dirty_log_mask = mr->dirty_log_mask;
539         fr.readable = mr->readable;
540         fr.readonly = readonly;
541         flatview_insert(view, i, &fr);
542     }
543 }
544
545 /* Render a memory topology into a list of disjoint absolute ranges. */
546 static FlatView generate_memory_topology(MemoryRegion *mr)
547 {
548     FlatView view;
549
550     flatview_init(&view);
551
552     render_memory_region(&view, mr, int128_zero(),
553                          addrrange_make(int128_zero(), int128_2_64()), false);
554     flatview_simplify(&view);
555
556     return view;
557 }
558
559 static void address_space_add_del_ioeventfds(AddressSpace *as,
560                                              MemoryRegionIoeventfd *fds_new,
561                                              unsigned fds_new_nb,
562                                              MemoryRegionIoeventfd *fds_old,
563                                              unsigned fds_old_nb)
564 {
565     unsigned iold, inew;
566     MemoryRegionIoeventfd *fd;
567     MemoryRegionSection section;
568
569     /* Generate a symmetric difference of the old and new fd sets, adding
570      * and deleting as necessary.
571      */
572
573     iold = inew = 0;
574     while (iold < fds_old_nb || inew < fds_new_nb) {
575         if (iold < fds_old_nb
576             && (inew == fds_new_nb
577                 || memory_region_ioeventfd_before(fds_old[iold],
578                                                   fds_new[inew]))) {
579             fd = &fds_old[iold];
580             section = (MemoryRegionSection) {
581                 .address_space = as->root,
582                 .offset_within_address_space = int128_get64(fd->addr.start),
583                 .size = int128_get64(fd->addr.size),
584             };
585             MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
586                                  fd->match_data, fd->data, fd->fd);
587             ++iold;
588         } else if (inew < fds_new_nb
589                    && (iold == fds_old_nb
590                        || memory_region_ioeventfd_before(fds_new[inew],
591                                                          fds_old[iold]))) {
592             fd = &fds_new[inew];
593             section = (MemoryRegionSection) {
594                 .address_space = as->root,
595                 .offset_within_address_space = int128_get64(fd->addr.start),
596                 .size = int128_get64(fd->addr.size),
597             };
598             MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
599                                  fd->match_data, fd->data, fd->fd);
600             ++inew;
601         } else {
602             ++iold;
603             ++inew;
604         }
605     }
606 }
607
608 static void address_space_update_ioeventfds(AddressSpace *as)
609 {
610     FlatRange *fr;
611     unsigned ioeventfd_nb = 0;
612     MemoryRegionIoeventfd *ioeventfds = NULL;
613     AddrRange tmp;
614     unsigned i;
615
616     FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
617         for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
618             tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
619                                   int128_sub(fr->addr.start,
620                                              int128_make64(fr->offset_in_region)));
621             if (addrrange_intersects(fr->addr, tmp)) {
622                 ++ioeventfd_nb;
623                 ioeventfds = g_realloc(ioeventfds,
624                                           ioeventfd_nb * sizeof(*ioeventfds));
625                 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
626                 ioeventfds[ioeventfd_nb-1].addr = tmp;
627             }
628         }
629     }
630
631     address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
632                                      as->ioeventfds, as->ioeventfd_nb);
633
634     g_free(as->ioeventfds);
635     as->ioeventfds = ioeventfds;
636     as->ioeventfd_nb = ioeventfd_nb;
637 }
638
639 static void address_space_update_topology_pass(AddressSpace *as,
640                                                FlatView old_view,
641                                                FlatView new_view,
642                                                bool adding)
643 {
644     unsigned iold, inew;
645     FlatRange *frold, *frnew;
646
647     /* Generate a symmetric difference of the old and new memory maps.
648      * Kill ranges in the old map, and instantiate ranges in the new map.
649      */
650     iold = inew = 0;
651     while (iold < old_view.nr || inew < new_view.nr) {
652         if (iold < old_view.nr) {
653             frold = &old_view.ranges[iold];
654         } else {
655             frold = NULL;
656         }
657         if (inew < new_view.nr) {
658             frnew = &new_view.ranges[inew];
659         } else {
660             frnew = NULL;
661         }
662
663         if (frold
664             && (!frnew
665                 || int128_lt(frold->addr.start, frnew->addr.start)
666                 || (int128_eq(frold->addr.start, frnew->addr.start)
667                     && !flatrange_equal(frold, frnew)))) {
668             /* In old, but (not in new, or in new but attributes changed). */
669
670             if (!adding) {
671                 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
672             }
673
674             ++iold;
675         } else if (frold && frnew && flatrange_equal(frold, frnew)) {
676             /* In both (logging may have changed) */
677
678             if (adding) {
679                 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
680                     MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
681                 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
682                     MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
683                 }
684             }
685
686             ++iold;
687             ++inew;
688         } else {
689             /* In new */
690
691             if (adding) {
692                 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
693             }
694
695             ++inew;
696         }
697     }
698 }
699
700
701 static void address_space_update_topology(AddressSpace *as)
702 {
703     FlatView old_view = as->current_map;
704     FlatView new_view = generate_memory_topology(as->root);
705
706     address_space_update_topology_pass(as, old_view, new_view, false);
707     address_space_update_topology_pass(as, old_view, new_view, true);
708
709     as->current_map = new_view;
710     flatview_destroy(&old_view);
711     address_space_update_ioeventfds(as);
712 }
713
714 static void memory_region_update_topology(MemoryRegion *mr)
715 {
716     if (memory_region_transaction_depth) {
717         memory_region_update_pending |= !mr || mr->enabled;
718         return;
719     }
720
721     if (mr && !mr->enabled) {
722         return;
723     }
724
725     if (address_space_memory.root) {
726         address_space_update_topology(&address_space_memory);
727     }
728     if (address_space_io.root) {
729         address_space_update_topology(&address_space_io);
730     }
731
732     memory_region_update_pending = false;
733 }
734
735 void memory_region_transaction_begin(void)
736 {
737     ++memory_region_transaction_depth;
738 }
739
740 void memory_region_transaction_commit(void)
741 {
742     assert(memory_region_transaction_depth);
743     --memory_region_transaction_depth;
744     if (!memory_region_transaction_depth && memory_region_update_pending) {
745         memory_region_update_topology(NULL);
746     }
747 }
748
749 static void memory_region_destructor_none(MemoryRegion *mr)
750 {
751 }
752
753 static void memory_region_destructor_ram(MemoryRegion *mr)
754 {
755     qemu_ram_free(mr->ram_addr);
756 }
757
758 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
759 {
760     qemu_ram_free_from_ptr(mr->ram_addr);
761 }
762
763 static void memory_region_destructor_iomem(MemoryRegion *mr)
764 {
765     cpu_unregister_io_memory(mr->ram_addr);
766 }
767
768 static void memory_region_destructor_rom_device(MemoryRegion *mr)
769 {
770     qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
771     cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
772 }
773
774 static bool memory_region_wrong_endianness(MemoryRegion *mr)
775 {
776 #ifdef TARGET_WORDS_BIGENDIAN
777     return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
778 #else
779     return mr->ops->endianness == DEVICE_BIG_ENDIAN;
780 #endif
781 }
782
783 void memory_region_init(MemoryRegion *mr,
784                         const char *name,
785                         uint64_t size)
786 {
787     mr->ops = NULL;
788     mr->parent = NULL;
789     mr->size = int128_make64(size);
790     if (size == UINT64_MAX) {
791         mr->size = int128_2_64();
792     }
793     mr->addr = 0;
794     mr->subpage = false;
795     mr->enabled = true;
796     mr->terminates = false;
797     mr->ram = false;
798     mr->readable = true;
799     mr->readonly = false;
800     mr->rom_device = false;
801     mr->destructor = memory_region_destructor_none;
802     mr->priority = 0;
803     mr->may_overlap = false;
804     mr->alias = NULL;
805     QTAILQ_INIT(&mr->subregions);
806     memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
807     QTAILQ_INIT(&mr->coalesced);
808     mr->name = g_strdup(name);
809     mr->dirty_log_mask = 0;
810     mr->ioeventfd_nb = 0;
811     mr->ioeventfds = NULL;
812 }
813
814 static bool memory_region_access_valid(MemoryRegion *mr,
815                                        target_phys_addr_t addr,
816                                        unsigned size,
817                                        bool is_write)
818 {
819     if (mr->ops->valid.accepts
820         && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
821         return false;
822     }
823
824     if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
825         return false;
826     }
827
828     /* Treat zero as compatibility all valid */
829     if (!mr->ops->valid.max_access_size) {
830         return true;
831     }
832
833     if (size > mr->ops->valid.max_access_size
834         || size < mr->ops->valid.min_access_size) {
835         return false;
836     }
837     return true;
838 }
839
840 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
841                                              target_phys_addr_t addr,
842                                              unsigned size)
843 {
844     uint64_t data = 0;
845
846     if (!memory_region_access_valid(mr, addr, size, false)) {
847         return -1U; /* FIXME: better signalling */
848     }
849
850     if (!mr->ops->read) {
851         return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
852     }
853
854     /* FIXME: support unaligned access */
855     access_with_adjusted_size(addr, &data, size,
856                               mr->ops->impl.min_access_size,
857                               mr->ops->impl.max_access_size,
858                               memory_region_read_accessor, mr);
859
860     return data;
861 }
862
863 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
864 {
865     if (memory_region_wrong_endianness(mr)) {
866         switch (size) {
867         case 1:
868             break;
869         case 2:
870             *data = bswap16(*data);
871             break;
872         case 4:
873             *data = bswap32(*data);
874             break;
875         default:
876             abort();
877         }
878     }
879 }
880
881 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
882                                             target_phys_addr_t addr,
883                                             unsigned size)
884 {
885     uint64_t ret;
886
887     ret = memory_region_dispatch_read1(mr, addr, size);
888     adjust_endianness(mr, &ret, size);
889     return ret;
890 }
891
892 static void memory_region_dispatch_write(MemoryRegion *mr,
893                                          target_phys_addr_t addr,
894                                          uint64_t data,
895                                          unsigned size)
896 {
897     if (!memory_region_access_valid(mr, addr, size, true)) {
898         return; /* FIXME: better signalling */
899     }
900
901     adjust_endianness(mr, &data, size);
902
903     if (!mr->ops->write) {
904         mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
905         return;
906     }
907
908     /* FIXME: support unaligned access */
909     access_with_adjusted_size(addr, &data, size,
910                               mr->ops->impl.min_access_size,
911                               mr->ops->impl.max_access_size,
912                               memory_region_write_accessor, mr);
913 }
914
915 void memory_region_init_io(MemoryRegion *mr,
916                            const MemoryRegionOps *ops,
917                            void *opaque,
918                            const char *name,
919                            uint64_t size)
920 {
921     memory_region_init(mr, name, size);
922     mr->ops = ops;
923     mr->opaque = opaque;
924     mr->terminates = true;
925     mr->destructor = memory_region_destructor_iomem;
926     mr->ram_addr = cpu_register_io_memory(mr);
927 }
928
929 void memory_region_init_ram(MemoryRegion *mr,
930                             const char *name,
931                             uint64_t size)
932 {
933     memory_region_init(mr, name, size);
934     mr->ram = true;
935     mr->terminates = true;
936     mr->destructor = memory_region_destructor_ram;
937     mr->ram_addr = qemu_ram_alloc(size, mr);
938 }
939
940 void memory_region_init_ram_ptr(MemoryRegion *mr,
941                                 const char *name,
942                                 uint64_t size,
943                                 void *ptr)
944 {
945     memory_region_init(mr, name, size);
946     mr->ram = true;
947     mr->terminates = true;
948     mr->destructor = memory_region_destructor_ram_from_ptr;
949     mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
950 }
951
952 void memory_region_init_alias(MemoryRegion *mr,
953                               const char *name,
954                               MemoryRegion *orig,
955                               target_phys_addr_t offset,
956                               uint64_t size)
957 {
958     memory_region_init(mr, name, size);
959     mr->alias = orig;
960     mr->alias_offset = offset;
961 }
962
963 void memory_region_init_rom_device(MemoryRegion *mr,
964                                    const MemoryRegionOps *ops,
965                                    void *opaque,
966                                    const char *name,
967                                    uint64_t size)
968 {
969     memory_region_init(mr, name, size);
970     mr->ops = ops;
971     mr->opaque = opaque;
972     mr->terminates = true;
973     mr->rom_device = true;
974     mr->destructor = memory_region_destructor_rom_device;
975     mr->ram_addr = qemu_ram_alloc(size, mr);
976     mr->ram_addr |= cpu_register_io_memory(mr);
977 }
978
979 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
980                              unsigned size)
981 {
982     MemoryRegion *mr = opaque;
983
984     if (!mr->warning_printed) {
985         fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
986         mr->warning_printed = true;
987     }
988     return -1U;
989 }
990
991 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
992                           unsigned size)
993 {
994     MemoryRegion *mr = opaque;
995
996     if (!mr->warning_printed) {
997         fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
998         mr->warning_printed = true;
999     }
1000 }
1001
1002 static const MemoryRegionOps reservation_ops = {
1003     .read = invalid_read,
1004     .write = invalid_write,
1005     .endianness = DEVICE_NATIVE_ENDIAN,
1006 };
1007
1008 void memory_region_init_reservation(MemoryRegion *mr,
1009                                     const char *name,
1010                                     uint64_t size)
1011 {
1012     memory_region_init_io(mr, &reservation_ops, mr, name, size);
1013 }
1014
1015 void memory_region_destroy(MemoryRegion *mr)
1016 {
1017     assert(QTAILQ_EMPTY(&mr->subregions));
1018     mr->destructor(mr);
1019     memory_region_clear_coalescing(mr);
1020     g_free((char *)mr->name);
1021     g_free(mr->ioeventfds);
1022 }
1023
1024 uint64_t memory_region_size(MemoryRegion *mr)
1025 {
1026     if (int128_eq(mr->size, int128_2_64())) {
1027         return UINT64_MAX;
1028     }
1029     return int128_get64(mr->size);
1030 }
1031
1032 const char *memory_region_name(MemoryRegion *mr)
1033 {
1034     return mr->name;
1035 }
1036
1037 bool memory_region_is_ram(MemoryRegion *mr)
1038 {
1039     return mr->ram;
1040 }
1041
1042 bool memory_region_is_logging(MemoryRegion *mr)
1043 {
1044     return mr->dirty_log_mask;
1045 }
1046
1047 bool memory_region_is_rom(MemoryRegion *mr)
1048 {
1049     return mr->ram && mr->readonly;
1050 }
1051
1052 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1053 {
1054     uint8_t mask = 1 << client;
1055
1056     mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1057     memory_region_update_topology(mr);
1058 }
1059
1060 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1061                              target_phys_addr_t size, unsigned client)
1062 {
1063     assert(mr->terminates);
1064     return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1065                                          1 << client);
1066 }
1067
1068 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1069                              target_phys_addr_t size)
1070 {
1071     assert(mr->terminates);
1072     return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1073 }
1074
1075 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1076 {
1077     FlatRange *fr;
1078
1079     FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1080         if (fr->mr == mr) {
1081             MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1082                                           Forward, log_sync);
1083         }
1084     }
1085 }
1086
1087 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1088 {
1089     if (mr->readonly != readonly) {
1090         mr->readonly = readonly;
1091         memory_region_update_topology(mr);
1092     }
1093 }
1094
1095 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1096 {
1097     if (mr->readable != readable) {
1098         mr->readable = readable;
1099         memory_region_update_topology(mr);
1100     }
1101 }
1102
1103 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1104                                target_phys_addr_t size, unsigned client)
1105 {
1106     assert(mr->terminates);
1107     cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1108                                     mr->ram_addr + addr + size,
1109                                     1 << client);
1110 }
1111
1112 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1113 {
1114     if (mr->alias) {
1115         return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1116     }
1117
1118     assert(mr->terminates);
1119
1120     return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1121 }
1122
1123 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1124 {
1125     FlatRange *fr;
1126     CoalescedMemoryRange *cmr;
1127     AddrRange tmp;
1128
1129     FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1130         if (fr->mr == mr) {
1131             qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1132                                            int128_get64(fr->addr.size));
1133             QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1134                 tmp = addrrange_shift(cmr->addr,
1135                                       int128_sub(fr->addr.start,
1136                                                  int128_make64(fr->offset_in_region)));
1137                 if (!addrrange_intersects(tmp, fr->addr)) {
1138                     continue;
1139                 }
1140                 tmp = addrrange_intersection(tmp, fr->addr);
1141                 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1142                                              int128_get64(tmp.size));
1143             }
1144         }
1145     }
1146 }
1147
1148 void memory_region_set_coalescing(MemoryRegion *mr)
1149 {
1150     memory_region_clear_coalescing(mr);
1151     memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1152 }
1153
1154 void memory_region_add_coalescing(MemoryRegion *mr,
1155                                   target_phys_addr_t offset,
1156                                   uint64_t size)
1157 {
1158     CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1159
1160     cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1161     QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1162     memory_region_update_coalesced_range(mr);
1163 }
1164
1165 void memory_region_clear_coalescing(MemoryRegion *mr)
1166 {
1167     CoalescedMemoryRange *cmr;
1168
1169     while (!QTAILQ_EMPTY(&mr->coalesced)) {
1170         cmr = QTAILQ_FIRST(&mr->coalesced);
1171         QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1172         g_free(cmr);
1173     }
1174     memory_region_update_coalesced_range(mr);
1175 }
1176
1177 void memory_region_add_eventfd(MemoryRegion *mr,
1178                                target_phys_addr_t addr,
1179                                unsigned size,
1180                                bool match_data,
1181                                uint64_t data,
1182                                int fd)
1183 {
1184     MemoryRegionIoeventfd mrfd = {
1185         .addr.start = int128_make64(addr),
1186         .addr.size = int128_make64(size),
1187         .match_data = match_data,
1188         .data = data,
1189         .fd = fd,
1190     };
1191     unsigned i;
1192
1193     for (i = 0; i < mr->ioeventfd_nb; ++i) {
1194         if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1195             break;
1196         }
1197     }
1198     ++mr->ioeventfd_nb;
1199     mr->ioeventfds = g_realloc(mr->ioeventfds,
1200                                   sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1201     memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1202             sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1203     mr->ioeventfds[i] = mrfd;
1204     memory_region_update_topology(mr);
1205 }
1206
1207 void memory_region_del_eventfd(MemoryRegion *mr,
1208                                target_phys_addr_t addr,
1209                                unsigned size,
1210                                bool match_data,
1211                                uint64_t data,
1212                                int fd)
1213 {
1214     MemoryRegionIoeventfd mrfd = {
1215         .addr.start = int128_make64(addr),
1216         .addr.size = int128_make64(size),
1217         .match_data = match_data,
1218         .data = data,
1219         .fd = fd,
1220     };
1221     unsigned i;
1222
1223     for (i = 0; i < mr->ioeventfd_nb; ++i) {
1224         if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1225             break;
1226         }
1227     }
1228     assert(i != mr->ioeventfd_nb);
1229     memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1230             sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1231     --mr->ioeventfd_nb;
1232     mr->ioeventfds = g_realloc(mr->ioeventfds,
1233                                   sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1234     memory_region_update_topology(mr);
1235 }
1236
1237 static void memory_region_add_subregion_common(MemoryRegion *mr,
1238                                                target_phys_addr_t offset,
1239                                                MemoryRegion *subregion)
1240 {
1241     MemoryRegion *other;
1242
1243     assert(!subregion->parent);
1244     subregion->parent = mr;
1245     subregion->addr = offset;
1246     QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1247         if (subregion->may_overlap || other->may_overlap) {
1248             continue;
1249         }
1250         if (int128_gt(int128_make64(offset),
1251                       int128_add(int128_make64(other->addr), other->size))
1252             || int128_le(int128_add(int128_make64(offset), subregion->size),
1253                          int128_make64(other->addr))) {
1254             continue;
1255         }
1256 #if 0
1257         printf("warning: subregion collision %llx/%llx (%s) "
1258                "vs %llx/%llx (%s)\n",
1259                (unsigned long long)offset,
1260                (unsigned long long)int128_get64(subregion->size),
1261                subregion->name,
1262                (unsigned long long)other->addr,
1263                (unsigned long long)int128_get64(other->size),
1264                other->name);
1265 #endif
1266     }
1267     QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1268         if (subregion->priority >= other->priority) {
1269             QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1270             goto done;
1271         }
1272     }
1273     QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1274 done:
1275     memory_region_update_topology(mr);
1276 }
1277
1278
1279 void memory_region_add_subregion(MemoryRegion *mr,
1280                                  target_phys_addr_t offset,
1281                                  MemoryRegion *subregion)
1282 {
1283     subregion->may_overlap = false;
1284     subregion->priority = 0;
1285     memory_region_add_subregion_common(mr, offset, subregion);
1286 }
1287
1288 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1289                                          target_phys_addr_t offset,
1290                                          MemoryRegion *subregion,
1291                                          unsigned priority)
1292 {
1293     subregion->may_overlap = true;
1294     subregion->priority = priority;
1295     memory_region_add_subregion_common(mr, offset, subregion);
1296 }
1297
1298 void memory_region_del_subregion(MemoryRegion *mr,
1299                                  MemoryRegion *subregion)
1300 {
1301     assert(subregion->parent == mr);
1302     subregion->parent = NULL;
1303     QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1304     memory_region_update_topology(mr);
1305 }
1306
1307 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1308 {
1309     if (enabled == mr->enabled) {
1310         return;
1311     }
1312     mr->enabled = enabled;
1313     memory_region_update_topology(NULL);
1314 }
1315
1316 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1317 {
1318     MemoryRegion *parent = mr->parent;
1319     unsigned priority = mr->priority;
1320     bool may_overlap = mr->may_overlap;
1321
1322     if (addr == mr->addr || !parent) {
1323         mr->addr = addr;
1324         return;
1325     }
1326
1327     memory_region_transaction_begin();
1328     memory_region_del_subregion(parent, mr);
1329     if (may_overlap) {
1330         memory_region_add_subregion_overlap(parent, addr, mr, priority);
1331     } else {
1332         memory_region_add_subregion(parent, addr, mr);
1333     }
1334     memory_region_transaction_commit();
1335 }
1336
1337 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1338 {
1339     target_phys_addr_t old_offset = mr->alias_offset;
1340
1341     assert(mr->alias);
1342     mr->alias_offset = offset;
1343
1344     if (offset == old_offset || !mr->parent) {
1345         return;
1346     }
1347
1348     memory_region_update_topology(mr);
1349 }
1350
1351 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1352 {
1353     return mr->ram_addr;
1354 }
1355
1356 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1357 {
1358     const AddrRange *addr = addr_;
1359     const FlatRange *fr = fr_;
1360
1361     if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1362         return -1;
1363     } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1364         return 1;
1365     }
1366     return 0;
1367 }
1368
1369 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1370 {
1371     return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1372                    sizeof(FlatRange), cmp_flatrange_addr);
1373 }
1374
1375 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1376                                        target_phys_addr_t addr, uint64_t size)
1377 {
1378     AddressSpace *as = memory_region_to_address_space(address_space);
1379     AddrRange range = addrrange_make(int128_make64(addr),
1380                                      int128_make64(size));
1381     FlatRange *fr = address_space_lookup(as, range);
1382     MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1383
1384     if (!fr) {
1385         return ret;
1386     }
1387
1388     while (fr > as->current_map.ranges
1389            && addrrange_intersects(fr[-1].addr, range)) {
1390         --fr;
1391     }
1392
1393     ret.mr = fr->mr;
1394     range = addrrange_intersection(range, fr->addr);
1395     ret.offset_within_region = fr->offset_in_region;
1396     ret.offset_within_region += int128_get64(int128_sub(range.start,
1397                                                         fr->addr.start));
1398     ret.size = int128_get64(range.size);
1399     ret.offset_within_address_space = int128_get64(range.start);
1400     ret.readonly = fr->readonly;
1401     return ret;
1402 }
1403
1404 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1405 {
1406     AddressSpace *as = memory_region_to_address_space(address_space);
1407     FlatRange *fr;
1408
1409     FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1410         MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1411     }
1412 }
1413
1414 void memory_global_dirty_log_start(void)
1415 {
1416     global_dirty_log = true;
1417     MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1418 }
1419
1420 void memory_global_dirty_log_stop(void)
1421 {
1422     global_dirty_log = false;
1423     MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1424 }
1425
1426 static void listener_add_address_space(MemoryListener *listener,
1427                                        AddressSpace *as)
1428 {
1429     FlatRange *fr;
1430
1431     if (global_dirty_log) {
1432         listener->log_global_start(listener);
1433     }
1434     FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1435         MemoryRegionSection section = {
1436             .mr = fr->mr,
1437             .address_space = as->root,
1438             .offset_within_region = fr->offset_in_region,
1439             .size = int128_get64(fr->addr.size),
1440             .offset_within_address_space = int128_get64(fr->addr.start),
1441             .readonly = fr->readonly,
1442         };
1443         listener->region_add(listener, &section);
1444     }
1445 }
1446
1447 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1448 {
1449     MemoryListener *other = NULL;
1450
1451     listener->address_space_filter = filter;
1452     if (QTAILQ_EMPTY(&memory_listeners)
1453         || listener->priority >= QTAILQ_LAST(&memory_listeners,
1454                                              memory_listeners)->priority) {
1455         QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1456     } else {
1457         QTAILQ_FOREACH(other, &memory_listeners, link) {
1458             if (listener->priority < other->priority) {
1459                 break;
1460             }
1461         }
1462         QTAILQ_INSERT_BEFORE(other, listener, link);
1463     }
1464     listener_add_address_space(listener, &address_space_memory);
1465     listener_add_address_space(listener, &address_space_io);
1466 }
1467
1468 void memory_listener_unregister(MemoryListener *listener)
1469 {
1470     QTAILQ_REMOVE(&memory_listeners, listener, link);
1471 }
1472
1473 void set_system_memory_map(MemoryRegion *mr)
1474 {
1475     address_space_memory.root = mr;
1476     memory_region_update_topology(NULL);
1477 }
1478
1479 void set_system_io_map(MemoryRegion *mr)
1480 {
1481     address_space_io.root = mr;
1482     memory_region_update_topology(NULL);
1483 }
1484
1485 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1486 {
1487     return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1488 }
1489
1490 void io_mem_write(int io_index, target_phys_addr_t addr,
1491                   uint64_t val, unsigned size)
1492 {
1493     memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1494 }
1495
1496 typedef struct MemoryRegionList MemoryRegionList;
1497
1498 struct MemoryRegionList {
1499     const MemoryRegion *mr;
1500     bool printed;
1501     QTAILQ_ENTRY(MemoryRegionList) queue;
1502 };
1503
1504 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1505
1506 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1507                            const MemoryRegion *mr, unsigned int level,
1508                            target_phys_addr_t base,
1509                            MemoryRegionListHead *alias_print_queue)
1510 {
1511     MemoryRegionList *new_ml, *ml, *next_ml;
1512     MemoryRegionListHead submr_print_queue;
1513     const MemoryRegion *submr;
1514     unsigned int i;
1515
1516     if (!mr) {
1517         return;
1518     }
1519
1520     for (i = 0; i < level; i++) {
1521         mon_printf(f, "  ");
1522     }
1523
1524     if (mr->alias) {
1525         MemoryRegionList *ml;
1526         bool found = false;
1527
1528         /* check if the alias is already in the queue */
1529         QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1530             if (ml->mr == mr->alias && !ml->printed) {
1531                 found = true;
1532             }
1533         }
1534
1535         if (!found) {
1536             ml = g_new(MemoryRegionList, 1);
1537             ml->mr = mr->alias;
1538             ml->printed = false;
1539             QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1540         }
1541         mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1542                    " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1543                    "-" TARGET_FMT_plx "\n",
1544                    base + mr->addr,
1545                    base + mr->addr
1546                    + (target_phys_addr_t)int128_get64(mr->size) - 1,
1547                    mr->priority,
1548                    mr->readable ? 'R' : '-',
1549                    !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1550                                                                       : '-',
1551                    mr->name,
1552                    mr->alias->name,
1553                    mr->alias_offset,
1554                    mr->alias_offset
1555                    + (target_phys_addr_t)int128_get64(mr->size) - 1);
1556     } else {
1557         mon_printf(f,
1558                    TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1559                    base + mr->addr,
1560                    base + mr->addr
1561                    + (target_phys_addr_t)int128_get64(mr->size) - 1,
1562                    mr->priority,
1563                    mr->readable ? 'R' : '-',
1564                    !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1565                                                                       : '-',
1566                    mr->name);
1567     }
1568
1569     QTAILQ_INIT(&submr_print_queue);
1570
1571     QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1572         new_ml = g_new(MemoryRegionList, 1);
1573         new_ml->mr = submr;
1574         QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1575             if (new_ml->mr->addr < ml->mr->addr ||
1576                 (new_ml->mr->addr == ml->mr->addr &&
1577                  new_ml->mr->priority > ml->mr->priority)) {
1578                 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1579                 new_ml = NULL;
1580                 break;
1581             }
1582         }
1583         if (new_ml) {
1584             QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1585         }
1586     }
1587
1588     QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1589         mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1590                        alias_print_queue);
1591     }
1592
1593     QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1594         g_free(ml);
1595     }
1596 }
1597
1598 void mtree_info(fprintf_function mon_printf, void *f)
1599 {
1600     MemoryRegionListHead ml_head;
1601     MemoryRegionList *ml, *ml2;
1602
1603     QTAILQ_INIT(&ml_head);
1604
1605     mon_printf(f, "memory\n");
1606     mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1607
1608     /* print aliased regions */
1609     QTAILQ_FOREACH(ml, &ml_head, queue) {
1610         if (!ml->printed) {
1611             mon_printf(f, "%s\n", ml->mr->name);
1612             mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1613         }
1614     }
1615
1616     QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1617         g_free(ml);
1618     }
1619
1620     if (address_space_io.root &&
1621         !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1622         QTAILQ_INIT(&ml_head);
1623         mon_printf(f, "I/O\n");
1624         mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1625     }
1626 }
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