2 * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
3 * TI TSC2301 (touchscreen/sensors/keypad).
6 * Copyright (C) 2008 Nokia Corporation
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu/osdep.h"
24 #include "audio/audio.h"
25 #include "qemu/timer.h"
26 #include "ui/console.h"
27 #include "hw/arm/omap.h" /* For I2SCodec and uWireSlave */
28 #include "hw/devices.h"
30 #define TSC_DATA_REGISTERS_PAGE 0x0
31 #define TSC_CONTROL_REGISTERS_PAGE 0x1
32 #define TSC_AUDIO_REGISTERS_PAGE 0x2
36 #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
46 uint8_t in_fifo[16384];
47 uint8_t out_fifo[16384];
53 int state, page, offset, irq;
54 uint16_t command, dav;
74 int64_t volume_change;
78 uint16_t filter_data[0x14];
81 SWVoiceIn *adc_voice[1];
82 SWVoiceOut *dac_voice[1];
98 static const int resolution[4] = { 12, 8, 10, 12 };
100 #define TSC_MODE_NO_SCAN 0x0
101 #define TSC_MODE_XY_SCAN 0x1
102 #define TSC_MODE_XYZ_SCAN 0x2
103 #define TSC_MODE_X 0x3
104 #define TSC_MODE_Y 0x4
105 #define TSC_MODE_Z 0x5
106 #define TSC_MODE_BAT1 0x6
107 #define TSC_MODE_BAT2 0x7
108 #define TSC_MODE_AUX 0x8
109 #define TSC_MODE_AUX_SCAN 0x9
110 #define TSC_MODE_TEMP1 0xa
111 #define TSC_MODE_PORT_SCAN 0xb
112 #define TSC_MODE_TEMP2 0xc
113 #define TSC_MODE_XX_DRV 0xd
114 #define TSC_MODE_YY_DRV 0xe
115 #define TSC_MODE_YX_DRV 0xf
117 static const uint16_t mode_regs[16] = {
118 0x0000, /* No scan */
119 0x0600, /* X, Y scan */
120 0x0780, /* X, Y, Z scan */
127 0x0010, /* AUX scan */
129 0x0070, /* Port scan */
131 0x0000, /* X+, X- drivers */
132 0x0000, /* Y+, Y- drivers */
133 0x0000, /* Y+, X- drivers */
136 #define X_TRANSFORM(s) \
137 ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
138 #define Y_TRANSFORM(s) \
139 ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
140 #define Z1_TRANSFORM(s) \
141 ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
142 #define Z2_TRANSFORM(s) \
143 ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
145 #define BAT1_VAL 0x8660
146 #define BAT2_VAL 0x0000
147 #define AUX1_VAL 0x35c0
148 #define AUX2_VAL 0xffff
149 #define TEMP1_VAL 0x8c70
150 #define TEMP2_VAL 0xa5b0
152 #define TSC_POWEROFF_DELAY 50
153 #define TSC_SOFTSTEP_DELAY 50
155 static void tsc210x_reset(TSC210xState *s)
167 s->audio_ctrl1 = 0x0000;
168 s->audio_ctrl2 = 0x4410;
169 s->audio_ctrl3 = 0x0000;
174 s->dac_power = 0x8540;
176 s->volume_change = 0;
178 s->filter_data[0x00] = 0x6be3;
179 s->filter_data[0x01] = 0x9666;
180 s->filter_data[0x02] = 0x675d;
181 s->filter_data[0x03] = 0x6be3;
182 s->filter_data[0x04] = 0x9666;
183 s->filter_data[0x05] = 0x675d;
184 s->filter_data[0x06] = 0x7d83;
185 s->filter_data[0x07] = 0x84ee;
186 s->filter_data[0x08] = 0x7d83;
187 s->filter_data[0x09] = 0x84ee;
188 s->filter_data[0x0a] = 0x6be3;
189 s->filter_data[0x0b] = 0x9666;
190 s->filter_data[0x0c] = 0x675d;
191 s->filter_data[0x0d] = 0x6be3;
192 s->filter_data[0x0e] = 0x9666;
193 s->filter_data[0x0f] = 0x675d;
194 s->filter_data[0x10] = 0x7d83;
195 s->filter_data[0x11] = 0x84ee;
196 s->filter_data[0x12] = 0x7d83;
197 s->filter_data[0x13] = 0x84ee;
208 qemu_set_irq(s->pint, !s->irq);
209 qemu_set_irq(s->davint, !s->dav);
210 qemu_irq_raise(s->kbint);
219 /* { rate, dsor, fsref } */
220 static const TSC210xRateInfo tsc2102_rates[] = {
249 static inline void tsc210x_out_flush(TSC210xState *s, int len)
251 uint8_t *data = s->codec.out.fifo + s->codec.out.start;
252 uint8_t *end = data + len;
255 data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
257 s->codec.out.len -= len;
258 if (s->codec.out.len)
259 memmove(s->codec.out.fifo, end, s->codec.out.len);
260 s->codec.out.start = 0;
263 static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
265 if (s->codec.out.len >= free_b) {
266 tsc210x_out_flush(s, free_b);
270 s->codec.out.size = MIN(free_b, 16384);
271 qemu_irq_raise(s->codec.tx_start);
274 static void tsc2102_audio_rate_update(TSC210xState *s)
276 const TSC210xRateInfo *rate;
278 s->codec.tx_rate = 0;
279 s->codec.rx_rate = 0;
280 if (s->dac_power & (1 << 15)) /* PWDNC */
283 for (rate = tsc2102_rates; rate->rate; rate ++)
284 if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
285 rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
288 printf("%s: unknown sampling rate configured\n", __FUNCTION__);
292 s->codec.tx_rate = rate->rate;
295 static void tsc2102_audio_output_update(TSC210xState *s)
298 struct audsettings fmt;
300 if (s->dac_voice[0]) {
301 tsc210x_out_flush(s, s->codec.out.len);
302 s->codec.out.size = 0;
303 AUD_set_active_out(s->dac_voice[0], 0);
304 AUD_close_out(&s->card, s->dac_voice[0]);
305 s->dac_voice[0] = NULL;
310 (~s->dac_power & (1 << 15)) && /* PWDNC */
311 (~s->dac_power & (1 << 10)); /* DAPWDN */
312 if (!enable || !s->codec.tx_rate)
315 /* Force our own sampling rate even in slave DAC mode */
318 fmt.freq = s->codec.tx_rate;
319 fmt.fmt = AUD_FMT_S16;
321 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
322 "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
323 if (s->dac_voice[0]) {
325 AUD_set_active_out(s->dac_voice[0], 1);
329 static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
334 return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
340 return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
345 return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
350 return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
353 case 0x04: /* KPData */
354 if ((s->model & 0xff00) == 0x2300) {
355 if (s->kb.intr && (s->kb.mode & 2)) {
357 qemu_irq_raise(s->kbint);
364 case 0x05: /* BAT1 */
366 return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
369 case 0x06: /* BAT2 */
371 return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
373 case 0x07: /* AUX1 */
375 return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
377 case 0x08: /* AUX2 */
381 case 0x09: /* TEMP1 */
383 return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
386 case 0x0a: /* TEMP2 */
388 return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
397 fprintf(stderr, "tsc2102_data_register_read: "
398 "no such register: 0x%02x\n", reg);
404 static uint16_t tsc2102_control_register_read(
405 TSC210xState *s, int reg)
408 case 0x00: /* TSC ADC */
409 return (s->pressure << 15) | ((!s->busy) << 14) |
410 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
412 case 0x01: /* Status / Keypad Control */
413 if ((s->model & 0xff00) == 0x2100)
414 return (s->pin_func << 14) | ((!s->enabled) << 13) |
415 (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
417 return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
418 (s->kb.debounce << 11);
420 case 0x02: /* DAC Control */
421 if ((s->model & 0xff00) == 0x2300)
422 return s->dac_power & 0x8000;
426 case 0x03: /* Reference */
429 case 0x04: /* Reset */
432 case 0x05: /* Configuration */
435 case 0x06: /* Secondary configuration */
436 if ((s->model & 0xff00) == 0x2100)
438 return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
440 case 0x10: /* Keypad Mask */
441 if ((s->model & 0xff00) == 0x2100)
448 fprintf(stderr, "tsc2102_control_register_read: "
449 "no such register: 0x%02x\n", reg);
455 static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
461 case 0x00: /* Audio Control 1 */
462 return s->audio_ctrl1;
467 case 0x02: /* DAC Volume Control */
473 case 0x04: /* Audio Control 2 */
476 if (s->softstep && !(s->dac_power & (1 << 10))) {
477 l_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
478 s->volume_change + TSC_SOFTSTEP_DELAY);
479 r_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
480 s->volume_change + TSC_SOFTSTEP_DELAY);
483 return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
485 case 0x05: /* Stereo DAC Power Control */
486 return 0x2aa0 | s->dac_power |
487 (((s->dac_power & (1 << 10)) &&
488 (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
489 s->powerdown + TSC_POWEROFF_DELAY)) << 6);
491 case 0x06: /* Audio Control 3 */
492 val = s->audio_ctrl3 | 0x0001;
493 s->audio_ctrl3 &= 0xff3f;
496 case 0x07: /* LCH_BASS_BOOST_N0 */
497 case 0x08: /* LCH_BASS_BOOST_N1 */
498 case 0x09: /* LCH_BASS_BOOST_N2 */
499 case 0x0a: /* LCH_BASS_BOOST_N3 */
500 case 0x0b: /* LCH_BASS_BOOST_N4 */
501 case 0x0c: /* LCH_BASS_BOOST_N5 */
502 case 0x0d: /* LCH_BASS_BOOST_D1 */
503 case 0x0e: /* LCH_BASS_BOOST_D2 */
504 case 0x0f: /* LCH_BASS_BOOST_D4 */
505 case 0x10: /* LCH_BASS_BOOST_D5 */
506 case 0x11: /* RCH_BASS_BOOST_N0 */
507 case 0x12: /* RCH_BASS_BOOST_N1 */
508 case 0x13: /* RCH_BASS_BOOST_N2 */
509 case 0x14: /* RCH_BASS_BOOST_N3 */
510 case 0x15: /* RCH_BASS_BOOST_N4 */
511 case 0x16: /* RCH_BASS_BOOST_N5 */
512 case 0x17: /* RCH_BASS_BOOST_D1 */
513 case 0x18: /* RCH_BASS_BOOST_D2 */
514 case 0x19: /* RCH_BASS_BOOST_D4 */
515 case 0x1a: /* RCH_BASS_BOOST_D5 */
516 return s->filter_data[reg - 0x07];
518 case 0x1b: /* PLL Programmability 1 */
521 case 0x1c: /* PLL Programmability 2 */
524 case 0x1d: /* Audio Control 4 */
525 return (!s->softstep) << 14;
529 fprintf(stderr, "tsc2102_audio_register_read: "
530 "no such register: 0x%02x\n", reg);
536 static void tsc2102_data_register_write(
537 TSC210xState *s, int reg, uint16_t value)
544 case 0x05: /* BAT1 */
545 case 0x06: /* BAT2 */
546 case 0x07: /* AUX1 */
547 case 0x08: /* AUX2 */
548 case 0x09: /* TEMP1 */
549 case 0x0a: /* TEMP2 */
554 fprintf(stderr, "tsc2102_data_register_write: "
555 "no such register: 0x%02x\n", reg);
560 static void tsc2102_control_register_write(
561 TSC210xState *s, int reg, uint16_t value)
564 case 0x00: /* TSC ADC */
565 s->host_mode = value >> 15;
566 s->enabled = !(value & 0x4000);
567 if (s->busy && !s->enabled)
569 s->busy &= s->enabled;
570 s->nextfunction = (value >> 10) & 0xf;
571 s->nextprecision = (value >> 8) & 3;
572 s->filter = value & 0xff;
575 case 0x01: /* Status / Keypad Control */
576 if ((s->model & 0xff00) == 0x2100)
577 s->pin_func = value >> 14;
579 s->kb.scan = (value >> 14) & 1;
580 s->kb.debounce = (value >> 11) & 7;
581 if (s->kb.intr && s->kb.scan) {
583 qemu_irq_raise(s->kbint);
588 case 0x02: /* DAC Control */
589 if ((s->model & 0xff00) == 0x2300) {
590 s->dac_power &= 0x7fff;
591 s->dac_power |= 0x8000 & value;
596 case 0x03: /* Reference */
597 s->ref = value & 0x1f;
600 case 0x04: /* Reset */
601 if (value == 0xbb00) {
607 fprintf(stderr, "tsc2102_control_register_write: "
608 "wrong value written into RESET\n");
613 case 0x05: /* Configuration */
614 s->timing = value & 0x3f;
617 fprintf(stderr, "tsc2102_control_register_write: "
618 "wrong value written into CONFIG\n");
622 case 0x06: /* Secondary configuration */
623 if ((s->model & 0xff00) == 0x2100)
625 s->kb.mode = value >> 14;
626 s->pll[2] = value & 0x3ffff;
629 case 0x10: /* Keypad Mask */
630 if ((s->model & 0xff00) == 0x2100)
638 fprintf(stderr, "tsc2102_control_register_write: "
639 "no such register: 0x%02x\n", reg);
644 static void tsc2102_audio_register_write(
645 TSC210xState *s, int reg, uint16_t value)
648 case 0x00: /* Audio Control 1 */
649 s->audio_ctrl1 = value & 0x0f3f;
651 if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
652 fprintf(stderr, "tsc2102_audio_register_write: "
653 "wrong value written into Audio 1\n");
655 tsc2102_audio_rate_update(s);
656 tsc2102_audio_output_update(s);
662 fprintf(stderr, "tsc2102_audio_register_write: "
663 "wrong value written into reg 0x01\n");
667 case 0x02: /* DAC Volume Control */
669 s->volume_change = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
675 fprintf(stderr, "tsc2102_audio_register_write: "
676 "wrong value written into reg 0x03\n");
680 case 0x04: /* Audio Control 2 */
681 s->audio_ctrl2 = value & 0xf7f2;
684 fprintf(stderr, "tsc2102_audio_register_write: "
685 "wrong value written into Audio 2\n");
689 case 0x05: /* Stereo DAC Power Control */
690 if ((value & ~s->dac_power) & (1 << 10))
691 s->powerdown = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
693 s->dac_power = value & 0x9543;
695 if ((value & ~0x9543) != 0x2aa0)
696 fprintf(stderr, "tsc2102_audio_register_write: "
697 "wrong value written into Power\n");
699 tsc2102_audio_rate_update(s);
700 tsc2102_audio_output_update(s);
703 case 0x06: /* Audio Control 3 */
704 s->audio_ctrl3 &= 0x00c0;
705 s->audio_ctrl3 |= value & 0xf800;
708 fprintf(stderr, "tsc2102_audio_register_write: "
709 "wrong value written into Audio 3\n");
711 tsc2102_audio_output_update(s);
714 case 0x07: /* LCH_BASS_BOOST_N0 */
715 case 0x08: /* LCH_BASS_BOOST_N1 */
716 case 0x09: /* LCH_BASS_BOOST_N2 */
717 case 0x0a: /* LCH_BASS_BOOST_N3 */
718 case 0x0b: /* LCH_BASS_BOOST_N4 */
719 case 0x0c: /* LCH_BASS_BOOST_N5 */
720 case 0x0d: /* LCH_BASS_BOOST_D1 */
721 case 0x0e: /* LCH_BASS_BOOST_D2 */
722 case 0x0f: /* LCH_BASS_BOOST_D4 */
723 case 0x10: /* LCH_BASS_BOOST_D5 */
724 case 0x11: /* RCH_BASS_BOOST_N0 */
725 case 0x12: /* RCH_BASS_BOOST_N1 */
726 case 0x13: /* RCH_BASS_BOOST_N2 */
727 case 0x14: /* RCH_BASS_BOOST_N3 */
728 case 0x15: /* RCH_BASS_BOOST_N4 */
729 case 0x16: /* RCH_BASS_BOOST_N5 */
730 case 0x17: /* RCH_BASS_BOOST_D1 */
731 case 0x18: /* RCH_BASS_BOOST_D2 */
732 case 0x19: /* RCH_BASS_BOOST_D4 */
733 case 0x1a: /* RCH_BASS_BOOST_D5 */
734 s->filter_data[reg - 0x07] = value;
737 case 0x1b: /* PLL Programmability 1 */
738 s->pll[0] = value & 0xfffc;
741 fprintf(stderr, "tsc2102_audio_register_write: "
742 "wrong value written into PLL 1\n");
746 case 0x1c: /* PLL Programmability 2 */
747 s->pll[1] = value & 0xfffc;
750 fprintf(stderr, "tsc2102_audio_register_write: "
751 "wrong value written into PLL 2\n");
755 case 0x1d: /* Audio Control 4 */
756 s->softstep = !(value & 0x4000);
759 fprintf(stderr, "tsc2102_audio_register_write: "
760 "wrong value written into Audio 4\n");
766 fprintf(stderr, "tsc2102_audio_register_write: "
767 "no such register: 0x%02x\n", reg);
772 /* This handles most of the chip logic. */
773 static void tsc210x_pin_update(TSC210xState *s)
778 switch (s->pin_func) {
780 pin_state = s->pressure;
783 pin_state = !!s->dav;
787 pin_state = s->pressure && !s->dav;
793 if (pin_state != s->irq) {
795 qemu_set_irq(s->pint, !s->irq);
798 switch (s->nextfunction) {
799 case TSC_MODE_XY_SCAN:
800 case TSC_MODE_XYZ_SCAN:
820 case TSC_MODE_AUX_SCAN:
821 case TSC_MODE_PORT_SCAN:
824 case TSC_MODE_NO_SCAN:
825 case TSC_MODE_XX_DRV:
826 case TSC_MODE_YY_DRV:
827 case TSC_MODE_YX_DRV:
832 if (!s->enabled || s->busy || s->dav)
836 s->precision = s->nextprecision;
837 s->function = s->nextfunction;
838 expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
839 (NANOSECONDS_PER_SECOND >> 10);
840 timer_mod(s->timer, expires);
843 static uint16_t tsc210x_read(TSC210xState *s)
845 uint16_t ret = 0x0000;
848 fprintf(stderr, "tsc210x_read: SPI underrun!\n");
851 case TSC_DATA_REGISTERS_PAGE:
852 ret = tsc2102_data_register_read(s, s->offset);
854 qemu_irq_raise(s->davint);
856 case TSC_CONTROL_REGISTERS_PAGE:
857 ret = tsc2102_control_register_read(s, s->offset);
859 case TSC_AUDIO_REGISTERS_PAGE:
860 ret = tsc2102_audio_register_read(s, s->offset);
863 hw_error("tsc210x_read: wrong memory page\n");
866 tsc210x_pin_update(s);
868 /* Allow sequential reads. */
874 static void tsc210x_write(TSC210xState *s, uint16_t value)
877 * This is a two-state state machine for reading
878 * command and data every second time.
881 s->command = value >> 15;
882 s->page = (value >> 11) & 0x0f;
883 s->offset = (value >> 5) & 0x3f;
887 fprintf(stderr, "tsc210x_write: SPI overrun!\n");
890 case TSC_DATA_REGISTERS_PAGE:
891 tsc2102_data_register_write(s, s->offset, value);
893 case TSC_CONTROL_REGISTERS_PAGE:
894 tsc2102_control_register_write(s, s->offset, value);
896 case TSC_AUDIO_REGISTERS_PAGE:
897 tsc2102_audio_register_write(s, s->offset, value);
900 hw_error("tsc210x_write: wrong memory page\n");
903 tsc210x_pin_update(s);
908 uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
910 TSC210xState *s = opaque;
914 hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
916 /* TODO: sequential reads etc - how do we make sure the host doesn't
917 * unintentionally read out a conversion result from a register while
918 * transmitting the command word of the next command? */
919 if (!value || (s->state && s->command))
920 ret = tsc210x_read(s);
921 if (value || (s->state && !s->command))
922 tsc210x_write(s, value);
927 static void tsc210x_timer_tick(void *opaque)
929 TSC210xState *s = opaque;
931 /* Timer ticked -- a set of conversions has been finished. */
937 s->dav |= mode_regs[s->function];
938 tsc210x_pin_update(s);
939 qemu_irq_lower(s->davint);
942 static void tsc210x_touchscreen_event(void *opaque,
943 int x, int y, int z, int buttons_state)
945 TSC210xState *s = opaque;
952 s->pressure = !!buttons_state;
955 * Note: We would get better responsiveness in the guest by
956 * signaling TS events immediately, but for now we simulate
957 * the first conversion delay for sake of correctness.
959 if (p != s->pressure)
960 tsc210x_pin_update(s);
963 static void tsc210x_i2s_swallow(TSC210xState *s)
966 tsc210x_out_flush(s, s->codec.out.len);
968 s->codec.out.len = 0;
971 static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
973 s->i2s_tx_rate = out;
977 static void tsc210x_save(QEMUFile *f, void *opaque)
979 TSC210xState *s = (TSC210xState *) opaque;
980 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
983 qemu_put_be16(f, s->x);
984 qemu_put_be16(f, s->y);
985 qemu_put_byte(f, s->pressure);
987 qemu_put_byte(f, s->state);
988 qemu_put_byte(f, s->page);
989 qemu_put_byte(f, s->offset);
990 qemu_put_byte(f, s->command);
992 qemu_put_byte(f, s->irq);
993 qemu_put_be16s(f, &s->dav);
995 timer_put(f, s->timer);
996 qemu_put_byte(f, s->enabled);
997 qemu_put_byte(f, s->host_mode);
998 qemu_put_byte(f, s->function);
999 qemu_put_byte(f, s->nextfunction);
1000 qemu_put_byte(f, s->precision);
1001 qemu_put_byte(f, s->nextprecision);
1002 qemu_put_byte(f, s->filter);
1003 qemu_put_byte(f, s->pin_func);
1004 qemu_put_byte(f, s->ref);
1005 qemu_put_byte(f, s->timing);
1006 qemu_put_be32(f, s->noise);
1008 qemu_put_be16s(f, &s->audio_ctrl1);
1009 qemu_put_be16s(f, &s->audio_ctrl2);
1010 qemu_put_be16s(f, &s->audio_ctrl3);
1011 qemu_put_be16s(f, &s->pll[0]);
1012 qemu_put_be16s(f, &s->pll[1]);
1013 qemu_put_be16s(f, &s->volume);
1014 qemu_put_sbe64(f, (s->volume_change - now));
1015 qemu_put_sbe64(f, (s->powerdown - now));
1016 qemu_put_byte(f, s->softstep);
1017 qemu_put_be16s(f, &s->dac_power);
1019 for (i = 0; i < 0x14; i ++)
1020 qemu_put_be16s(f, &s->filter_data[i]);
1023 static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
1025 TSC210xState *s = (TSC210xState *) opaque;
1026 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
1029 s->x = qemu_get_be16(f);
1030 s->y = qemu_get_be16(f);
1031 s->pressure = qemu_get_byte(f);
1033 s->state = qemu_get_byte(f);
1034 s->page = qemu_get_byte(f);
1035 s->offset = qemu_get_byte(f);
1036 s->command = qemu_get_byte(f);
1038 s->irq = qemu_get_byte(f);
1039 qemu_get_be16s(f, &s->dav);
1041 timer_get(f, s->timer);
1042 s->enabled = qemu_get_byte(f);
1043 s->host_mode = qemu_get_byte(f);
1044 s->function = qemu_get_byte(f);
1045 if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
1048 s->nextfunction = qemu_get_byte(f);
1049 if (s->nextfunction < 0 || s->nextfunction >= ARRAY_SIZE(mode_regs)) {
1052 s->precision = qemu_get_byte(f);
1053 if (s->precision < 0 || s->precision >= ARRAY_SIZE(resolution)) {
1056 s->nextprecision = qemu_get_byte(f);
1057 if (s->nextprecision < 0 || s->nextprecision >= ARRAY_SIZE(resolution)) {
1060 s->filter = qemu_get_byte(f);
1061 s->pin_func = qemu_get_byte(f);
1062 s->ref = qemu_get_byte(f);
1063 s->timing = qemu_get_byte(f);
1064 s->noise = qemu_get_be32(f);
1066 qemu_get_be16s(f, &s->audio_ctrl1);
1067 qemu_get_be16s(f, &s->audio_ctrl2);
1068 qemu_get_be16s(f, &s->audio_ctrl3);
1069 qemu_get_be16s(f, &s->pll[0]);
1070 qemu_get_be16s(f, &s->pll[1]);
1071 qemu_get_be16s(f, &s->volume);
1072 s->volume_change = qemu_get_sbe64(f) + now;
1073 s->powerdown = qemu_get_sbe64(f) + now;
1074 s->softstep = qemu_get_byte(f);
1075 qemu_get_be16s(f, &s->dac_power);
1077 for (i = 0; i < 0x14; i ++)
1078 qemu_get_be16s(f, &s->filter_data[i]);
1080 s->busy = timer_pending(s->timer);
1081 qemu_set_irq(s->pint, !s->irq);
1082 qemu_set_irq(s->davint, !s->dav);
1087 uWireSlave *tsc2102_init(qemu_irq pint)
1091 s = g_new0(TSC210xState, 1);
1095 s->precision = s->nextprecision = 0;
1096 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
1099 s->name = "tsc2102";
1111 s->chip.send = (void *) tsc210x_write;
1112 s->chip.receive = (void *) tsc210x_read;
1114 s->codec.opaque = s;
1115 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1116 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1117 s->codec.in.fifo = s->in_fifo;
1118 s->codec.out.fifo = s->out_fifo;
1122 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1123 "QEMU TSC2102-driven Touchscreen");
1125 AUD_register_card(s->name, &s->card);
1127 qemu_register_reset((void *) tsc210x_reset, s);
1128 register_savevm(NULL, s->name, -1, 0,
1129 tsc210x_save, tsc210x_load, s);
1134 uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
1138 s = g_new0(TSC210xState, 1);
1142 s->precision = s->nextprecision = 0;
1143 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
1148 s->name = "tsc2301";
1160 s->chip.send = (void *) tsc210x_write;
1161 s->chip.receive = (void *) tsc210x_read;
1163 s->codec.opaque = s;
1164 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1165 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1166 s->codec.in.fifo = s->in_fifo;
1167 s->codec.out.fifo = s->out_fifo;
1171 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1172 "QEMU TSC2301-driven Touchscreen");
1174 AUD_register_card(s->name, &s->card);
1176 qemu_register_reset((void *) tsc210x_reset, s);
1177 register_savevm(NULL, s->name, -1, 0, tsc210x_save, tsc210x_load, s);
1182 I2SCodec *tsc210x_codec(uWireSlave *chip)
1184 TSC210xState *s = (TSC210xState *) chip->opaque;
1190 * Use tslib generated calibration data to generate ADC input values
1191 * from the touchscreen. Assuming 12-bit precision was used during
1192 * tslib calibration.
1194 void tsc210x_set_transform(uWireSlave *chip,
1195 MouseTransformInfo *info)
1197 TSC210xState *s = (TSC210xState *) chip->opaque;
1201 ltr[0] = (int64_t) info->a[1] * info->y;
1202 ltr[1] = (int64_t) info->a[4] * info->x;
1203 ltr[2] = (int64_t) info->a[1] * info->a[3] -
1204 (int64_t) info->a[4] * info->a[0];
1205 ltr[3] = (int64_t) info->a[2] * info->a[4] -
1206 (int64_t) info->a[5] * info->a[1];
1207 ltr[4] = (int64_t) info->a[0] * info->y;
1208 ltr[5] = (int64_t) info->a[3] * info->x;
1209 ltr[6] = (int64_t) info->a[4] * info->a[0] -
1210 (int64_t) info->a[1] * info->a[3];
1211 ltr[7] = (int64_t) info->a[2] * info->a[3] -
1212 (int64_t) info->a[5] * info->a[0];
1214 /* Avoid integer overflow */
1215 s->tr[0] = ltr[0] >> 11;
1216 s->tr[1] = ltr[1] >> 11;
1217 s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
1218 s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
1219 s->tr[4] = ltr[4] >> 11;
1220 s->tr[5] = ltr[5] >> 11;
1221 s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
1222 s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
1225 /* This version assumes touchscreen X & Y axis are parallel or
1226 * perpendicular to LCD's X & Y axis in some way. */
1227 if (abs(info->a[0]) > abs(info->a[1])) {
1229 s->tr[1] = -info->a[6] * info->x;
1230 s->tr[2] = info->a[0];
1231 s->tr[3] = -info->a[2] / info->a[0];
1232 s->tr[4] = info->a[6] * info->y;
1234 s->tr[6] = info->a[4];
1235 s->tr[7] = -info->a[5] / info->a[4];
1237 s->tr[0] = info->a[6] * info->y;
1239 s->tr[2] = info->a[1];
1240 s->tr[3] = -info->a[2] / info->a[1];
1242 s->tr[5] = -info->a[6] * info->x;
1243 s->tr[6] = info->a[3];
1244 s->tr[7] = -info->a[5] / info->a[3];
1256 void tsc210x_key_event(uWireSlave *chip, int key, int down)
1258 TSC210xState *s = (TSC210xState *) chip->opaque;
1261 s->kb.down |= 1 << key;
1263 s->kb.down &= ~(1 << key);
1265 if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
1267 qemu_irq_lower(s->kbint);
1268 } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
1269 !(s->kb.mode & 1)) {
1271 qemu_irq_raise(s->kbint);