target-i386/cpuid.c

   1 /*
   2  *  i386 CPUID helper functions
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <stdlib.h>
  20 #include <stdio.h>
  21 #include <string.h>
  22 #include <inttypes.h>
  23
  24 #include "cpu.h"
  25 #include "kvm.h"
  26
  27 #include "qemu-option.h"
  28 #include "qemu-config.h"
  29
  30 /* feature flags taken from "Intel Processor Identification and the CPUID
  31  * Instruction" and AMD's "CPUID Specification".  In cases of disagreement
  32  * between feature naming conventions, aliases may be added.
  33  */
  34 static const char *feature_name[] = {
  35     "fpu", "vme", "de", "pse",
  36     "tsc", "msr", "pae", "mce",
  37     "cx8", "apic", NULL, "sep",
  38     "mtrr", "pge", "mca", "cmov",
  39     "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
  40     NULL, "ds" /* Intel dts */, "acpi", "mmx",
  41     "fxsr", "sse", "sse2", "ss",
  42     "ht" /* Intel htt */, "tm", "ia64", "pbe",
  43 };
  44 static const char *ext_feature_name[] = {
  45     "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
  46     "ds_cpl", "vmx", "smx", "est",
  47     "tm2", "ssse3", "cid", NULL,
  48     "fma", "cx16", "xtpr", "pdcm",
  49     NULL, NULL, "dca", "sse4.1|sse4_1",
  50     "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
  51     NULL, "aes", "xsave", "osxsave",
  52     "avx", NULL, NULL, "hypervisor",
  53 };
  54 static const char *ext2_feature_name[] = {
  55     "fpu", "vme", "de", "pse",
  56     "tsc", "msr", "pae", "mce",
  57     "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
  58     "mtrr", "pge", "mca", "cmov",
  59     "pat", "pse36", NULL, NULL /* Linux mp */,
  60     "nx" /* Intel xd */, NULL, "mmxext", "mmx",
  61     "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
  62     NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
  63 };
  64 static const char *ext3_feature_name[] = {
  65     "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
  66     "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
  67     "3dnowprefetch", "osvw", "ibs", "xop",
  68     "skinit", "wdt", NULL, NULL,
  69     "fma4", NULL, "cvt16", "nodeid_msr",
  70     NULL, NULL, NULL, NULL,
  71     NULL, NULL, NULL, NULL,
  72     NULL, NULL, NULL, NULL,
  73 };
  74
  75 static const char *kvm_feature_name[] = {
  76     "kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL,
  77     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  78     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  79     NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  80 };
  81
  82 static const char *svm_feature_name[] = {
  83     "npt", "lbrv", "svm_lock", "nrip_save",
  84     "tsc_scale", "vmcb_clean",  "flushbyasid", "decodeassists",
  85     NULL, NULL, "pause_filter", NULL,
  86     "pfthreshold", NULL, NULL, NULL,
  87     NULL, NULL, NULL, NULL,
  88     NULL, NULL, NULL, NULL,
  89     NULL, NULL, NULL, NULL,
  90     NULL, NULL, NULL, NULL,
  91 };
  92
  93 /* collects per-function cpuid data
  94  */
  95 typedef struct model_features_t {
  96     uint32_t *guest_feat;
  97     uint32_t *host_feat;
  98     uint32_t check_feat;
  99     const char **flag_names;
 100     uint32_t cpuid;
 101     } model_features_t;
 102
 103 int check_cpuid = 0;
 104 int enforce_cpuid = 0;
 105
 106 static void host_cpuid(uint32_t function, uint32_t count,
 107                        uint32_t *eax, uint32_t *ebx,
 108                        uint32_t *ecx, uint32_t *edx)
 109 {
 110 #if defined(CONFIG_KVM)
 111     uint32_t vec[4];
 112
 113 #ifdef __x86_64__
 114     asm volatile("cpuid"
 115                  : "=a"(vec[0]), "=b"(vec[1]),
 116                    "=c"(vec[2]), "=d"(vec[3])
 117                  : "0"(function), "c"(count) : "cc");
 118 #else
 119     asm volatile("pusha \n\t"
 120                  "cpuid \n\t"
 121                  "mov %%eax, 0(%2) \n\t"
 122                  "mov %%ebx, 4(%2) \n\t"
 123                  "mov %%ecx, 8(%2) \n\t"
 124                  "mov %%edx, 12(%2) \n\t"
 125                  "popa"
 126                  : : "a"(function), "c"(count), "S"(vec)
 127                  : "memory", "cc");
 128 #endif
 129
 130     if (eax)
 131         *eax = vec[0];
 132     if (ebx)
 133         *ebx = vec[1];
 134     if (ecx)
 135         *ecx = vec[2];
 136     if (edx)
 137         *edx = vec[3];
 138 #endif
 139 }
 140
 141 #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
 142
 143 /* general substring compare of *[s1..e1) and *[s2..e2).  sx is start of
 144  * a substring.  ex if !NULL points to the first char after a substring,
 145  * otherwise the string is assumed to sized by a terminating nul.
 146  * Return lexical ordering of *s1:*s2.
 147  */
 148 static int sstrcmp(const char *s1, const char *e1, const char *s2,
 149     const char *e2)
 150 {
 151     for (;;) {
 152         if (!*s1 || !*s2 || *s1 != *s2)
 153             return (*s1 - *s2);
 154         ++s1, ++s2;
 155         if (s1 == e1 && s2 == e2)
 156             return (0);
 157         else if (s1 == e1)
 158             return (*s2);
 159         else if (s2 == e2)
 160             return (*s1);
 161     }
 162 }
 163
 164 /* compare *[s..e) to *altstr.  *altstr may be a simple string or multiple
 165  * '|' delimited (possibly empty) strings in which case search for a match
 166  * within the alternatives proceeds left to right.  Return 0 for success,
 167  * non-zero otherwise.
 168  */
 169 static int altcmp(const char *s, const char *e, const char *altstr)
 170 {
 171     const char *p, *q;
 172
 173     for (q = p = altstr; ; ) {
 174         while (*p && *p != '|')
 175             ++p;
 176         if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
 177             return (0);
 178         if (!*p)
 179             return (1);
 180         else
 181             q = ++p;
 182     }
 183 }
 184
 185 /* search featureset for flag *[s..e), if found set corresponding bit in
 186  * *pval and return success, otherwise return zero
 187  */
 188 static int lookup_feature(uint32_t *pval, const char *s, const char *e,
 189     const char **featureset)
 190 {
 191     uint32_t mask;
 192     const char **ppc;
 193
 194     for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc)
 195         if (*ppc && !altcmp(s, e, *ppc)) {
 196             *pval |= mask;
 197             break;
 198         }
 199     return (mask ? 1 : 0);
 200 }
 201
 202 static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
 203                                     uint32_t *ext_features,
 204                                     uint32_t *ext2_features,
 205                                     uint32_t *ext3_features,
 206                                     uint32_t *kvm_features,
 207                                     uint32_t *svm_features)
 208 {
 209     if (!lookup_feature(features, flagname, NULL, feature_name) &&
 210         !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
 211         !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
 212         !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
 213         !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
 214         !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
 215             fprintf(stderr, "CPU feature %s not found\n", flagname);
 216 }
 217
 218 typedef struct x86_def_t {
 219     struct x86_def_t *next;
 220     const char *name;
 221     uint32_t level;
 222     uint32_t vendor1, vendor2, vendor3;
 223     int family;
 224     int model;
 225     int stepping;
 226     uint32_t features, ext_features, ext2_features, ext3_features;
 227     uint32_t kvm_features, svm_features;
 228     uint32_t xlevel;
 229     char model_id[48];
 230     int vendor_override;
 231     uint32_t flags;
 232 } x86_def_t;
 233
 234 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
 235 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
 236           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
 237 #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
 238           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
 239           CPUID_PSE36 | CPUID_FXSR)
 240 #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
 241 #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
 242           CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
 243           CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
 244           CPUID_PAE | CPUID_SEP | CPUID_APIC)
 245 #define EXT2_FEATURE_MASK 0x0183F3FF
 246
 247 #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
 248           CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
 249           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
 250           CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
 251           CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
 252           /* partly implemented:
 253           CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
 254           CPUID_PSE36 (needed for Solaris) */
 255           /* missing:
 256           CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
 257 #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
 258           CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
 259           CPUID_EXT_HYPERVISOR)
 260           /* missing:
 261           CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
 262           CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
 263 #define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
 264           CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
 265           CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
 266           /* missing:
 267           CPUID_EXT2_PDPE1GB */
 268 #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
 269           CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
 270 #define TCG_SVM_FEATURES 0
 271
 272 /* maintains list of cpu model definitions
 273  */
 274 static x86_def_t *x86_defs = {NULL};
 275
 276 /* built-in cpu model definitions (deprecated)
 277  */
 278 static x86_def_t builtin_x86_defs[] = {
 279     {
 280         .name = "qemu64",
 281         .level = 4,
 282         .vendor1 = CPUID_VENDOR_AMD_1,
 283         .vendor2 = CPUID_VENDOR_AMD_2,
 284         .vendor3 = CPUID_VENDOR_AMD_3,
 285         .family = 6,
 286         .model = 2,
 287         .stepping = 3,
 288         .features = PPRO_FEATURES |
 289             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
 290             CPUID_PSE36,
 291         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
 292         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
 293             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
 294         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
 295             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
 296         .xlevel = 0x8000000A,
 297         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
 298     },
 299     {
 300         .name = "phenom",
 301         .level = 5,
 302         .vendor1 = CPUID_VENDOR_AMD_1,
 303         .vendor2 = CPUID_VENDOR_AMD_2,
 304         .vendor3 = CPUID_VENDOR_AMD_3,
 305         .family = 16,
 306         .model = 2,
 307         .stepping = 3,
 308         .features = PPRO_FEATURES |
 309             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
 310             CPUID_PSE36 | CPUID_VME | CPUID_HT,
 311         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
 312             CPUID_EXT_POPCNT,
 313         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
 314             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
 315             CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
 316             CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
 317         /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
 318                     CPUID_EXT3_CR8LEG,
 319                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
 320                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
 321         .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
 322             CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
 323         .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
 324         .xlevel = 0x8000001A,
 325         .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
 326     },
 327     {
 328         .name = "core2duo",
 329         .level = 10,
 330         .family = 6,
 331         .model = 15,
 332         .stepping = 11,
 333         .features = PPRO_FEATURES |
 334             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
 335             CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
 336             CPUID_HT | CPUID_TM | CPUID_PBE,
 337         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
 338             CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
 339             CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
 340         .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
 341         .ext3_features = CPUID_EXT3_LAHF_LM,
 342         .xlevel = 0x80000008,
 343         .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
 344     },
 345     {
 346         .name = "kvm64",
 347         .level = 5,
 348         .vendor1 = CPUID_VENDOR_INTEL_1,
 349         .vendor2 = CPUID_VENDOR_INTEL_2,
 350         .vendor3 = CPUID_VENDOR_INTEL_3,
 351         .family = 15,
 352         .model = 6,
 353         .stepping = 1,
 354         /* Missing: CPUID_VME, CPUID_HT */
 355         .features = PPRO_FEATURES |
 356             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
 357             CPUID_PSE36,
 358         /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
 359         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
 360         /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
 361         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
 362             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
 363         /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
 364                     CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
 365                     CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
 366                     CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
 367         .ext3_features = 0,
 368         .xlevel = 0x80000008,
 369         .model_id = "Common KVM processor"
 370     },
 371     {
 372         .name = "qemu32",
 373         .level = 4,
 374         .family = 6,
 375         .model = 3,
 376         .stepping = 3,
 377         .features = PPRO_FEATURES,
 378         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
 379         .xlevel = 0x80000004,
 380         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
 381     },
 382     {
 383         .name = "kvm32",
 384         .level = 5,
 385         .family = 15,
 386         .model = 6,
 387         .stepping = 1,
 388         .features = PPRO_FEATURES |
 389             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
 390         .ext_features = CPUID_EXT_SSE3,
 391         .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
 392         .ext3_features = 0,
 393         .xlevel = 0x80000008,
 394         .model_id = "Common 32-bit KVM processor"
 395     },
 396     {
 397         .name = "coreduo",
 398         .level = 10,
 399         .family = 6,
 400         .model = 14,
 401         .stepping = 8,
 402         .features = PPRO_FEATURES | CPUID_VME |
 403             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
 404             CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
 405         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
 406             CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
 407         .ext2_features = CPUID_EXT2_NX,
 408         .xlevel = 0x80000008,
 409         .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
 410     },
 411     {
 412         .name = "486",
 413         .level = 1,
 414         .family = 4,
 415         .model = 0,
 416         .stepping = 0,
 417         .features = I486_FEATURES,
 418         .xlevel = 0,
 419     },
 420     {
 421         .name = "pentium",
 422         .level = 1,
 423         .family = 5,
 424         .model = 4,
 425         .stepping = 3,
 426         .features = PENTIUM_FEATURES,
 427         .xlevel = 0,
 428     },
 429     {
 430         .name = "pentium2",
 431         .level = 2,
 432         .family = 6,
 433         .model = 5,
 434         .stepping = 2,
 435         .features = PENTIUM2_FEATURES,
 436         .xlevel = 0,
 437     },
 438     {
 439         .name = "pentium3",
 440         .level = 2,
 441         .family = 6,
 442         .model = 7,
 443         .stepping = 3,
 444         .features = PENTIUM3_FEATURES,
 445         .xlevel = 0,
 446     },
 447     {
 448         .name = "athlon",
 449         .level = 2,
 450         .vendor1 = CPUID_VENDOR_AMD_1,
 451         .vendor2 = CPUID_VENDOR_AMD_2,
 452         .vendor3 = CPUID_VENDOR_AMD_3,
 453         .family = 6,
 454         .model = 2,
 455         .stepping = 3,
 456         .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
 457         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
 458         .xlevel = 0x80000008,
 459         /* XXX: put another string ? */
 460         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
 461     },
 462     {
 463         .name = "n270",
 464         /* original is on level 10 */
 465         .level = 5,
 466         .family = 6,
 467         .model = 28,
 468         .stepping = 2,
 469         .features = PPRO_FEATURES |
 470             CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
 471             CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
 472             /* Some CPUs got no CPUID_SEP */
 473         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
 474             CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
 475         .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
 476         .ext3_features = CPUID_EXT3_LAHF_LM,
 477         .xlevel = 0x8000000A,
 478         .model_id = "Intel(R) Atom(TM) CPU N270   @ 1.60GHz",
 479     },
 480 };
 481
 482 static int cpu_x86_fill_model_id(char *str)
 483 {
 484     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 485     int i;
 486
 487     for (i = 0; i < 3; i++) {
 488         host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
 489         memcpy(str + i * 16 +  0, &eax, 4);
 490         memcpy(str + i * 16 +  4, &ebx, 4);
 491         memcpy(str + i * 16 +  8, &ecx, 4);
 492         memcpy(str + i * 16 + 12, &edx, 4);
 493     }
 494     return 0;
 495 }
 496
 497 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
 498 {
 499     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 500
 501     x86_cpu_def->name = "host";
 502     host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
 503     x86_cpu_def->level = eax;
 504     x86_cpu_def->vendor1 = ebx;
 505     x86_cpu_def->vendor2 = edx;
 506     x86_cpu_def->vendor3 = ecx;
 507
 508     host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
 509     x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
 510     x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
 511     x86_cpu_def->stepping = eax & 0x0F;
 512     x86_cpu_def->ext_features = ecx;
 513     x86_cpu_def->features = edx;
 514
 515     host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
 516     x86_cpu_def->xlevel = eax;
 517
 518     host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
 519     x86_cpu_def->ext2_features = edx;
 520     x86_cpu_def->ext3_features = ecx;
 521     cpu_x86_fill_model_id(x86_cpu_def->model_id);
 522     x86_cpu_def->vendor_override = 0;
 523
 524
 525     /*
 526      * Every SVM feature requires emulation support in KVM - so we can't just
 527      * read the host features here. KVM might even support SVM features not
 528      * available on the host hardware. Just set all bits and mask out the
 529      * unsupported ones later.
 530      */
 531     x86_cpu_def->svm_features = -1;
 532
 533     return 0;
 534 }
 535
 536 static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
 537 {
 538     int i;
 539
 540     for (i = 0; i < 32; ++i)
 541         if (1 << i & mask) {
 542             fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
 543                 " flag '%s' [0x%08x]\n",
 544                 f->cpuid >> 16, f->cpuid & 0xffff,
 545                 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
 546             break;
 547         }
 548     return 0;
 549 }
 550
 551 /* best effort attempt to inform user requested cpu flags aren't making
 552  * their way to the guest.  Note: ft[].check_feat ideally should be
 553  * specified via a guest_def field to suppress report of extraneous flags.
 554  */
 555 static int check_features_against_host(x86_def_t *guest_def)
 556 {
 557     x86_def_t host_def;
 558     uint32_t mask;
 559     int rv, i;
 560     struct model_features_t ft[] = {
 561         {&guest_def->features, &host_def.features,
 562             ~0, feature_name, 0x00000000},
 563         {&guest_def->ext_features, &host_def.ext_features,
 564             ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
 565         {&guest_def->ext2_features, &host_def.ext2_features,
 566             ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
 567         {&guest_def->ext3_features, &host_def.ext3_features,
 568             ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
 569
 570     cpu_x86_fill_host(&host_def);
 571     for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
 572         for (mask = 1; mask; mask <<= 1)
 573             if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
 574                 !(*ft[i].host_feat & mask)) {
 575                     unavailable_host_feature(&ft[i], mask);
 576                     rv = 1;
 577                 }
 578     return rv;
 579 }
 580
 581 static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
 582 {
 583     unsigned int i;
 584     x86_def_t *def;
 585
 586     char *s = strdup(cpu_model);
 587     char *featurestr, *name = strtok(s, ",");
 588     /* Features to be added*/
 589     uint32_t plus_features = 0, plus_ext_features = 0;
 590     uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
 591     uint32_t plus_kvm_features = 0, plus_svm_features = 0;
 592     /* Features to be removed */
 593     uint32_t minus_features = 0, minus_ext_features = 0;
 594     uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
 595     uint32_t minus_kvm_features = 0, minus_svm_features = 0;
 596     uint32_t numvalue;
 597
 598     for (def = x86_defs; def; def = def->next)
 599         if (!strcmp(name, def->name))
 600             break;
 601     if (kvm_enabled() && strcmp(name, "host") == 0) {
 602         cpu_x86_fill_host(x86_cpu_def);
 603     } else if (!def) {
 604         goto error;
 605     } else {
 606         memcpy(x86_cpu_def, def, sizeof(*def));
 607     }
 608
 609     plus_kvm_features = ~0; /* not supported bits will be filtered out later */
 610
 611     add_flagname_to_bitmaps("hypervisor", &plus_features,
 612         &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
 613         &plus_kvm_features, &plus_svm_features);
 614
 615     featurestr = strtok(NULL, ",");
 616
 617     while (featurestr) {
 618         char *val;
 619         if (featurestr[0] == '+') {
 620             add_flagname_to_bitmaps(featurestr + 1, &plus_features,
 621                             &plus_ext_features, &plus_ext2_features,
 622                             &plus_ext3_features, &plus_kvm_features,
 623                             &plus_svm_features);
 624         } else if (featurestr[0] == '-') {
 625             add_flagname_to_bitmaps(featurestr + 1, &minus_features,
 626                             &minus_ext_features, &minus_ext2_features,
 627                             &minus_ext3_features, &minus_kvm_features,
 628                             &minus_svm_features);
 629         } else if ((val = strchr(featurestr, '='))) {
 630             *val = 0; val++;
 631             if (!strcmp(featurestr, "family")) {
 632                 char *err;
 633                 numvalue = strtoul(val, &err, 0);
 634                 if (!*val || *err) {
 635                     fprintf(stderr, "bad numerical value %s\n", val);
 636                     goto error;
 637                 }
 638                 x86_cpu_def->family = numvalue;
 639             } else if (!strcmp(featurestr, "model")) {
 640                 char *err;
 641                 numvalue = strtoul(val, &err, 0);
 642                 if (!*val || *err || numvalue > 0xff) {
 643                     fprintf(stderr, "bad numerical value %s\n", val);
 644                     goto error;
 645                 }
 646                 x86_cpu_def->model = numvalue;
 647             } else if (!strcmp(featurestr, "stepping")) {
 648                 char *err;
 649                 numvalue = strtoul(val, &err, 0);
 650                 if (!*val || *err || numvalue > 0xf) {
 651                     fprintf(stderr, "bad numerical value %s\n", val);
 652                     goto error;
 653                 }
 654                 x86_cpu_def->stepping = numvalue ;
 655             } else if (!strcmp(featurestr, "level")) {
 656                 char *err;
 657                 numvalue = strtoul(val, &err, 0);
 658                 if (!*val || *err) {
 659                     fprintf(stderr, "bad numerical value %s\n", val);
 660                     goto error;
 661                 }
 662                 x86_cpu_def->level = numvalue;
 663             } else if (!strcmp(featurestr, "xlevel")) {
 664                 char *err;
 665                 numvalue = strtoul(val, &err, 0);
 666                 if (!*val || *err) {
 667                     fprintf(stderr, "bad numerical value %s\n", val);
 668                     goto error;
 669                 }
 670                 if (numvalue < 0x80000000) {
 671                     numvalue += 0x80000000;
 672                 }
 673                 x86_cpu_def->xlevel = numvalue;
 674             } else if (!strcmp(featurestr, "vendor")) {
 675                 if (strlen(val) != 12) {
 676                     fprintf(stderr, "vendor string must be 12 chars long\n");
 677                     goto error;
 678                 }
 679                 x86_cpu_def->vendor1 = 0;
 680                 x86_cpu_def->vendor2 = 0;
 681                 x86_cpu_def->vendor3 = 0;
 682                 for(i = 0; i < 4; i++) {
 683                     x86_cpu_def->vendor1 |= ((uint8_t)val[i    ]) << (8 * i);
 684                     x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
 685                     x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
 686                 }
 687                 x86_cpu_def->vendor_override = 1;
 688             } else if (!strcmp(featurestr, "model_id")) {
 689                 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
 690                         val);
 691             } else {
 692                 fprintf(stderr, "unrecognized feature %s\n", featurestr);
 693                 goto error;
 694             }
 695         } else if (!strcmp(featurestr, "check")) {
 696             check_cpuid = 1;
 697         } else if (!strcmp(featurestr, "enforce")) {
 698             check_cpuid = enforce_cpuid = 1;
 699         } else {
 700             fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
 701             goto error;
 702         }
 703         featurestr = strtok(NULL, ",");
 704     }
 705     x86_cpu_def->features |= plus_features;
 706     x86_cpu_def->ext_features |= plus_ext_features;
 707     x86_cpu_def->ext2_features |= plus_ext2_features;
 708     x86_cpu_def->ext3_features |= plus_ext3_features;
 709     x86_cpu_def->kvm_features |= plus_kvm_features;
 710     x86_cpu_def->svm_features |= plus_svm_features;
 711     x86_cpu_def->features &= ~minus_features;
 712     x86_cpu_def->ext_features &= ~minus_ext_features;
 713     x86_cpu_def->ext2_features &= ~minus_ext2_features;
 714     x86_cpu_def->ext3_features &= ~minus_ext3_features;
 715     x86_cpu_def->kvm_features &= ~minus_kvm_features;
 716     x86_cpu_def->svm_features &= ~minus_svm_features;
 717     if (check_cpuid) {
 718         if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
 719             goto error;
 720     }
 721     free(s);
 722     return 0;
 723
 724 error:
 725     free(s);
 726     return -1;
 727 }
 728
 729 /* generate a composite string into buf of all cpuid names in featureset
 730  * selected by fbits.  indicate truncation at bufsize in the event of overflow.
 731  * if flags, suppress names undefined in featureset.
 732  */
 733 static void listflags(char *buf, int bufsize, uint32_t fbits,
 734     const char **featureset, uint32_t flags)
 735 {
 736     const char **p = &featureset[31];
 737     char *q, *b, bit;
 738     int nc;
 739
 740     b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
 741     *buf = '\0';
 742     for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
 743         if (fbits & 1 << bit && (*p || !flags)) {
 744             if (*p)
 745                 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
 746             else
 747                 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
 748             if (bufsize <= nc) {
 749                 if (b) {
 750                     memcpy(b, "...", sizeof("..."));
 751                 }
 752                 return;
 753             }
 754             q += nc;
 755             bufsize -= nc;
 756         }
 757 }
 758
 759 /* generate CPU information:
 760  * -?        list model names
 761  * -?model   list model names/IDs
 762  * -?dump    output all model (x86_def_t) data
 763  * -?cpuid   list all recognized cpuid flag names
 764  */
 765 void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
 766 {
 767     unsigned char model = !strcmp("?model", optarg);
 768     unsigned char dump = !strcmp("?dump", optarg);
 769     unsigned char cpuid = !strcmp("?cpuid", optarg);
 770     x86_def_t *def;
 771     char buf[256];
 772
 773     if (cpuid) {
 774         (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
 775         listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
 776         (*cpu_fprintf)(f, "  f_edx: %s\n", buf);
 777         listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
 778         (*cpu_fprintf)(f, "  f_ecx: %s\n", buf);
 779         listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
 780         (*cpu_fprintf)(f, "  extf_edx: %s\n", buf);
 781         listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
 782         (*cpu_fprintf)(f, "  extf_ecx: %s\n", buf);
 783         return;
 784     }
 785     for (def = x86_defs; def; def = def->next) {
 786         snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
 787         if (model || dump) {
 788             (*cpu_fprintf)(f, "x86 %16s  %-48s\n", buf, def->model_id);
 789         } else {
 790             (*cpu_fprintf)(f, "x86 %16s\n", buf);
 791         }
 792         if (dump) {
 793             memcpy(buf, &def->vendor1, sizeof (def->vendor1));
 794             memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
 795             memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
 796             buf[12] = '\0';
 797             (*cpu_fprintf)(f,
 798                 "  family %d model %d stepping %d level %d xlevel 0x%x"
 799                 " vendor \"%s\"\n",
 800                 def->family, def->model, def->stepping, def->level,
 801                 def->xlevel, buf);
 802             listflags(buf, sizeof (buf), def->features, feature_name, 0);
 803             (*cpu_fprintf)(f, "  feature_edx %08x (%s)\n", def->features,
 804                 buf);
 805             listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
 806                 0);
 807             (*cpu_fprintf)(f, "  feature_ecx %08x (%s)\n", def->ext_features,
 808                 buf);
 809             listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
 810                 0);
 811             (*cpu_fprintf)(f, "  extfeature_edx %08x (%s)\n",
 812                 def->ext2_features, buf);
 813             listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
 814                 0);
 815             (*cpu_fprintf)(f, "  extfeature_ecx %08x (%s)\n",
 816                 def->ext3_features, buf);
 817             (*cpu_fprintf)(f, "\n");
 818         }
 819     }
 820     if (kvm_enabled()) {
 821         (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
 822     }
 823 }
 824
 825 int cpu_x86_register (CPUX86State *env, const char *cpu_model)
 826 {
 827     x86_def_t def1, *def = &def1;
 828
 829     memset(def, 0, sizeof(*def));
 830
 831     if (cpu_x86_find_by_name(def, cpu_model) < 0)
 832         return -1;
 833     if (def->vendor1) {
 834         env->cpuid_vendor1 = def->vendor1;
 835         env->cpuid_vendor2 = def->vendor2;
 836         env->cpuid_vendor3 = def->vendor3;
 837     } else {
 838         env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
 839         env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
 840         env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
 841     }
 842     env->cpuid_vendor_override = def->vendor_override;
 843     env->cpuid_level = def->level;
 844     if (def->family > 0x0f)
 845         env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
 846     else
 847         env->cpuid_version = def->family << 8;
 848     env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
 849     env->cpuid_version |= def->stepping;
 850     env->cpuid_features = def->features;
 851     env->pat = 0x0007040600070406ULL;
 852     env->cpuid_ext_features = def->ext_features;
 853     env->cpuid_ext2_features = def->ext2_features;
 854     env->cpuid_ext3_features = def->ext3_features;
 855     env->cpuid_xlevel = def->xlevel;
 856     env->cpuid_kvm_features = def->kvm_features;
 857     env->cpuid_svm_features = def->svm_features;
 858     if (!kvm_enabled()) {
 859         env->cpuid_features &= TCG_FEATURES;
 860         env->cpuid_ext_features &= TCG_EXT_FEATURES;
 861         env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
 862 #ifdef TARGET_X86_64
 863             | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
 864 #endif
 865             );
 866         env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
 867         env->cpuid_svm_features &= TCG_SVM_FEATURES;
 868     }
 869     {
 870         const char *model_id = def->model_id;
 871         int c, len, i;
 872         if (!model_id)
 873             model_id = "";
 874         len = strlen(model_id);
 875         for(i = 0; i < 48; i++) {
 876             if (i >= len)
 877                 c = '\0';
 878             else
 879                 c = (uint8_t)model_id[i];
 880             env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
 881         }
 882     }
 883     return 0;
 884 }
 885
 886 #if !defined(CONFIG_USER_ONLY)
 887 /* copy vendor id string to 32 bit register, nul pad as needed
 888  */
 889 static void cpyid(const char *s, uint32_t *id)
 890 {
 891     char *d = (char *)id;
 892     char i;
 893
 894     for (i = sizeof (*id); i--; )
 895         *d++ = *s ? *s++ : '\0';
 896 }
 897
 898 /* interpret radix and convert from string to arbitrary scalar,
 899  * otherwise flag failure
 900  */
 901 #define setscalar(pval, str, perr)                      \
 902 {                                                       \
 903     char *pend;                                         \
 904     unsigned long ul;                                   \
 905                                                         \
 906     ul = strtoul(str, &pend, 0);                        \
 907     *str && !*pend ? (*pval = ul) : (*perr = 1);        \
 908 }
 909
 910 /* map cpuid options to feature bits, otherwise return failure
 911  * (option tags in *str are delimited by whitespace)
 912  */
 913 static void setfeatures(uint32_t *pval, const char *str,
 914     const char **featureset, int *perr)
 915 {
 916     const char *p, *q;
 917
 918     for (q = p = str; *p || *q; q = p) {
 919         while (iswhite(*p))
 920             q = ++p;
 921         while (*p && !iswhite(*p))
 922             ++p;
 923         if (!*q && !*p)
 924             return;
 925         if (!lookup_feature(pval, q, p, featureset)) {
 926             fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
 927                 (int)(p - q), q);
 928             *perr = 1;
 929             return;
 930         }
 931     }
 932 }
 933
 934 /* map config file options to x86_def_t form
 935  */
 936 static int cpudef_setfield(const char *name, const char *str, void *opaque)
 937 {
 938     x86_def_t *def = opaque;
 939     int err = 0;
 940
 941     if (!strcmp(name, "name")) {
 942         def->name = strdup(str);
 943     } else if (!strcmp(name, "model_id")) {
 944         strncpy(def->model_id, str, sizeof (def->model_id));
 945     } else if (!strcmp(name, "level")) {
 946         setscalar(&def->level, str, &err)
 947     } else if (!strcmp(name, "vendor")) {
 948         cpyid(&str[0], &def->vendor1);
 949         cpyid(&str[4], &def->vendor2);
 950         cpyid(&str[8], &def->vendor3);
 951     } else if (!strcmp(name, "family")) {
 952         setscalar(&def->family, str, &err)
 953     } else if (!strcmp(name, "model")) {
 954         setscalar(&def->model, str, &err)
 955     } else if (!strcmp(name, "stepping")) {
 956         setscalar(&def->stepping, str, &err)
 957     } else if (!strcmp(name, "feature_edx")) {
 958         setfeatures(&def->features, str, feature_name, &err);
 959     } else if (!strcmp(name, "feature_ecx")) {
 960         setfeatures(&def->ext_features, str, ext_feature_name, &err);
 961     } else if (!strcmp(name, "extfeature_edx")) {
 962         setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
 963     } else if (!strcmp(name, "extfeature_ecx")) {
 964         setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
 965     } else if (!strcmp(name, "xlevel")) {
 966         setscalar(&def->xlevel, str, &err)
 967     } else {
 968         fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
 969         return (1);
 970     }
 971     if (err) {
 972         fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
 973         return (1);
 974     }
 975     return (0);
 976 }
 977
 978 /* register config file entry as x86_def_t
 979  */
 980 static int cpudef_register(QemuOpts *opts, void *opaque)
 981 {
 982     x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
 983
 984     qemu_opt_foreach(opts, cpudef_setfield, def, 1);
 985     def->next = x86_defs;
 986     x86_defs = def;
 987     return (0);
 988 }
 989
 990 void cpu_clear_apic_feature(CPUX86State *env)
 991 {
 992     env->cpuid_features &= ~CPUID_APIC;
 993 }
 994
 995 #endif /* !CONFIG_USER_ONLY */
 996
 997 /* register "cpudef" models defined in configuration file.  Here we first
 998  * preload any built-in definitions
 999  */
1000 void x86_cpudef_setup(void)
1001 {
1002     int i;
1003
1004     for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1005         builtin_x86_defs[i].next = x86_defs;
1006         builtin_x86_defs[i].flags = 1;
1007         x86_defs = &builtin_x86_defs[i];
1008     }
1009 #if !defined(CONFIG_USER_ONLY)
1010     qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
1011 #endif
1012 }
1013
1014 static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1015                              uint32_t *ecx, uint32_t *edx)
1016 {
1017     *ebx = env->cpuid_vendor1;
1018     *edx = env->cpuid_vendor2;
1019     *ecx = env->cpuid_vendor3;
1020
1021     /* sysenter isn't supported on compatibility mode on AMD, syscall
1022      * isn't supported in compatibility mode on Intel.
1023      * Normally we advertise the actual cpu vendor, but you can override
1024      * this if you want to use KVM's sysenter/syscall emulation
1025      * in compatibility mode and when doing cross vendor migration
1026      */
1027     if (kvm_enabled() && ! env->cpuid_vendor_override) {
1028         host_cpuid(0, 0, NULL, ebx, ecx, edx);
1029     }
1030 }
1031
1032 void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1033                    uint32_t *eax, uint32_t *ebx,
1034                    uint32_t *ecx, uint32_t *edx)
1035 {
1036     /* test if maximum index reached */
1037     if (index & 0x80000000) {
1038         if (index > env->cpuid_xlevel)
1039             index = env->cpuid_level;
1040     } else {
1041         if (index > env->cpuid_level)
1042             index = env->cpuid_level;
1043     }
1044
1045     switch(index) {
1046     case 0:
1047         *eax = env->cpuid_level;
1048         get_cpuid_vendor(env, ebx, ecx, edx);
1049         break;
1050     case 1:
1051         *eax = env->cpuid_version;
1052         *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1053         *ecx = env->cpuid_ext_features;
1054         *edx = env->cpuid_features;
1055         if (env->nr_cores * env->nr_threads > 1) {
1056             *ebx |= (env->nr_cores * env->nr_threads) << 16;
1057             *edx |= 1 << 28;    /* HTT bit */
1058         }
1059         break;
1060     case 2:
1061         /* cache info: needed for Pentium Pro compatibility */
1062         *eax = 1;
1063         *ebx = 0;
1064         *ecx = 0;
1065         *edx = 0x2c307d;
1066         break;
1067     case 4:
1068         /* cache info: needed for Core compatibility */
1069         if (env->nr_cores > 1) {
1070             *eax = (env->nr_cores - 1) << 26;
1071         } else {
1072             *eax = 0;
1073         }
1074         switch (count) {
1075             case 0: /* L1 dcache info */
1076                 *eax |= 0x0000121;
1077                 *ebx = 0x1c0003f;
1078                 *ecx = 0x000003f;
1079                 *edx = 0x0000001;
1080                 break;
1081             case 1: /* L1 icache info */
1082                 *eax |= 0x0000122;
1083                 *ebx = 0x1c0003f;
1084                 *ecx = 0x000003f;
1085                 *edx = 0x0000001;
1086                 break;
1087             case 2: /* L2 cache info */
1088                 *eax |= 0x0000143;
1089                 if (env->nr_threads > 1) {
1090                     *eax |= (env->nr_threads - 1) << 14;
1091                 }
1092                 *ebx = 0x3c0003f;
1093                 *ecx = 0x0000fff;
1094                 *edx = 0x0000001;
1095                 break;
1096             default: /* end of info */
1097                 *eax = 0;
1098                 *ebx = 0;
1099                 *ecx = 0;
1100                 *edx = 0;
1101                 break;
1102         }
1103         break;
1104     case 5:
1105         /* mwait info: needed for Core compatibility */
1106         *eax = 0; /* Smallest monitor-line size in bytes */
1107         *ebx = 0; /* Largest monitor-line size in bytes */
1108         *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1109         *edx = 0;
1110         break;
1111     case 6:
1112         /* Thermal and Power Leaf */
1113         *eax = 0;
1114         *ebx = 0;
1115         *ecx = 0;
1116         *edx = 0;
1117         break;
1118     case 9:
1119         /* Direct Cache Access Information Leaf */
1120         *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1121         *ebx = 0;
1122         *ecx = 0;
1123         *edx = 0;
1124         break;
1125     case 0xA:
1126         /* Architectural Performance Monitoring Leaf */
1127         *eax = 0;
1128         *ebx = 0;
1129         *ecx = 0;
1130         *edx = 0;
1131         break;
1132     case 0xD:
1133         /* Processor Extended State */
1134         if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1135             *eax = 0;
1136             *ebx = 0;
1137             *ecx = 0;
1138             *edx = 0;
1139             break;
1140         }
1141         if (kvm_enabled()) {
1142             *eax = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EAX);
1143             *ebx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EBX);
1144             *ecx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_ECX);
1145             *edx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EDX);
1146         } else {
1147             *eax = 0;
1148             *ebx = 0;
1149             *ecx = 0;
1150             *edx = 0;
1151         }
1152         break;
1153     case 0x80000000:
1154         *eax = env->cpuid_xlevel;
1155         *ebx = env->cpuid_vendor1;
1156         *edx = env->cpuid_vendor2;
1157         *ecx = env->cpuid_vendor3;
1158         break;
1159     case 0x80000001:
1160         *eax = env->cpuid_version;
1161         *ebx = 0;
1162         *ecx = env->cpuid_ext3_features;
1163         *edx = env->cpuid_ext2_features;
1164
1165         /* The Linux kernel checks for the CMPLegacy bit and
1166          * discards multiple thread information if it is set.
1167          * So dont set it here for Intel to make Linux guests happy.
1168          */
1169         if (env->nr_cores * env->nr_threads > 1) {
1170             uint32_t tebx, tecx, tedx;
1171             get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1172             if (tebx != CPUID_VENDOR_INTEL_1 ||
1173                 tedx != CPUID_VENDOR_INTEL_2 ||
1174                 tecx != CPUID_VENDOR_INTEL_3) {
1175                 *ecx |= 1 << 1;    /* CmpLegacy bit */
1176             }
1177         }
1178         break;
1179     case 0x80000002:
1180     case 0x80000003:
1181     case 0x80000004:
1182         *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1183         *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1184         *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1185         *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1186         break;
1187     case 0x80000005:
1188         /* cache info (L1 cache) */
1189         *eax = 0x01ff01ff;
1190         *ebx = 0x01ff01ff;
1191         *ecx = 0x40020140;
1192         *edx = 0x40020140;
1193         break;
1194     case 0x80000006:
1195         /* cache info (L2 cache) */
1196         *eax = 0;
1197         *ebx = 0x42004200;
1198         *ecx = 0x02008140;
1199         *edx = 0;
1200         break;
1201     case 0x80000008:
1202         /* virtual & phys address size in low 2 bytes. */
1203 /* XXX: This value must match the one used in the MMU code. */
1204         if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1205             /* 64 bit processor */
1206 /* XXX: The physical address space is limited to 42 bits in exec.c. */
1207             *eax = 0x00003028;  /* 48 bits virtual, 40 bits physical */
1208         } else {
1209             if (env->cpuid_features & CPUID_PSE36)
1210                 *eax = 0x00000024; /* 36 bits physical */
1211             else
1212                 *eax = 0x00000020; /* 32 bits physical */
1213         }
1214         *ebx = 0;
1215         *ecx = 0;
1216         *edx = 0;
1217         if (env->nr_cores * env->nr_threads > 1) {
1218             *ecx |= (env->nr_cores * env->nr_threads) - 1;
1219         }
1220         break;
1221     case 0x8000000A:
1222         if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1223                 *eax = 0x00000001; /* SVM Revision */
1224                 *ebx = 0x00000010; /* nr of ASIDs */
1225                 *ecx = 0;
1226                 *edx = env->cpuid_svm_features; /* optional features */
1227         } else {
1228                 *eax = 0;
1229                 *ebx = 0;
1230                 *ecx = 0;
1231                 *edx = 0;
1232         }
1233         break;
1234     default:
1235         /* reserved values: zero */
1236         *eax = 0;
1237         *ebx = 0;
1238         *ecx = 0;
1239         *edx = 0;
1240         break;
1241     }
1242 }