2 * QEMU<->ACPI BIOS PCI hotplug interface
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
9 * Copyright (c) 2006 Fabrice Bellard
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "qemu/osdep.h"
28 #include "hw/acpi/pcihp.h"
31 #include "hw/i386/pc.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_bridge.h"
34 #include "hw/acpi/acpi.h"
35 #include "sysemu/sysemu.h"
36 #include "exec/address-spaces.h"
37 #include "hw/pci/pci_bus.h"
38 #include "qapi/error.h"
39 #include "qom/qom-qobject.h"
44 # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
46 # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
49 #define ACPI_PCIHP_ADDR 0xae00
50 #define ACPI_PCIHP_SIZE 0x0014
51 #define PCI_UP_BASE 0x0000
52 #define PCI_DOWN_BASE 0x0004
53 #define PCI_EJ_BASE 0x0008
54 #define PCI_RMV_BASE 0x000c
55 #define PCI_SEL_BASE 0x0010
57 typedef struct AcpiPciHpFind {
62 static int acpi_pcihp_get_bsel(PCIBus *bus)
64 Error *local_err = NULL;
65 uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
68 if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
70 error_free(local_err);
78 /* Assign BSEL property to all buses. In the future, this can be changed
79 * to only assign to buses that support hotplug.
81 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
83 unsigned *bsel_alloc = opaque;
86 if (qbus_is_hotpluggable(BUS(bus))) {
87 bus_bsel = g_malloc(sizeof *bus_bsel);
89 *bus_bsel = (*bsel_alloc)++;
90 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
91 bus_bsel, &error_abort);
97 static void acpi_set_pci_info(void)
99 static bool bsel_is_set;
101 unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
108 bus = find_i440fx(); /* TODO: Q35 support */
110 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
111 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
115 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
117 AcpiPciHpFind *find = opaque;
118 if (find->bsel == acpi_pcihp_get_bsel(bus)) {
123 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
125 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
131 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
133 /* Make bsel 0 eject root bus if bsel property is not set,
134 * for compatibility with non acpi setups.
135 * TODO: really needed?
137 if (!bsel && !find.bus) {
143 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
145 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
146 DeviceClass *dc = DEVICE_GET_CLASS(dev);
148 * ACPI doesn't allow hotplug of bridge devices. Don't allow
149 * hot-unplug of bridge devices unless they were added by hotplug
150 * (and so, not described by acpi).
152 return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
155 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
157 HotplugHandler *hotplug_ctrl;
158 BusChild *kid, *next;
159 int slot = ctz32(slots);
160 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
166 /* Mark request as complete */
167 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
168 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
170 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
171 DeviceState *qdev = kid->child;
172 PCIDevice *dev = PCI_DEVICE(qdev);
173 if (PCI_SLOT(dev->devfn) == slot) {
174 if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
175 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
176 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
182 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
184 BusChild *kid, *next;
185 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
187 /* Execute any pending removes during reset */
188 while (s->acpi_pcihp_pci_status[bsel].down) {
189 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
192 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
197 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
198 DeviceState *qdev = kid->child;
199 PCIDevice *pdev = PCI_DEVICE(qdev);
200 int slot = PCI_SLOT(pdev->devfn);
202 if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
203 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
208 static void acpi_pcihp_update(AcpiPciHpState *s)
212 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
213 acpi_pcihp_update_hotplug_bus(s, i);
217 void acpi_pcihp_reset(AcpiPciHpState *s)
220 acpi_pcihp_update(s);
223 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
224 DeviceState *dev, Error **errp)
226 /* Only hotplugged devices need the hotplug capability. */
227 if (dev->hotplugged &&
228 acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
229 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
230 ACPI_PCIHP_PROP_BSEL "' set");
235 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
236 DeviceState *dev, Error **errp)
238 PCIDevice *pdev = PCI_DEVICE(dev);
239 int slot = PCI_SLOT(pdev->devfn);
242 /* Don't send event when device is enabled during qemu machine creation:
243 * it is present on boot, no hotplug event is necessary. We do send an
244 * event when the device is disabled later. */
245 if (!dev->hotplugged) {
247 * Overwrite the default hotplug handler with the ACPI PCI one
248 * for cold plugged bridges only.
250 if (!s->legacy_piix &&
251 object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
252 PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
254 qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev),
256 /* We don't have to overwrite any other hotplug handler yet */
257 assert(QLIST_EMPTY(&sec->child));
263 bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
265 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
266 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
269 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
270 DeviceState *dev, Error **errp)
272 object_unparent(OBJECT(dev));
275 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
276 AcpiPciHpState *s, DeviceState *dev,
279 PCIDevice *pdev = PCI_DEVICE(dev);
280 int slot = PCI_SLOT(pdev->devfn);
281 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
283 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
284 ACPI_PCIHP_PROP_BSEL "' set");
288 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
289 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
292 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
294 AcpiPciHpState *s = opaque;
296 int bsel = s->hotplug_select;
298 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
304 val = s->acpi_pcihp_pci_status[bsel].up;
305 if (!s->legacy_piix) {
306 s->acpi_pcihp_pci_status[bsel].up = 0;
308 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
311 val = s->acpi_pcihp_pci_status[bsel].down;
312 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
315 /* No feature defined yet */
316 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
319 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
320 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
323 val = s->hotplug_select;
324 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
332 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
335 AcpiPciHpState *s = opaque;
338 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
341 acpi_pcihp_eject_slot(s, s->hotplug_select, data);
342 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
346 s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
347 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
354 static const MemoryRegionOps acpi_pcihp_io_ops = {
357 .endianness = DEVICE_LITTLE_ENDIAN,
359 .min_access_size = 4,
360 .max_access_size = 4,
364 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
365 MemoryRegion *address_space_io, bool bridges_enabled)
367 s->io_len = ACPI_PCIHP_SIZE;
368 s->io_base = ACPI_PCIHP_ADDR;
371 s->legacy_piix = !bridges_enabled;
373 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
374 "acpi-pci-hotplug", s->io_len);
375 memory_region_add_subregion(address_space_io, s->io_base, &s->io);
377 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
379 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
383 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
384 .name = "acpi_pcihp_pci_status",
386 .minimum_version_id = 1,
387 .fields = (VMStateField[]) {
388 VMSTATE_UINT32(up, AcpiPciHpPciStatus),
389 VMSTATE_UINT32(down, AcpiPciHpPciStatus),
390 VMSTATE_END_OF_LIST()