3 /* Definitions for SH board emulation. */
7 #define A7ADDR(x) ((x) & 0x1fffffff)
8 #define P4ADDR(x) ((x) | 0xe0000000)
13 struct SH7750State *sh7750_init(CPUState * cpu);
16 /* The callback will be triggered if any of the designated lines change */
17 uint16_t portamask_trigger;
18 uint16_t portbmask_trigger;
19 /* Return 0 if no action was taken */
20 int (*port_change_cb) (uint16_t porta, uint16_t portb,
21 uint16_t * periph_pdtra,
22 uint16_t * periph_portdira,
23 uint16_t * periph_pdtrb,
24 uint16_t * periph_portdirb);
27 int sh7750_register_io_device(struct SH7750State *s,
28 sh7750_io_device * device);
30 #define TMU012_FEAT_TOCR (1 << 0)
31 #define TMU012_FEAT_3CHAN (1 << 1)
32 #define TMU012_FEAT_EXTCLK (1 << 2)
33 void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq,
34 qemu_irq ch0_irq, qemu_irq ch1_irq,
35 qemu_irq ch2_irq0, qemu_irq ch2_irq1);
39 #define SH_SERIAL_FEAT_SCIF (1 << 0)
40 void sh_serial_init (target_phys_addr_t base, int feat,
41 uint32_t freq, CharDriverState *chr,
49 qemu_irq sh7750_irl(struct SH7750State *s);
52 int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
55 void mmio_ide_init(target_phys_addr_t membase, target_phys_addr_t membase2,
56 qemu_irq irq, int shift,
57 BlockDriverState *hd0, BlockDriverState *hd1);