4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #include "qemu/host-utils.h"
26 //#define CRIS_OP_HELPER_DEBUG
29 #ifdef CRIS_OP_HELPER_DEBUG
31 #define D_LOG(...) qemu_log(__VA_ARGS__)
34 #define D_LOG(...) do { } while (0)
37 #if !defined(CONFIG_USER_ONLY)
38 #include "exec/softmmu_exec.h"
40 #define MMUSUFFIX _mmu
43 #include "exec/softmmu_template.h"
46 #include "exec/softmmu_template.h"
49 #include "exec/softmmu_template.h"
52 #include "exec/softmmu_template.h"
54 /* Try to fill the TLB and return an exception if error. If retaddr is
55 NULL, it means that the function was called in C code (i.e. not
56 from generated code or from helper.c) */
57 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
60 CRISCPU *cpu = CRIS_CPU(cs);
61 CPUCRISState *env = &cpu->env;
64 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
65 env->pc, env->pregs[PR_EDA], (void *)retaddr);
66 ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
69 /* now we have a real cpu fault */
70 if (cpu_restore_state(cs, retaddr)) {
71 /* Evaluate flags after retranslation. */
72 helper_top_evaluate_flags(env);
81 void helper_raise_exception(CPUCRISState *env, uint32_t index)
83 CPUState *cs = CPU(cris_env_get_cpu(env));
85 cs->exception_index = index;
89 void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
91 #if !defined(CONFIG_USER_ONLY)
93 if (pid != (env->pregs[PR_PID] & 0xff))
94 cris_mmu_flush_pid(env, env->pregs[PR_PID]);
98 void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
100 #if !defined(CONFIG_USER_ONLY)
101 tlb_flush_page(env, env->pregs[PR_SPC]);
102 tlb_flush_page(env, new_spc);
106 void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
108 qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
111 /* Used by the tlb decoder. */
112 #define EXTRACT_FIELD(src, start, end) \
113 (((src) >> start) & ((1 << (end - start + 1)) - 1))
115 void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
118 srs = env->pregs[PR_SRS];
120 env->sregs[srs][sreg] = env->regs[reg];
122 #if !defined(CONFIG_USER_ONLY)
123 if (srs == 1 || srs == 2) {
125 /* Writes to tlb-hi write to mm_cause as a side
127 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
128 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
130 else if (sreg == 5) {
137 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
142 /* We've just made a write to tlb_lo. */
143 lo = env->sregs[SFR_RW_MM_TLB_LO];
144 /* Writes are done via r_mm_cause. */
145 hi = env->sregs[SFR_R_MM_CAUSE];
147 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
149 vaddr <<= TARGET_PAGE_BITS;
150 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
152 env->tlbsets[srs - 1][set][idx].lo = lo;
153 env->tlbsets[srs - 1][set][idx].hi = hi;
155 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
156 vaddr, tlb_v, env->pc);
158 tlb_flush_page(env, vaddr);
165 void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
168 env->pregs[PR_SRS] &= 3;
169 srs = env->pregs[PR_SRS];
171 #if !defined(CONFIG_USER_ONLY)
172 if (srs == 1 || srs == 2)
178 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
183 /* Update the mirror regs. */
184 hi = env->tlbsets[srs - 1][set][idx].hi;
185 lo = env->tlbsets[srs - 1][set][idx].lo;
186 env->sregs[SFR_RW_MM_TLB_HI] = hi;
187 env->sregs[SFR_RW_MM_TLB_LO] = lo;
190 env->regs[reg] = env->sregs[srs][sreg];
193 static void cris_ccs_rshift(CPUCRISState *env)
197 /* Apply the ccs shift. */
198 ccs = env->pregs[PR_CCS];
199 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
202 /* Enter user mode. */
203 env->ksp = env->regs[R_SP];
204 env->regs[R_SP] = env->pregs[PR_USP];
207 env->pregs[PR_CCS] = ccs;
210 void helper_rfe(CPUCRISState *env)
212 int rflag = env->pregs[PR_CCS] & R_FLAG;
214 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
215 env->pregs[PR_ERP], env->pregs[PR_PID],
219 cris_ccs_rshift(env);
221 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
223 env->pregs[PR_CCS] |= P_FLAG;
226 void helper_rfn(CPUCRISState *env)
228 int rflag = env->pregs[PR_CCS] & R_FLAG;
230 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
231 env->pregs[PR_ERP], env->pregs[PR_PID],
235 cris_ccs_rshift(env);
237 /* Set the P_FLAG only if the R_FLAG is not set. */
239 env->pregs[PR_CCS] |= P_FLAG;
241 /* Always set the M flag. */
242 env->pregs[PR_CCS] |= M_FLAG_V32;
245 uint32_t helper_lz(uint32_t t0)
250 uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
252 /* FIXME: clean this up. */
255 The N flag is set according to the selected bit in the dest reg.
256 The Z flag is set if the selected bit and all bits to the right are
258 The X flag is cleared.
259 Other flags are left untouched.
260 The destination reg is not affected.*/
261 unsigned int fz, sbit, bset, mask, masked_t0;
264 bset = !!(t0 & (1 << sbit));
265 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
266 masked_t0 = t0 & mask;
267 fz = !(masked_t0 | bset);
269 /* Clear the X, N and Z flags. */
270 ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
271 if (env->pregs[PR_VR] < 32)
272 ccs &= ~(V_FLAG | C_FLAG);
273 /* Set the N and Z flags accordingly. */
274 ccs |= (bset << 3) | (fz << 2);
278 static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
279 uint32_t flags, uint32_t ccs)
281 unsigned int x, z, mask;
283 /* Extended arithmetics, leave the z flag alone. */
285 mask = env->cc_mask | X_FLAG;
292 /* all insn clear the x-flag except setf or clrf. */
298 uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
299 uint32_t ccs, uint32_t res, uint32_t mof)
305 dneg = ((int32_t)res) < 0;
314 if ((dneg && mof != -1)
315 || (!dneg && mof != 0))
317 return evaluate_flags_writeback(env, flags, ccs);
320 uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
321 uint32_t ccs, uint32_t res, uint32_t mof)
336 return evaluate_flags_writeback(env, flags, ccs);
339 uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
340 uint32_t src, uint32_t dst, uint32_t res)
344 src = src & 0x80000000;
345 dst = dst & 0x80000000;
347 if ((res & 0x80000000L) != 0L)
365 return evaluate_flags_writeback(env, flags, ccs);
368 uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
369 uint32_t src, uint32_t dst, uint32_t res)
373 src = src & 0x80000000;
374 dst = dst & 0x80000000;
376 if ((res & 0x80000000L) != 0L)
394 return evaluate_flags_writeback(env, flags, ccs);
397 uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
398 uint32_t src, uint32_t dst, uint32_t res)
402 src = (~src) & 0x80000000;
403 dst = dst & 0x80000000;
405 if ((res & 0x80000000L) != 0L)
424 return evaluate_flags_writeback(env, flags, ccs);
427 uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
428 uint32_t ccs, uint32_t res)
432 if ((int32_t)res < 0)
437 return evaluate_flags_writeback(env, flags, ccs);
439 uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
440 uint32_t ccs, uint32_t res)
444 if ((int16_t)res < 0L)
449 return evaluate_flags_writeback(env, flags, ccs);
452 /* TODO: This is expensive. We could split things up and only evaluate part of
453 CCR on a need to know basis. For now, we simply re-evaluate everything. */
454 void helper_evaluate_flags(CPUCRISState *env)
456 uint32_t src, dst, res;
461 res = env->cc_result;
463 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
466 /* Now, evaluate the flags. This stuff is based on
467 Per Zander's CRISv10 simulator. */
468 switch (env->cc_size)
471 if ((res & 0x80L) != 0L)
474 if (((src & 0x80L) == 0L)
475 && ((dst & 0x80L) == 0L))
479 else if (((src & 0x80L) != 0L)
480 && ((dst & 0x80L) != 0L))
487 if ((res & 0xFFL) == 0L)
491 if (((src & 0x80L) != 0L)
492 && ((dst & 0x80L) != 0L))
496 if ((dst & 0x80L) != 0L
497 || (src & 0x80L) != 0L)
504 if ((res & 0x8000L) != 0L)
507 if (((src & 0x8000L) == 0L)
508 && ((dst & 0x8000L) == 0L))
512 else if (((src & 0x8000L) != 0L)
513 && ((dst & 0x8000L) != 0L))
520 if ((res & 0xFFFFL) == 0L)
524 if (((src & 0x8000L) != 0L)
525 && ((dst & 0x8000L) != 0L))
529 if ((dst & 0x8000L) != 0L
530 || (src & 0x8000L) != 0L)
537 if ((res & 0x80000000L) != 0L)
540 if (((src & 0x80000000L) == 0L)
541 && ((dst & 0x80000000L) == 0L))
545 else if (((src & 0x80000000L) != 0L) &&
546 ((dst & 0x80000000L) != 0L))
555 if (((src & 0x80000000L) != 0L)
556 && ((dst & 0x80000000L) != 0L))
558 if ((dst & 0x80000000L) != 0L
559 || (src & 0x80000000L) != 0L)
567 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
570 env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
574 void helper_top_evaluate_flags(CPUCRISState *env)
579 env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
580 env->pregs[PR_CCS], env->cc_src,
581 env->cc_dest, env->cc_result);
584 env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
585 env->pregs[PR_CCS], env->cc_result,
589 env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
590 env->pregs[PR_CCS], env->cc_result,
600 switch (env->cc_size)
604 helper_evaluate_flags_move_4(env,
610 helper_evaluate_flags_move_2(env,
615 helper_evaluate_flags(env);
624 if (env->cc_size == 4)
626 helper_evaluate_flags_sub_4(env,
628 env->cc_src, env->cc_dest,
631 helper_evaluate_flags(env);
635 switch (env->cc_size)
639 helper_evaluate_flags_alu_4(env,
641 env->cc_src, env->cc_dest,
645 helper_evaluate_flags(env);