disas/nanomips.cpp

   1 /*
   2  *  Source file for nanoMIPS disassembler component of QEMU
   3  *
   4  *  Copyright (C) 2018  Wave Computing, Inc.
   5  *  Copyright (C) 2018  Matthew Fortune <[email protected]>
   6  *  Copyright (C) 2018  Aleksandar Markovic <[email protected]>
   7  *
   8  *  This program is free software: you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation, either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20  *
  21  */
  22
  23 /*
  24  *  Documentation used while implementing this component:
  25  *
  26  *  [1] "MIPS® Architecture Base: nanoMIPS32(tm) Instruction Set Technical
  27  *      Reference Manual", Revision 01.01, April 27, 2018
  28  */
  29
  30 extern "C" {
  31 #include "qemu/osdep.h"
  32 #include "disas/bfd.h"
  33 }
  34
  35 #include <cstring>
  36 #include <stdexcept>
  37 #include <sstream>
  38 #include <stdio.h>
  39 #include <stdarg.h>
  40
  41 #include "nanomips.h"
  42
  43 #define IMGASSERTONCE(test)
  44
  45
  46 int nanomips_dis(char *buf,
  47                  unsigned address,
  48                  unsigned short one,
  49                  unsigned short two,
  50                  unsigned short three)
  51 {
  52     std::string disasm;
  53     uint16 bits[3] = {one, two, three};
  54
  55     NMD::TABLE_ENTRY_TYPE type;
  56     NMD d(address, NMD::ALL_ATTRIBUTES);
  57     int size = d.Disassemble(bits, disasm, type);
  58
  59     strcpy(buf, disasm.c_str());
  60     return size;
  61 }
  62
  63 int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info)
  64 {
  65     int status;
  66     bfd_byte buffer[2];
  67     uint16_t insn1 = 0, insn2 = 0, insn3 = 0;
  68     char buf[200];
  69
  70     info->bytes_per_chunk = 2;
  71     info->display_endian = info->endian;
  72     info->insn_info_valid = 1;
  73     info->branch_delay_insns = 0;
  74     info->data_size = 0;
  75     info->insn_type = dis_nonbranch;
  76     info->target = 0;
  77     info->target2 = 0;
  78
  79     status = (*info->read_memory_func)(memaddr, buffer, 2, info);
  80     if (status != 0) {
  81         (*info->memory_error_func)(status, memaddr, info);
  82         return -1;
  83     }
  84
  85     if (info->endian == BFD_ENDIAN_BIG) {
  86         insn1 = bfd_getb16(buffer);
  87     } else {
  88         insn1 = bfd_getl16(buffer);
  89     }
  90     (*info->fprintf_func)(info->stream, "%04x ", insn1);
  91
  92     /* Handle 32-bit opcodes.  */
  93     if ((insn1 & 0x1000) == 0) {
  94         status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info);
  95         if (status != 0) {
  96             (*info->memory_error_func)(status, memaddr + 2, info);
  97             return -1;
  98         }
  99
 100         if (info->endian == BFD_ENDIAN_BIG) {
 101             insn2 = bfd_getb16(buffer);
 102         } else {
 103             insn2 = bfd_getl16(buffer);
 104         }
 105         (*info->fprintf_func)(info->stream, "%04x ", insn2);
 106     } else {
 107         (*info->fprintf_func)(info->stream, "     ");
 108     }
 109     /* Handle 48-bit opcodes.  */
 110     if ((insn1 >> 10) == 0x18) {
 111         status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info);
 112         if (status != 0) {
 113             (*info->memory_error_func)(status, memaddr + 4, info);
 114             return -1;
 115         }
 116
 117         if (info->endian == BFD_ENDIAN_BIG) {
 118             insn3 = bfd_getb16(buffer);
 119         } else {
 120             insn3 = bfd_getl16(buffer);
 121         }
 122         (*info->fprintf_func)(info->stream, "%04x ", insn3);
 123     } else {
 124         (*info->fprintf_func)(info->stream, "     ");
 125     }
 126
 127     int length = nanomips_dis(buf, memaddr, insn1, insn2, insn3);
 128
 129     /* FIXME: Should probably use a hash table on the major opcode here.  */
 130
 131     (*info->fprintf_func) (info->stream, "%s", buf);
 132     if (length > 0) {
 133         return length / 8;
 134     }
 135
 136     info->insn_type = dis_noninsn;
 137
 138     return insn3 ? 6 : insn2 ? 4 : 2;
 139 }
 140
 141
 142 namespace img
 143 {
 144     address addr32(address a)
 145     {
 146         return a;
 147     }
 148
 149     std::string format(const char *format, ...)
 150     {
 151         char buffer[256];
 152         va_list args;
 153         va_start(args, format);
 154         int err = vsprintf(buffer, format, args);
 155         if (err < 0) {
 156             perror(buffer);
 157         }
 158         va_end(args);
 159         return buffer;
 160     }
 161
 162     std::string format(const char *format,
 163                        std::string s)
 164     {
 165         char buffer[256];
 166
 167         sprintf(buffer, format, s.c_str());
 168
 169         return buffer;
 170     }
 171
 172     std::string format(const char *format,
 173                        std::string s1,
 174                        std::string s2)
 175     {
 176         char buffer[256];
 177
 178         sprintf(buffer, format, s1.c_str(), s2.c_str());
 179
 180         return buffer;
 181     }
 182
 183     std::string format(const char *format,
 184                        std::string s1,
 185                        std::string s2,
 186                        std::string s3)
 187     {
 188         char buffer[256];
 189
 190         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str());
 191
 192         return buffer;
 193     }
 194
 195     std::string format(const char *format,
 196                        std::string s1,
 197                        std::string s2,
 198                        std::string s3,
 199                        std::string s4)
 200     {
 201         char buffer[256];
 202
 203         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 204                                 s4.c_str());
 205
 206         return buffer;
 207     }
 208
 209     std::string format(const char *format,
 210                        std::string s1,
 211                        std::string s2,
 212                        std::string s3,
 213                        std::string s4,
 214                        std::string s5)
 215     {
 216         char buffer[256];
 217
 218         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 219                                 s4.c_str(), s5.c_str());
 220
 221         return buffer;
 222     }
 223
 224     std::string format(const char *format,
 225                        uint64 d,
 226                        std::string s2)
 227     {
 228         char buffer[256];
 229
 230         sprintf(buffer, format, d, s2.c_str());
 231
 232         return buffer;
 233     }
 234
 235     std::string format(const char *format,
 236                        std::string s1,
 237                        uint64 d,
 238                        std::string s2)
 239     {
 240         char buffer[256];
 241
 242         sprintf(buffer, format, s1.c_str(), d, s2.c_str());
 243
 244         return buffer;
 245     }
 246
 247     std::string format(const char *format,
 248                        std::string s1,
 249                        std::string s2,
 250                        uint64 d)
 251     {
 252         char buffer[256];
 253
 254         sprintf(buffer, format, s1.c_str(), s2.c_str(), d);
 255
 256         return buffer;
 257     }
 258
 259     char as_char(int c)
 260     {
 261         return static_cast<char>(c);
 262     }
 263 };
 264
 265
 266 std::string to_string(img::address a)
 267 {
 268     char buffer[256];
 269     sprintf(buffer, "0x%" PRIx64, a);
 270     return buffer;
 271 }
 272
 273
 274 uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size)
 275 {
 276     return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size);
 277 }
 278
 279
 280 int64 sign_extend(int64 data, int msb)
 281 {
 282     uint64 shift = 63 - msb;
 283     return (data << shift) >> shift;
 284 }
 285
 286
 287 uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
 288                                size_t register_list_size)
 289 {
 290     if (index < register_list_size) {
 291         return register_list[index];
 292     }
 293
 294     throw std::runtime_error(img::format(
 295                    "Invalid register mapping index %" PRIu64
 296                    ", size of list = %zu",
 297                    index, register_list_size));
 298 }
 299
 300
 301 /*
 302  * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
 303  *
 304  *   Map a 4-bit code to the 5-bit register space according to this pattern:
 305  *
 306  *                              1                   0
 307  *                    5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 308  *                    | | | | | | | | | | | | | | | |
 309  *                    | | | | | | | | | | | | | | | |
 310  *                    | | | | | | | | | | | └---------------┐
 311  *                    | | | | | | | | | | └---------------┐ |
 312  *                    | | | | | | | | | └---------------┐ | |
 313  *                    | | | | | | | | └---------------┐ | | |
 314  *                    | | | | | | | |         | | | | | | | |
 315  *                    | | | | | | | |         | | | | | | | |
 316  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 317  *      3                   2                   1                   0
 318  *
 319  *   Used in handling following instructions:
 320  *
 321  *     - ADDU[4X4]
 322  *     - LW[4X4]
 323  *     - MOVEP[REV]
 324  *     - MUL[4X4]
 325  *     - SW[4X4]
 326  */
 327 uint64 NMD::decode_gpr_gpr4(uint64 d)
 328 {
 329     static uint64 register_list[] = {  8,  9, 10, 11,  4,  5,  6,  7,
 330                                       16, 17, 18, 19, 20, 21, 22, 23 };
 331     return renumber_registers(d, register_list,
 332                sizeof(register_list) / sizeof(register_list[0]));
 333 }
 334
 335
 336 /*
 337  * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
 338  *
 339  *   Map a 4-bit code to the 5-bit register space according to this pattern:
 340  *
 341  *                              1                   0
 342  *                    5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 343  *                    | | | | | | | | | | | | | | | |
 344  *                    | | | | | | | | | | | | └---------------------┐
 345  *                    | | | | | | | | | | | └---------------┐       |
 346  *                    | | | | | | | | | | └---------------┐ |       |
 347  *                    | | | | | | | | | └---------------┐ | |       |
 348  *                    | | | | | | | | └---------------┐ | | |       |
 349  *                    | | | | | | | |           | | | | | | |       |
 350  *                    | | | | | | | |           | | | | | | |       |
 351  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 352  *      3                   2                   1                   0
 353  *
 354  *   This pattern is the same one used for 'gpr4' gpr encoding type, except for
 355  * the input value 3, that is mapped to the output value 0 instead of 11.
 356  *
 357  *   Used in handling following instructions:
 358  *
 359  *     - MOVE.BALC
 360  *     - MOVEP
 361  *     - SW[4X4]
 362  */
 363 uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
 364 {
 365     static uint64 register_list[] = {  8,  9, 10,  0,  4,  5,  6,  7,
 366                                       16, 17, 18, 19, 20, 21, 22, 23 };
 367     return renumber_registers(d, register_list,
 368                sizeof(register_list) / sizeof(register_list[0]));
 369 }
 370
 371
 372 /*
 373  * NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
 374  *
 375  *   Map a 3-bit code to the 5-bit register space according to this pattern:
 376  *
 377  *                            7 6 5 4 3 2 1 0
 378  *                            | | | | | | | |
 379  *                            | | | | | | | |
 380  *                            | | | └-----------------------┐
 381  *                            | | └-----------------------┐ |
 382  *                            | └-----------------------┐ | |
 383  *                            └-----------------------┐ | | |
 384  *                                    | | | |         | | | |
 385  *                            ┌-------┘ | | |         | | | |
 386  *                            | ┌-------┘ | |         | | | |
 387  *                            | | ┌-------┘ |         | | | |
 388  *                            | | | ┌-------┘         | | | |
 389  *                            | | | |                 | | | |
 390  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 391  *      3                   2                   1                   0
 392  *
 393  *   Used in handling following instructions:
 394  *
 395  *     - ADDIU[R1.SP]
 396  *     - ADDIU[R2]
 397  *     - ADDU[16]
 398  *     - AND[16]
 399  *     - ANDI[16]
 400  *     - BEQC[16]
 401  *     - BEQZC[16]
 402  *     - BNEC[16]
 403  *     - BNEZC[16]
 404  *     - LB[16]
 405  *     - LBU[16]
 406  *     - LH[16]
 407  *     - LHU[16]
 408  *     - LI[16]
 409  *     - LW[16]
 410  *     - LW[GP16]
 411  *     - LWXS[16]
 412  *     - NOT[16]
 413  *     - OR[16]
 414  *     - SB[16]
 415  *     - SH[16]
 416  *     - SLL[16]
 417  *     - SRL[16]
 418  *     - SUBU[16]
 419  *     - SW[16]
 420  *     - XOR[16]
 421  */
 422 uint64 NMD::decode_gpr_gpr3(uint64 d)
 423 {
 424     static uint64 register_list[] = { 16, 17, 18, 19,  4,  5,  6,  7 };
 425     return renumber_registers(d, register_list,
 426                sizeof(register_list) / sizeof(register_list[0]));
 427 }
 428
 429
 430 /*
 431  * NMD::decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding
 432  *     type
 433  *
 434  *   Map a 3-bit code to the 5-bit register space according to this pattern:
 435  *
 436  *                            7 6 5 4 3 2 1 0
 437  *                            | | | | | | | |
 438  *                            | | | | | | | └-----------------------┐
 439  *                            | | | └-----------------------┐       |
 440  *                            | | └-----------------------┐ |       |
 441  *                            | └-----------------------┐ | |       |
 442  *                            └-----------------------┐ | | |       |
 443  *                                    | | |           | | | |       |
 444  *                            ┌-------┘ | |           | | | |       |
 445  *                            | ┌-------┘ |           | | | |       |
 446  *                            | | ┌-------┘           | | | |       |
 447  *                            | | |                   | | | |       |
 448  *                            | | |                   | | | |       |
 449  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 450  *      3                   2                   1                   0
 451  *
 452  *   This pattern is the same one used for 'gpr3' gpr encoding type, except for
 453  * the input value 0, that is mapped to the output value 0 instead of 16.
 454  *
 455  *   Used in handling following instructions:
 456  *
 457  *     - SB[16]
 458  *     - SH[16]
 459  *     - SW[16]
 460  *     - SW[GP16]
 461  */
 462 uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
 463 {
 464     static uint64 register_list[] = {  0, 17, 18, 19,  4,  5,  6,  7 };
 465     return renumber_registers(d, register_list,
 466                sizeof(register_list) / sizeof(register_list[0]));
 467 }
 468
 469
 470 /*
 471  * NMD::decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type
 472  *
 473  *   Map a 2-bit code to the 5-bit register space according to this pattern:
 474  *
 475  *                                3 2 1 0
 476  *                                | | | |
 477  *                                | | | |
 478  *                                | | | └-------------------┐
 479  *                                | | └-------------------┐ |
 480  *                                | └-------------------┐ | |
 481  *                                └-------------------┐ | | |
 482  *                                                    | | | |
 483  *                                                    | | | |
 484  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 485  *      3                   2                   1                   0
 486  *
 487  *   Used in handling following instructions:
 488  *
 489  *     - MOVEP
 490  *     - MOVEP[REV]
 491  */
 492 uint64 NMD::decode_gpr_gpr2_reg1(uint64 d)
 493 {
 494     static uint64 register_list[] = {  4,  5,  6,  7 };
 495     return renumber_registers(d, register_list,
 496                sizeof(register_list) / sizeof(register_list[0]));
 497 }
 498
 499
 500 /*
 501  * NMD::decode_gpr_gpr2_reg2() - decoder for 'gpr2.reg2' gpr encoding type
 502  *
 503  *   Map a 2-bit code to the 5-bit register space according to this pattern:
 504  *
 505  *                                3 2 1 0
 506  *                                | | | |
 507  *                                | | | |
 508  *                                | | | └-----------------┐
 509  *                                | | └-----------------┐ |
 510  *                                | └-----------------┐ | |
 511  *                                └-----------------┐ | | |
 512  *                                                  | | | |
 513  *                                                  | | | |
 514  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 515  *      3                   2                   1                   0
 516  *
 517  *   Used in handling following instructions:
 518  *
 519  *     - MOVEP
 520  *     - MOVEP[REV]
 521  */
 522 uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)
 523 {
 524     static uint64 register_list[] = {  5,  6,  7,  8 };
 525     return renumber_registers(d, register_list,
 526                sizeof(register_list) / sizeof(register_list[0]));
 527 }
 528
 529
 530 /*
 531  * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
 532  *
 533  *   Map a 1-bit code to the 5-bit register space according to this pattern:
 534  *
 535  *                                  1 0
 536  *                                  | |
 537  *                                  | |
 538  *                                  | └---------------------┐
 539  *                                  └---------------------┐ |
 540  *                                                        | |
 541  *                                                        | |
 542  *                                                        | |
 543  *                                                        | |
 544  *    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 545  *      3                   2                   1                   0
 546  *
 547  *   Used in handling following instruction:
 548  *
 549  *     - MOVE.BALC
 550  */
 551 uint64 NMD::decode_gpr_gpr1(uint64 d)
 552 {
 553     static uint64 register_list[] = {  4,  5 };
 554     return renumber_registers(d, register_list,
 555                sizeof(register_list) / sizeof(register_list[0]));
 556 }
 557
 558
 559 uint64 NMD::copy(uint64 d)
 560 {
 561     return d;
 562 }
 563
 564
 565 int64 NMD::copy(int64 d)
 566 {
 567     return d;
 568 }
 569
 570
 571 int64 NMD::neg_copy(uint64 d)
 572 {
 573     return 0ll - d;
 574 }
 575
 576
 577 int64 NMD::neg_copy(int64 d)
 578 {
 579     return -d;
 580 }
 581
 582
 583 /* strange wrapper around  gpr3 */
 584 uint64 NMD::encode_rs3_and_check_rs3_ge_rt3(uint64 d)
 585 {
 586 return decode_gpr_gpr3(d);
 587 }
 588
 589
 590 /* strange wrapper around  gpr3 */
 591 uint64 NMD::encode_rs3_and_check_rs3_lt_rt3(uint64 d)
 592 {
 593     return decode_gpr_gpr3(d);
 594 }
 595
 596
 597 /* nop - done by extraction function */
 598 uint64 NMD::encode_s_from_address(uint64 d)
 599 {
 600     return d;
 601 }
 602
 603
 604 /* nop - done by extraction function */
 605 uint64 NMD::encode_u_from_address(uint64 d)
 606 {
 607     return d;
 608 }
 609
 610
 611 /* nop - done by extraction function */
 612 uint64 NMD::encode_s_from_s_hi(uint64 d)
 613 {
 614     return d;
 615 }
 616
 617
 618 uint64 NMD::encode_count3_from_count(uint64 d)
 619 {
 620     IMGASSERTONCE(d < 8);
 621     return d == 0ull ? 8ull : d;
 622 }
 623
 624
 625 uint64 NMD::encode_shift3_from_shift(uint64 d)
 626 {
 627     IMGASSERTONCE(d < 8);
 628     return d == 0ull ? 8ull : d;
 629 }
 630
 631
 632 /* special value for load literal */
 633 int64 NMD::encode_eu_from_s_li16(uint64 d)
 634 {
 635     IMGASSERTONCE(d < 128);
 636     return d == 127 ? -1 : (int64)d;
 637 }
 638
 639
 640 uint64 NMD::encode_msbd_from_size(uint64 d)
 641 {
 642     IMGASSERTONCE(d < 32);
 643     return d + 1;
 644 }
 645
 646
 647 uint64 NMD::encode_eu_from_u_andi16(uint64 d)
 648 {
 649     IMGASSERTONCE(d < 16);
 650     if (d == 12) {
 651         return 0x00ffull;
 652     }
 653     if (d == 13) {
 654         return 0xffffull;
 655     }
 656     return d;
 657 }
 658
 659
 660 uint64 NMD::encode_msbd_from_pos_and_size(uint64 d)
 661 {
 662     IMGASSERTONCE(0);
 663     return d;
 664 }
 665
 666
 667 /* save16 / restore16   ???? */
 668 uint64 NMD::encode_rt1_from_rt(uint64 d)
 669 {
 670     return d ? 31 : 30;
 671 }
 672
 673
 674 /* ? */
 675 uint64 NMD::encode_lsb_from_pos_and_size(uint64 d)
 676 {
 677     return d;
 678 }
 679
 680
 681 std::string NMD::save_restore_list(uint64 rt, uint64 count, uint64 gp)
 682 {
 683     std::string str;
 684
 685     for (uint64 counter = 0; counter != count; counter++) {
 686         bool use_gp = gp && (counter == count - 1);
 687         uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f;
 688         str += img::format(",%s", GPR(this_rt));
 689     }
 690
 691     return str;
 692 }
 693
 694
 695 std::string NMD::GPR(uint64 reg)
 696 {
 697     static const char *gpr_reg[32] = {
 698         "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
 699         "a4",   "a5",   "a6",   "a7",   "r12",  "r13",  "r14",  "r15",
 700         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
 701         "r24",  "r25",  "k0",   "k1",   "gp",   "sp",   "fp",   "ra"
 702     };
 703
 704     if (reg < 32) {
 705         return gpr_reg[reg];
 706     }
 707
 708     throw std::runtime_error(img::format("Invalid GPR register index %" PRIu64,
 709                                          reg));
 710 }
 711
 712
 713 std::string NMD::FPR(uint64 reg)
 714 {
 715     static const char *fpr_reg[32] = {
 716         "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",
 717         "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",
 718         "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
 719         "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
 720     };
 721
 722     if (reg < 32) {
 723         return fpr_reg[reg];
 724     }
 725
 726     throw std::runtime_error(img::format("Invalid FPR register index %" PRIu64,
 727                                          reg));
 728 }
 729
 730
 731 std::string NMD::AC(uint64 reg)
 732 {
 733     static const char *ac_reg[4] = {
 734         "ac0",  "ac1",  "ac2",  "ac3"
 735     };
 736
 737     if (reg < 4) {
 738         return ac_reg[reg];
 739     }
 740
 741     throw std::runtime_error(img::format("Invalid AC register index %" PRIu64,
 742                                          reg));
 743 }
 744
 745
 746 std::string NMD::IMMEDIATE(uint64 value)
 747 {
 748     return img::format("0x%" PRIx64, value);
 749 }
 750
 751
 752 std::string NMD::IMMEDIATE(int64 value)
 753 {
 754     return img::format("%" PRId64, value);
 755 }
 756
 757
 758 std::string NMD::CPR(uint64 reg)
 759 {
 760     /* needs more work */
 761     return img::format("CP%" PRIu64, reg);
 762 }
 763
 764
 765 std::string NMD::ADDRESS(uint64 value, int instruction_size)
 766 {
 767     /* token for string replace */
 768     /* const char TOKEN_REPLACE = (char)0xa2; */
 769     img::address address = m_pc + value + instruction_size;
 770     /* symbol replacement */
 771     /* return img::as_char(TOKEN_REPLACE) + to_string(address); */
 772     return to_string(address);
 773 }
 774
 775
 776 uint64 NMD::extract_op_code_value(const uint16 * data, int size)
 777 {
 778     switch (size) {
 779     case 16:
 780         return data[0];
 781     case 32:
 782         return ((uint64)data[0] << 16) | data[1];
 783     case 48:
 784         return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2];
 785     default:
 786         return data[0];
 787     }
 788 }
 789
 790
 791 int NMD::Disassemble(const uint16 * data, std::string & dis,
 792                      NMD::TABLE_ENTRY_TYPE & type)
 793 {
 794     return Disassemble(data, dis, type, MAJOR, 2);
 795 }
 796
 797
 798 /*
 799  * Recurse through tables until the instruction is found then return
 800  * the string and size
 801  *
 802  * inputs:
 803  *      pointer to a word stream,
 804  *      disassember table and size
 805  * returns:
 806  *      instruction size    - negative is error
 807  *      disassembly string  - on error will constain error string
 808  */
 809 int NMD::Disassemble(const uint16 * data, std::string & dis,
 810                      NMD::TABLE_ENTRY_TYPE & type, const Pool *table,
 811                      int table_size)
 812 {
 813     try
 814     {
 815         for (int i = 0; i < table_size; i++) {
 816             uint64 op_code = extract_op_code_value(data,
 817                                  table[i].instructions_size);
 818             if ((op_code & table[i].mask) == table[i].value) {
 819                 /* possible match */
 820                 conditional_function cond = table[i].condition;
 821                 if ((cond == 0) || (this->*cond)(op_code)) {
 822                     try
 823                     {
 824                         if (table[i].type == pool) {
 825                             return Disassemble(data, dis, type,
 826                                                table[i].next_table,
 827                                                table[i].next_table_size);
 828                         } else if ((table[i].type == instruction) ||
 829                                    (table[i].type == call_instruction) ||
 830                                    (table[i].type == branch_instruction) ||
 831                                    (table[i].type == return_instruction)) {
 832                             if ((table[i].attributes != 0) &&
 833                                 (m_requested_instruction_categories &
 834                                  table[i].attributes) == 0) {
 835                                 /*
 836                                  * failed due to instruction having
 837                                  * an ASE attribute and the requested version
 838                                  * not having that attribute
 839                                  */
 840                                 dis = "ASE attribute missmatch";
 841                                 return -5;
 842                             }
 843                             disassembly_function dis_fn = table[i].disassembly;
 844                             if (dis_fn == 0) {
 845                                 dis = "disassembler failure - bad table entry";
 846                                 return -6;
 847                             }
 848                             type = table[i].type;
 849                             dis = (this->*dis_fn)(op_code);
 850                             return table[i].instructions_size;
 851                         } else {
 852                             dis = "reserved instruction";
 853                             return -2;
 854                         }
 855                     }
 856                     catch (std::runtime_error & e)
 857                     {
 858                         dis = e.what();
 859                         return -3;          /* runtime error */
 860                     }
 861                 }
 862             }
 863         }
 864     }
 865     catch (std::exception & e)
 866     {
 867         dis = e.what();
 868         return -4;          /* runtime error */
 869     }
 870
 871     dis = "failed to disassemble";
 872     return -1;      /* failed to disassemble        */
 873 }
 874
 875
 876 uint64 NMD::extract_code_18_to_0(uint64 instruction)
 877 {
 878     uint64 value = 0;
 879     value |= extract_bits(instruction, 0, 19);
 880     return value;
 881 }
 882
 883
 884 uint64 NMD::extract_shift3_2_1_0(uint64 instruction)
 885 {
 886     uint64 value = 0;
 887     value |= extract_bits(instruction, 0, 3);
 888     return value;
 889 }
 890
 891
 892 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction)
 893 {
 894     uint64 value = 0;
 895     value |= extract_bits(instruction, 3, 9) << 3;
 896     return value;
 897 }
 898
 899
 900 uint64 NMD::extract_count_3_2_1_0(uint64 instruction)
 901 {
 902     uint64 value = 0;
 903     value |= extract_bits(instruction, 0, 4);
 904     return value;
 905 }
 906
 907
 908 uint64 NMD::extract_rtz3_9_8_7(uint64 instruction)
 909 {
 910     uint64 value = 0;
 911     value |= extract_bits(instruction, 7, 3);
 912     return value;
 913 }
 914
 915
 916 uint64 NMD::extract_u_17_to_1__s1(uint64 instruction)
 917 {
 918     uint64 value = 0;
 919     value |= extract_bits(instruction, 1, 17) << 1;
 920     return value;
 921 }
 922
 923
 924 int64 NMD::extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction)
 925 {
 926     int64 value = 0;
 927     value |= extract_bits(instruction, 11, 10);
 928     value = sign_extend(value, 9);
 929     return value;
 930 }
 931
 932
 933 int64 NMD::extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction)
 934 {
 935     int64 value = 0;
 936     value |= extract_bits(instruction, 0, 1) << 11;
 937     value |= extract_bits(instruction, 1, 10) << 1;
 938     value = sign_extend(value, 11);
 939     return value;
 940 }
 941
 942
 943 uint64 NMD::extract_u_10(uint64 instruction)
 944 {
 945     uint64 value = 0;
 946     value |= extract_bits(instruction, 10, 1);
 947     return value;
 948 }
 949
 950
 951 uint64 NMD::extract_rtz4_27_26_25_23_22_21(uint64 instruction)
 952 {
 953     uint64 value = 0;
 954     value |= extract_bits(instruction, 21, 3);
 955     value |= extract_bits(instruction, 25, 1) << 3;
 956     return value;
 957 }
 958
 959
 960 uint64 NMD::extract_sa_15_14_13_12_11(uint64 instruction)
 961 {
 962     uint64 value = 0;
 963     value |= extract_bits(instruction, 11, 5);
 964     return value;
 965 }
 966
 967
 968 uint64 NMD::extract_shift_4_3_2_1_0(uint64 instruction)
 969 {
 970     uint64 value = 0;
 971     value |= extract_bits(instruction, 0, 5);
 972     return value;
 973 }
 974
 975
 976 uint64 NMD::extract_shiftx_10_9_8_7__s1(uint64 instruction)
 977 {
 978     uint64 value = 0;
 979     value |= extract_bits(instruction, 7, 4) << 1;
 980     return value;
 981 }
 982
 983
 984 uint64 NMD::extract_hint_25_24_23_22_21(uint64 instruction)
 985 {
 986     uint64 value = 0;
 987     value |= extract_bits(instruction, 21, 5);
 988     return value;
 989 }
 990
 991
 992 uint64 NMD::extract_count3_14_13_12(uint64 instruction)
 993 {
 994     uint64 value = 0;
 995     value |= extract_bits(instruction, 12, 3);
 996     return value;
 997 }
 998
 999
1000 int64 NMD::extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction)
1001 {
1002     int64 value = 0;
1003     value |= extract_bits(instruction, 0, 1) << 31;
1004     value |= extract_bits(instruction, 2, 10) << 21;
1005     value |= extract_bits(instruction, 12, 9) << 12;
1006     value = sign_extend(value, 31);
1007     return value;
1008 }
1009
1010
1011 int64 NMD::extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction)
1012 {
1013     int64 value = 0;
1014     value |= extract_bits(instruction, 0, 1) << 7;
1015     value |= extract_bits(instruction, 1, 6) << 1;
1016     value = sign_extend(value, 7);
1017     return value;
1018 }
1019
1020
1021 uint64 NMD::extract_u2_10_9(uint64 instruction)
1022 {
1023     uint64 value = 0;
1024     value |= extract_bits(instruction, 9, 2);
1025     return value;
1026 }
1027
1028
1029 uint64 NMD::extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction)
1030 {
1031     uint64 value = 0;
1032     value |= extract_bits(instruction, 16, 10);
1033     return value;
1034 }
1035
1036
1037 uint64 NMD::extract_rs_20_19_18_17_16(uint64 instruction)
1038 {
1039     uint64 value = 0;
1040     value |= extract_bits(instruction, 16, 5);
1041     return value;
1042 }
1043
1044
1045 uint64 NMD::extract_u_2_1__s1(uint64 instruction)
1046 {
1047     uint64 value = 0;
1048     value |= extract_bits(instruction, 1, 2) << 1;
1049     return value;
1050 }
1051
1052
1053 uint64 NMD::extract_stripe_6(uint64 instruction)
1054 {
1055     uint64 value = 0;
1056     value |= extract_bits(instruction, 6, 1);
1057     return value;
1058 }
1059
1060
1061 uint64 NMD::extract_ac_13_12(uint64 instruction)
1062 {
1063     uint64 value = 0;
1064     value |= extract_bits(instruction, 14, 2);
1065     return value;
1066 }
1067
1068
1069 uint64 NMD::extract_shift_20_19_18_17_16(uint64 instruction)
1070 {
1071     uint64 value = 0;
1072     value |= extract_bits(instruction, 16, 5);
1073     return value;
1074 }
1075
1076
1077 uint64 NMD::extract_rdl_25_24(uint64 instruction)
1078 {
1079     uint64 value = 0;
1080     value |= extract_bits(instruction, 24, 1);
1081     return value;
1082 }
1083
1084
1085 int64 NMD::extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction)
1086 {
1087     int64 value = 0;
1088     value |= extract_bits(instruction, 0, 1) << 10;
1089     value |= extract_bits(instruction, 1, 9) << 1;
1090     value = sign_extend(value, 10);
1091     return value;
1092 }
1093
1094
1095 uint64 NMD::extract_eu_6_5_4_3_2_1_0(uint64 instruction)
1096 {
1097     uint64 value = 0;
1098     value |= extract_bits(instruction, 0, 7);
1099     return value;
1100 }
1101
1102
1103 uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)
1104 {
1105     uint64 value = 0;
1106     value |= extract_bits(instruction, 0, 6);
1107     return value;
1108 }
1109
1110
1111 uint64 NMD::extract_count_19_18_17_16(uint64 instruction)
1112 {
1113     uint64 value = 0;
1114     value |= extract_bits(instruction, 16, 4);
1115     return value;
1116 }
1117
1118
1119 uint64 NMD::extract_code_2_1_0(uint64 instruction)
1120 {
1121     uint64 value = 0;
1122     value |= extract_bits(instruction, 0, 3);
1123     return value;
1124 }
1125
1126
1127 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
1128 {
1129     uint64 value = 0;
1130     value |= extract_bits(instruction, 0, 12);
1131     return value;
1132 }
1133
1134
1135 uint64 NMD::extract_rs_4_3_2_1_0(uint64 instruction)
1136 {
1137     uint64 value = 0;
1138     value |= extract_bits(instruction, 0, 5);
1139     return value;
1140 }
1141
1142
1143 uint64 NMD::extract_u_20_to_3__s3(uint64 instruction)
1144 {
1145     uint64 value = 0;
1146     value |= extract_bits(instruction, 3, 18) << 3;
1147     return value;
1148 }
1149
1150
1151 uint64 NMD::extract_u_3_2_1_0__s2(uint64 instruction)
1152 {
1153     uint64 value = 0;
1154     value |= extract_bits(instruction, 0, 4) << 2;
1155     return value;
1156 }
1157
1158
1159 uint64 NMD::extract_cofun_25_24_23(uint64 instruction)
1160 {
1161     uint64 value = 0;
1162     value |= extract_bits(instruction, 3, 23);
1163     return value;
1164 }
1165
1166
1167 uint64 NMD::extract_u_2_1_0__s2(uint64 instruction)
1168 {
1169     uint64 value = 0;
1170     value |= extract_bits(instruction, 0, 3) << 2;
1171     return value;
1172 }
1173
1174
1175 uint64 NMD::extract_rd3_3_2_1(uint64 instruction)
1176 {
1177     uint64 value = 0;
1178     value |= extract_bits(instruction, 1, 3);
1179     return value;
1180 }
1181
1182
1183 uint64 NMD::extract_sa_15_14_13_12(uint64 instruction)
1184 {
1185     uint64 value = 0;
1186     value |= extract_bits(instruction, 12, 4);
1187     return value;
1188 }
1189
1190
1191 uint64 NMD::extract_rt_25_24_23_22_21(uint64 instruction)
1192 {
1193     uint64 value = 0;
1194     value |= extract_bits(instruction, 21, 5);
1195     return value;
1196 }
1197
1198
1199 uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)
1200 {
1201     uint64 value = 0;
1202     value |= extract_bits(instruction, 3, 5);
1203     return value;
1204 }
1205
1206
1207 uint64 NMD::extract_u_17_to_0(uint64 instruction)
1208 {
1209     uint64 value = 0;
1210     value |= extract_bits(instruction, 0, 18);
1211     return value;
1212 }
1213
1214
1215 uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
1216 {
1217     uint64 value = 0;
1218     value |= extract_bits(instruction, 0, 3);
1219     value |= extract_bits(instruction, 4, 1) << 3;
1220     return value;
1221 }
1222
1223
1224 int64 NMD::extract_s__se21_0_20_to_1_s1(uint64 instruction)
1225 {
1226     int64 value = 0;
1227     value |= extract_bits(instruction, 0, 1) << 21;
1228     value |= extract_bits(instruction, 1, 20) << 1;
1229     value = sign_extend(value, 21);
1230     return value;
1231 }
1232
1233
1234 uint64 NMD::extract_op_25_to_3(uint64 instruction)
1235 {
1236     uint64 value = 0;
1237     value |= extract_bits(instruction, 3, 23);
1238     return value;
1239 }
1240
1241
1242 uint64 NMD::extract_rs4_4_2_1_0(uint64 instruction)
1243 {
1244     uint64 value = 0;
1245     value |= extract_bits(instruction, 0, 3);
1246     value |= extract_bits(instruction, 4, 1) << 3;
1247     return value;
1248 }
1249
1250
1251 uint64 NMD::extract_bit_23_22_21(uint64 instruction)
1252 {
1253     uint64 value = 0;
1254     value |= extract_bits(instruction, 21, 3);
1255     return value;
1256 }
1257
1258
1259 uint64 NMD::extract_rt_41_40_39_38_37(uint64 instruction)
1260 {
1261     uint64 value = 0;
1262     value |= extract_bits(instruction, 37, 5);
1263     return value;
1264 }
1265
1266
1267 int64 NMD::extract_shift__se5_21_20_19_18_17_16(uint64 instruction)
1268 {
1269     int64 value = 0;
1270     value |= extract_bits(instruction, 16, 6);
1271     value = sign_extend(value, 5);
1272     return value;
1273 }
1274
1275
1276 uint64 NMD::extract_rd2_3_8(uint64 instruction)
1277 {
1278     uint64 value = 0;
1279     value |= extract_bits(instruction, 3, 1) << 1;
1280     value |= extract_bits(instruction, 8, 1);
1281     return value;
1282 }
1283
1284
1285 uint64 NMD::extract_code_17_to_0(uint64 instruction)
1286 {
1287     uint64 value = 0;
1288     value |= extract_bits(instruction, 0, 18);
1289     return value;
1290 }
1291
1292
1293 uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
1294 {
1295     uint64 value = 0;
1296     value |= extract_bits(instruction, 16, 5);
1297     return value;
1298 }
1299
1300
1301 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction)
1302 {
1303     int64 value = 0;
1304     value |= extract_bits(instruction, 2, 6) << 2;
1305     value |= extract_bits(instruction, 15, 1) << 8;
1306     value = sign_extend(value, 8);
1307     return value;
1308 }
1309
1310
1311 uint64 NMD::extract_u_15_to_0(uint64 instruction)
1312 {
1313     uint64 value = 0;
1314     value |= extract_bits(instruction, 0, 16);
1315     return value;
1316 }
1317
1318
1319 uint64 NMD::extract_fs_20_19_18_17_16(uint64 instruction)
1320 {
1321     uint64 value = 0;
1322     value |= extract_bits(instruction, 16, 5);
1323     return value;
1324 }
1325
1326
1327 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction)
1328 {
1329     int64 value = 0;
1330     value |= extract_bits(instruction, 0, 8);
1331     value |= extract_bits(instruction, 15, 1) << 8;
1332     value = sign_extend(value, 8);
1333     return value;
1334 }
1335
1336
1337 uint64 NMD::extract_stype_20_19_18_17_16(uint64 instruction)
1338 {
1339     uint64 value = 0;
1340     value |= extract_bits(instruction, 16, 5);
1341     return value;
1342 }
1343
1344
1345 uint64 NMD::extract_rtl_11(uint64 instruction)
1346 {
1347     uint64 value = 0;
1348     value |= extract_bits(instruction, 9, 1);
1349     return value;
1350 }
1351
1352
1353 uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)
1354 {
1355     uint64 value = 0;
1356     value |= extract_bits(instruction, 16, 5);
1357     return value;
1358 }
1359
1360
1361 uint64 NMD::extract_sel_13_12_11(uint64 instruction)
1362 {
1363     uint64 value = 0;
1364     value |= extract_bits(instruction, 11, 3);
1365     return value;
1366 }
1367
1368
1369 uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)
1370 {
1371     uint64 value = 0;
1372     value |= extract_bits(instruction, 0, 5);
1373     return value;
1374 }
1375
1376
1377 uint64 NMD::extract_gp_2(uint64 instruction)
1378 {
1379     uint64 value = 0;
1380     value |= extract_bits(instruction, 2, 1);
1381     return value;
1382 }
1383
1384
1385 uint64 NMD::extract_rt3_9_8_7(uint64 instruction)
1386 {
1387     uint64 value = 0;
1388     value |= extract_bits(instruction, 7, 3);
1389     return value;
1390 }
1391
1392
1393 uint64 NMD::extract_ft_25_24_23_22_21(uint64 instruction)
1394 {
1395     uint64 value = 0;
1396     value |= extract_bits(instruction, 21, 5);
1397     return value;
1398 }
1399
1400
1401 uint64 NMD::extract_u_17_16_15_14_13_12_11(uint64 instruction)
1402 {
1403     uint64 value = 0;
1404     value |= extract_bits(instruction, 11, 7);
1405     return value;
1406 }
1407
1408
1409 uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)
1410 {
1411     uint64 value = 0;
1412     value |= extract_bits(instruction, 16, 5);
1413     return value;
1414 }
1415
1416
1417 uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)
1418 {
1419     uint64 value = 0;
1420     value |= extract_bits(instruction, 5, 3);
1421     value |= extract_bits(instruction, 9, 1) << 3;
1422     return value;
1423 }
1424
1425
1426 uint64 NMD::extract_msbt_10_9_8_7_6(uint64 instruction)
1427 {
1428     uint64 value = 0;
1429     value |= extract_bits(instruction, 6, 5);
1430     return value;
1431 }
1432
1433
1434 uint64 NMD::extract_u_5_4_3_2_1_0__s2(uint64 instruction)
1435 {
1436     uint64 value = 0;
1437     value |= extract_bits(instruction, 0, 6) << 2;
1438     return value;
1439 }
1440
1441
1442 uint64 NMD::extract_sa_15_14_13(uint64 instruction)
1443 {
1444     uint64 value = 0;
1445     value |= extract_bits(instruction, 13, 3);
1446     return value;
1447 }
1448
1449
1450 int64 NMD::extract_s__se14_0_13_to_1_s1(uint64 instruction)
1451 {
1452     int64 value = 0;
1453     value |= extract_bits(instruction, 0, 1) << 14;
1454     value |= extract_bits(instruction, 1, 13) << 1;
1455     value = sign_extend(value, 14);
1456     return value;
1457 }
1458
1459
1460 uint64 NMD::extract_rs3_6_5_4(uint64 instruction)
1461 {
1462     uint64 value = 0;
1463     value |= extract_bits(instruction, 4, 3);
1464     return value;
1465 }
1466
1467
1468 uint64 NMD::extract_u_31_to_0__s32(uint64 instruction)
1469 {
1470     uint64 value = 0;
1471     value |= extract_bits(instruction, 0, 32) << 32;
1472     return value;
1473 }
1474
1475
1476 uint64 NMD::extract_shift_10_9_8_7_6(uint64 instruction)
1477 {
1478     uint64 value = 0;
1479     value |= extract_bits(instruction, 6, 5);
1480     return value;
1481 }
1482
1483
1484 uint64 NMD::extract_cs_25_24_23_22_21(uint64 instruction)
1485 {
1486     uint64 value = 0;
1487     value |= extract_bits(instruction, 21, 5);
1488     return value;
1489 }
1490
1491
1492 uint64 NMD::extract_shiftx_11_10_9_8_7_6(uint64 instruction)
1493 {
1494     uint64 value = 0;
1495     value |= extract_bits(instruction, 6, 6);
1496     return value;
1497 }
1498
1499
1500 uint64 NMD::extract_rt_9_8_7_6_5(uint64 instruction)
1501 {
1502     uint64 value = 0;
1503     value |= extract_bits(instruction, 5, 5);
1504     return value;
1505 }
1506
1507
1508 uint64 NMD::extract_op_25_24_23_22_21(uint64 instruction)
1509 {
1510     uint64 value = 0;
1511     value |= extract_bits(instruction, 21, 5);
1512     return value;
1513 }
1514
1515
1516 uint64 NMD::extract_u_6_5_4_3_2_1_0__s2(uint64 instruction)
1517 {
1518     uint64 value = 0;
1519     value |= extract_bits(instruction, 0, 7) << 2;
1520     return value;
1521 }
1522
1523
1524 uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction)
1525 {
1526     uint64 value = 0;
1527     value |= extract_bits(instruction, 11, 6);
1528     return value;
1529 }
1530
1531
1532 uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)
1533 {
1534     uint64 value = 0;
1535     value |= extract_bits(instruction, 14, 7);
1536     return value;
1537 }
1538
1539
1540 uint64 NMD::extract_eu_3_2_1_0(uint64 instruction)
1541 {
1542     uint64 value = 0;
1543     value |= extract_bits(instruction, 0, 4);
1544     return value;
1545 }
1546
1547
1548 uint64 NMD::extract_u_7_6_5_4__s4(uint64 instruction)
1549 {
1550     uint64 value = 0;
1551     value |= extract_bits(instruction, 4, 4) << 4;
1552     return value;
1553 }
1554
1555
1556 int64 NMD::extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction)
1557 {
1558     int64 value = 0;
1559     value |= extract_bits(instruction, 3, 5) << 3;
1560     value |= extract_bits(instruction, 15, 1) << 8;
1561     value = sign_extend(value, 8);
1562     return value;
1563 }
1564
1565
1566 uint64 NMD::extract_ft_15_14_13_12_11(uint64 instruction)
1567 {
1568     uint64 value = 0;
1569     value |= extract_bits(instruction, 11, 5);
1570     return value;
1571 }
1572
1573
1574 int64 NMD::extract_s__se31_15_to_0_31_to_16(uint64 instruction)
1575 {
1576     int64 value = 0;
1577     value |= extract_bits(instruction, 0, 16) << 16;
1578     value |= extract_bits(instruction, 16, 16);
1579     value = sign_extend(value, 31);
1580     return value;
1581 }
1582
1583
1584 uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
1585 {
1586     uint64 value = 0;
1587     value |= extract_bits(instruction, 13, 8);
1588     return value;
1589 }
1590
1591
1592 uint64 NMD::extract_u_17_to_2__s2(uint64 instruction)
1593 {
1594     uint64 value = 0;
1595     value |= extract_bits(instruction, 2, 16) << 2;
1596     return value;
1597 }
1598
1599
1600 uint64 NMD::extract_rd_15_14_13_12_11(uint64 instruction)
1601 {
1602     uint64 value = 0;
1603     value |= extract_bits(instruction, 11, 5);
1604     return value;
1605 }
1606
1607
1608 uint64 NMD::extract_c0s_20_19_18_17_16(uint64 instruction)
1609 {
1610     uint64 value = 0;
1611     value |= extract_bits(instruction, 16, 5);
1612     return value;
1613 }
1614
1615
1616 uint64 NMD::extract_code_1_0(uint64 instruction)
1617 {
1618     uint64 value = 0;
1619     value |= extract_bits(instruction, 0, 2);
1620     return value;
1621 }
1622
1623
1624 int64 NMD::extract_s__se25_0_24_to_1_s1(uint64 instruction)
1625 {
1626     int64 value = 0;
1627     value |= extract_bits(instruction, 0, 1) << 25;
1628     value |= extract_bits(instruction, 1, 24) << 1;
1629     value = sign_extend(value, 25);
1630     return value;
1631 }
1632
1633
1634 uint64 NMD::extract_u_1_0(uint64 instruction)
1635 {
1636     uint64 value = 0;
1637     value |= extract_bits(instruction, 0, 2);
1638     return value;
1639 }
1640
1641
1642 uint64 NMD::extract_u_3_8__s2(uint64 instruction)
1643 {
1644     uint64 value = 0;
1645     value |= extract_bits(instruction, 3, 1) << 3;
1646     value |= extract_bits(instruction, 8, 1) << 2;
1647     return value;
1648 }
1649
1650
1651 uint64 NMD::extract_fd_15_14_13_12_11(uint64 instruction)
1652 {
1653     uint64 value = 0;
1654     value |= extract_bits(instruction, 11, 5);
1655     return value;
1656 }
1657
1658
1659 uint64 NMD::extract_u_4_3_2_1_0__s2(uint64 instruction)
1660 {
1661     uint64 value = 0;
1662     value |= extract_bits(instruction, 0, 5) << 2;
1663     return value;
1664 }
1665
1666
1667 uint64 NMD::extract_rtz4_9_7_6_5(uint64 instruction)
1668 {
1669     uint64 value = 0;
1670     value |= extract_bits(instruction, 5, 3);
1671     value |= extract_bits(instruction, 9, 1) << 3;
1672     return value;
1673 }
1674
1675
1676 uint64 NMD::extract_sel_15_14_13_12_11(uint64 instruction)
1677 {
1678     uint64 value = 0;
1679     value |= extract_bits(instruction, 11, 5);
1680     return value;
1681 }
1682
1683
1684 uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
1685 {
1686     uint64 value = 0;
1687     value |= extract_bits(instruction, 21, 5);
1688     return value;
1689 }
1690
1691
1692 uint64 NMD::extract_u_20_to_2__s2(uint64 instruction)
1693 {
1694     uint64 value = 0;
1695     value |= extract_bits(instruction, 2, 19) << 2;
1696     return value;
1697 }
1698
1699
1700 int64 NMD::extract_s__se3_4_2_1_0(uint64 instruction)
1701 {
1702     int64 value = 0;
1703     value |= extract_bits(instruction, 0, 3);
1704     value |= extract_bits(instruction, 4, 1) << 3;
1705     value = sign_extend(value, 3);
1706     return value;
1707 }
1708
1709
1710 uint64 NMD::extract_u_3_2_1_0__s1(uint64 instruction)
1711 {
1712     uint64 value = 0;
1713     value |= extract_bits(instruction, 0, 4) << 1;
1714     return value;
1715 }
1716
1717
1718
1719 bool NMD::ADDIU_32__cond(uint64 instruction)
1720 {
1721     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1722     return rt != 0;
1723 }
1724
1725
1726 bool NMD::ADDIU_RS5__cond(uint64 instruction)
1727 {
1728     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1729     return rt != 0;
1730 }
1731
1732
1733 bool NMD::BALRSC_cond(uint64 instruction)
1734 {
1735     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1736     return rt != 0;
1737 }
1738
1739
1740 bool NMD::BEQC_16__cond(uint64 instruction)
1741 {
1742     uint64 rs3 = extract_rs3_6_5_4(instruction);
1743     uint64 rt3 = extract_rt3_9_8_7(instruction);
1744     uint64 u = extract_u_3_2_1_0__s1(instruction);
1745     return rs3 < rt3 && u != 0;
1746 }
1747
1748
1749 bool NMD::BNEC_16__cond(uint64 instruction)
1750 {
1751     uint64 rs3 = extract_rs3_6_5_4(instruction);
1752     uint64 rt3 = extract_rt3_9_8_7(instruction);
1753     uint64 u = extract_u_3_2_1_0__s1(instruction);
1754     return rs3 >= rt3 && u != 0;
1755 }
1756
1757
1758 bool NMD::MOVE_cond(uint64 instruction)
1759 {
1760     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1761     return rt != 0;
1762 }
1763
1764
1765 bool NMD::P16_BR1_cond(uint64 instruction)
1766 {
1767     uint64 u = extract_u_3_2_1_0__s1(instruction);
1768     return u != 0;
1769 }
1770
1771
1772 bool NMD::PREF_S9__cond(uint64 instruction)
1773 {
1774     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1775     return hint != 31;
1776 }
1777
1778
1779 bool NMD::PREFE_cond(uint64 instruction)
1780 {
1781     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1782     return hint != 31;
1783 }
1784
1785
1786 bool NMD::SLTU_cond(uint64 instruction)
1787 {
1788     uint64 rd = extract_rd_15_14_13_12_11(instruction);
1789     return rd != 0;
1790 }
1791
1792
1793
1794 /*
1795  * ABS.D fd, fs - Floating Point Absolute Value
1796  *
1797  *   3         2         1
1798  *  10987654321098765432109876543210
1799  *  010001     00000          000101
1800  *    fmt -----
1801  *               fs -----
1802  *                    fd -----
1803  */
1804 std::string NMD::ABS_D(uint64 instruction)
1805 {
1806     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1807     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1808
1809     std::string fs = FPR(copy(fs_value));
1810     std::string fd = FPR(copy(fd_value));
1811
1812     return img::format("ABS.D %s, %s", fd, fs);
1813 }
1814
1815
1816 /*
1817  * ABS.S fd, fs - Floating Point Absolute Value
1818  *
1819  *   3         2         1
1820  *  10987654321098765432109876543210
1821  *  010001     00000          000101
1822  *    fmt -----
1823  *               fd -----
1824  *                    fs -----
1825  */
1826 std::string NMD::ABS_S(uint64 instruction)
1827 {
1828     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1829     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1830
1831     std::string fs = FPR(copy(fs_value));
1832     std::string fd = FPR(copy(fd_value));
1833
1834     return img::format("ABS.S %s, %s", fd, fs);
1835 }
1836
1837
1838 /*
1839  * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords
1840  *         with 16-bit saturation
1841  *
1842  *   3         2         1
1843  *  10987654321098765432109876543210
1844  *  001000          0001000100111111
1845  *     rt -----
1846  *          rs -----
1847  */
1848 std::string NMD::ABSQ_S_PH(uint64 instruction)
1849 {
1850     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1851     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1852
1853     std::string rt = GPR(copy(rt_value));
1854     std::string rs = GPR(copy(rs_value));
1855
1856     return img::format("ABSQ_S.PH %s, %s", rt, rs);
1857 }
1858
1859
1860 /*
1861  * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte values
1862  *         with 8-bit saturation
1863  *
1864  *   3         2         1
1865  *  10987654321098765432109876543210
1866  *  001000          0000000100111111
1867  *     rt -----
1868  *          rs -----
1869  */
1870 std::string NMD::ABSQ_S_QB(uint64 instruction)
1871 {
1872     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1873     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1874
1875     std::string rt = GPR(copy(rt_value));
1876     std::string rs = GPR(copy(rs_value));
1877
1878     return img::format("ABSQ_S.QB %s, %s", rt, rs);
1879 }
1880
1881
1882 /*
1883  * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-bit
1884  *         saturation
1885  *
1886  *   3         2         1
1887  *  10987654321098765432109876543210
1888  *  001000          0010000100111111
1889  *     rt -----
1890  *          rs -----
1891  */
1892 std::string NMD::ABSQ_S_W(uint64 instruction)
1893 {
1894     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1895     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1896
1897     std::string rt = GPR(copy(rt_value));
1898     std::string rs = GPR(copy(rs_value));
1899
1900     return img::format("ABSQ_S.W %s, %s", rt, rs);
1901 }
1902
1903
1904 /*
1905  *
1906  *
1907  *   3         2         1
1908  *  10987654321098765432109876543210
1909  *  001000          0010000100111111
1910  *     rt -----
1911  *          rs -----
1912  */
1913 std::string NMD::ACLR(uint64 instruction)
1914 {
1915     uint64 bit_value = extract_bit_23_22_21(instruction);
1916     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1917     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
1918
1919     std::string bit = IMMEDIATE(copy(bit_value));
1920     std::string s = IMMEDIATE(copy(s_value));
1921     std::string rs = GPR(copy(rs_value));
1922
1923     return img::format("ACLR %s, %s(%s)", bit, s, rs);
1924 }
1925
1926
1927 /*
1928  *
1929  *
1930  *   3         2         1
1931  *  10987654321098765432109876543210
1932  *  001000          0010000100111111
1933  *     rt -----
1934  *          rs -----
1935  */
1936 std::string NMD::ADD(uint64 instruction)
1937 {
1938     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1939     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1940     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
1941
1942     std::string rd = GPR(copy(rd_value));
1943     std::string rs = GPR(copy(rs_value));
1944     std::string rt = GPR(copy(rt_value));
1945
1946     return img::format("ADD %s, %s, %s", rd, rs, rt);
1947 }
1948
1949
1950 /*
1951  * ADD.D fd, fs, ft - Floating Point Add
1952  *
1953  *   3         2         1
1954  *  10987654321098765432109876543210
1955  *  010001                    000101
1956  *    fmt -----
1957  *          ft -----
1958  *               fs -----
1959  *                    fd -----
1960  */
1961 std::string NMD::ADD_D(uint64 instruction)
1962 {
1963     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1964     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1965     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1966
1967     std::string ft = FPR(copy(ft_value));
1968     std::string fs = FPR(copy(fs_value));
1969     std::string fd = FPR(copy(fd_value));
1970
1971     return img::format("ADD.D %s, %s, %s", fd, fs, ft);
1972 }
1973
1974
1975 /*
1976  * ADD.S fd, fs, ft - Floating Point Add
1977  *
1978  *   3         2         1
1979  *  10987654321098765432109876543210
1980  *  010001                    000101
1981  *    fmt -----
1982  *          ft -----
1983  *               fs -----
1984  *                    fd -----
1985  */
1986 std::string NMD::ADD_S(uint64 instruction)
1987 {
1988     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1989     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1990     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1991
1992     std::string ft = FPR(copy(ft_value));
1993     std::string fs = FPR(copy(fs_value));
1994     std::string fd = FPR(copy(fd_value));
1995
1996     return img::format("ADD.S %s, %s, %s", fd, fs, ft);
1997 }
1998
1999
2000 /*
2001  *
2002  *
2003  *   3         2         1
2004  *  10987654321098765432109876543210
2005  *  001000          0010000100111111
2006  *     rt -----
2007  *          rs -----
2008  */
2009 std::string NMD::ADDIU_32_(uint64 instruction)
2010 {
2011     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2012     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2013     uint64 u_value = extract_u_15_to_0(instruction);
2014
2015     std::string rt = GPR(copy(rt_value));
2016     std::string rs = GPR(copy(rs_value));
2017     std::string u = IMMEDIATE(copy(u_value));
2018
2019     return img::format("ADDIU %s, %s, %s", rt, rs, u);
2020 }
2021
2022
2023 /*
2024  *
2025  *
2026  *   3         2         1
2027  *  10987654321098765432109876543210
2028  *  001000          0010000100111111
2029  *     rt -----
2030  *          rs -----
2031  */
2032 std::string NMD::ADDIU_48_(uint64 instruction)
2033 {
2034     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2035     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2036
2037     std::string rt = GPR(copy(rt_value));
2038     std::string s = IMMEDIATE(copy(s_value));
2039
2040     return img::format("ADDIU %s, %s", rt, s);
2041 }
2042
2043
2044 /*
2045  *
2046  *
2047  *   3         2         1
2048  *  10987654321098765432109876543210
2049  *  001000          0010000100111111
2050  *     rt -----
2051  *          rs -----
2052  */
2053 std::string NMD::ADDIU_GP48_(uint64 instruction)
2054 {
2055     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2056     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2057
2058     std::string rt = GPR(copy(rt_value));
2059     std::string s = IMMEDIATE(copy(s_value));
2060
2061     return img::format("ADDIU %s, $%d, %s", rt, 28, s);
2062 }
2063
2064
2065 /*
2066  *
2067  *
2068  *   3         2         1
2069  *  10987654321098765432109876543210
2070  *  001000          0010000100111111
2071  *     rt -----
2072  *          rs -----
2073  */
2074 std::string NMD::ADDIU_GP_B_(uint64 instruction)
2075 {
2076     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2077     uint64 u_value = extract_u_17_to_0(instruction);
2078
2079     std::string rt = GPR(copy(rt_value));
2080     std::string u = IMMEDIATE(copy(u_value));
2081
2082     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
2083 }
2084
2085
2086 /*
2087  *
2088  *
2089  *   3         2         1
2090  *  10987654321098765432109876543210
2091  *  001000          0010000100111111
2092  *     rt -----
2093  *          rs -----
2094  */
2095 std::string NMD::ADDIU_GP_W_(uint64 instruction)
2096 {
2097     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2098     uint64 u_value = extract_u_20_to_2__s2(instruction);
2099
2100     std::string rt = GPR(copy(rt_value));
2101     std::string u = IMMEDIATE(copy(u_value));
2102
2103     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
2104 }
2105
2106
2107 /*
2108  *
2109  *
2110  *   3         2         1
2111  *  10987654321098765432109876543210
2112  *  001000          0010000100111111
2113  *     rt -----
2114  *          rs -----
2115  */
2116 std::string NMD::ADDIU_NEG_(uint64 instruction)
2117 {
2118     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2119     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2120     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2121
2122     std::string rt = GPR(copy(rt_value));
2123     std::string rs = GPR(copy(rs_value));
2124     std::string u = IMMEDIATE(neg_copy(u_value));
2125
2126     return img::format("ADDIU %s, %s, %s", rt, rs, u);
2127 }
2128
2129
2130 /*
2131  *
2132  *
2133  *   3         2         1
2134  *  10987654321098765432109876543210
2135  *  001000          0010000100111111
2136  *     rt -----
2137  *          rs -----
2138  */
2139 std::string NMD::ADDIU_R1_SP_(uint64 instruction)
2140 {
2141     uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
2142     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2143
2144     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2145     std::string u = IMMEDIATE(copy(u_value));
2146
2147     return img::format("ADDIU %s, $%d, %s", rt3, 29, u);
2148 }
2149
2150
2151 /*
2152  *
2153  *
2154  *   3         2         1
2155  *  10987654321098765432109876543210
2156  *  001000          0010000100111111
2157  *     rt -----
2158  *          rs -----
2159  */
2160 std::string NMD::ADDIU_R2_(uint64 instruction)
2161 {
2162     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2163     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2164     uint64 u_value = extract_u_2_1_0__s2(instruction);
2165
2166     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2167     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2168     std::string u = IMMEDIATE(copy(u_value));
2169
2170     return img::format("ADDIU %s, %s, %s", rt3, rs3, u);
2171 }
2172
2173
2174 /*
2175  * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit
2176  *
2177  *  5432109876543210
2178  *  100100      1
2179  *     rt -----
2180  *           s - ---
2181  */
2182 std::string NMD::ADDIU_RS5_(uint64 instruction)
2183 {
2184     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
2185     int64 s_value = extract_s__se3_4_2_1_0(instruction);
2186
2187     std::string rt = GPR(copy(rt_value));
2188     std::string s = IMMEDIATE(copy(s_value));
2189
2190     return img::format("ADDIU %s, %s", rt, s);
2191 }
2192
2193
2194 /*
2195  *
2196  *
2197  *   3         2         1
2198  *  10987654321098765432109876543210
2199  *  001000               x1110000101
2200  *     rt -----
2201  *          rs -----
2202  *               rd -----
2203  */
2204 std::string NMD::ADDIUPC_32_(uint64 instruction)
2205 {
2206     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2207     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
2208
2209     std::string rt = GPR(copy(rt_value));
2210     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2211
2212     return img::format("ADDIUPC %s, %s", rt, s);
2213 }
2214
2215
2216 /*
2217  *
2218  *
2219  *   3         2         1
2220  *  10987654321098765432109876543210
2221  *  001000               x1110000101
2222  *     rt -----
2223  *          rs -----
2224  *               rd -----
2225  */
2226 std::string NMD::ADDIUPC_48_(uint64 instruction)
2227 {
2228     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2229     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2230
2231     std::string rt = GPR(copy(rt_value));
2232     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
2233
2234     return img::format("ADDIUPC %s, %s", rt, s);
2235 }
2236
2237
2238 /*
2239  * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors
2240  *
2241  *   3         2         1
2242  *  10987654321098765432109876543210
2243  *  001000               00000001101
2244  *     rt -----
2245  *          rs -----
2246  *               rd -----
2247  */
2248 std::string NMD::ADDQ_PH(uint64 instruction)
2249 {
2250     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2251     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2252     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2253
2254     std::string rd = GPR(copy(rd_value));
2255     std::string rs = GPR(copy(rs_value));
2256     std::string rt = GPR(copy(rt_value));
2257
2258     return img::format("ADDQ.PH %s, %s, %s", rd, rs, rt);
2259 }
2260
2261
2262 /*
2263  * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit
2264  *         saturation
2265  *
2266  *   3         2         1
2267  *  10987654321098765432109876543210
2268  *  001000               10000001101
2269  *     rt -----
2270  *          rs -----
2271  *               rd -----
2272  */
2273 std::string NMD::ADDQ_S_PH(uint64 instruction)
2274 {
2275     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2276     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2277     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2278
2279     std::string rd = GPR(copy(rd_value));
2280     std::string rs = GPR(copy(rs_value));
2281     std::string rt = GPR(copy(rt_value));
2282
2283     return img::format("ADDQ_S.PH %s, %s, %s", rd, rs, rt);
2284 }
2285
2286
2287 /*
2288  * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation
2289  *
2290  *   3         2         1
2291  *  10987654321098765432109876543210
2292  *  001000               x1100000101
2293  *     rt -----
2294  *          rs -----
2295  *               rd -----
2296  */
2297 std::string NMD::ADDQ_S_W(uint64 instruction)
2298 {
2299     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2300     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2301     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2302
2303     std::string rd = GPR(copy(rd_value));
2304     std::string rs = GPR(copy(rs_value));
2305     std::string rt = GPR(copy(rt_value));
2306
2307     return img::format("ADDQ_S.W %s, %s, %s", rd, rs, rt);
2308 }
2309
2310
2311 /*
2312  * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift
2313  *         right to halve results
2314  *
2315  *   3         2         1
2316  *  10987654321098765432109876543210
2317  *  001000               00001001101
2318  *     rt -----
2319  *          rs -----
2320  *               rd -----
2321  */
2322 std::string NMD::ADDQH_PH(uint64 instruction)
2323 {
2324     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2325     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2326     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2327
2328     std::string rd = GPR(copy(rd_value));
2329     std::string rs = GPR(copy(rs_value));
2330     std::string rt = GPR(copy(rt_value));
2331
2332     return img::format("ADDQH.PH %s, %s, %s", rd, rs, rt);
2333 }
2334
2335
2336 /*
2337  * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift
2338  *         right to halve results with rounding
2339  *
2340  *   3         2         1
2341  *  10987654321098765432109876543210
2342  *  001000               10001001101
2343  *     rt -----
2344  *          rs -----
2345  *               rd -----
2346  */
2347 std::string NMD::ADDQH_R_PH(uint64 instruction)
2348 {
2349     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2350     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2351     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2352
2353     std::string rd = GPR(copy(rd_value));
2354     std::string rs = GPR(copy(rs_value));
2355     std::string rt = GPR(copy(rt_value));
2356
2357     return img::format("ADDQH_R.PH %s, %s, %s", rd, rs, rt);
2358 }
2359
2360
2361 /*
2362  * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to halve
2363  *         results with rounding
2364  *
2365  *   3         2         1
2366  *  10987654321098765432109876543210
2367  *  001000               00010001101
2368  *     rt -----
2369  *          rs -----
2370  *               rd -----
2371  */
2372 std::string NMD::ADDQH_R_W(uint64 instruction)
2373 {
2374     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2375     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2376     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2377
2378     std::string rd = GPR(copy(rd_value));
2379     std::string rs = GPR(copy(rs_value));
2380     std::string rt = GPR(copy(rt_value));
2381
2382     return img::format("ADDQH_R.W %s, %s, %s", rd, rs, rt);
2383 }
2384
2385
2386 /*
2387  * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve
2388  *         results
2389  *
2390  *   3         2         1
2391  *  10987654321098765432109876543210
2392  *  001000               10010001101
2393  *     rt -----
2394  *          rs -----
2395  *               rd -----
2396  */
2397 std::string NMD::ADDQH_W(uint64 instruction)
2398 {
2399     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2400     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2401     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2402
2403     std::string rd = GPR(copy(rd_value));
2404     std::string rs = GPR(copy(rs_value));
2405     std::string rt = GPR(copy(rt_value));
2406
2407     return img::format("ADDQH.W %s, %s, %s", rd, rs, rt);
2408 }
2409
2410
2411 /*
2412  * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit
2413  *
2414  *   3         2         1
2415  *  10987654321098765432109876543210
2416  *  001000               x1110000101
2417  *     rt -----
2418  *          rs -----
2419  *               rd -----
2420  */
2421 std::string NMD::ADDSC(uint64 instruction)
2422 {
2423     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2424     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2425     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2426
2427     std::string rd = GPR(copy(rd_value));
2428     std::string rs = GPR(copy(rs_value));
2429     std::string rt = GPR(copy(rt_value));
2430
2431     return img::format("ADDSC %s, %s, %s", rd, rs, rt);
2432 }
2433
2434
2435 /*
2436  * ADDU[16] rd3, rs3, rt3 -
2437  *
2438  *  5432109876543210
2439  *  101100         0
2440  *    rt3 ---
2441  *       rs3 ---
2442  *          rd3 ---
2443  */
2444 std::string NMD::ADDU_16_(uint64 instruction)
2445 {
2446     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2447     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2448     uint64 rd3_value = extract_rd3_3_2_1(instruction);
2449
2450     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2451     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2452     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
2453
2454     return img::format("ADDU %s, %s, %s", rd3, rs3, rt3);
2455 }
2456
2457
2458 /*
2459  *
2460  *
2461  *   3         2         1
2462  *  10987654321098765432109876543210
2463  *  001000               x1110000101
2464  *     rt -----
2465  *          rs -----
2466  *               rd -----
2467  */
2468 std::string NMD::ADDU_32_(uint64 instruction)
2469 {
2470     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2471     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2472     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2473
2474     std::string rd = GPR(copy(rd_value));
2475     std::string rs = GPR(copy(rs_value));
2476     std::string rt = GPR(copy(rt_value));
2477
2478     return img::format("ADDU %s, %s, %s", rd, rs, rt);
2479 }
2480
2481
2482 /*
2483  *
2484  *
2485  *   3         2         1
2486  *  10987654321098765432109876543210
2487  *  001000               x1110000101
2488  *     rt -----
2489  *          rs -----
2490  *               rd -----
2491  */
2492 std::string NMD::ADDU_4X4_(uint64 instruction)
2493 {
2494     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
2495     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
2496
2497     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
2498     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
2499
2500     return img::format("ADDU %s, %s", rs4, rt4);
2501 }
2502
2503
2504 /*
2505  * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords
2506  *
2507  *   3         2         1
2508  *  10987654321098765432109876543210
2509  *  001000               00100001101
2510  *     rt -----
2511  *          rs -----
2512  *               rd -----
2513  */
2514 std::string NMD::ADDU_PH(uint64 instruction)
2515 {
2516     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2517     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2518     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2519
2520     std::string rd = GPR(copy(rd_value));
2521     std::string rs = GPR(copy(rs_value));
2522     std::string rt = GPR(copy(rt_value));
2523
2524     return img::format("ADDU.PH %s, %s, %s", rd, rs, rt);
2525 }
2526
2527
2528 /*
2529  * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2530  *
2531  *   3         2         1
2532  *  10987654321098765432109876543210
2533  *  001000               00011001101
2534  *     rt -----
2535  *          rs -----
2536  *               rd -----
2537  */
2538 std::string NMD::ADDU_QB(uint64 instruction)
2539 {
2540     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2541     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2542     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2543
2544     std::string rd = GPR(copy(rd_value));
2545     std::string rs = GPR(copy(rs_value));
2546     std::string rt = GPR(copy(rt_value));
2547
2548     return img::format("ADDU.QB %s, %s, %s", rd, rs, rt);
2549 }
2550
2551
2552 /*
2553  * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 16-bit
2554  *         saturation
2555  *
2556  *   3         2         1
2557  *  10987654321098765432109876543210
2558  *  001000               10100001101
2559  *     rt -----
2560  *          rs -----
2561  *               rd -----
2562  */
2563 std::string NMD::ADDU_S_PH(uint64 instruction)
2564 {
2565     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2566     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2567     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2568
2569     std::string rd = GPR(copy(rd_value));
2570     std::string rs = GPR(copy(rs_value));
2571     std::string rt = GPR(copy(rt_value));
2572
2573     return img::format("ADDU_S.PH %s, %s, %s", rd, rs, rt);
2574 }
2575
2576
2577 /*
2578  * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2579  *
2580  *   3         2         1
2581  *  10987654321098765432109876543210
2582  *  001000               10011001101
2583  *     rt -----
2584  *          rs -----
2585  *               rd -----
2586  */
2587 std::string NMD::ADDU_S_QB(uint64 instruction)
2588 {
2589     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2590     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2591     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2592
2593     std::string rd = GPR(copy(rd_value));
2594     std::string rs = GPR(copy(rs_value));
2595     std::string rt = GPR(copy(rt_value));
2596
2597     return img::format("ADDU_S.QB %s, %s, %s", rd, rs, rt);
2598 }
2599
2600
2601 /*
2602  * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2603  *                       to Halve Results
2604  *
2605  *   3         2         1
2606  *  10987654321098765432109876543210
2607  *  001000               00101001101
2608  *     rt -----
2609  *          rs -----
2610  *               rd -----
2611  */
2612 std::string NMD::ADDUH_QB(uint64 instruction)
2613 {
2614     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2615     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2616     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2617
2618     std::string rd = GPR(copy(rd_value));
2619     std::string rs = GPR(copy(rs_value));
2620     std::string rt = GPR(copy(rt_value));
2621
2622     return img::format("ADDUH.QB %s, %s, %s", rd, rs, rt);
2623 }
2624
2625
2626 /*
2627  * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2628  *                         to Halve Results
2629  *
2630  *   3         2         1
2631  *  10987654321098765432109876543210
2632  *  001000               10101001101
2633  *     rt -----
2634  *          rs -----
2635  *               rd -----
2636  */
2637 std::string NMD::ADDUH_R_QB(uint64 instruction)
2638 {
2639     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2640     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2641     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2642
2643     std::string rd = GPR(copy(rd_value));
2644     std::string rs = GPR(copy(rs_value));
2645     std::string rt = GPR(copy(rt_value));
2646
2647     return img::format("ADDUH_R.QB %s, %s, %s", rd, rs, rt);
2648 }
2649
2650 /*
2651  * ADDWC rd, rt, rs - Add Word with Carry Bit
2652  *
2653  *   3         2         1
2654  *  10987654321098765432109876543210
2655  *  001000               x1111000101
2656  *     rt -----
2657  *          rs -----
2658  *               rd -----
2659  */
2660 std::string NMD::ADDWC(uint64 instruction)
2661 {
2662     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2663     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2664     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2665
2666     std::string rd = GPR(copy(rd_value));
2667     std::string rs = GPR(copy(rs_value));
2668     std::string rt = GPR(copy(rt_value));
2669
2670     return img::format("ADDWC %s, %s, %s", rd, rs, rt);
2671 }
2672
2673
2674 /*
2675  *
2676  *
2677  *   3         2         1
2678  *  10987654321098765432109876543210
2679  *  001000               x1110000101
2680  *     rt -----
2681  *          rs -----
2682  *               rd -----
2683  */
2684 std::string NMD::ALUIPC(uint64 instruction)
2685 {
2686     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2687     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
2688
2689     std::string rt = GPR(copy(rt_value));
2690     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2691
2692     return img::format("ALUIPC %s, %%pcrel_hi(%s)", rt, s);
2693 }
2694
2695
2696 /*
2697  * AND[16] rt3, rs3 -
2698  *
2699  *  5432109876543210
2700  *  101100
2701  *    rt3 ---
2702  *       rs3 ---
2703  *           eu ----
2704  */
2705 std::string NMD::AND_16_(uint64 instruction)
2706 {
2707     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2708     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2709
2710     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2711     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2712
2713     return img::format("AND %s, %s", rs3, rt3);
2714 }
2715
2716
2717 /*
2718  *
2719  *
2720  *   3         2         1
2721  *  10987654321098765432109876543210
2722  *  001000               x1110000101
2723  *     rt -----
2724  *          rs -----
2725  *               rd -----
2726  */
2727 std::string NMD::AND_32_(uint64 instruction)
2728 {
2729     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2730     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2731     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2732
2733     std::string rd = GPR(copy(rd_value));
2734     std::string rs = GPR(copy(rs_value));
2735     std::string rt = GPR(copy(rt_value));
2736
2737     return img::format("AND %s, %s, %s", rd, rs, rt);
2738 }
2739
2740
2741 /*
2742  * ANDI rt, rs, u -
2743  *
2744  *  5432109876543210
2745  *  101100
2746  *    rt3 ---
2747  *       rs3 ---
2748  *           eu ----
2749  */
2750 std::string NMD::ANDI_16_(uint64 instruction)
2751 {
2752     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2753     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2754     uint64 eu_value = extract_eu_3_2_1_0(instruction);
2755
2756     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2757     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2758     std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value));
2759
2760     return img::format("ANDI %s, %s, %s", rt3, rs3, eu);
2761 }
2762
2763
2764 /*
2765  *
2766  *
2767  *   3         2         1
2768  *  10987654321098765432109876543210
2769  *  001000               x1110000101
2770  *     rt -----
2771  *          rs -----
2772  *               rd -----
2773  */
2774 std::string NMD::ANDI_32_(uint64 instruction)
2775 {
2776     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2777     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2778     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2779
2780     std::string rt = GPR(copy(rt_value));
2781     std::string rs = GPR(copy(rs_value));
2782     std::string u = IMMEDIATE(copy(u_value));
2783
2784     return img::format("ANDI %s, %s, %s", rt, rs, u);
2785 }
2786
2787
2788 /*
2789  *
2790  *
2791  *   3         2         1
2792  *  10987654321098765432109876543210
2793  *  001000               x1110000101
2794  *     rt -----
2795  *          rs -----
2796  *               rd -----
2797  */
2798 std::string NMD::APPEND(uint64 instruction)
2799 {
2800     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2801     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2802     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
2803
2804     std::string rt = GPR(copy(rt_value));
2805     std::string rs = GPR(copy(rs_value));
2806     std::string sa = IMMEDIATE(copy(sa_value));
2807
2808     return img::format("APPEND %s, %s, %s", rt, rs, sa);
2809 }
2810
2811
2812 /*
2813  *
2814  *
2815  *   3         2         1
2816  *  10987654321098765432109876543210
2817  *  001000               x1110000101
2818  *     rt -----
2819  *          rs -----
2820  *               rd -----
2821  */
2822 std::string NMD::ASET(uint64 instruction)
2823 {
2824     uint64 bit_value = extract_bit_23_22_21(instruction);
2825     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2826     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
2827
2828     std::string bit = IMMEDIATE(copy(bit_value));
2829     std::string s = IMMEDIATE(copy(s_value));
2830     std::string rs = GPR(copy(rs_value));
2831
2832     return img::format("ASET %s, %s(%s)", bit, s, rs);
2833 }
2834
2835
2836 /*
2837  *
2838  *
2839  *   3         2         1
2840  *  10987654321098765432109876543210
2841  *  001000               x1110000101
2842  *     rt -----
2843  *          rs -----
2844  *               rd -----
2845  */
2846 std::string NMD::BALC_16_(uint64 instruction)
2847 {
2848     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2849
2850     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2851
2852     return img::format("BALC %s", s);
2853 }
2854
2855
2856 /*
2857  *
2858  *
2859  *   3         2         1
2860  *  10987654321098765432109876543210
2861  *  001000               x1110000101
2862  *     rt -----
2863  *          rs -----
2864  *               rd -----
2865  */
2866 std::string NMD::BALC_32_(uint64 instruction)
2867 {
2868     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2869
2870     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2871
2872     return img::format("BALC %s", s);
2873 }
2874
2875
2876 /*
2877  *
2878  *
2879  *   3         2         1
2880  *  10987654321098765432109876543210
2881  *  001000               x1110000101
2882  *     rt -----
2883  *          rs -----
2884  *               rd -----
2885  */
2886 std::string NMD::BALRSC(uint64 instruction)
2887 {
2888     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2889     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2890
2891     std::string rt = GPR(copy(rt_value));
2892     std::string rs = GPR(copy(rs_value));
2893
2894     return img::format("BALRSC %s, %s", rt, rs);
2895 }
2896
2897
2898 /*
2899  *
2900  *
2901  *   3         2         1
2902  *  10987654321098765432109876543210
2903  *  001000               x1110000101
2904  *     rt -----
2905  *          rs -----
2906  *               rd -----
2907  */
2908 std::string NMD::BBEQZC(uint64 instruction)
2909 {
2910     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2911     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2912     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2913
2914     std::string rt = GPR(copy(rt_value));
2915     std::string bit = IMMEDIATE(copy(bit_value));
2916     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2917
2918     return img::format("BBEQZC %s, %s, %s", rt, bit, s);
2919 }
2920
2921
2922 /*
2923  *
2924  *
2925  *   3         2         1
2926  *  10987654321098765432109876543210
2927  *  001000               x1110000101
2928  *     rt -----
2929  *          rs -----
2930  *               rd -----
2931  */
2932 std::string NMD::BBNEZC(uint64 instruction)
2933 {
2934     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2935     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2936     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2937
2938     std::string rt = GPR(copy(rt_value));
2939     std::string bit = IMMEDIATE(copy(bit_value));
2940     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2941
2942     return img::format("BBNEZC %s, %s, %s", rt, bit, s);
2943 }
2944
2945
2946 /*
2947  *
2948  *
2949  *   3         2         1
2950  *  10987654321098765432109876543210
2951  *  001000               x1110000101
2952  *     rt -----
2953  *          rs -----
2954  *               rd -----
2955  */
2956 std::string NMD::BC_16_(uint64 instruction)
2957 {
2958     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2959
2960     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2961
2962     return img::format("BC %s", s);
2963 }
2964
2965
2966 /*
2967  *
2968  *
2969  *   3         2         1
2970  *  10987654321098765432109876543210
2971  *  001000               x1110000101
2972  *     rt -----
2973  *          rs -----
2974  *               rd -----
2975  */
2976 std::string NMD::BC_32_(uint64 instruction)
2977 {
2978     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2979
2980     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2981
2982     return img::format("BC %s", s);
2983 }
2984
2985
2986 /*
2987  *
2988  *
2989  *   3         2         1
2990  *  10987654321098765432109876543210
2991  *  001000               x1110000101
2992  *     rt -----
2993  *          rs -----
2994  *               rd -----
2995  */
2996 std::string NMD::BC1EQZC(uint64 instruction)
2997 {
2998     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2999     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3000
3001     std::string ft = FPR(copy(ft_value));
3002     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3003
3004     return img::format("BC1EQZC %s, %s", ft, s);
3005 }
3006
3007
3008 /*
3009  *
3010  *
3011  *   3         2         1
3012  *  10987654321098765432109876543210
3013  *  001000               x1110000101
3014  *     rt -----
3015  *          rs -----
3016  *               rd -----
3017  */
3018 std::string NMD::BC1NEZC(uint64 instruction)
3019 {
3020     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3021     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3022
3023     std::string ft = FPR(copy(ft_value));
3024     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3025
3026     return img::format("BC1NEZC %s, %s", ft, s);
3027 }
3028
3029
3030 /*
3031  *
3032  *
3033  *   3         2         1
3034  *  10987654321098765432109876543210
3035  *  001000               x1110000101
3036  *     rt -----
3037  *          rs -----
3038  *               rd -----
3039  */
3040 std::string NMD::BC2EQZC(uint64 instruction)
3041 {
3042     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
3043     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3044
3045     std::string ct = CPR(copy(ct_value));
3046     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3047
3048     return img::format("BC2EQZC %s, %s", ct, s);
3049 }
3050
3051
3052 /*
3053  *
3054  *
3055  *   3         2         1
3056  *  10987654321098765432109876543210
3057  *  001000               x1110000101
3058  *     rt -----
3059  *          rs -----
3060  *               rd -----
3061  */
3062 std::string NMD::BC2NEZC(uint64 instruction)
3063 {
3064     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
3065     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3066
3067     std::string ct = CPR(copy(ct_value));
3068     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3069
3070     return img::format("BC2NEZC %s, %s", ct, s);
3071 }
3072
3073
3074 /*
3075  *
3076  *
3077  *   3         2         1
3078  *  10987654321098765432109876543210
3079  *  001000               x1110000101
3080  *     rt -----
3081  *          rs -----
3082  *               rd -----
3083  */
3084 std::string NMD::BEQC_16_(uint64 instruction)
3085 {
3086     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3087     uint64 rs3_value = extract_rs3_6_5_4(instruction);
3088     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3089
3090     std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
3091     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3092     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
3093
3094     return img::format("BEQC %s, %s, %s", rs3, rt3, u);
3095 }
3096
3097
3098 /*
3099  *
3100  *
3101  *   3         2         1
3102  *  10987654321098765432109876543210
3103  *  001000               x1110000101
3104  *     rt -----
3105  *          rs -----
3106  *               rd -----
3107  */
3108 std::string NMD::BEQC_32_(uint64 instruction)
3109 {
3110     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3111     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3112     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3113
3114     std::string rs = GPR(copy(rs_value));
3115     std::string rt = GPR(copy(rt_value));
3116     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3117
3118     return img::format("BEQC %s, %s, %s", rs, rt, s);
3119 }
3120
3121
3122 /*
3123  *
3124  *
3125  *   3         2         1
3126  *  10987654321098765432109876543210
3127  *  001000               x1110000101
3128  *     rt -----
3129  *          rs -----
3130  *               rd -----
3131  */
3132 std::string NMD::BEQIC(uint64 instruction)
3133 {
3134     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3135     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3136     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3137
3138     std::string rt = GPR(copy(rt_value));
3139     std::string u = IMMEDIATE(copy(u_value));
3140     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3141
3142     return img::format("BEQIC %s, %s, %s", rt, u, s);
3143 }
3144
3145
3146 /*
3147  *
3148  *
3149  *   3         2         1
3150  *  10987654321098765432109876543210
3151  *  001000               x1110000101
3152  *     rt -----
3153  *          rs -----
3154  *               rd -----
3155  */
3156 std::string NMD::BEQZC_16_(uint64 instruction)
3157 {
3158     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3159     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3160
3161     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3162     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
3163
3164     return img::format("BEQZC %s, %s", rt3, s);
3165 }
3166
3167
3168 /*
3169  *
3170  *
3171  *   3         2         1
3172  *  10987654321098765432109876543210
3173  *  001000               x1110000101
3174  *     rt -----
3175  *          rs -----
3176  *               rd -----
3177  */
3178 std::string NMD::BGEC(uint64 instruction)
3179 {
3180     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3181     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3182     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3183
3184     std::string rs = GPR(copy(rs_value));
3185     std::string rt = GPR(copy(rt_value));
3186     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3187
3188     return img::format("BGEC %s, %s, %s", rs, rt, s);
3189 }
3190
3191
3192 /*
3193  *
3194  *
3195  *   3         2         1
3196  *  10987654321098765432109876543210
3197  *  001000               x1110000101
3198  *     rt -----
3199  *          rs -----
3200  *               rd -----
3201  */
3202 std::string NMD::BGEIC(uint64 instruction)
3203 {
3204     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3205     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3206     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3207
3208     std::string rt = GPR(copy(rt_value));
3209     std::string u = IMMEDIATE(copy(u_value));
3210     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3211
3212     return img::format("BGEIC %s, %s, %s", rt, u, s);
3213 }
3214
3215
3216 /*
3217  *
3218  *
3219  *   3         2         1
3220  *  10987654321098765432109876543210
3221  *  001000               x1110000101
3222  *     rt -----
3223  *          rs -----
3224  *               rd -----
3225  */
3226 std::string NMD::BGEIUC(uint64 instruction)
3227 {
3228     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3229     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3230     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3231
3232     std::string rt = GPR(copy(rt_value));
3233     std::string u = IMMEDIATE(copy(u_value));
3234     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3235
3236     return img::format("BGEIUC %s, %s, %s", rt, u, s);
3237 }
3238
3239
3240 /*
3241  *
3242  *
3243  *   3         2         1
3244  *  10987654321098765432109876543210
3245  *  001000               x1110000101
3246  *     rt -----
3247  *          rs -----
3248  *               rd -----
3249  */
3250 std::string NMD::BGEUC(uint64 instruction)
3251 {
3252     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3253     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3254     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3255
3256     std::string rs = GPR(copy(rs_value));
3257     std::string rt = GPR(copy(rt_value));
3258     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3259
3260     return img::format("BGEUC %s, %s, %s", rs, rt, s);
3261 }
3262
3263
3264 /*
3265  *
3266  *
3267  *   3         2         1
3268  *  10987654321098765432109876543210
3269  *  001000               x1110000101
3270  *     rt -----
3271  *          rs -----
3272  *               rd -----
3273  */
3274 std::string NMD::BLTC(uint64 instruction)
3275 {
3276     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3277     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3278     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3279
3280     std::string rs = GPR(copy(rs_value));
3281     std::string rt = GPR(copy(rt_value));
3282     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3283
3284     return img::format("BLTC %s, %s, %s", rs, rt, s);
3285 }
3286
3287
3288 /*
3289  *
3290  *
3291  *   3         2         1
3292  *  10987654321098765432109876543210
3293  *  001000               x1110000101
3294  *     rt -----
3295  *          rs -----
3296  *               rd -----
3297  */
3298 std::string NMD::BLTIC(uint64 instruction)
3299 {
3300     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3301     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3302     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3303
3304     std::string rt = GPR(copy(rt_value));
3305     std::string u = IMMEDIATE(copy(u_value));
3306     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3307
3308     return img::format("BLTIC %s, %s, %s", rt, u, s);
3309 }
3310
3311
3312 /*
3313  *
3314  *
3315  *   3         2         1
3316  *  10987654321098765432109876543210
3317  *  001000               x1110000101
3318  *     rt -----
3319  *          rs -----
3320  *               rd -----
3321  */
3322 std::string NMD::BLTIUC(uint64 instruction)
3323 {
3324     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3325     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3326     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3327
3328     std::string rt = GPR(copy(rt_value));
3329     std::string u = IMMEDIATE(copy(u_value));
3330     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3331
3332     return img::format("BLTIUC %s, %s, %s", rt, u, s);
3333 }
3334
3335
3336 /*
3337  *
3338  *
3339  *   3         2         1
3340  *  10987654321098765432109876543210
3341  *  001000               x1110000101
3342  *     rt -----
3343  *          rs -----
3344  *               rd -----
3345  */
3346 std::string NMD::BLTUC(uint64 instruction)
3347 {
3348     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3349     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3350     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3351
3352     std::string rs = GPR(copy(rs_value));
3353     std::string rt = GPR(copy(rt_value));
3354     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3355
3356     return img::format("BLTUC %s, %s, %s", rs, rt, s);
3357 }
3358
3359
3360 /*
3361  *
3362  *
3363  *   3         2         1
3364  *  10987654321098765432109876543210
3365  *  001000               x1110000101
3366  *     rt -----
3367  *          rs -----
3368  *               rd -----
3369  */
3370 std::string NMD::BNEC_16_(uint64 instruction)
3371 {
3372     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3373     uint64 rs3_value = extract_rs3_6_5_4(instruction);
3374     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3375
3376     std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
3377     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3378     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
3379
3380     return img::format("BNEC %s, %s, %s", rs3, rt3, u);
3381 }
3382
3383
3384 /*
3385  *
3386  *
3387  *   3         2         1
3388  *  10987654321098765432109876543210
3389  *  001000               x1110000101
3390  *     rt -----
3391  *          rs -----
3392  *               rd -----
3393  */
3394 std::string NMD::BNEC_32_(uint64 instruction)
3395 {
3396     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3397     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3398     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3399
3400     std::string rs = GPR(copy(rs_value));
3401     std::string rt = GPR(copy(rt_value));
3402     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3403
3404     return img::format("BNEC %s, %s, %s", rs, rt, s);
3405 }
3406
3407
3408 /*
3409  *
3410  *
3411  *   3         2         1
3412  *  10987654321098765432109876543210
3413  *  001000               x1110000101
3414  *     rt -----
3415  *          rs -----
3416  *               rd -----
3417  */
3418 std::string NMD::BNEIC(uint64 instruction)
3419 {
3420     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3421     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3422     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3423
3424     std::string rt = GPR(copy(rt_value));
3425     std::string u = IMMEDIATE(copy(u_value));
3426     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3427
3428     return img::format("BNEIC %s, %s, %s", rt, u, s);
3429 }
3430
3431
3432 /*
3433  *
3434  *
3435  *   3         2         1
3436  *  10987654321098765432109876543210
3437  *  001000               x1110000101
3438  *     rt -----
3439  *          rs -----
3440  *               rd -----
3441  */
3442 std::string NMD::BNEZC_16_(uint64 instruction)
3443 {
3444     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3445     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3446
3447     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3448     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
3449
3450     return img::format("BNEZC %s, %s", rt3, s);
3451 }
3452
3453
3454 /*
3455  *
3456  *
3457  *   3         2         1
3458  *  10987654321098765432109876543210
3459  *  001000               x1110000101
3460  *     rt -----
3461  *          rs -----
3462  *               rd -----
3463  */
3464 std::string NMD::BPOSGE32C(uint64 instruction)
3465 {
3466     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3467
3468     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3469
3470     return img::format("BPOSGE32C %s", s);
3471 }
3472
3473
3474 /*
3475  *
3476  *
3477  *   3         2         1
3478  *  10987654321098765432109876543210
3479  *  001000               x1110000101
3480  *     rt -----
3481  *          rs -----
3482  *               rd -----
3483  */
3484 std::string NMD::BREAK_16_(uint64 instruction)
3485 {
3486     uint64 code_value = extract_code_2_1_0(instruction);
3487
3488     std::string code = IMMEDIATE(copy(code_value));
3489
3490     return img::format("BREAK %s", code);
3491 }
3492
3493
3494 /*
3495  * BREAK code - Break. Cause a Breakpoint exception
3496  *
3497  *   3         2         1
3498  *  10987654321098765432109876543210
3499  *  001000               x1110000101
3500  *     rt -----
3501  *          rs -----
3502  *               rd -----
3503  */
3504 std::string NMD::BREAK_32_(uint64 instruction)
3505 {
3506     uint64 code_value = extract_code_18_to_0(instruction);
3507
3508     std::string code = IMMEDIATE(copy(code_value));
3509
3510     return img::format("BREAK %s", code);
3511 }
3512
3513
3514 /*
3515  *
3516  *
3517  *   3         2         1
3518  *  10987654321098765432109876543210
3519  *  001000               x1110000101
3520  *     rt -----
3521  *          rs -----
3522  *               rd -----
3523  */
3524 std::string NMD::BRSC(uint64 instruction)
3525 {
3526     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3527
3528     std::string rs = GPR(copy(rs_value));
3529
3530     return img::format("BRSC %s", rs);
3531 }
3532
3533
3534 /*
3535  *
3536  *
3537  *   3         2         1
3538  *  10987654321098765432109876543210
3539  *  001000               x1110000101
3540  *     rt -----
3541  *          rs -----
3542  *               rd -----
3543  */
3544 std::string NMD::CACHE(uint64 instruction)
3545 {
3546     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3547     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3548     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3549
3550     std::string op = IMMEDIATE(copy(op_value));
3551     std::string s = IMMEDIATE(copy(s_value));
3552     std::string rs = GPR(copy(rs_value));
3553
3554     return img::format("CACHE %s, %s(%s)", op, s, rs);
3555 }
3556
3557
3558 /*
3559  *
3560  *
3561  *   3         2         1
3562  *  10987654321098765432109876543210
3563  *  001000               x1110000101
3564  *     rt -----
3565  *          rs -----
3566  *               rd -----
3567  */
3568 std::string NMD::CACHEE(uint64 instruction)
3569 {
3570     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3571     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3572     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3573
3574     std::string op = IMMEDIATE(copy(op_value));
3575     std::string s = IMMEDIATE(copy(s_value));
3576     std::string rs = GPR(copy(rs_value));
3577
3578     return img::format("CACHEE %s, %s(%s)", op, s, rs);
3579 }
3580
3581
3582 /*
3583  *
3584  *
3585  *   3         2         1
3586  *  10987654321098765432109876543210
3587  *  001000               x1110000101
3588  *     rt -----
3589  *          rs -----
3590  *               rd -----
3591  */
3592 std::string NMD::CEIL_L_D(uint64 instruction)
3593 {
3594     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3595     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3596
3597     std::string ft = FPR(copy(ft_value));
3598     std::string fs = FPR(copy(fs_value));
3599
3600     return img::format("CEIL.L.D %s, %s", ft, fs);
3601 }
3602
3603
3604 /*
3605  *
3606  *
3607  *   3         2         1
3608  *  10987654321098765432109876543210
3609  *  001000               x1110000101
3610  *     rt -----
3611  *          rs -----
3612  *               rd -----
3613  */
3614 std::string NMD::CEIL_L_S(uint64 instruction)
3615 {
3616     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3617     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3618
3619     std::string ft = FPR(copy(ft_value));
3620     std::string fs = FPR(copy(fs_value));
3621
3622     return img::format("CEIL.L.S %s, %s", ft, fs);
3623 }
3624
3625
3626 /*
3627  *
3628  *
3629  *   3         2         1
3630  *  10987654321098765432109876543210
3631  *  001000               x1110000101
3632  *     rt -----
3633  *          rs -----
3634  *               rd -----
3635  */
3636 std::string NMD::CEIL_W_D(uint64 instruction)
3637 {
3638     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3639     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3640
3641     std::string ft = FPR(copy(ft_value));
3642     std::string fs = FPR(copy(fs_value));
3643
3644     return img::format("CEIL.W.D %s, %s", ft, fs);
3645 }
3646
3647
3648 /*
3649  *
3650  *
3651  *   3         2         1
3652  *  10987654321098765432109876543210
3653  *  001000               x1110000101
3654  *     rt -----
3655  *          rs -----
3656  *               rd -----
3657  */
3658 std::string NMD::CEIL_W_S(uint64 instruction)
3659 {
3660     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3661     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3662
3663     std::string ft = FPR(copy(ft_value));
3664     std::string fs = FPR(copy(fs_value));
3665
3666     return img::format("CEIL.W.S %s, %s", ft, fs);
3667 }
3668
3669
3670 /*
3671  *
3672  *
3673  *   3         2         1
3674  *  10987654321098765432109876543210
3675  *  001000               x1110000101
3676  *     rt -----
3677  *          rs -----
3678  *               rd -----
3679  */
3680 std::string NMD::CFC1(uint64 instruction)
3681 {
3682     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3683     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3684
3685     std::string rt = GPR(copy(rt_value));
3686     std::string cs = CPR(copy(cs_value));
3687
3688     return img::format("CFC1 %s, %s", rt, cs);
3689 }
3690
3691
3692 /*
3693  *
3694  *
3695  *   3         2         1
3696  *  10987654321098765432109876543210
3697  *  001000               x1110000101
3698  *     rt -----
3699  *          rs -----
3700  *               rd -----
3701  */
3702 std::string NMD::CFC2(uint64 instruction)
3703 {
3704     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3705     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3706
3707     std::string rt = GPR(copy(rt_value));
3708     std::string cs = CPR(copy(cs_value));
3709
3710     return img::format("CFC2 %s, %s", rt, cs);
3711 }
3712
3713
3714 /*
3715  *
3716  *
3717  *   3         2         1
3718  *  10987654321098765432109876543210
3719  *  001000               x1110000101
3720  *     rt -----
3721  *          rs -----
3722  *               rd -----
3723  */
3724 std::string NMD::CLASS_D(uint64 instruction)
3725 {
3726     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3727     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3728
3729     std::string ft = FPR(copy(ft_value));
3730     std::string fs = FPR(copy(fs_value));
3731
3732     return img::format("CLASS.D %s, %s", ft, fs);
3733 }
3734
3735
3736 /*
3737  *
3738  *
3739  *   3         2         1
3740  *  10987654321098765432109876543210
3741  *  001000               x1110000101
3742  *     rt -----
3743  *          rs -----
3744  *               rd -----
3745  */
3746 std::string NMD::CLASS_S(uint64 instruction)
3747 {
3748     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3749     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3750
3751     std::string ft = FPR(copy(ft_value));
3752     std::string fs = FPR(copy(fs_value));
3753
3754     return img::format("CLASS.S %s, %s", ft, fs);
3755 }
3756
3757
3758 /*
3759  *
3760  *
3761  *   3         2         1
3762  *  10987654321098765432109876543210
3763  *  001000               x1110000101
3764  *     rt -----
3765  *          rs -----
3766  *               rd -----
3767  */
3768 std::string NMD::CLO(uint64 instruction)
3769 {
3770     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3771     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3772
3773     std::string rt = GPR(copy(rt_value));
3774     std::string rs = GPR(copy(rs_value));
3775
3776     return img::format("CLO %s, %s", rt, rs);
3777 }
3778
3779
3780 /*
3781  *
3782  *
3783  *   3         2         1
3784  *  10987654321098765432109876543210
3785  *  001000               x1110000101
3786  *     rt -----
3787  *          rs -----
3788  *               rd -----
3789  */
3790 std::string NMD::CLZ(uint64 instruction)
3791 {
3792     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3793     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3794
3795     std::string rt = GPR(copy(rt_value));
3796     std::string rs = GPR(copy(rs_value));
3797
3798     return img::format("CLZ %s, %s", rt, rs);
3799 }
3800
3801
3802 /*
3803  *
3804  *
3805  *   3         2         1
3806  *  10987654321098765432109876543210
3807  *  001000               x1110000101
3808  *     rt -----
3809  *          rs -----
3810  *               rd -----
3811  */
3812 std::string NMD::CMP_AF_D(uint64 instruction)
3813 {
3814     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3815     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3816     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3817
3818     std::string fd = FPR(copy(fd_value));
3819     std::string fs = FPR(copy(fs_value));
3820     std::string ft = FPR(copy(ft_value));
3821
3822     return img::format("CMP.AF.D %s, %s, %s", fd, fs, ft);
3823 }
3824
3825
3826 /*
3827  *
3828  *
3829  *   3         2         1
3830  *  10987654321098765432109876543210
3831  *  001000               x1110000101
3832  *     rt -----
3833  *          rs -----
3834  *               rd -----
3835  */
3836 std::string NMD::CMP_AF_S(uint64 instruction)
3837 {
3838     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3839     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3840     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3841
3842     std::string fd = FPR(copy(fd_value));
3843     std::string fs = FPR(copy(fs_value));
3844     std::string ft = FPR(copy(ft_value));
3845
3846     return img::format("CMP.AF.S %s, %s, %s", fd, fs, ft);
3847 }
3848
3849
3850 /*
3851  *
3852  *
3853  *   3         2         1
3854  *  10987654321098765432109876543210
3855  *  001000               x1110000101
3856  *     rt -----
3857  *          rs -----
3858  *               rd -----
3859  */
3860 std::string NMD::CMP_EQ_D(uint64 instruction)
3861 {
3862     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3863     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3864     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3865
3866     std::string fd = FPR(copy(fd_value));
3867     std::string fs = FPR(copy(fs_value));
3868     std::string ft = FPR(copy(ft_value));
3869
3870     return img::format("CMP.EQ.D %s, %s, %s", fd, fs, ft);
3871 }
3872
3873
3874 /*
3875  *
3876  *
3877  *   3         2         1
3878  *  10987654321098765432109876543210
3879  *  001000               x1110000101
3880  *     rt -----
3881  *          rs -----
3882  *               rd -----
3883  */
3884 std::string NMD::CMP_EQ_PH(uint64 instruction)
3885 {
3886     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3887     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3888
3889     std::string rs = GPR(copy(rs_value));
3890     std::string rt = GPR(copy(rt_value));
3891
3892     return img::format("CMP.EQ.PH %s, %s", rs, rt);
3893 }
3894
3895
3896 /*
3897  *
3898  *
3899  *   3         2         1
3900  *  10987654321098765432109876543210
3901  *  001000               x1110000101
3902  *     rt -----
3903  *          rs -----
3904  *               rd -----
3905  */
3906 std::string NMD::CMP_EQ_S(uint64 instruction)
3907 {
3908     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3909     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3910     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3911
3912     std::string fd = FPR(copy(fd_value));
3913     std::string fs = FPR(copy(fs_value));
3914     std::string ft = FPR(copy(ft_value));
3915
3916     return img::format("CMP.EQ.S %s, %s, %s", fd, fs, ft);
3917 }
3918
3919
3920 /*
3921  *
3922  *
3923  *   3         2         1
3924  *  10987654321098765432109876543210
3925  *  001000               x1110000101
3926  *     rt -----
3927  *          rs -----
3928  *               rd -----
3929  */
3930 std::string NMD::CMP_LE_D(uint64 instruction)
3931 {
3932     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3933     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3934     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3935
3936     std::string fd = FPR(copy(fd_value));
3937     std::string fs = FPR(copy(fs_value));
3938     std::string ft = FPR(copy(ft_value));
3939
3940     return img::format("CMP.LE.D %s, %s, %s", fd, fs, ft);
3941 }
3942
3943
3944 /*
3945  *
3946  *
3947  *   3         2         1
3948  *  10987654321098765432109876543210
3949  *  001000               x1110000101
3950  *     rt -----
3951  *          rs -----
3952  *               rd -----
3953  */
3954 std::string NMD::CMP_LE_PH(uint64 instruction)
3955 {
3956     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3957     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3958
3959     std::string rs = GPR(copy(rs_value));
3960     std::string rt = GPR(copy(rt_value));
3961
3962     return img::format("CMP.LE.PH %s, %s", rs, rt);
3963 }
3964
3965
3966 /*
3967  *
3968  *
3969  *   3         2         1
3970  *  10987654321098765432109876543210
3971  *  001000               x1110000101
3972  *     rt -----
3973  *          rs -----
3974  *               rd -----
3975  */
3976 std::string NMD::CMP_LE_S(uint64 instruction)
3977 {
3978     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3979     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3980     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3981
3982     std::string fd = FPR(copy(fd_value));
3983     std::string fs = FPR(copy(fs_value));
3984     std::string ft = FPR(copy(ft_value));
3985
3986     return img::format("CMP.LE.S %s, %s, %s", fd, fs, ft);
3987 }
3988
3989
3990 /*
3991  *
3992  *
3993  *   3         2         1
3994  *  10987654321098765432109876543210
3995  *  001000               x1110000101
3996  *     rt -----
3997  *          rs -----
3998  *               rd -----
3999  */
4000 std::string NMD::CMP_LT_D(uint64 instruction)
4001 {
4002     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4003     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4004     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4005
4006     std::string fd = FPR(copy(fd_value));
4007     std::string fs = FPR(copy(fs_value));
4008     std::string ft = FPR(copy(ft_value));
4009
4010     return img::format("CMP.LT.D %s, %s, %s", fd, fs, ft);
4011 }
4012
4013
4014 /*
4015  *
4016  *
4017  *   3         2         1
4018  *  10987654321098765432109876543210
4019  *  001000               x1110000101
4020  *     rt -----
4021  *          rs -----
4022  *               rd -----
4023  */
4024 std::string NMD::CMP_LT_PH(uint64 instruction)
4025 {
4026     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4027     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4028
4029     std::string rs = GPR(copy(rs_value));
4030     std::string rt = GPR(copy(rt_value));
4031
4032     return img::format("CMP.LT.PH %s, %s", rs, rt);
4033 }
4034
4035
4036 /*
4037  *
4038  *
4039  *   3         2         1
4040  *  10987654321098765432109876543210
4041  *  001000               x1110000101
4042  *     rt -----
4043  *          rs -----
4044  *               rd -----
4045  */
4046 std::string NMD::CMP_LT_S(uint64 instruction)
4047 {
4048     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4049     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4050     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4051
4052     std::string fd = FPR(copy(fd_value));
4053     std::string fs = FPR(copy(fs_value));
4054     std::string ft = FPR(copy(ft_value));
4055
4056     return img::format("CMP.LT.S %s, %s, %s", fd, fs, ft);
4057 }
4058
4059
4060 /*
4061  *
4062  *
4063  *   3         2         1
4064  *  10987654321098765432109876543210
4065  *  001000               x1110000101
4066  *     rt -----
4067  *          rs -----
4068  *               rd -----
4069  */
4070 std::string NMD::CMP_NE_D(uint64 instruction)
4071 {
4072     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4073     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4074     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4075
4076     std::string fd = FPR(copy(fd_value));
4077     std::string fs = FPR(copy(fs_value));
4078     std::string ft = FPR(copy(ft_value));
4079
4080     return img::format("CMP.NE.D %s, %s, %s", fd, fs, ft);
4081 }
4082
4083
4084 /*
4085  *
4086  *
4087  *   3         2         1
4088  *  10987654321098765432109876543210
4089  *  001000               x1110000101
4090  *     rt -----
4091  *          rs -----
4092  *               rd -----
4093  */
4094 std::string NMD::CMP_NE_S(uint64 instruction)
4095 {
4096     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4097     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4098     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4099
4100     std::string fd = FPR(copy(fd_value));
4101     std::string fs = FPR(copy(fs_value));
4102     std::string ft = FPR(copy(ft_value));
4103
4104     return img::format("CMP.NE.S %s, %s, %s", fd, fs, ft);
4105 }
4106
4107
4108 /*
4109  *
4110  *
4111  *   3         2         1
4112  *  10987654321098765432109876543210
4113  *  001000               x1110000101
4114  *     rt -----
4115  *          rs -----
4116  *               rd -----
4117  */
4118 std::string NMD::CMP_OR_D(uint64 instruction)
4119 {
4120     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4121     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4122     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4123
4124     std::string fd = FPR(copy(fd_value));
4125     std::string fs = FPR(copy(fs_value));
4126     std::string ft = FPR(copy(ft_value));
4127
4128     return img::format("CMP.OR.D %s, %s, %s", fd, fs, ft);
4129 }
4130
4131
4132 /*
4133  *
4134  *
4135  *   3         2         1
4136  *  10987654321098765432109876543210
4137  *  001000               x1110000101
4138  *     rt -----
4139  *          rs -----
4140  *               rd -----
4141  */
4142 std::string NMD::CMP_OR_S(uint64 instruction)
4143 {
4144     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4145     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4146     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4147
4148     std::string fd = FPR(copy(fd_value));
4149     std::string fs = FPR(copy(fs_value));
4150     std::string ft = FPR(copy(ft_value));
4151
4152     return img::format("CMP.OR.S %s, %s, %s", fd, fs, ft);
4153 }
4154
4155
4156 /*
4157  *
4158  *
4159  *   3         2         1
4160  *  10987654321098765432109876543210
4161  *  001000               x1110000101
4162  *     rt -----
4163  *          rs -----
4164  *               rd -----
4165  */
4166 std::string NMD::CMP_SAF_D(uint64 instruction)
4167 {
4168     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4169     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4170     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4171
4172     std::string fd = FPR(copy(fd_value));
4173     std::string fs = FPR(copy(fs_value));
4174     std::string ft = FPR(copy(ft_value));
4175
4176     return img::format("CMP.SAF.D %s, %s, %s", fd, fs, ft);
4177 }
4178
4179
4180 /*
4181  *
4182  *
4183  *   3         2         1
4184  *  10987654321098765432109876543210
4185  *  001000               x1110000101
4186  *     rt -----
4187  *          rs -----
4188  *               rd -----
4189  */
4190 std::string NMD::CMP_SAF_S(uint64 instruction)
4191 {
4192     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4193     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4194     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4195
4196     std::string fd = FPR(copy(fd_value));
4197     std::string fs = FPR(copy(fs_value));
4198     std::string ft = FPR(copy(ft_value));
4199
4200     return img::format("CMP.SAF.S %s, %s, %s", fd, fs, ft);
4201 }
4202
4203
4204 /*
4205  *
4206  *
4207  *   3         2         1
4208  *  10987654321098765432109876543210
4209  *  001000               x1110000101
4210  *     rt -----
4211  *          rs -----
4212  *               rd -----
4213  */
4214 std::string NMD::CMP_SEQ_D(uint64 instruction)
4215 {
4216     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4217     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4218     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4219
4220     std::string fd = FPR(copy(fd_value));
4221     std::string fs = FPR(copy(fs_value));
4222     std::string ft = FPR(copy(ft_value));
4223
4224     return img::format("CMP.SEQ.D %s, %s, %s", fd, fs, ft);
4225 }
4226
4227
4228 /*
4229  *
4230  *
4231  *   3         2         1
4232  *  10987654321098765432109876543210
4233  *  001000               x1110000101
4234  *     rt -----
4235  *          rs -----
4236  *               rd -----
4237  */
4238 std::string NMD::CMP_SEQ_S(uint64 instruction)
4239 {
4240     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4241     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4242     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4243
4244     std::string fd = FPR(copy(fd_value));
4245     std::string fs = FPR(copy(fs_value));
4246     std::string ft = FPR(copy(ft_value));
4247
4248     return img::format("CMP.SEQ.S %s, %s, %s", fd, fs, ft);
4249 }
4250
4251
4252 /*
4253  *
4254  *
4255  *   3         2         1
4256  *  10987654321098765432109876543210
4257  *  001000               x1110000101
4258  *     rt -----
4259  *          rs -----
4260  *               rd -----
4261  */
4262 std::string NMD::CMP_SLE_D(uint64 instruction)
4263 {
4264     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4265     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4266     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4267
4268     std::string fd = FPR(copy(fd_value));
4269     std::string fs = FPR(copy(fs_value));
4270     std::string ft = FPR(copy(ft_value));
4271
4272     return img::format("CMP.SLE.D %s, %s, %s", fd, fs, ft);
4273 }
4274
4275
4276 /*
4277  *
4278  *
4279  *   3         2         1
4280  *  10987654321098765432109876543210
4281  *  001000               x1110000101
4282  *     rt -----
4283  *          rs -----
4284  *               rd -----
4285  */
4286 std::string NMD::CMP_SLE_S(uint64 instruction)
4287 {
4288     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4289     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4290     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4291
4292     std::string fd = FPR(copy(fd_value));
4293     std::string fs = FPR(copy(fs_value));
4294     std::string ft = FPR(copy(ft_value));
4295
4296     return img::format("CMP.SLE.S %s, %s, %s", fd, fs, ft);
4297 }
4298
4299
4300 /*
4301  *
4302  *
4303  *   3         2         1
4304  *  10987654321098765432109876543210
4305  *  001000               x1110000101
4306  *     rt -----
4307  *          rs -----
4308  *               rd -----
4309  */
4310 std::string NMD::CMP_SLT_D(uint64 instruction)
4311 {
4312     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4313     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4314     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4315
4316     std::string fd = FPR(copy(fd_value));
4317     std::string fs = FPR(copy(fs_value));
4318     std::string ft = FPR(copy(ft_value));
4319
4320     return img::format("CMP.SLT.D %s, %s, %s", fd, fs, ft);
4321 }
4322
4323
4324 /*
4325  *
4326  *
4327  *   3         2         1
4328  *  10987654321098765432109876543210
4329  *  001000               x1110000101
4330  *     rt -----
4331  *          rs -----
4332  *               rd -----
4333  */
4334 std::string NMD::CMP_SLT_S(uint64 instruction)
4335 {
4336     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4337     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4338     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4339
4340     std::string fd = FPR(copy(fd_value));
4341     std::string fs = FPR(copy(fs_value));
4342     std::string ft = FPR(copy(ft_value));
4343
4344     return img::format("CMP.SLT.S %s, %s, %s", fd, fs, ft);
4345 }
4346
4347
4348 /*
4349  *
4350  *
4351  *   3         2         1
4352  *  10987654321098765432109876543210
4353  *  001000               x1110000101
4354  *     rt -----
4355  *          rs -----
4356  *               rd -----
4357  */
4358 std::string NMD::CMP_SNE_D(uint64 instruction)
4359 {
4360     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4361     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4362     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4363
4364     std::string fd = FPR(copy(fd_value));
4365     std::string fs = FPR(copy(fs_value));
4366     std::string ft = FPR(copy(ft_value));
4367
4368     return img::format("CMP.SNE.D %s, %s, %s", fd, fs, ft);
4369 }
4370
4371
4372 /*
4373  *
4374  *
4375  *   3         2         1
4376  *  10987654321098765432109876543210
4377  *  001000               x1110000101
4378  *     rt -----
4379  *          rs -----
4380  *               rd -----
4381  */
4382 std::string NMD::CMP_SNE_S(uint64 instruction)
4383 {
4384     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4385     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4386     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4387
4388     std::string fd = FPR(copy(fd_value));
4389     std::string fs = FPR(copy(fs_value));
4390     std::string ft = FPR(copy(ft_value));
4391
4392     return img::format("CMP.SNE.S %s, %s, %s", fd, fs, ft);
4393 }
4394
4395
4396 /*
4397  *
4398  *
4399  *   3         2         1
4400  *  10987654321098765432109876543210
4401  *  001000               x1110000101
4402  *     rt -----
4403  *          rs -----
4404  *               rd -----
4405  */
4406 std::string NMD::CMP_SOR_D(uint64 instruction)
4407 {
4408     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4409     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4410     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4411
4412     std::string fd = FPR(copy(fd_value));
4413     std::string fs = FPR(copy(fs_value));
4414     std::string ft = FPR(copy(ft_value));
4415
4416     return img::format("CMP.SOR.D %s, %s, %s", fd, fs, ft);
4417 }
4418
4419
4420 /*
4421  *
4422  *
4423  *   3         2         1
4424  *  10987654321098765432109876543210
4425  *  001000               x1110000101
4426  *     rt -----
4427  *          rs -----
4428  *               rd -----
4429  */
4430 std::string NMD::CMP_SOR_S(uint64 instruction)
4431 {
4432     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4433     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4434     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4435
4436     std::string fd = FPR(copy(fd_value));
4437     std::string fs = FPR(copy(fs_value));
4438     std::string ft = FPR(copy(ft_value));
4439
4440     return img::format("CMP.SOR.S %s, %s, %s", fd, fs, ft);
4441 }
4442
4443
4444 /*
4445  *
4446  *
4447  *   3         2         1
4448  *  10987654321098765432109876543210
4449  *  001000               x1110000101
4450  *     rt -----
4451  *          rs -----
4452  *               rd -----
4453  */
4454 std::string NMD::CMP_SUEQ_D(uint64 instruction)
4455 {
4456     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4457     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4458     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4459
4460     std::string fd = FPR(copy(fd_value));
4461     std::string fs = FPR(copy(fs_value));
4462     std::string ft = FPR(copy(ft_value));
4463
4464     return img::format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft);
4465 }
4466
4467
4468 /*
4469  *
4470  *
4471  *   3         2         1
4472  *  10987654321098765432109876543210
4473  *  001000               x1110000101
4474  *     rt -----
4475  *          rs -----
4476  *               rd -----
4477  */
4478 std::string NMD::CMP_SUEQ_S(uint64 instruction)
4479 {
4480     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4481     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4482     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4483
4484     std::string fd = FPR(copy(fd_value));
4485     std::string fs = FPR(copy(fs_value));
4486     std::string ft = FPR(copy(ft_value));
4487
4488     return img::format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft);
4489 }
4490
4491
4492 /*
4493  *
4494  *
4495  *   3         2         1
4496  *  10987654321098765432109876543210
4497  *  001000               x1110000101
4498  *     rt -----
4499  *          rs -----
4500  *               rd -----
4501  */
4502 std::string NMD::CMP_SULE_D(uint64 instruction)
4503 {
4504     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4505     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4506     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4507
4508     std::string fd = FPR(copy(fd_value));
4509     std::string fs = FPR(copy(fs_value));
4510     std::string ft = FPR(copy(ft_value));
4511
4512     return img::format("CMP.SULE.D %s, %s, %s", fd, fs, ft);
4513 }
4514
4515
4516 /*
4517  *
4518  *
4519  *   3         2         1
4520  *  10987654321098765432109876543210
4521  *  001000               x1110000101
4522  *     rt -----
4523  *          rs -----
4524  *               rd -----
4525  */
4526 std::string NMD::CMP_SULE_S(uint64 instruction)
4527 {
4528     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4529     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4530     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4531
4532     std::string fd = FPR(copy(fd_value));
4533     std::string fs = FPR(copy(fs_value));
4534     std::string ft = FPR(copy(ft_value));
4535
4536     return img::format("CMP.SULE.S %s, %s, %s", fd, fs, ft);
4537 }
4538
4539
4540 /*
4541  *
4542  *
4543  *   3         2         1
4544  *  10987654321098765432109876543210
4545  *  001000               x1110000101
4546  *     rt -----
4547  *          rs -----
4548  *               rd -----
4549  */
4550 std::string NMD::CMP_SULT_D(uint64 instruction)
4551 {
4552     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4553     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4554     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4555
4556     std::string fd = FPR(copy(fd_value));
4557     std::string fs = FPR(copy(fs_value));
4558     std::string ft = FPR(copy(ft_value));
4559
4560     return img::format("CMP.SULT.D %s, %s, %s", fd, fs, ft);
4561 }
4562
4563
4564 /*
4565  *
4566  *
4567  *   3         2         1
4568  *  10987654321098765432109876543210
4569  *  001000               x1110000101
4570  *     rt -----
4571  *          rs -----
4572  *               rd -----
4573  */
4574 std::string NMD::CMP_SULT_S(uint64 instruction)
4575 {
4576     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4577     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4578     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4579
4580     std::string fd = FPR(copy(fd_value));
4581     std::string fs = FPR(copy(fs_value));
4582     std::string ft = FPR(copy(ft_value));
4583
4584     return img::format("CMP.SULT.S %s, %s, %s", fd, fs, ft);
4585 }
4586
4587
4588 /*
4589  *
4590  *
4591  *   3         2         1
4592  *  10987654321098765432109876543210
4593  *  001000               x1110000101
4594  *     rt -----
4595  *          rs -----
4596  *               rd -----
4597  */
4598 std::string NMD::CMP_SUN_D(uint64 instruction)
4599 {
4600     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4601     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4602     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4603
4604     std::string fd = FPR(copy(fd_value));
4605     std::string fs = FPR(copy(fs_value));
4606     std::string ft = FPR(copy(ft_value));
4607
4608     return img::format("CMP.SUN.D %s, %s, %s", fd, fs, ft);
4609 }
4610
4611
4612 /*
4613  *
4614  *
4615  *   3         2         1
4616  *  10987654321098765432109876543210
4617  *  001000               x1110000101
4618  *     rt -----
4619  *          rs -----
4620  *               rd -----
4621  */
4622 std::string NMD::CMP_SUNE_D(uint64 instruction)
4623 {
4624     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4625     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4626     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4627
4628     std::string fd = FPR(copy(fd_value));
4629     std::string fs = FPR(copy(fs_value));
4630     std::string ft = FPR(copy(ft_value));
4631
4632     return img::format("CMP.SUNE.D %s, %s, %s", fd, fs, ft);
4633 }
4634
4635
4636 /*
4637  *
4638  *
4639  *   3         2         1
4640  *  10987654321098765432109876543210
4641  *  001000               x1110000101
4642  *     rt -----
4643  *          rs -----
4644  *               rd -----
4645  */
4646 std::string NMD::CMP_SUNE_S(uint64 instruction)
4647 {
4648     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4649     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4650     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4651
4652     std::string fd = FPR(copy(fd_value));
4653     std::string fs = FPR(copy(fs_value));
4654     std::string ft = FPR(copy(ft_value));
4655
4656     return img::format("CMP.SUNE.S %s, %s, %s", fd, fs, ft);
4657 }
4658
4659
4660 /*
4661  *
4662  *
4663  *   3         2         1
4664  *  10987654321098765432109876543210
4665  *  001000               x1110000101
4666  *     rt -----
4667  *          rs -----
4668  *               rd -----
4669  */
4670 std::string NMD::CMP_SUN_S(uint64 instruction)
4671 {
4672     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4673     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4674     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4675
4676     std::string fd = FPR(copy(fd_value));
4677     std::string fs = FPR(copy(fs_value));
4678     std::string ft = FPR(copy(ft_value));
4679
4680     return img::format("CMP.SUN.S %s, %s, %s", fd, fs, ft);
4681 }
4682
4683
4684 /*
4685  *
4686  *
4687  *   3         2         1
4688  *  10987654321098765432109876543210
4689  *  001000               x1110000101
4690  *     rt -----
4691  *          rs -----
4692  *               rd -----
4693  */
4694 std::string NMD::CMP_UEQ_D(uint64 instruction)
4695 {
4696     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4697     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4698     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4699
4700     std::string fd = FPR(copy(fd_value));
4701     std::string fs = FPR(copy(fs_value));
4702     std::string ft = FPR(copy(ft_value));
4703
4704     return img::format("CMP.UEQ.D %s, %s, %s", fd, fs, ft);
4705 }
4706
4707
4708 /*
4709  *
4710  *
4711  *   3         2         1
4712  *  10987654321098765432109876543210
4713  *  001000               x1110000101
4714  *     rt -----
4715  *          rs -----
4716  *               rd -----
4717  */
4718 std::string NMD::CMP_UEQ_S(uint64 instruction)
4719 {
4720     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4721     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4722     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4723
4724     std::string fd = FPR(copy(fd_value));
4725     std::string fs = FPR(copy(fs_value));
4726     std::string ft = FPR(copy(ft_value));
4727
4728     return img::format("CMP.UEQ.S %s, %s, %s", fd, fs, ft);
4729 }
4730
4731
4732 /*
4733  *
4734  *
4735  *   3         2         1
4736  *  10987654321098765432109876543210
4737  *  001000               x1110000101
4738  *     rt -----
4739  *          rs -----
4740  *               rd -----
4741  */
4742 std::string NMD::CMP_ULE_D(uint64 instruction)
4743 {
4744     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4745     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4746     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4747
4748     std::string fd = FPR(copy(fd_value));
4749     std::string fs = FPR(copy(fs_value));
4750     std::string ft = FPR(copy(ft_value));
4751
4752     return img::format("CMP.ULE.D %s, %s, %s", fd, fs, ft);
4753 }
4754
4755
4756 /*
4757  *
4758  *
4759  *   3         2         1
4760  *  10987654321098765432109876543210
4761  *  001000               x1110000101
4762  *     rt -----
4763  *          rs -----
4764  *               rd -----
4765  */
4766 std::string NMD::CMP_ULE_S(uint64 instruction)
4767 {
4768     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4769     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4770     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4771
4772     std::string fd = FPR(copy(fd_value));
4773     std::string fs = FPR(copy(fs_value));
4774     std::string ft = FPR(copy(ft_value));
4775
4776     return img::format("CMP.ULE.S %s, %s, %s", fd, fs, ft);
4777 }
4778
4779
4780 /*
4781  *
4782  *
4783  *   3         2         1
4784  *  10987654321098765432109876543210
4785  *  001000               x1110000101
4786  *     rt -----
4787  *          rs -----
4788  *               rd -----
4789  */
4790 std::string NMD::CMP_ULT_D(uint64 instruction)
4791 {
4792     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4793     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4794     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4795
4796     std::string fd = FPR(copy(fd_value));
4797     std::string fs = FPR(copy(fs_value));
4798     std::string ft = FPR(copy(ft_value));
4799
4800     return img::format("CMP.ULT.D %s, %s, %s", fd, fs, ft);
4801 }
4802
4803
4804 /*
4805  *
4806  *
4807  *   3         2         1
4808  *  10987654321098765432109876543210
4809  *  001000               x1110000101
4810  *     rt -----
4811  *          rs -----
4812  *               rd -----
4813  */
4814 std::string NMD::CMP_ULT_S(uint64 instruction)
4815 {
4816     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4817     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4818     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4819
4820     std::string fd = FPR(copy(fd_value));
4821     std::string fs = FPR(copy(fs_value));
4822     std::string ft = FPR(copy(ft_value));
4823
4824     return img::format("CMP.ULT.S %s, %s, %s", fd, fs, ft);
4825 }
4826
4827
4828 /*
4829  *
4830  *
4831  *   3         2         1
4832  *  10987654321098765432109876543210
4833  *  001000               x1110000101
4834  *     rt -----
4835  *          rs -----
4836  *               rd -----
4837  */
4838 std::string NMD::CMP_UN_D(uint64 instruction)
4839 {
4840     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4841     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4842     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4843
4844     std::string fd = FPR(copy(fd_value));
4845     std::string fs = FPR(copy(fs_value));
4846     std::string ft = FPR(copy(ft_value));
4847
4848     return img::format("CMP.UN.D %s, %s, %s", fd, fs, ft);
4849 }
4850
4851
4852 /*
4853  *
4854  *
4855  *   3         2         1
4856  *  10987654321098765432109876543210
4857  *  001000               x1110000101
4858  *     rt -----
4859  *          rs -----
4860  *               rd -----
4861  */
4862 std::string NMD::CMP_UNE_D(uint64 instruction)
4863 {
4864     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4865     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4866     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4867
4868     std::string fd = FPR(copy(fd_value));
4869     std::string fs = FPR(copy(fs_value));
4870     std::string ft = FPR(copy(ft_value));
4871
4872     return img::format("CMP.UNE.D %s, %s, %s", fd, fs, ft);
4873 }
4874
4875
4876 /*
4877  *
4878  *
4879  *   3         2         1
4880  *  10987654321098765432109876543210
4881  *  001000               x1110000101
4882  *     rt -----
4883  *          rs -----
4884  *               rd -----
4885  */
4886 std::string NMD::CMP_UNE_S(uint64 instruction)
4887 {
4888     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4889     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4890     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4891
4892     std::string fd = FPR(copy(fd_value));
4893     std::string fs = FPR(copy(fs_value));
4894     std::string ft = FPR(copy(ft_value));
4895
4896     return img::format("CMP.UNE.S %s, %s, %s", fd, fs, ft);
4897 }
4898
4899
4900 /*
4901  *
4902  *
4903  *   3         2         1
4904  *  10987654321098765432109876543210
4905  *  001000               x1110000101
4906  *     rt -----
4907  *          rs -----
4908  *               rd -----
4909  */
4910 std::string NMD::CMP_UN_S(uint64 instruction)
4911 {
4912     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4913     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4914     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4915
4916     std::string fd = FPR(copy(fd_value));
4917     std::string fs = FPR(copy(fs_value));
4918     std::string ft = FPR(copy(ft_value));
4919
4920     return img::format("CMP.UN.S %s, %s, %s", fd, fs, ft);
4921 }
4922
4923
4924 /*
4925  *
4926  *
4927  *   3         2         1
4928  *  10987654321098765432109876543210
4929  *  001000               x1110000101
4930  *     rt -----
4931  *          rs -----
4932  *               rd -----
4933  */
4934 std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
4935 {
4936     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4937     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4938     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4939
4940     std::string rd = GPR(copy(rd_value));
4941     std::string rs = GPR(copy(rs_value));
4942     std::string rt = GPR(copy(rt_value));
4943
4944     return img::format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt);
4945 }
4946
4947
4948 /*
4949  *
4950  *
4951  *   3         2         1
4952  *  10987654321098765432109876543210
4953  *  001000               x1110000101
4954  *     rt -----
4955  *          rs -----
4956  *               rd -----
4957  */
4958 std::string NMD::CMPGDU_LE_QB(uint64 instruction)
4959 {
4960     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4961     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4962     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4963
4964     std::string rd = GPR(copy(rd_value));
4965     std::string rs = GPR(copy(rs_value));
4966     std::string rt = GPR(copy(rt_value));
4967
4968     return img::format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt);
4969 }
4970
4971
4972 /*
4973  *
4974  *
4975  *   3         2         1
4976  *  10987654321098765432109876543210
4977  *  001000               x1110000101
4978  *     rt -----
4979  *          rs -----
4980  *               rd -----
4981  */
4982 std::string NMD::CMPGDU_LT_QB(uint64 instruction)
4983 {
4984     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4985     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4986     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4987
4988     std::string rd = GPR(copy(rd_value));
4989     std::string rs = GPR(copy(rs_value));
4990     std::string rt = GPR(copy(rt_value));
4991
4992     return img::format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt);
4993 }
4994
4995
4996 /*
4997  *
4998  *
4999  *   3         2         1
5000  *  10987654321098765432109876543210
5001  *  001000               x1110000101
5002  *     rt -----
5003  *          rs -----
5004  *               rd -----
5005  */
5006 std::string NMD::CMPGU_EQ_QB(uint64 instruction)
5007 {
5008     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5009     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5010     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5011
5012     std::string rd = GPR(copy(rd_value));
5013     std::string rs = GPR(copy(rs_value));
5014     std::string rt = GPR(copy(rt_value));
5015
5016     return img::format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt);
5017 }
5018
5019
5020 /*
5021  *
5022  *
5023  *   3         2         1
5024  *  10987654321098765432109876543210
5025  *  001000               x1110000101
5026  *     rt -----
5027  *          rs -----
5028  *               rd -----
5029  */
5030 std::string NMD::CMPGU_LE_QB(uint64 instruction)
5031 {
5032     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5033     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5034     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5035
5036     std::string rd = GPR(copy(rd_value));
5037     std::string rs = GPR(copy(rs_value));
5038     std::string rt = GPR(copy(rt_value));
5039
5040     return img::format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt);
5041 }
5042
5043
5044 /*
5045  *
5046  *
5047  *   3         2         1
5048  *  10987654321098765432109876543210
5049  *  001000               x1110000101
5050  *     rt -----
5051  *          rs -----
5052  *               rd -----
5053  */
5054 std::string NMD::CMPGU_LT_QB(uint64 instruction)
5055 {
5056     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5057     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5058     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5059
5060     std::string rd = GPR(copy(rd_value));
5061     std::string rs = GPR(copy(rs_value));
5062     std::string rt = GPR(copy(rt_value));
5063
5064     return img::format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt);
5065 }
5066
5067
5068 /*
5069  *
5070  *
5071  *   3         2         1
5072  *  10987654321098765432109876543210
5073  *  001000               x1110000101
5074  *     rt -----
5075  *          rs -----
5076  *               rd -----
5077  */
5078 std::string NMD::CMPU_EQ_QB(uint64 instruction)
5079 {
5080     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5081     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5082
5083     std::string rs = GPR(copy(rs_value));
5084     std::string rt = GPR(copy(rt_value));
5085
5086     return img::format("CMPU.EQ.QB %s, %s", rs, rt);
5087 }
5088
5089
5090 /*
5091  *
5092  *
5093  *   3         2         1
5094  *  10987654321098765432109876543210
5095  *  001000               x1110000101
5096  *     rt -----
5097  *          rs -----
5098  *               rd -----
5099  */
5100 std::string NMD::CMPU_LE_QB(uint64 instruction)
5101 {
5102     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5103     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5104
5105     std::string rs = GPR(copy(rs_value));
5106     std::string rt = GPR(copy(rt_value));
5107
5108     return img::format("CMPU.LE.QB %s, %s", rs, rt);
5109 }
5110
5111
5112 /*
5113  *
5114  *
5115  *   3         2         1
5116  *  10987654321098765432109876543210
5117  *  001000               x1110000101
5118  *     rt -----
5119  *          rs -----
5120  *               rd -----
5121  */
5122 std::string NMD::CMPU_LT_QB(uint64 instruction)
5123 {
5124     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5125     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5126
5127     std::string rs = GPR(copy(rs_value));
5128     std::string rt = GPR(copy(rt_value));
5129
5130     return img::format("CMPU.LT.QB %s, %s", rs, rt);
5131 }
5132
5133
5134 /*
5135  *
5136  *
5137  *   3         2         1
5138  *  10987654321098765432109876543210
5139  *  001000               x1110000101
5140  *     rt -----
5141  *          rs -----
5142  *               rd -----
5143  */
5144 std::string NMD::COP2_1(uint64 instruction)
5145 {
5146     uint64 cofun_value = extract_cofun_25_24_23(instruction);
5147
5148     std::string cofun = IMMEDIATE(copy(cofun_value));
5149
5150     return img::format("COP2_1 %s", cofun);
5151 }
5152
5153
5154 /*
5155  *
5156  *
5157  *   3         2         1
5158  *  10987654321098765432109876543210
5159  *  001000               x1110000101
5160  *     rt -----
5161  *          rs -----
5162  *               rd -----
5163  */
5164 std::string NMD::CTC1(uint64 instruction)
5165 {
5166     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5167     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5168
5169     std::string rt = GPR(copy(rt_value));
5170     std::string cs = CPR(copy(cs_value));
5171
5172     return img::format("CTC1 %s, %s", rt, cs);
5173 }
5174
5175
5176 /*
5177  *
5178  *
5179  *   3         2         1
5180  *  10987654321098765432109876543210
5181  *  001000               x1110000101
5182  *     rt -----
5183  *          rs -----
5184  *               rd -----
5185  */
5186 std::string NMD::CTC2(uint64 instruction)
5187 {
5188     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5189     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5190
5191     std::string rt = GPR(copy(rt_value));
5192     std::string cs = CPR(copy(cs_value));
5193
5194     return img::format("CTC2 %s, %s", rt, cs);
5195 }
5196
5197
5198 /*
5199  *
5200  *
5201  *   3         2         1
5202  *  10987654321098765432109876543210
5203  *  001000               x1110000101
5204  *     rt -----
5205  *          rs -----
5206  *               rd -----
5207  */
5208 std::string NMD::CVT_D_L(uint64 instruction)
5209 {
5210     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5211     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5212
5213     std::string ft = FPR(copy(ft_value));
5214     std::string fs = FPR(copy(fs_value));
5215
5216     return img::format("CVT.D.L %s, %s", ft, fs);
5217 }
5218
5219
5220 /*
5221  *
5222  *
5223  *   3         2         1
5224  *  10987654321098765432109876543210
5225  *  001000               x1110000101
5226  *     rt -----
5227  *          rs -----
5228  *               rd -----
5229  */
5230 std::string NMD::CVT_D_S(uint64 instruction)
5231 {
5232     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5233     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5234
5235     std::string ft = FPR(copy(ft_value));
5236     std::string fs = FPR(copy(fs_value));
5237
5238     return img::format("CVT.D.S %s, %s", ft, fs);
5239 }
5240
5241
5242 /*
5243  *
5244  *
5245  *   3         2         1
5246  *  10987654321098765432109876543210
5247  *  001000               x1110000101
5248  *     rt -----
5249  *          rs -----
5250  *               rd -----
5251  */
5252 std::string NMD::CVT_D_W(uint64 instruction)
5253 {
5254     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5255     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5256
5257     std::string ft = FPR(copy(ft_value));
5258     std::string fs = FPR(copy(fs_value));
5259
5260     return img::format("CVT.D.W %s, %s", ft, fs);
5261 }
5262
5263
5264 /*
5265  *
5266  *
5267  *   3         2         1
5268  *  10987654321098765432109876543210
5269  *  001000               x1110000101
5270  *     rt -----
5271  *          rs -----
5272  *               rd -----
5273  */
5274 std::string NMD::CVT_L_D(uint64 instruction)
5275 {
5276     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5277     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5278
5279     std::string ft = FPR(copy(ft_value));
5280     std::string fs = FPR(copy(fs_value));
5281
5282     return img::format("CVT.L.D %s, %s", ft, fs);
5283 }
5284
5285
5286 /*
5287  *
5288  *
5289  *   3         2         1
5290  *  10987654321098765432109876543210
5291  *  001000               x1110000101
5292  *     rt -----
5293  *          rs -----
5294  *               rd -----
5295  */
5296 std::string NMD::CVT_L_S(uint64 instruction)
5297 {
5298     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5299     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5300
5301     std::string ft = FPR(copy(ft_value));
5302     std::string fs = FPR(copy(fs_value));
5303
5304     return img::format("CVT.L.S %s, %s", ft, fs);
5305 }
5306
5307
5308 /*
5309  *
5310  *
5311  *   3         2         1
5312  *  10987654321098765432109876543210
5313  *  001000               x1110000101
5314  *     rt -----
5315  *          rs -----
5316  *               rd -----
5317  */
5318 std::string NMD::CVT_S_D(uint64 instruction)
5319 {
5320     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5321     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5322
5323     std::string ft = FPR(copy(ft_value));
5324     std::string fs = FPR(copy(fs_value));
5325
5326     return img::format("CVT.S.D %s, %s", ft, fs);
5327 }
5328
5329
5330 /*
5331  *
5332  *
5333  *   3         2         1
5334  *  10987654321098765432109876543210
5335  *  001000               x1110000101
5336  *     rt -----
5337  *          rs -----
5338  *               rd -----
5339  */
5340 std::string NMD::CVT_S_L(uint64 instruction)
5341 {
5342     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5343     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5344
5345     std::string ft = FPR(copy(ft_value));
5346     std::string fs = FPR(copy(fs_value));
5347
5348     return img::format("CVT.S.L %s, %s", ft, fs);
5349 }
5350
5351
5352 /*
5353  *
5354  *
5355  *   3         2         1
5356  *  10987654321098765432109876543210
5357  *  001000               x1110000101
5358  *     rt -----
5359  *          rs -----
5360  *               rd -----
5361  */
5362 std::string NMD::CVT_S_PL(uint64 instruction)
5363 {
5364     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5365     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5366
5367     std::string ft = FPR(copy(ft_value));
5368     std::string fs = FPR(copy(fs_value));
5369
5370     return img::format("CVT.S.PL %s, %s", ft, fs);
5371 }
5372
5373
5374 /*
5375  *
5376  *
5377  *   3         2         1
5378  *  10987654321098765432109876543210
5379  *  001000               x1110000101
5380  *     rt -----
5381  *          rs -----
5382  *               rd -----
5383  */
5384 std::string NMD::CVT_S_PU(uint64 instruction)
5385 {
5386     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5387     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5388
5389     std::string ft = FPR(copy(ft_value));
5390     std::string fs = FPR(copy(fs_value));
5391
5392     return img::format("CVT.S.PU %s, %s", ft, fs);
5393 }
5394
5395
5396 /*
5397  *
5398  *
5399  *   3         2         1
5400  *  10987654321098765432109876543210
5401  *  001000               x1110000101
5402  *     rt -----
5403  *          rs -----
5404  *               rd -----
5405  */
5406 std::string NMD::CVT_S_W(uint64 instruction)
5407 {
5408     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5409     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5410
5411     std::string ft = FPR(copy(ft_value));
5412     std::string fs = FPR(copy(fs_value));
5413
5414     return img::format("CVT.S.W %s, %s", ft, fs);
5415 }
5416
5417
5418 /*
5419  *
5420  *
5421  *   3         2         1
5422  *  10987654321098765432109876543210
5423  *  001000               x1110000101
5424  *     rt -----
5425  *          rs -----
5426  *               rd -----
5427  */
5428 std::string NMD::CVT_W_D(uint64 instruction)
5429 {
5430     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5431     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5432
5433     std::string ft = FPR(copy(ft_value));
5434     std::string fs = FPR(copy(fs_value));
5435
5436     return img::format("CVT.W.D %s, %s", ft, fs);
5437 }
5438
5439
5440 /*
5441  *
5442  *
5443  *   3         2         1
5444  *  10987654321098765432109876543210
5445  *  001000               x1110000101
5446  *     rt -----
5447  *          rs -----
5448  *               rd -----
5449  */
5450 std::string NMD::CVT_W_S(uint64 instruction)
5451 {
5452     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5453     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5454
5455     std::string ft = FPR(copy(ft_value));
5456     std::string fs = FPR(copy(fs_value));
5457
5458     return img::format("CVT.W.S %s, %s", ft, fs);
5459 }
5460
5461
5462 /*
5463  *
5464  *
5465  *   3         2         1
5466  *  10987654321098765432109876543210
5467  *  001000               x1110000101
5468  *     rt -----
5469  *          rs -----
5470  *               rd -----
5471  */
5472 std::string NMD::DADDIU_48_(uint64 instruction)
5473 {
5474     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5475     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
5476
5477     std::string rt = GPR(copy(rt_value));
5478     std::string s = IMMEDIATE(copy(s_value));
5479
5480     return img::format("DADDIU %s, %s", rt, s);
5481 }
5482
5483
5484 /*
5485  *
5486  *
5487  *   3         2         1
5488  *  10987654321098765432109876543210
5489  *  001000               x1110000101
5490  *     rt -----
5491  *          rs -----
5492  *               rd -----
5493  */
5494 std::string NMD::DADDIU_NEG_(uint64 instruction)
5495 {
5496     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5497     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5498     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5499
5500     std::string rt = GPR(copy(rt_value));
5501     std::string rs = GPR(copy(rs_value));
5502     std::string u = IMMEDIATE(neg_copy(u_value));
5503
5504     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5505 }
5506
5507
5508 /*
5509  *
5510  *
5511  *   3         2         1
5512  *  10987654321098765432109876543210
5513  *  001000               x1110000101
5514  *     rt -----
5515  *          rs -----
5516  *               rd -----
5517  */
5518 std::string NMD::DADDIU_U12_(uint64 instruction)
5519 {
5520     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5521     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5522     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5523
5524     std::string rt = GPR(copy(rt_value));
5525     std::string rs = GPR(copy(rs_value));
5526     std::string u = IMMEDIATE(copy(u_value));
5527
5528     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5529 }
5530
5531
5532 /*
5533  *
5534  *
5535  *   3         2         1
5536  *  10987654321098765432109876543210
5537  *  001000               x1110000101
5538  *     rt -----
5539  *          rs -----
5540  *               rd -----
5541  */
5542 std::string NMD::DADD(uint64 instruction)
5543 {
5544     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5545     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5546     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5547
5548     std::string rd = GPR(copy(rd_value));
5549     std::string rs = GPR(copy(rs_value));
5550     std::string rt = GPR(copy(rt_value));
5551
5552     return img::format("DADD %s, %s, %s", rd, rs, rt);
5553 }
5554
5555
5556 /*
5557  *
5558  *
5559  *   3         2         1
5560  *  10987654321098765432109876543210
5561  *  001000               x1110000101
5562  *     rt -----
5563  *          rs -----
5564  *               rd -----
5565  */
5566 std::string NMD::DADDU(uint64 instruction)
5567 {
5568     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5569     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5570     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5571
5572     std::string rd = GPR(copy(rd_value));
5573     std::string rs = GPR(copy(rs_value));
5574     std::string rt = GPR(copy(rt_value));
5575
5576     return img::format("DADDU %s, %s, %s", rd, rs, rt);
5577 }
5578
5579
5580 /*
5581  *
5582  *
5583  *   3         2         1
5584  *  10987654321098765432109876543210
5585  *  001000               x1110000101
5586  *     rt -----
5587  *          rs -----
5588  *               rd -----
5589  */
5590 std::string NMD::DCLO(uint64 instruction)
5591 {
5592     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5593     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5594
5595     std::string rt = GPR(copy(rt_value));
5596     std::string rs = GPR(copy(rs_value));
5597
5598     return img::format("DCLO %s, %s", rt, rs);
5599 }
5600
5601
5602 /*
5603  *
5604  *
5605  *   3         2         1
5606  *  10987654321098765432109876543210
5607  *  001000               x1110000101
5608  *     rt -----
5609  *          rs -----
5610  *               rd -----
5611  */
5612 std::string NMD::DCLZ(uint64 instruction)
5613 {
5614     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5615     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5616
5617     std::string rt = GPR(copy(rt_value));
5618     std::string rs = GPR(copy(rs_value));
5619
5620     return img::format("DCLZ %s, %s", rt, rs);
5621 }
5622
5623
5624 /*
5625  *
5626  *
5627  *   3         2         1
5628  *  10987654321098765432109876543210
5629  *  001000               x1110000101
5630  *     rt -----
5631  *          rs -----
5632  *               rd -----
5633  */
5634 std::string NMD::DDIV(uint64 instruction)
5635 {
5636     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5637     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5638     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5639
5640     std::string rd = GPR(copy(rd_value));
5641     std::string rs = GPR(copy(rs_value));
5642     std::string rt = GPR(copy(rt_value));
5643
5644     return img::format("DDIV %s, %s, %s", rd, rs, rt);
5645 }
5646
5647
5648 /*
5649  *
5650  *
5651  *   3         2         1
5652  *  10987654321098765432109876543210
5653  *  001000               x1110000101
5654  *     rt -----
5655  *          rs -----
5656  *               rd -----
5657  */
5658 std::string NMD::DDIVU(uint64 instruction)
5659 {
5660     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5661     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5662     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5663
5664     std::string rd = GPR(copy(rd_value));
5665     std::string rs = GPR(copy(rs_value));
5666     std::string rt = GPR(copy(rt_value));
5667
5668     return img::format("DDIVU %s, %s, %s", rd, rs, rt);
5669 }
5670
5671
5672 /*
5673  *
5674  *
5675  *   3         2         1
5676  *  10987654321098765432109876543210
5677  *  001000               x1110000101
5678  *     rt -----
5679  *          rs -----
5680  *               rd -----
5681  */
5682 std::string NMD::DERET(uint64 instruction)
5683 {
5684     (void)instruction;
5685
5686     return "DERET ";
5687 }
5688
5689
5690 /*
5691  *
5692  *
5693  *   3         2         1
5694  *  10987654321098765432109876543210
5695  *  001000               x1110000101
5696  *     rt -----
5697  *          rs -----
5698  *               rd -----
5699  */
5700 std::string NMD::DEXTM(uint64 instruction)
5701 {
5702     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5703     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5704     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5705     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5706
5707     std::string rt = GPR(copy(rt_value));
5708     std::string rs = GPR(copy(rs_value));
5709     std::string lsb = IMMEDIATE(copy(lsb_value));
5710     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5711
5712     return img::format("DEXTM %s, %s, %s, %s", rt, rs, lsb, msbd);
5713 }
5714
5715
5716 /*
5717  *
5718  *
5719  *   3         2         1
5720  *  10987654321098765432109876543210
5721  *  001000               x1110000101
5722  *     rt -----
5723  *          rs -----
5724  *               rd -----
5725  */
5726 std::string NMD::DEXT(uint64 instruction)
5727 {
5728     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5729     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5730     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5731     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5732
5733     std::string rt = GPR(copy(rt_value));
5734     std::string rs = GPR(copy(rs_value));
5735     std::string lsb = IMMEDIATE(copy(lsb_value));
5736     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5737
5738     return img::format("DEXT %s, %s, %s, %s", rt, rs, lsb, msbd);
5739 }
5740
5741
5742 /*
5743  *
5744  *
5745  *   3         2         1
5746  *  10987654321098765432109876543210
5747  *  001000               x1110000101
5748  *     rt -----
5749  *          rs -----
5750  *               rd -----
5751  */
5752 std::string NMD::DEXTU(uint64 instruction)
5753 {
5754     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5755     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5756     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5757     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5758
5759     std::string rt = GPR(copy(rt_value));
5760     std::string rs = GPR(copy(rs_value));
5761     std::string lsb = IMMEDIATE(copy(lsb_value));
5762     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5763
5764     return img::format("DEXTU %s, %s, %s, %s", rt, rs, lsb, msbd);
5765 }
5766
5767
5768 /*
5769  *
5770  *
5771  *   3         2         1
5772  *  10987654321098765432109876543210
5773  *  001000               x1110000101
5774  *     rt -----
5775  *          rs -----
5776  *               rd -----
5777  */
5778 std::string NMD::DINSM(uint64 instruction)
5779 {
5780     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5781     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5782     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5783     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5784
5785     std::string rt = GPR(copy(rt_value));
5786     std::string rs = GPR(copy(rs_value));
5787     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5788     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5789     /* !!!!!!!!!! - no conversion function */
5790
5791     return img::format("DINSM %s, %s, %s, %s", rt, rs, pos, size);
5792     /* hand edited */
5793 }
5794
5795
5796 /*
5797  *
5798  *
5799  *   3         2         1
5800  *  10987654321098765432109876543210
5801  *  001000               x1110000101
5802  *     rt -----
5803  *          rs -----
5804  *               rd -----
5805  */
5806 std::string NMD::DINS(uint64 instruction)
5807 {
5808     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5809     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5810     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5811     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5812
5813     std::string rt = GPR(copy(rt_value));
5814     std::string rs = GPR(copy(rs_value));
5815     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5816     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5817     /* !!!!!!!!!! - no conversion function */
5818
5819     return img::format("DINS %s, %s, %s, %s", rt, rs, pos, size);
5820     /* hand edited */
5821 }
5822
5823
5824 /*
5825  *
5826  *
5827  *   3         2         1
5828  *  10987654321098765432109876543210
5829  *  001000               x1110000101
5830  *     rt -----
5831  *          rs -----
5832  *               rd -----
5833  */
5834 std::string NMD::DINSU(uint64 instruction)
5835 {
5836     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5837     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5838     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5839     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5840
5841     std::string rt = GPR(copy(rt_value));
5842     std::string rs = GPR(copy(rs_value));
5843     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5844     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5845     /* !!!!!!!!!! - no conversion function */
5846
5847     return img::format("DINSU %s, %s, %s, %s", rt, rs, pos, size);
5848     /* hand edited */
5849 }
5850
5851
5852 /*
5853  *
5854  *
5855  *   3         2         1
5856  *  10987654321098765432109876543210
5857  *  001000               x1110000101
5858  *     rt -----
5859  *          rs -----
5860  *               rd -----
5861  */
5862 std::string NMD::DI(uint64 instruction)
5863 {
5864     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5865
5866     std::string rt = GPR(copy(rt_value));
5867
5868     return img::format("DI %s", rt);
5869 }
5870
5871
5872 /*
5873  *
5874  *
5875  *   3         2         1
5876  *  10987654321098765432109876543210
5877  *  001000               x1110000101
5878  *     rt -----
5879  *          rs -----
5880  *               rd -----
5881  */
5882 std::string NMD::DIV(uint64 instruction)
5883 {
5884     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5885     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5886     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5887
5888     std::string rd = GPR(copy(rd_value));
5889     std::string rs = GPR(copy(rs_value));
5890     std::string rt = GPR(copy(rt_value));
5891
5892     return img::format("DIV %s, %s, %s", rd, rs, rt);
5893 }
5894
5895
5896 /*
5897  *
5898  *
5899  *   3         2         1
5900  *  10987654321098765432109876543210
5901  *  001000               x1110000101
5902  *     rt -----
5903  *          rs -----
5904  *               rd -----
5905  */
5906 std::string NMD::DIV_D(uint64 instruction)
5907 {
5908     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5909     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5910     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5911
5912     std::string fd = FPR(copy(fd_value));
5913     std::string fs = FPR(copy(fs_value));
5914     std::string ft = FPR(copy(ft_value));
5915
5916     return img::format("DIV.D %s, %s, %s", fd, fs, ft);
5917 }
5918
5919
5920 /*
5921  *
5922  *
5923  *   3         2         1
5924  *  10987654321098765432109876543210
5925  *  001000               x1110000101
5926  *     rt -----
5927  *          rs -----
5928  *               rd -----
5929  */
5930 std::string NMD::DIV_S(uint64 instruction)
5931 {
5932     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5933     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5934     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5935
5936     std::string fd = FPR(copy(fd_value));
5937     std::string fs = FPR(copy(fs_value));
5938     std::string ft = FPR(copy(ft_value));
5939
5940     return img::format("DIV.S %s, %s, %s", fd, fs, ft);
5941 }
5942
5943
5944 /*
5945  *
5946  *
5947  *   3         2         1
5948  *  10987654321098765432109876543210
5949  *  001000               x1110000101
5950  *     rt -----
5951  *          rs -----
5952  *               rd -----
5953  */
5954 std::string NMD::DIVU(uint64 instruction)
5955 {
5956     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5957     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5958     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5959
5960     std::string rd = GPR(copy(rd_value));
5961     std::string rs = GPR(copy(rs_value));
5962     std::string rt = GPR(copy(rt_value));
5963
5964     return img::format("DIVU %s, %s, %s", rd, rs, rt);
5965 }
5966
5967
5968 /*
5969  *
5970  *
5971  *   3         2         1
5972  *  10987654321098765432109876543210
5973  *  001000               x1110000101
5974  *     rt -----
5975  *          rs -----
5976  *               rd -----
5977  */
5978 std::string NMD::DLSA(uint64 instruction)
5979 {
5980     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5981     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5982     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5983     uint64 u2_value = extract_u2_10_9(instruction);
5984
5985     std::string rd = GPR(copy(rd_value));
5986     std::string rs = GPR(copy(rs_value));
5987     std::string rt = GPR(copy(rt_value));
5988     std::string u2 = IMMEDIATE(copy(u2_value));
5989
5990     return img::format("DLSA %s, %s, %s, %s", rd, rs, rt, u2);
5991 }
5992
5993
5994 /*
5995  *
5996  *
5997  *   3         2         1
5998  *  10987654321098765432109876543210
5999  *  001000               x1110000101
6000  *     rt -----
6001  *          rs -----
6002  *               rd -----
6003  */
6004 std::string NMD::DLUI_48_(uint64 instruction)
6005 {
6006     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
6007     uint64 u_value = extract_u_31_to_0__s32(instruction);
6008
6009     std::string rt = GPR(copy(rt_value));
6010     std::string u = IMMEDIATE(copy(u_value));
6011
6012     return img::format("DLUI %s, %s", rt, u);
6013 }
6014
6015
6016 /*
6017  *
6018  *
6019  *   3         2         1
6020  *  10987654321098765432109876543210
6021  *  001000               x1110000101
6022  *     rt -----
6023  *          rs -----
6024  *               rd -----
6025  */
6026 std::string NMD::DMFC0(uint64 instruction)
6027 {
6028     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6029     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6030     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6031
6032     std::string rt = GPR(copy(rt_value));
6033     std::string c0s = CPR(copy(c0s_value));
6034     std::string sel = IMMEDIATE(copy(sel_value));
6035
6036     return img::format("DMFC0 %s, %s, %s", rt, c0s, sel);
6037 }
6038
6039
6040 /*
6041  *
6042  *
6043  *   3         2         1
6044  *  10987654321098765432109876543210
6045  *  001000               x1110000101
6046  *     rt -----
6047  *          rs -----
6048  *               rd -----
6049  */
6050 std::string NMD::DMFC1(uint64 instruction)
6051 {
6052     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6053     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
6054
6055     std::string rt = GPR(copy(rt_value));
6056     std::string fs = FPR(copy(fs_value));
6057
6058     return img::format("DMFC1 %s, %s", rt, fs);
6059 }
6060
6061
6062 /*
6063  *
6064  *
6065  *   3         2         1
6066  *  10987654321098765432109876543210
6067  *  001000               x1110000101
6068  *     rt -----
6069  *          rs -----
6070  *               rd -----
6071  */
6072 std::string NMD::DMFC2(uint64 instruction)
6073 {
6074     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6075     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6076
6077     std::string rt = GPR(copy(rt_value));
6078     std::string cs = CPR(copy(cs_value));
6079
6080     return img::format("DMFC2 %s, %s", rt, cs);
6081 }
6082
6083
6084 /*
6085  *
6086  *
6087  *   3         2         1
6088  *  10987654321098765432109876543210
6089  *  001000               x1110000101
6090  *     rt -----
6091  *          rs -----
6092  *               rd -----
6093  */
6094 std::string NMD::DMFGC0(uint64 instruction)
6095 {
6096     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6097     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6098     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6099
6100     std::string rt = GPR(copy(rt_value));
6101     std::string c0s = CPR(copy(c0s_value));
6102     std::string sel = IMMEDIATE(copy(sel_value));
6103
6104     return img::format("DMFGC0 %s, %s, %s", rt, c0s, sel);
6105 }
6106
6107
6108 /*
6109  *
6110  *
6111  *   3         2         1
6112  *  10987654321098765432109876543210
6113  *  001000               x1110000101
6114  *     rt -----
6115  *          rs -----
6116  *               rd -----
6117  */
6118 std::string NMD::DMOD(uint64 instruction)
6119 {
6120     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6121     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6122     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6123
6124     std::string rd = GPR(copy(rd_value));
6125     std::string rs = GPR(copy(rs_value));
6126     std::string rt = GPR(copy(rt_value));
6127
6128     return img::format("DMOD %s, %s, %s", rd, rs, rt);
6129 }
6130
6131
6132 /*
6133  *
6134  *
6135  *   3         2         1
6136  *  10987654321098765432109876543210
6137  *  001000               x1110000101
6138  *     rt -----
6139  *          rs -----
6140  *               rd -----
6141  */
6142 std::string NMD::DMODU(uint64 instruction)
6143 {
6144     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6145     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6146     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6147
6148     std::string rd = GPR(copy(rd_value));
6149     std::string rs = GPR(copy(rs_value));
6150     std::string rt = GPR(copy(rt_value));
6151
6152     return img::format("DMODU %s, %s, %s", rd, rs, rt);
6153 }
6154
6155
6156 /*
6157  *
6158  *
6159  *   3         2         1
6160  *  10987654321098765432109876543210
6161  *  001000               x1110000101
6162  *     rt -----
6163  *          rs -----
6164  *               rd -----
6165  */
6166 std::string NMD::DMTC0(uint64 instruction)
6167 {
6168     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6169     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6170     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6171
6172     std::string rt = GPR(copy(rt_value));
6173     std::string c0s = CPR(copy(c0s_value));
6174     std::string sel = IMMEDIATE(copy(sel_value));
6175
6176     return img::format("DMTC0 %s, %s, %s", rt, c0s, sel);
6177 }
6178
6179
6180 /*
6181  *
6182  *
6183  *   3         2         1
6184  *  10987654321098765432109876543210
6185  *  001000               x1110000101
6186  *     rt -----
6187  *          rs -----
6188  *               rd -----
6189  */
6190 std::string NMD::DMTC1(uint64 instruction)
6191 {
6192     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6193     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
6194
6195     std::string rt = GPR(copy(rt_value));
6196     std::string fs = FPR(copy(fs_value));
6197
6198     return img::format("DMTC1 %s, %s", rt, fs);
6199 }
6200
6201
6202 /*
6203  *
6204  *
6205  *   3         2         1
6206  *  10987654321098765432109876543210
6207  *  001000               x1110000101
6208  *     rt -----
6209  *          rs -----
6210  *               rd -----
6211  */
6212 std::string NMD::DMTC2(uint64 instruction)
6213 {
6214     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6215     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6216
6217     std::string rt = GPR(copy(rt_value));
6218     std::string cs = CPR(copy(cs_value));
6219
6220     return img::format("DMTC2 %s, %s", rt, cs);
6221 }
6222
6223
6224 /*
6225  *
6226  *
6227  *   3         2         1
6228  *  10987654321098765432109876543210
6229  *  001000               x1110000101
6230  *     rt -----
6231  *          rs -----
6232  *               rd -----
6233  */
6234 std::string NMD::DMTGC0(uint64 instruction)
6235 {
6236     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6237     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6238     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6239
6240     std::string rt = GPR(copy(rt_value));
6241     std::string c0s = CPR(copy(c0s_value));
6242     std::string sel = IMMEDIATE(copy(sel_value));
6243
6244     return img::format("DMTGC0 %s, %s, %s", rt, c0s, sel);
6245 }
6246
6247
6248 /*
6249  *
6250  *
6251  *   3         2         1
6252  *  10987654321098765432109876543210
6253  *  001000               x1110000101
6254  *     rt -----
6255  *          rs -----
6256  *               rd -----
6257  */
6258 std::string NMD::DMT(uint64 instruction)
6259 {
6260     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6261
6262     std::string rt = GPR(copy(rt_value));
6263
6264     return img::format("DMT %s", rt);
6265 }
6266
6267
6268 /*
6269  *
6270  *
6271  *   3         2         1
6272  *  10987654321098765432109876543210
6273  *  001000               x1110000101
6274  *     rt -----
6275  *          rs -----
6276  *               rd -----
6277  */
6278 std::string NMD::DMUH(uint64 instruction)
6279 {
6280     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6281     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6282     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6283
6284     std::string rd = GPR(copy(rd_value));
6285     std::string rs = GPR(copy(rs_value));
6286     std::string rt = GPR(copy(rt_value));
6287
6288     return img::format("DMUH %s, %s, %s", rd, rs, rt);
6289 }
6290
6291
6292 /*
6293  *
6294  *
6295  *   3         2         1
6296  *  10987654321098765432109876543210
6297  *  001000               x1110000101
6298  *     rt -----
6299  *          rs -----
6300  *               rd -----
6301  */
6302 std::string NMD::DMUHU(uint64 instruction)
6303 {
6304     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6305     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6306     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6307
6308     std::string rd = GPR(copy(rd_value));
6309     std::string rs = GPR(copy(rs_value));
6310     std::string rt = GPR(copy(rt_value));
6311
6312     return img::format("DMUHU %s, %s, %s", rd, rs, rt);
6313 }
6314
6315
6316 /*
6317  *
6318  *
6319  *   3         2         1
6320  *  10987654321098765432109876543210
6321  *  001000               x1110000101
6322  *     rt -----
6323  *          rs -----
6324  *               rd -----
6325  */
6326 std::string NMD::DMUL(uint64 instruction)
6327 {
6328     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6329     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6330     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6331
6332     std::string rd = GPR(copy(rd_value));
6333     std::string rs = GPR(copy(rs_value));
6334     std::string rt = GPR(copy(rt_value));
6335
6336     return img::format("DMUL %s, %s, %s", rd, rs, rt);
6337 }
6338
6339
6340 /*
6341  *
6342  *
6343  *   3         2         1
6344  *  10987654321098765432109876543210
6345  *  001000               x1110000101
6346  *     rt -----
6347  *          rs -----
6348  *               rd -----
6349  */
6350 std::string NMD::DMULU(uint64 instruction)
6351 {
6352     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6353     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6354     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6355
6356     std::string rd = GPR(copy(rd_value));
6357     std::string rs = GPR(copy(rs_value));
6358     std::string rt = GPR(copy(rt_value));
6359
6360     return img::format("DMULU %s, %s, %s", rd, rs, rt);
6361 }
6362
6363
6364 /*
6365  *
6366  *
6367  *   3         2         1
6368  *  10987654321098765432109876543210
6369  *  001000               x1110000101
6370  *     rt -----
6371  *          rs -----
6372  *               rd -----
6373  */
6374 std::string NMD::DPA_W_PH(uint64 instruction)
6375 {
6376     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6377     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6378     uint64 ac_value = extract_ac_13_12(instruction);
6379
6380     std::string ac = AC(copy(ac_value));
6381     std::string rs = GPR(copy(rs_value));
6382     std::string rt = GPR(copy(rt_value));
6383
6384     return img::format("DPA.W.PH %s, %s, %s", ac, rs, rt);
6385 }
6386
6387
6388 /*
6389  *
6390  *
6391  *   3         2         1
6392  *  10987654321098765432109876543210
6393  *  001000               x1110000101
6394  *     rt -----
6395  *          rs -----
6396  *               rd -----
6397  */
6398 std::string NMD::DPAQ_SA_L_W(uint64 instruction)
6399 {
6400     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6401     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6402     uint64 ac_value = extract_ac_13_12(instruction);
6403
6404     std::string ac = AC(copy(ac_value));
6405     std::string rs = GPR(copy(rs_value));
6406     std::string rt = GPR(copy(rt_value));
6407
6408     return img::format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt);
6409 }
6410
6411
6412 /*
6413  *
6414  *
6415  *   3         2         1
6416  *  10987654321098765432109876543210
6417  *  001000               x1110000101
6418  *     rt -----
6419  *          rs -----
6420  *               rd -----
6421  */
6422 std::string NMD::DPAQ_S_W_PH(uint64 instruction)
6423 {
6424     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6425     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6426     uint64 ac_value = extract_ac_13_12(instruction);
6427
6428     std::string ac = AC(copy(ac_value));
6429     std::string rs = GPR(copy(rs_value));
6430     std::string rt = GPR(copy(rt_value));
6431
6432     return img::format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt);
6433 }
6434
6435
6436 /*
6437  *
6438  *
6439  *   3         2         1
6440  *  10987654321098765432109876543210
6441  *  001000               x1110000101
6442  *     rt -----
6443  *          rs -----
6444  *               rd -----
6445  */
6446 std::string NMD::DPAQX_SA_W_PH(uint64 instruction)
6447 {
6448     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6449     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6450     uint64 ac_value = extract_ac_13_12(instruction);
6451
6452     std::string ac = AC(copy(ac_value));
6453     std::string rs = GPR(copy(rs_value));
6454     std::string rt = GPR(copy(rt_value));
6455
6456     return img::format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6457 }
6458
6459
6460 /*
6461  *
6462  *
6463  *   3         2         1
6464  *  10987654321098765432109876543210
6465  *  001000               x1110000101
6466  *     rt -----
6467  *          rs -----
6468  *               rd -----
6469  */
6470 std::string NMD::DPAQX_S_W_PH(uint64 instruction)
6471 {
6472     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6473     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6474     uint64 ac_value = extract_ac_13_12(instruction);
6475
6476     std::string ac = AC(copy(ac_value));
6477     std::string rs = GPR(copy(rs_value));
6478     std::string rt = GPR(copy(rt_value));
6479
6480     return img::format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt);
6481 }
6482
6483
6484 /*
6485  *
6486  *
6487  *   3         2         1
6488  *  10987654321098765432109876543210
6489  *  001000               x1110000101
6490  *     rt -----
6491  *          rs -----
6492  *               rd -----
6493  */
6494 std::string NMD::DPAU_H_QBL(uint64 instruction)
6495 {
6496     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6497     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6498     uint64 ac_value = extract_ac_13_12(instruction);
6499
6500     std::string ac = AC(copy(ac_value));
6501     std::string rs = GPR(copy(rs_value));
6502     std::string rt = GPR(copy(rt_value));
6503
6504     return img::format("DPAU.H.QBL %s, %s, %s", ac, rs, rt);
6505 }
6506
6507
6508 /*
6509  *
6510  *
6511  *   3         2         1
6512  *  10987654321098765432109876543210
6513  *  001000               x1110000101
6514  *     rt -----
6515  *          rs -----
6516  *               rd -----
6517  */
6518 std::string NMD::DPAU_H_QBR(uint64 instruction)
6519 {
6520     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6521     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6522     uint64 ac_value = extract_ac_13_12(instruction);
6523
6524     std::string ac = AC(copy(ac_value));
6525     std::string rs = GPR(copy(rs_value));
6526     std::string rt = GPR(copy(rt_value));
6527
6528     return img::format("DPAU.H.QBR %s, %s, %s", ac, rs, rt);
6529 }
6530
6531
6532 /*
6533  *
6534  *
6535  *   3         2         1
6536  *  10987654321098765432109876543210
6537  *  001000               x1110000101
6538  *     rt -----
6539  *          rs -----
6540  *               rd -----
6541  */
6542 std::string NMD::DPAX_W_PH(uint64 instruction)
6543 {
6544     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6545     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6546     uint64 ac_value = extract_ac_13_12(instruction);
6547
6548     std::string ac = AC(copy(ac_value));
6549     std::string rs = GPR(copy(rs_value));
6550     std::string rt = GPR(copy(rt_value));
6551
6552     return img::format("DPAX.W.PH %s, %s, %s", ac, rs, rt);
6553 }
6554
6555
6556 /*
6557  *
6558  *
6559  *   3         2         1
6560  *  10987654321098765432109876543210
6561  *  001000               x1110000101
6562  *     rt -----
6563  *          rs -----
6564  *               rd -----
6565  */
6566 std::string NMD::DPS_W_PH(uint64 instruction)
6567 {
6568     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6569     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6570     uint64 ac_value = extract_ac_13_12(instruction);
6571
6572     std::string ac = AC(copy(ac_value));
6573     std::string rs = GPR(copy(rs_value));
6574     std::string rt = GPR(copy(rt_value));
6575
6576     return img::format("DPS.W.PH %s, %s, %s", ac, rs, rt);
6577 }
6578
6579
6580 /*
6581  *
6582  *
6583  *   3         2         1
6584  *  10987654321098765432109876543210
6585  *  001000               x1110000101
6586  *     rt -----
6587  *          rs -----
6588  *               rd -----
6589  */
6590 std::string NMD::DPSQ_SA_L_W(uint64 instruction)
6591 {
6592     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6593     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6594     uint64 ac_value = extract_ac_13_12(instruction);
6595
6596     std::string ac = AC(copy(ac_value));
6597     std::string rs = GPR(copy(rs_value));
6598     std::string rt = GPR(copy(rt_value));
6599
6600     return img::format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt);
6601 }
6602
6603
6604 /*
6605  *
6606  *
6607  *   3         2         1
6608  *  10987654321098765432109876543210
6609  *  001000               x1110000101
6610  *     rt -----
6611  *          rs -----
6612  *               rd -----
6613  */
6614 std::string NMD::DPSQ_S_W_PH(uint64 instruction)
6615 {
6616     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6617     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6618     uint64 ac_value = extract_ac_13_12(instruction);
6619
6620     std::string ac = AC(copy(ac_value));
6621     std::string rs = GPR(copy(rs_value));
6622     std::string rt = GPR(copy(rt_value));
6623
6624     return img::format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt);
6625 }
6626
6627
6628 /*
6629  *
6630  *
6631  *   3         2         1
6632  *  10987654321098765432109876543210
6633  *  001000               x1110000101
6634  *     rt -----
6635  *          rs -----
6636  *               rd -----
6637  */
6638 std::string NMD::DPSQX_SA_W_PH(uint64 instruction)
6639 {
6640     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6641     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6642     uint64 ac_value = extract_ac_13_12(instruction);
6643
6644     std::string ac = AC(copy(ac_value));
6645     std::string rs = GPR(copy(rs_value));
6646     std::string rt = GPR(copy(rt_value));
6647
6648     return img::format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6649 }
6650
6651
6652 /*
6653  *
6654  *
6655  *   3         2         1
6656  *  10987654321098765432109876543210
6657  *  001000               x1110000101
6658  *     rt -----
6659  *          rs -----
6660  *               rd -----
6661  */
6662 std::string NMD::DPSQX_S_W_PH(uint64 instruction)
6663 {
6664     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6665     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6666     uint64 ac_value = extract_ac_13_12(instruction);
6667
6668     std::string ac = AC(copy(ac_value));
6669     std::string rs = GPR(copy(rs_value));
6670     std::string rt = GPR(copy(rt_value));
6671
6672     return img::format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt);
6673 }
6674
6675
6676 /*
6677  *
6678  *
6679  *   3         2         1
6680  *  10987654321098765432109876543210
6681  *  001000               x1110000101
6682  *     rt -----
6683  *          rs -----
6684  *               rd -----
6685  */
6686 std::string NMD::DPSU_H_QBL(uint64 instruction)
6687 {
6688     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6689     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6690     uint64 ac_value = extract_ac_13_12(instruction);
6691
6692     std::string ac = AC(copy(ac_value));
6693     std::string rs = GPR(copy(rs_value));
6694     std::string rt = GPR(copy(rt_value));
6695
6696     return img::format("DPSU.H.QBL %s, %s, %s", ac, rs, rt);
6697 }
6698
6699
6700 /*
6701  *
6702  *
6703  *   3         2         1
6704  *  10987654321098765432109876543210
6705  *  001000               x1110000101
6706  *     rt -----
6707  *          rs -----
6708  *               rd -----
6709  */
6710 std::string NMD::DPSU_H_QBR(uint64 instruction)
6711 {
6712     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6713     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6714     uint64 ac_value = extract_ac_13_12(instruction);
6715
6716     std::string ac = AC(copy(ac_value));
6717     std::string rs = GPR(copy(rs_value));
6718     std::string rt = GPR(copy(rt_value));
6719
6720     return img::format("DPSU.H.QBR %s, %s, %s", ac, rs, rt);
6721 }
6722
6723
6724 /*
6725  *
6726  *
6727  *   3         2         1
6728  *  10987654321098765432109876543210
6729  *  001000               x1110000101
6730  *     rt -----
6731  *          rs -----
6732  *               rd -----
6733  */
6734 std::string NMD::DPSX_W_PH(uint64 instruction)
6735 {
6736     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6737     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6738     uint64 ac_value = extract_ac_13_12(instruction);
6739
6740     std::string ac = AC(copy(ac_value));
6741     std::string rs = GPR(copy(rs_value));
6742     std::string rt = GPR(copy(rt_value));
6743
6744     return img::format("DPSX.W.PH %s, %s, %s", ac, rs, rt);
6745 }
6746
6747
6748 /*
6749  * DROTR -
6750  *
6751  *   3         2         1
6752  *  10987654321098765432109876543210
6753  *  001000               x1110000101
6754  *     rt -----
6755  *          rs -----
6756  *               rd -----
6757  */
6758 std::string NMD::DROTR(uint64 instruction)
6759 {
6760     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6761     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6762     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6763
6764     std::string rt = GPR(copy(rt_value));
6765     std::string rs = GPR(copy(rs_value));
6766     std::string shift = IMMEDIATE(copy(shift_value));
6767
6768     return img::format("DROTR %s, %s, %s", rt, rs, shift);
6769 }
6770
6771
6772 /*
6773  * DROTR[32] -
6774  *
6775  *   3         2         1
6776  *  10987654321098765432109876543210
6777  *  10o000          1100xxx0110
6778  *     rt -----
6779  *          rs -----
6780  *                       shift -----
6781  */
6782 std::string NMD::DROTR32(uint64 instruction)
6783 {
6784     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6785     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6786     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6787
6788     std::string rt = GPR(copy(rt_value));
6789     std::string rs = GPR(copy(rs_value));
6790     std::string shift = IMMEDIATE(copy(shift_value));
6791
6792     return img::format("DROTR32 %s, %s, %s", rt, rs, shift);
6793 }
6794
6795
6796 /*
6797  *
6798  *
6799  *   3         2         1
6800  *  10987654321098765432109876543210
6801  *  001000               x1110000101
6802  *     rt -----
6803  *          rs -----
6804  *               rd -----
6805  */
6806 std::string NMD::DROTRV(uint64 instruction)
6807 {
6808     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6809     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6810     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6811
6812     std::string rd = GPR(copy(rd_value));
6813     std::string rs = GPR(copy(rs_value));
6814     std::string rt = GPR(copy(rt_value));
6815
6816     return img::format("DROTRV %s, %s, %s", rd, rs, rt);
6817 }
6818
6819
6820 /*
6821  *
6822  *
6823  *   3         2         1
6824  *  10987654321098765432109876543210
6825  *  001000               x1110000101
6826  *     rt -----
6827  *          rs -----
6828  *               rd -----
6829  */
6830 std::string NMD::DROTX(uint64 instruction)
6831 {
6832     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6833     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6834     uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
6835     uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
6836
6837     std::string rt = GPR(copy(rt_value));
6838     std::string rs = GPR(copy(rs_value));
6839     std::string shift = IMMEDIATE(copy(shift_value));
6840     std::string shiftx = IMMEDIATE(copy(shiftx_value));
6841
6842     return img::format("DROTX %s, %s, %s, %s", rt, rs, shift, shiftx);
6843 }
6844
6845
6846 /*
6847  * DSLL -
6848  *
6849  *   3         2         1
6850  *  10987654321098765432109876543210
6851  *  10o000          1100xxx0000
6852  *     rt -----
6853  *          rs -----
6854  *                       shift -----
6855  */
6856 std::string NMD::DSLL(uint64 instruction)
6857 {
6858     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6859     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6860     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6861
6862     std::string rt = GPR(copy(rt_value));
6863     std::string rs = GPR(copy(rs_value));
6864     std::string shift = IMMEDIATE(copy(shift_value));
6865
6866     return img::format("DSLL %s, %s, %s", rt, rs, shift);
6867 }
6868
6869
6870 /*
6871  * DSLL[32] -
6872  *
6873  *   3         2         1
6874  *  10987654321098765432109876543210
6875  *  10o000          1100xxx0000
6876  *     rt -----
6877  *          rs -----
6878  *                       shift -----
6879  */
6880 std::string NMD::DSLL32(uint64 instruction)
6881 {
6882     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6883     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6884     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6885
6886     std::string rt = GPR(copy(rt_value));
6887     std::string rs = GPR(copy(rs_value));
6888     std::string shift = IMMEDIATE(copy(shift_value));
6889
6890     return img::format("DSLL32 %s, %s, %s", rt, rs, shift);
6891 }
6892
6893
6894 /*
6895  *
6896  *
6897  *   3         2         1
6898  *  10987654321098765432109876543210
6899  *  001000               x1110000101
6900  *     rt -----
6901  *          rs -----
6902  *               rd -----
6903  */
6904 std::string NMD::DSLLV(uint64 instruction)
6905 {
6906     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6907     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6908     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6909
6910     std::string rd = GPR(copy(rd_value));
6911     std::string rs = GPR(copy(rs_value));
6912     std::string rt = GPR(copy(rt_value));
6913
6914     return img::format("DSLLV %s, %s, %s", rd, rs, rt);
6915 }
6916
6917
6918 /*
6919  * DSRA -
6920  *
6921  *   3         2         1
6922  *  10987654321098765432109876543210
6923  *  10o000          1100xxx0100
6924  *     rt -----
6925  *          rs -----
6926  *                       shift -----
6927  */
6928 std::string NMD::DSRA(uint64 instruction)
6929 {
6930     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6931     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6932     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6933
6934     std::string rt = GPR(copy(rt_value));
6935     std::string rs = GPR(copy(rs_value));
6936     std::string shift = IMMEDIATE(copy(shift_value));
6937
6938     return img::format("DSRA %s, %s, %s", rt, rs, shift);
6939 }
6940
6941
6942 /*
6943  * DSRA[32] -
6944  *
6945  *   3         2         1
6946  *  10987654321098765432109876543210
6947  *  10o000          1100xxx0100
6948  *     rt -----
6949  *          rs -----
6950  *                       shift -----
6951  */
6952 std::string NMD::DSRA32(uint64 instruction)
6953 {
6954     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6955     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6956     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6957
6958     std::string rt = GPR(copy(rt_value));
6959     std::string rs = GPR(copy(rs_value));
6960     std::string shift = IMMEDIATE(copy(shift_value));
6961
6962     return img::format("DSRA32 %s, %s, %s", rt, rs, shift);
6963 }
6964
6965
6966 /*
6967  *
6968  *
6969  *   3         2         1
6970  *  10987654321098765432109876543210
6971  *  001000               x1110000101
6972  *     rt -----
6973  *          rs -----
6974  *               rd -----
6975  */
6976 std::string NMD::DSRAV(uint64 instruction)
6977 {
6978     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6979     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6980     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6981
6982     std::string rd = GPR(copy(rd_value));
6983     std::string rs = GPR(copy(rs_value));
6984     std::string rt = GPR(copy(rt_value));
6985
6986     return img::format("DSRAV %s, %s, %s", rd, rs, rt);
6987 }
6988
6989
6990 /*
6991  * DSRL -
6992  *
6993  *   3         2         1
6994  *  10987654321098765432109876543210
6995  *  10o000          1100xxx0100
6996  *     rt -----
6997  *          rs -----
6998  *                       shift -----
6999  */
7000 std::string NMD::DSRL(uint64 instruction)
7001 {
7002     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7003     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7004     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
7005
7006     std::string rt = GPR(copy(rt_value));
7007     std::string rs = GPR(copy(rs_value));
7008     std::string shift = IMMEDIATE(copy(shift_value));
7009
7010     return img::format("DSRL %s, %s, %s", rt, rs, shift);
7011 }
7012
7013
7014 /*
7015  * DSRL[32] -
7016  *
7017  *   3         2         1
7018  *  10987654321098765432109876543210
7019  *  10o000          1100xxx0010
7020  *     rt -----
7021  *          rs -----
7022  *                       shift -----
7023  */
7024 std::string NMD::DSRL32(uint64 instruction)
7025 {
7026     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7027     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7028     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
7029
7030     std::string rt = GPR(copy(rt_value));
7031     std::string rs = GPR(copy(rs_value));
7032     std::string shift = IMMEDIATE(copy(shift_value));
7033
7034     return img::format("DSRL32 %s, %s, %s", rt, rs, shift);
7035 }
7036
7037
7038 /*
7039  *
7040  *
7041  *   3         2         1
7042  *  10987654321098765432109876543210
7043  *  001000               x1110000101
7044  *     rt -----
7045  *          rs -----
7046  *               rd -----
7047  */
7048 std::string NMD::DSRLV(uint64 instruction)
7049 {
7050     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7051     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7052     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7053
7054     std::string rd = GPR(copy(rd_value));
7055     std::string rs = GPR(copy(rs_value));
7056     std::string rt = GPR(copy(rt_value));
7057
7058     return img::format("DSRLV %s, %s, %s", rd, rs, rt);
7059 }
7060
7061
7062 /*
7063  *
7064  *
7065  *   3         2         1
7066  *  10987654321098765432109876543210
7067  *  001000               x1110000101
7068  *     rt -----
7069  *          rs -----
7070  *               rd -----
7071  */
7072 std::string NMD::DSUB(uint64 instruction)
7073 {
7074     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7075     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7076     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7077
7078     std::string rd = GPR(copy(rd_value));
7079     std::string rs = GPR(copy(rs_value));
7080     std::string rt = GPR(copy(rt_value));
7081
7082     return img::format("DSUB %s, %s, %s", rd, rs, rt);
7083 }
7084
7085
7086 /*
7087  *
7088  *
7089  *   3         2         1
7090  *  10987654321098765432109876543210
7091  *  001000               x1110000101
7092  *     rt -----
7093  *          rs -----
7094  *               rd -----
7095  */
7096 std::string NMD::DSUBU(uint64 instruction)
7097 {
7098     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7099     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7100     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7101
7102     std::string rd = GPR(copy(rd_value));
7103     std::string rs = GPR(copy(rs_value));
7104     std::string rt = GPR(copy(rt_value));
7105
7106     return img::format("DSUBU %s, %s, %s", rd, rs, rt);
7107 }
7108
7109
7110 /*
7111  *
7112  *
7113  *   3         2         1
7114  *  10987654321098765432109876543210
7115  *  001000               x1110000101
7116  *     rt -----
7117  *          rs -----
7118  *               rd -----
7119  */
7120 std::string NMD::DVPE(uint64 instruction)
7121 {
7122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7123
7124     std::string rt = GPR(copy(rt_value));
7125
7126     return img::format("DVPE %s", rt);
7127 }
7128
7129
7130 /*
7131  *
7132  *
7133  *   3         2         1
7134  *  10987654321098765432109876543210
7135  *  001000               x1110000101
7136  *     rt -----
7137  *          rs -----
7138  *               rd -----
7139  */
7140 std::string NMD::DVP(uint64 instruction)
7141 {
7142     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7143
7144     std::string rt = GPR(copy(rt_value));
7145
7146     return img::format("DVP %s", rt);
7147 }
7148
7149
7150 /*
7151  *
7152  *
7153  *   3         2         1
7154  *  10987654321098765432109876543210
7155  *  001000               x1110000101
7156  *     rt -----
7157  *          rs -----
7158  *               rd -----
7159  */
7160 std::string NMD::EHB(uint64 instruction)
7161 {
7162     (void)instruction;
7163
7164     return "EHB ";
7165 }
7166
7167
7168 /*
7169  *
7170  *
7171  *   3         2         1
7172  *  10987654321098765432109876543210
7173  *  001000               x1110000101
7174  *     rt -----
7175  *          rs -----
7176  *               rd -----
7177  */
7178 std::string NMD::EI(uint64 instruction)
7179 {
7180     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7181
7182     std::string rt = GPR(copy(rt_value));
7183
7184     return img::format("EI %s", rt);
7185 }
7186
7187
7188 /*
7189  *
7190  *
7191  *   3         2         1
7192  *  10987654321098765432109876543210
7193  *  001000               x1110000101
7194  *     rt -----
7195  *          rs -----
7196  *               rd -----
7197  */
7198 std::string NMD::EMT(uint64 instruction)
7199 {
7200     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7201
7202     std::string rt = GPR(copy(rt_value));
7203
7204     return img::format("EMT %s", rt);
7205 }
7206
7207
7208 /*
7209  *
7210  *
7211  *   3         2         1
7212  *  10987654321098765432109876543210
7213  *  001000               x1110000101
7214  *     rt -----
7215  *          rs -----
7216  *               rd -----
7217  */
7218 std::string NMD::ERET(uint64 instruction)
7219 {
7220     (void)instruction;
7221
7222     return "ERET ";
7223 }
7224
7225
7226 /*
7227  *
7228  *
7229  *   3         2         1
7230  *  10987654321098765432109876543210
7231  *  001000               x1110000101
7232  *     rt -----
7233  *          rs -----
7234  *               rd -----
7235  */
7236 std::string NMD::ERETNC(uint64 instruction)
7237 {
7238     (void)instruction;
7239
7240     return "ERETNC ";
7241 }
7242
7243
7244 /*
7245  *
7246  *
7247  *   3         2         1
7248  *  10987654321098765432109876543210
7249  *  001000               x1110000101
7250  *     rt -----
7251  *          rs -----
7252  *               rd -----
7253  */
7254 std::string NMD::EVP(uint64 instruction)
7255 {
7256     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7257
7258     std::string rt = GPR(copy(rt_value));
7259
7260     return img::format("EVP %s", rt);
7261 }
7262
7263
7264 /*
7265  *
7266  *
7267  *   3         2         1
7268  *  10987654321098765432109876543210
7269  *  001000               x1110000101
7270  *     rt -----
7271  *          rs -----
7272  *               rd -----
7273  */
7274 std::string NMD::EVPE(uint64 instruction)
7275 {
7276     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7277
7278     std::string rt = GPR(copy(rt_value));
7279
7280     return img::format("EVPE %s", rt);
7281 }
7282
7283
7284 /*
7285  *
7286  *
7287  *   3         2         1
7288  *  10987654321098765432109876543210
7289  *  001000               x1110000101
7290  *     rt -----
7291  *          rs -----
7292  *               rd -----
7293  */
7294 std::string NMD::EXT(uint64 instruction)
7295 {
7296     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7297     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7298     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7299     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7300
7301     std::string rt = GPR(copy(rt_value));
7302     std::string rs = GPR(copy(rs_value));
7303     std::string lsb = IMMEDIATE(copy(lsb_value));
7304     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
7305
7306     return img::format("EXT %s, %s, %s, %s", rt, rs, lsb, msbd);
7307 }
7308
7309
7310 /*
7311  *
7312  *
7313  *   3         2         1
7314  *  10987654321098765432109876543210
7315  *  001000               x1110000101
7316  *     rt -----
7317  *          rs -----
7318  *               rd -----
7319  */
7320 std::string NMD::EXTD(uint64 instruction)
7321 {
7322     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7323     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7324     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7325     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7326
7327     std::string rd = GPR(copy(rd_value));
7328     std::string rs = GPR(copy(rs_value));
7329     std::string rt = GPR(copy(rt_value));
7330     std::string shift = IMMEDIATE(copy(shift_value));
7331
7332     return img::format("EXTD %s, %s, %s, %s", rd, rs, rt, shift);
7333 }
7334
7335
7336 /*
7337  *
7338  *
7339  *   3         2         1
7340  *  10987654321098765432109876543210
7341  *  001000               x1110000101
7342  *     rt -----
7343  *          rs -----
7344  *               rd -----
7345  */
7346 std::string NMD::EXTD32(uint64 instruction)
7347 {
7348     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7349     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7350     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7351     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7352
7353     std::string rd = GPR(copy(rd_value));
7354     std::string rs = GPR(copy(rs_value));
7355     std::string rt = GPR(copy(rt_value));
7356     std::string shift = IMMEDIATE(copy(shift_value));
7357
7358     return img::format("EXTD32 %s, %s, %s, %s", rd, rs, rt, shift);
7359 }
7360
7361
7362 /*
7363  *
7364  *
7365  *   3         2         1
7366  *  10987654321098765432109876543210
7367  *  001000               x1110000101
7368  *     rt -----
7369  *          rs -----
7370  *               rd -----
7371  */
7372 std::string NMD::EXTPDP(uint64 instruction)
7373 {
7374     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7375     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7376     uint64 ac_value = extract_ac_13_12(instruction);
7377
7378     std::string rt = GPR(copy(rt_value));
7379     std::string ac = AC(copy(ac_value));
7380     std::string size = IMMEDIATE(copy(size_value));
7381
7382     return img::format("EXTPDP %s, %s, %s", rt, ac, size);
7383 }
7384
7385
7386 /*
7387  *
7388  *
7389  *   3         2         1
7390  *  10987654321098765432109876543210
7391  *  001000               x1110000101
7392  *     rt -----
7393  *          rs -----
7394  *               rd -----
7395  */
7396 std::string NMD::EXTPDPV(uint64 instruction)
7397 {
7398     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7399     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7400     uint64 ac_value = extract_ac_13_12(instruction);
7401
7402     std::string rt = GPR(copy(rt_value));
7403     std::string ac = AC(copy(ac_value));
7404     std::string rs = GPR(copy(rs_value));
7405
7406     return img::format("EXTPDPV %s, %s, %s", rt, ac, rs);
7407 }
7408
7409
7410 /*
7411  *
7412  *
7413  *   3         2         1
7414  *  10987654321098765432109876543210
7415  *  001000               x1110000101
7416  *     rt -----
7417  *          rs -----
7418  *               rd -----
7419  */
7420 std::string NMD::EXTP(uint64 instruction)
7421 {
7422     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7423     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7424     uint64 ac_value = extract_ac_13_12(instruction);
7425
7426     std::string rt = GPR(copy(rt_value));
7427     std::string ac = AC(copy(ac_value));
7428     std::string size = IMMEDIATE(copy(size_value));
7429
7430     return img::format("EXTP %s, %s, %s", rt, ac, size);
7431 }
7432
7433
7434 /*
7435  *
7436  *
7437  *   3         2         1
7438  *  10987654321098765432109876543210
7439  *  001000               x1110000101
7440  *     rt -----
7441  *          rs -----
7442  *               rd -----
7443  */
7444 std::string NMD::EXTPV(uint64 instruction)
7445 {
7446     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7447     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7448     uint64 ac_value = extract_ac_13_12(instruction);
7449
7450     std::string rt = GPR(copy(rt_value));
7451     std::string ac = AC(copy(ac_value));
7452     std::string rs = GPR(copy(rs_value));
7453
7454     return img::format("EXTPV %s, %s, %s", rt, ac, rs);
7455 }
7456
7457
7458 /*
7459  *
7460  *
7461  *   3         2         1
7462  *  10987654321098765432109876543210
7463  *  001000               x1110000101
7464  *     rt -----
7465  *          rs -----
7466  *               rd -----
7467  */
7468 std::string NMD::EXTR_RS_W(uint64 instruction)
7469 {
7470     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7471     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7472     uint64 ac_value = extract_ac_13_12(instruction);
7473
7474     std::string rt = GPR(copy(rt_value));
7475     std::string ac = AC(copy(ac_value));
7476     std::string shift = IMMEDIATE(copy(shift_value));
7477
7478     return img::format("EXTR_RS.W %s, %s, %s", rt, ac, shift);
7479 }
7480
7481
7482 /*
7483  *
7484  *
7485  *   3         2         1
7486  *  10987654321098765432109876543210
7487  *  001000               x1110000101
7488  *     rt -----
7489  *          rs -----
7490  *               rd -----
7491  */
7492 std::string NMD::EXTR_R_W(uint64 instruction)
7493 {
7494     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7495     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7496     uint64 ac_value = extract_ac_13_12(instruction);
7497
7498     std::string rt = GPR(copy(rt_value));
7499     std::string ac = AC(copy(ac_value));
7500     std::string shift = IMMEDIATE(copy(shift_value));
7501
7502     return img::format("EXTR_R.W %s, %s, %s", rt, ac, shift);
7503 }
7504
7505
7506 /*
7507  *
7508  *
7509  *   3         2         1
7510  *  10987654321098765432109876543210
7511  *  001000               x1110000101
7512  *     rt -----
7513  *          rs -----
7514  *               rd -----
7515  */
7516 std::string NMD::EXTR_S_H(uint64 instruction)
7517 {
7518     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7519     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7520     uint64 ac_value = extract_ac_13_12(instruction);
7521
7522     std::string rt = GPR(copy(rt_value));
7523     std::string ac = AC(copy(ac_value));
7524     std::string shift = IMMEDIATE(copy(shift_value));
7525
7526     return img::format("EXTR_S.H %s, %s, %s", rt, ac, shift);
7527 }
7528
7529
7530 /*
7531  *
7532  *
7533  *   3         2         1
7534  *  10987654321098765432109876543210
7535  *  001000               x1110000101
7536  *     rt -----
7537  *          rs -----
7538  *               rd -----
7539  */
7540 std::string NMD::EXTR_W(uint64 instruction)
7541 {
7542     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7543     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7544     uint64 ac_value = extract_ac_13_12(instruction);
7545
7546     std::string rt = GPR(copy(rt_value));
7547     std::string ac = AC(copy(ac_value));
7548     std::string shift = IMMEDIATE(copy(shift_value));
7549
7550     return img::format("EXTR.W %s, %s, %s", rt, ac, shift);
7551 }
7552
7553
7554 /*
7555  *
7556  *
7557  *   3         2         1
7558  *  10987654321098765432109876543210
7559  *  001000               x1110000101
7560  *     rt -----
7561  *          rs -----
7562  *               rd -----
7563  */
7564 std::string NMD::EXTRV_RS_W(uint64 instruction)
7565 {
7566     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7567     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7568     uint64 ac_value = extract_ac_13_12(instruction);
7569
7570     std::string rt = GPR(copy(rt_value));
7571     std::string ac = AC(copy(ac_value));
7572     std::string rs = GPR(copy(rs_value));
7573
7574     return img::format("EXTRV_RS.W %s, %s, %s", rt, ac, rs);
7575 }
7576
7577
7578 /*
7579  *
7580  *
7581  *   3         2         1
7582  *  10987654321098765432109876543210
7583  *  001000               x1110000101
7584  *     rt -----
7585  *          rs -----
7586  *               rd -----
7587  */
7588 std::string NMD::EXTRV_R_W(uint64 instruction)
7589 {
7590     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7591     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7592     uint64 ac_value = extract_ac_13_12(instruction);
7593
7594     std::string rt = GPR(copy(rt_value));
7595     std::string ac = AC(copy(ac_value));
7596     std::string rs = GPR(copy(rs_value));
7597
7598     return img::format("EXTRV_R.W %s, %s, %s", rt, ac, rs);
7599 }
7600
7601
7602 /*
7603  *
7604  *
7605  *   3         2         1
7606  *  10987654321098765432109876543210
7607  *  001000               x1110000101
7608  *     rt -----
7609  *          rs -----
7610  *               rd -----
7611  */
7612 std::string NMD::EXTRV_S_H(uint64 instruction)
7613 {
7614     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7615     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7616     uint64 ac_value = extract_ac_13_12(instruction);
7617
7618     std::string rt = GPR(copy(rt_value));
7619     std::string ac = AC(copy(ac_value));
7620     std::string rs = GPR(copy(rs_value));
7621
7622     return img::format("EXTRV_S.H %s, %s, %s", rt, ac, rs);
7623 }
7624
7625
7626 /*
7627  *
7628  *
7629  *   3         2         1
7630  *  10987654321098765432109876543210
7631  *  001000               x1110000101
7632  *     rt -----
7633  *          rs -----
7634  *               rd -----
7635  */
7636 std::string NMD::EXTRV_W(uint64 instruction)
7637 {
7638     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7639     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7640     uint64 ac_value = extract_ac_13_12(instruction);
7641
7642     std::string rt = GPR(copy(rt_value));
7643     std::string ac = AC(copy(ac_value));
7644     std::string rs = GPR(copy(rs_value));
7645
7646     return img::format("EXTRV.W %s, %s, %s", rt, ac, rs);
7647 }
7648
7649
7650 /*
7651  * EXTW - Extract Word
7652  *
7653  *   3         2         1
7654  *  10987654321098765432109876543210
7655  *  001000                    011111
7656  *     rt -----
7657  *          rs -----
7658  *               rd -----
7659  *                 shift -----
7660  */
7661 std::string NMD::EXTW(uint64 instruction)
7662 {
7663     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7664     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7665     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7666     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7667
7668     std::string rd = GPR(copy(rd_value));
7669     std::string rs = GPR(copy(rs_value));
7670     std::string rt = GPR(copy(rt_value));
7671     std::string shift = IMMEDIATE(copy(shift_value));
7672
7673     return img::format("EXTW %s, %s, %s, %s", rd, rs, rt, shift);
7674 }
7675
7676
7677 /*
7678  *
7679  *
7680  *   3         2         1
7681  *  10987654321098765432109876543210
7682  *  001000               x1110000101
7683  *     rt -----
7684  *          rs -----
7685  *               rd -----
7686  */
7687 std::string NMD::FLOOR_L_D(uint64 instruction)
7688 {
7689     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7690     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7691
7692     std::string ft = FPR(copy(ft_value));
7693     std::string fs = FPR(copy(fs_value));
7694
7695     return img::format("FLOOR.L.D %s, %s", ft, fs);
7696 }
7697
7698
7699 /*
7700  *
7701  *
7702  *   3         2         1
7703  *  10987654321098765432109876543210
7704  *  001000               x1110000101
7705  *     rt -----
7706  *          rs -----
7707  *               rd -----
7708  */
7709 std::string NMD::FLOOR_L_S(uint64 instruction)
7710 {
7711     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7712     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7713
7714     std::string ft = FPR(copy(ft_value));
7715     std::string fs = FPR(copy(fs_value));
7716
7717     return img::format("FLOOR.L.S %s, %s", ft, fs);
7718 }
7719
7720
7721 /*
7722  *
7723  *
7724  *   3         2         1
7725  *  10987654321098765432109876543210
7726  *  001000               x1110000101
7727  *     rt -----
7728  *          rs -----
7729  *               rd -----
7730  */
7731 std::string NMD::FLOOR_W_D(uint64 instruction)
7732 {
7733     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7734     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7735
7736     std::string ft = FPR(copy(ft_value));
7737     std::string fs = FPR(copy(fs_value));
7738
7739     return img::format("FLOOR.W.D %s, %s", ft, fs);
7740 }
7741
7742
7743 /*
7744  *
7745  *
7746  *   3         2         1
7747  *  10987654321098765432109876543210
7748  *  001000               x1110000101
7749  *     rt -----
7750  *          rs -----
7751  *               rd -----
7752  */
7753 std::string NMD::FLOOR_W_S(uint64 instruction)
7754 {
7755     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7756     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7757
7758     std::string ft = FPR(copy(ft_value));
7759     std::string fs = FPR(copy(fs_value));
7760
7761     return img::format("FLOOR.W.S %s, %s", ft, fs);
7762 }
7763
7764
7765 /*
7766  *
7767  *
7768  *   3         2         1
7769  *  10987654321098765432109876543210
7770  *  001000               x1110000101
7771  *     rt -----
7772  *          rs -----
7773  *               rd -----
7774  */
7775 std::string NMD::FORK(uint64 instruction)
7776 {
7777     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7778     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7779     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7780
7781     std::string rd = GPR(copy(rd_value));
7782     std::string rs = GPR(copy(rs_value));
7783     std::string rt = GPR(copy(rt_value));
7784
7785     return img::format("FORK %s, %s, %s", rd, rs, rt);
7786 }
7787
7788
7789 /*
7790  *
7791  *
7792  *   3         2         1
7793  *  10987654321098765432109876543210
7794  *  001000               x1110000101
7795  *     rt -----
7796  *          rs -----
7797  *               rd -----
7798  */
7799 std::string NMD::HYPCALL(uint64 instruction)
7800 {
7801     uint64 code_value = extract_code_17_to_0(instruction);
7802
7803     std::string code = IMMEDIATE(copy(code_value));
7804
7805     return img::format("HYPCALL %s", code);
7806 }
7807
7808
7809 /*
7810  *
7811  *
7812  *   3         2         1
7813  *  10987654321098765432109876543210
7814  *  001000               x1110000101
7815  *     rt -----
7816  *          rs -----
7817  *               rd -----
7818  */
7819 std::string NMD::HYPCALL_16_(uint64 instruction)
7820 {
7821     uint64 code_value = extract_code_1_0(instruction);
7822
7823     std::string code = IMMEDIATE(copy(code_value));
7824
7825     return img::format("HYPCALL %s", code);
7826 }
7827
7828
7829 /*
7830  *
7831  *
7832  *   3         2         1
7833  *  10987654321098765432109876543210
7834  *  001000               x1110000101
7835  *     rt -----
7836  *          rs -----
7837  *               rd -----
7838  */
7839 std::string NMD::INS(uint64 instruction)
7840 {
7841     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7842     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7843     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7844     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7845
7846     std::string rt = GPR(copy(rt_value));
7847     std::string rs = GPR(copy(rs_value));
7848     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
7849     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
7850     /* !!!!!!!!!! - no conversion function */
7851
7852     return img::format("INS %s, %s, %s, %s", rt, rs, pos, size);
7853     /* hand edited */
7854 }
7855
7856
7857 /*
7858  * [DSP] INSV - Insert bit field variable
7859  *
7860  *   3         2         1
7861  *  10987654321098765432109876543210
7862  *  001000               x1110000101
7863  *     rt -----
7864  *          rs -----
7865  *               rd -----
7866  */
7867 std::string NMD::INSV(uint64 instruction)
7868 {
7869     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7870     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7871
7872     std::string rt = GPR(copy(rt_value));
7873     std::string rs = GPR(copy(rs_value));
7874
7875     return img::format("INSV %s, %s", rt, rs);
7876 }
7877
7878
7879 /*
7880  *
7881  *
7882  *   3         2         1
7883  *  10987654321098765432109876543210
7884  *  001000               x1110000101
7885  *     rt -----
7886  *          rs -----
7887  *               rd -----
7888  */
7889 std::string NMD::IRET(uint64 instruction)
7890 {
7891     (void)instruction;
7892
7893     return "IRET ";
7894 }
7895
7896
7897 /*
7898  *
7899  *
7900  *   3         2         1
7901  *  10987654321098765432109876543210
7902  *  001000               x1110000101
7903  *     rt -----
7904  *          rs -----
7905  *               rd -----
7906  */
7907 std::string NMD::JALRC_16_(uint64 instruction)
7908 {
7909     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7910
7911     std::string rt = GPR(copy(rt_value));
7912
7913     return img::format("JALRC $%d, %s", 31, rt);
7914 }
7915
7916
7917 /*
7918  *
7919  *
7920  *   3         2         1
7921  *  10987654321098765432109876543210
7922  *  001000               x1110000101
7923  *     rt -----
7924  *          rs -----
7925  *               rd -----
7926  */
7927 std::string NMD::JALRC_32_(uint64 instruction)
7928 {
7929     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7930     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7931
7932     std::string rt = GPR(copy(rt_value));
7933     std::string rs = GPR(copy(rs_value));
7934
7935     return img::format("JALRC %s, %s", rt, rs);
7936 }
7937
7938
7939 /*
7940  *
7941  *
7942  *   3         2         1
7943  *  10987654321098765432109876543210
7944  *  001000               x1110000101
7945  *     rt -----
7946  *          rs -----
7947  *               rd -----
7948  */
7949 std::string NMD::JALRC_HB(uint64 instruction)
7950 {
7951     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7952     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7953
7954     std::string rt = GPR(copy(rt_value));
7955     std::string rs = GPR(copy(rs_value));
7956
7957     return img::format("JALRC.HB %s, %s", rt, rs);
7958 }
7959
7960
7961 /*
7962  *
7963  *
7964  *   3         2         1
7965  *  10987654321098765432109876543210
7966  *  001000               x1110000101
7967  *     rt -----
7968  *          rs -----
7969  *               rd -----
7970  */
7971 std::string NMD::JRC(uint64 instruction)
7972 {
7973     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7974
7975     std::string rt = GPR(copy(rt_value));
7976
7977     return img::format("JRC %s", rt);
7978 }
7979
7980
7981 /*
7982  *
7983  *
7984  *   3         2         1
7985  *  10987654321098765432109876543210
7986  *  001000               x1110000101
7987  *     rt -----
7988  *          rs -----
7989  *               rd -----
7990  */
7991 std::string NMD::LB_16_(uint64 instruction)
7992 {
7993     uint64 rt3_value = extract_rt3_9_8_7(instruction);
7994     uint64 rs3_value = extract_rs3_6_5_4(instruction);
7995     uint64 u_value = extract_u_1_0(instruction);
7996
7997     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7998     std::string u = IMMEDIATE(copy(u_value));
7999     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8000
8001     return img::format("LB %s, %s(%s)", rt3, u, rs3);
8002 }
8003
8004
8005 /*
8006  *
8007  *
8008  *   3         2         1
8009  *  10987654321098765432109876543210
8010  *  001000               x1110000101
8011  *     rt -----
8012  *          rs -----
8013  *               rd -----
8014  */
8015 std::string NMD::LB_GP_(uint64 instruction)
8016 {
8017     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8018     uint64 u_value = extract_u_17_to_0(instruction);
8019
8020     std::string rt = GPR(copy(rt_value));
8021     std::string u = IMMEDIATE(copy(u_value));
8022
8023     return img::format("LB %s, %s($%d)", rt, u, 28);
8024 }
8025
8026
8027 /*
8028  *
8029  *
8030  *   3         2         1
8031  *  10987654321098765432109876543210
8032  *  001000               x1110000101
8033  *     rt -----
8034  *          rs -----
8035  *               rd -----
8036  */
8037 std::string NMD::LB_S9_(uint64 instruction)
8038 {
8039     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8040     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8041     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8042
8043     std::string rt = GPR(copy(rt_value));
8044     std::string s = IMMEDIATE(copy(s_value));
8045     std::string rs = GPR(copy(rs_value));
8046
8047     return img::format("LB %s, %s(%s)", rt, s, rs);
8048 }
8049
8050
8051 /*
8052  *
8053  *
8054  *   3         2         1
8055  *  10987654321098765432109876543210
8056  *  001000               x1110000101
8057  *     rt -----
8058  *          rs -----
8059  *               rd -----
8060  */
8061 std::string NMD::LB_U12_(uint64 instruction)
8062 {
8063     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8064     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8065     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8066
8067     std::string rt = GPR(copy(rt_value));
8068     std::string u = IMMEDIATE(copy(u_value));
8069     std::string rs = GPR(copy(rs_value));
8070
8071     return img::format("LB %s, %s(%s)", rt, u, rs);
8072 }
8073
8074
8075 /*
8076  *
8077  *
8078  *   3         2         1
8079  *  10987654321098765432109876543210
8080  *  001000               x1110000101
8081  *     rt -----
8082  *          rs -----
8083  *               rd -----
8084  */
8085 std::string NMD::LBE(uint64 instruction)
8086 {
8087     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8088     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8089     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8090
8091     std::string rt = GPR(copy(rt_value));
8092     std::string s = IMMEDIATE(copy(s_value));
8093     std::string rs = GPR(copy(rs_value));
8094
8095     return img::format("LBE %s, %s(%s)", rt, s, rs);
8096 }
8097
8098
8099 /*
8100  *
8101  *
8102  *   3         2         1
8103  *  10987654321098765432109876543210
8104  *  001000               x1110000101
8105  *     rt -----
8106  *          rs -----
8107  *               rd -----
8108  */
8109 std::string NMD::LBU_16_(uint64 instruction)
8110 {
8111     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8112     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8113     uint64 u_value = extract_u_1_0(instruction);
8114
8115     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8116     std::string u = IMMEDIATE(copy(u_value));
8117     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8118
8119     return img::format("LBU %s, %s(%s)", rt3, u, rs3);
8120 }
8121
8122
8123 /*
8124  *
8125  *
8126  *   3         2         1
8127  *  10987654321098765432109876543210
8128  *  001000               x1110000101
8129  *     rt -----
8130  *          rs -----
8131  *               rd -----
8132  */
8133 std::string NMD::LBU_GP_(uint64 instruction)
8134 {
8135     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8136     uint64 u_value = extract_u_17_to_0(instruction);
8137
8138     std::string rt = GPR(copy(rt_value));
8139     std::string u = IMMEDIATE(copy(u_value));
8140
8141     return img::format("LBU %s, %s($%d)", rt, u, 28);
8142 }
8143
8144
8145 /*
8146  *
8147  *
8148  *   3         2         1
8149  *  10987654321098765432109876543210
8150  *  001000               x1110000101
8151  *     rt -----
8152  *          rs -----
8153  *               rd -----
8154  */
8155 std::string NMD::LBU_S9_(uint64 instruction)
8156 {
8157     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8158     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8159     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8160
8161     std::string rt = GPR(copy(rt_value));
8162     std::string s = IMMEDIATE(copy(s_value));
8163     std::string rs = GPR(copy(rs_value));
8164
8165     return img::format("LBU %s, %s(%s)", rt, s, rs);
8166 }
8167
8168
8169 /*
8170  *
8171  *
8172  *   3         2         1
8173  *  10987654321098765432109876543210
8174  *  001000               x1110000101
8175  *     rt -----
8176  *          rs -----
8177  *               rd -----
8178  */
8179 std::string NMD::LBU_U12_(uint64 instruction)
8180 {
8181     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8182     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8183     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8184
8185     std::string rt = GPR(copy(rt_value));
8186     std::string u = IMMEDIATE(copy(u_value));
8187     std::string rs = GPR(copy(rs_value));
8188
8189     return img::format("LBU %s, %s(%s)", rt, u, rs);
8190 }
8191
8192
8193 /*
8194  *
8195  *
8196  *   3         2         1
8197  *  10987654321098765432109876543210
8198  *  001000               x1110000101
8199  *     rt -----
8200  *          rs -----
8201  *               rd -----
8202  */
8203 std::string NMD::LBUE(uint64 instruction)
8204 {
8205     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8206     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8207     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8208
8209     std::string rt = GPR(copy(rt_value));
8210     std::string s = IMMEDIATE(copy(s_value));
8211     std::string rs = GPR(copy(rs_value));
8212
8213     return img::format("LBUE %s, %s(%s)", rt, s, rs);
8214 }
8215
8216
8217 /*
8218  *
8219  *
8220  *   3         2         1
8221  *  10987654321098765432109876543210
8222  *  001000               x1110000101
8223  *     rt -----
8224  *          rs -----
8225  *               rd -----
8226  */
8227 std::string NMD::LBUX(uint64 instruction)
8228 {
8229     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8230     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8231     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8232
8233     std::string rd = GPR(copy(rd_value));
8234     std::string rs = GPR(copy(rs_value));
8235     std::string rt = GPR(copy(rt_value));
8236
8237     return img::format("LBUX %s, %s(%s)", rd, rs, rt);
8238 }
8239
8240
8241 /*
8242  *
8243  *
8244  *   3         2         1
8245  *  10987654321098765432109876543210
8246  *  001000               x1110000101
8247  *     rt -----
8248  *          rs -----
8249  *               rd -----
8250  */
8251 std::string NMD::LBX(uint64 instruction)
8252 {
8253     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8254     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8255     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8256
8257     std::string rd = GPR(copy(rd_value));
8258     std::string rs = GPR(copy(rs_value));
8259     std::string rt = GPR(copy(rt_value));
8260
8261     return img::format("LBX %s, %s(%s)", rd, rs, rt);
8262 }
8263
8264
8265 /*
8266  *
8267  *
8268  *   3         2         1
8269  *  10987654321098765432109876543210
8270  *  001000               x1110000101
8271  *     rt -----
8272  *          rs -----
8273  *               rd -----
8274  */
8275 std::string NMD::LD_GP_(uint64 instruction)
8276 {
8277     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8278     uint64 u_value = extract_u_20_to_3__s3(instruction);
8279
8280     std::string rt = GPR(copy(rt_value));
8281     std::string u = IMMEDIATE(copy(u_value));
8282
8283     return img::format("LD %s, %s($%d)", rt, u, 28);
8284 }
8285
8286
8287 /*
8288  *
8289  *
8290  *   3         2         1
8291  *  10987654321098765432109876543210
8292  *  001000               x1110000101
8293  *     rt -----
8294  *          rs -----
8295  *               rd -----
8296  */
8297 std::string NMD::LD_S9_(uint64 instruction)
8298 {
8299     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8300     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8301     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8302
8303     std::string rt = GPR(copy(rt_value));
8304     std::string s = IMMEDIATE(copy(s_value));
8305     std::string rs = GPR(copy(rs_value));
8306
8307     return img::format("LD %s, %s(%s)", rt, s, rs);
8308 }
8309
8310
8311 /*
8312  *
8313  *
8314  *   3         2         1
8315  *  10987654321098765432109876543210
8316  *  001000               x1110000101
8317  *     rt -----
8318  *          rs -----
8319  *               rd -----
8320  */
8321 std::string NMD::LD_U12_(uint64 instruction)
8322 {
8323     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8324     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8325     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8326
8327     std::string rt = GPR(copy(rt_value));
8328     std::string u = IMMEDIATE(copy(u_value));
8329     std::string rs = GPR(copy(rs_value));
8330
8331     return img::format("LD %s, %s(%s)", rt, u, rs);
8332 }
8333
8334
8335 /*
8336  *
8337  *
8338  *   3         2         1
8339  *  10987654321098765432109876543210
8340  *  001000               x1110000101
8341  *     rt -----
8342  *          rs -----
8343  *               rd -----
8344  */
8345 std::string NMD::LDC1_GP_(uint64 instruction)
8346 {
8347     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8348     uint64 u_value = extract_u_17_to_2__s2(instruction);
8349
8350     std::string ft = FPR(copy(ft_value));
8351     std::string u = IMMEDIATE(copy(u_value));
8352
8353     return img::format("LDC1 %s, %s($%d)", ft, u, 28);
8354 }
8355
8356
8357 /*
8358  *
8359  *
8360  *   3         2         1
8361  *  10987654321098765432109876543210
8362  *  001000               x1110000101
8363  *     rt -----
8364  *          rs -----
8365  *               rd -----
8366  */
8367 std::string NMD::LDC1_S9_(uint64 instruction)
8368 {
8369     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8370     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8371     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8372
8373     std::string ft = FPR(copy(ft_value));
8374     std::string s = IMMEDIATE(copy(s_value));
8375     std::string rs = GPR(copy(rs_value));
8376
8377     return img::format("LDC1 %s, %s(%s)", ft, s, rs);
8378 }
8379
8380
8381 /*
8382  *
8383  *
8384  *   3         2         1
8385  *  10987654321098765432109876543210
8386  *  001000               x1110000101
8387  *     rt -----
8388  *          rs -----
8389  *               rd -----
8390  */
8391 std::string NMD::LDC1_U12_(uint64 instruction)
8392 {
8393     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8394     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8395     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8396
8397     std::string ft = FPR(copy(ft_value));
8398     std::string u = IMMEDIATE(copy(u_value));
8399     std::string rs = GPR(copy(rs_value));
8400
8401     return img::format("LDC1 %s, %s(%s)", ft, u, rs);
8402 }
8403
8404
8405 /*
8406  *
8407  *
8408  *   3         2         1
8409  *  10987654321098765432109876543210
8410  *  001000               x1110000101
8411  *     rt -----
8412  *          rs -----
8413  *               rd -----
8414  */
8415 std::string NMD::LDC1XS(uint64 instruction)
8416 {
8417     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8418     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8419     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8420
8421     std::string ft = FPR(copy(ft_value));
8422     std::string rs = GPR(copy(rs_value));
8423     std::string rt = GPR(copy(rt_value));
8424
8425     return img::format("LDC1XS %s, %s(%s)", ft, rs, rt);
8426 }
8427
8428
8429 /*
8430  *
8431  *
8432  *   3         2         1
8433  *  10987654321098765432109876543210
8434  *  001000               x1110000101
8435  *     rt -----
8436  *          rs -----
8437  *               rd -----
8438  */
8439 std::string NMD::LDC1X(uint64 instruction)
8440 {
8441     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8442     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8443     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8444
8445     std::string ft = FPR(copy(ft_value));
8446     std::string rs = GPR(copy(rs_value));
8447     std::string rt = GPR(copy(rt_value));
8448
8449     return img::format("LDC1X %s, %s(%s)", ft, rs, rt);
8450 }
8451
8452
8453 /*
8454  *
8455  *
8456  *   3         2         1
8457  *  10987654321098765432109876543210
8458  *  001000               x1110000101
8459  *     rt -----
8460  *          rs -----
8461  *               rd -----
8462  */
8463 std::string NMD::LDC2(uint64 instruction)
8464 {
8465     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
8466     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8467     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8468
8469     std::string ct = CPR(copy(ct_value));
8470     std::string s = IMMEDIATE(copy(s_value));
8471     std::string rs = GPR(copy(rs_value));
8472
8473     return img::format("LDC2 %s, %s(%s)", ct, s, rs);
8474 }
8475
8476
8477 /*
8478  *
8479  *
8480  *   3         2         1
8481  *  10987654321098765432109876543210
8482  *  001000               x1110000101
8483  *     rt -----
8484  *          rs -----
8485  *               rd -----
8486  */
8487 std::string NMD::LDM(uint64 instruction)
8488 {
8489     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8490     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8491     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8492     uint64 count3_value = extract_count3_14_13_12(instruction);
8493
8494     std::string rt = GPR(copy(rt_value));
8495     std::string s = IMMEDIATE(copy(s_value));
8496     std::string rs = GPR(copy(rs_value));
8497     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
8498
8499     return img::format("LDM %s, %s(%s), %s", rt, s, rs, count3);
8500 }
8501
8502
8503 /*
8504  *
8505  *
8506  *   3         2         1
8507  *  10987654321098765432109876543210
8508  *  001000               x1110000101
8509  *     rt -----
8510  *          rs -----
8511  *               rd -----
8512  */
8513 std::string NMD::LDPC_48_(uint64 instruction)
8514 {
8515     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8516     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8517
8518     std::string rt = GPR(copy(rt_value));
8519     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
8520
8521     return img::format("LDPC %s, %s", rt, s);
8522 }
8523
8524
8525 /*
8526  *
8527  *
8528  *   3         2         1
8529  *  10987654321098765432109876543210
8530  *  001000               x1110000101
8531  *     rt -----
8532  *          rs -----
8533  *               rd -----
8534  */
8535 std::string NMD::LDX(uint64 instruction)
8536 {
8537     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8538     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8539     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8540
8541     std::string rd = GPR(copy(rd_value));
8542     std::string rs = GPR(copy(rs_value));
8543     std::string rt = GPR(copy(rt_value));
8544
8545     return img::format("LDX %s, %s(%s)", rd, rs, rt);
8546 }
8547
8548
8549 /*
8550  *
8551  *
8552  *   3         2         1
8553  *  10987654321098765432109876543210
8554  *  001000               x1110000101
8555  *     rt -----
8556  *          rs -----
8557  *               rd -----
8558  */
8559 std::string NMD::LDXS(uint64 instruction)
8560 {
8561     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8562     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8563     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8564
8565     std::string rd = GPR(copy(rd_value));
8566     std::string rs = GPR(copy(rs_value));
8567     std::string rt = GPR(copy(rt_value));
8568
8569     return img::format("LDXS %s, %s(%s)", rd, rs, rt);
8570 }
8571
8572
8573 /*
8574  *
8575  *
8576  *   3         2         1
8577  *  10987654321098765432109876543210
8578  *  001000               x1110000101
8579  *     rt -----
8580  *          rs -----
8581  *               rd -----
8582  */
8583 std::string NMD::LH_16_(uint64 instruction)
8584 {
8585     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8586     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8587     uint64 u_value = extract_u_2_1__s1(instruction);
8588
8589     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8590     std::string u = IMMEDIATE(copy(u_value));
8591     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8592
8593     return img::format("LH %s, %s(%s)", rt3, u, rs3);
8594 }
8595
8596
8597 /*
8598  *
8599  *
8600  *   3         2         1
8601  *  10987654321098765432109876543210
8602  *  001000               x1110000101
8603  *     rt -----
8604  *          rs -----
8605  *               rd -----
8606  */
8607 std::string NMD::LH_GP_(uint64 instruction)
8608 {
8609     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8610     uint64 u_value = extract_u_17_to_1__s1(instruction);
8611
8612     std::string rt = GPR(copy(rt_value));
8613     std::string u = IMMEDIATE(copy(u_value));
8614
8615     return img::format("LH %s, %s($%d)", rt, u, 28);
8616 }
8617
8618
8619 /*
8620  *
8621  *
8622  *   3         2         1
8623  *  10987654321098765432109876543210
8624  *  001000               x1110000101
8625  *     rt -----
8626  *          rs -----
8627  *               rd -----
8628  */
8629 std::string NMD::LH_S9_(uint64 instruction)
8630 {
8631     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8632     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8633     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8634
8635     std::string rt = GPR(copy(rt_value));
8636     std::string s = IMMEDIATE(copy(s_value));
8637     std::string rs = GPR(copy(rs_value));
8638
8639     return img::format("LH %s, %s(%s)", rt, s, rs);
8640 }
8641
8642
8643 /*
8644  *
8645  *
8646  *   3         2         1
8647  *  10987654321098765432109876543210
8648  *  001000               x1110000101
8649  *     rt -----
8650  *          rs -----
8651  *               rd -----
8652  */
8653 std::string NMD::LH_U12_(uint64 instruction)
8654 {
8655     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8656     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8657     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8658
8659     std::string rt = GPR(copy(rt_value));
8660     std::string u = IMMEDIATE(copy(u_value));
8661     std::string rs = GPR(copy(rs_value));
8662
8663     return img::format("LH %s, %s(%s)", rt, u, rs);
8664 }
8665
8666
8667 /*
8668  *
8669  *
8670  *   3         2         1
8671  *  10987654321098765432109876543210
8672  *  001000               x1110000101
8673  *     rt -----
8674  *          rs -----
8675  *               rd -----
8676  */
8677 std::string NMD::LHE(uint64 instruction)
8678 {
8679     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8680     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8681     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8682
8683     std::string rt = GPR(copy(rt_value));
8684     std::string s = IMMEDIATE(copy(s_value));
8685     std::string rs = GPR(copy(rs_value));
8686
8687     return img::format("LHE %s, %s(%s)", rt, s, rs);
8688 }
8689
8690
8691 /*
8692  *
8693  *
8694  *   3         2         1
8695  *  10987654321098765432109876543210
8696  *  001000               x1110000101
8697  *     rt -----
8698  *          rs -----
8699  *               rd -----
8700  */
8701 std::string NMD::LHU_16_(uint64 instruction)
8702 {
8703     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8704     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8705     uint64 u_value = extract_u_2_1__s1(instruction);
8706
8707     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8708     std::string u = IMMEDIATE(copy(u_value));
8709     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8710
8711     return img::format("LHU %s, %s(%s)", rt3, u, rs3);
8712 }
8713
8714
8715 /*
8716  *
8717  *
8718  *   3         2         1
8719  *  10987654321098765432109876543210
8720  *  001000               x1110000101
8721  *     rt -----
8722  *          rs -----
8723  *               rd -----
8724  */
8725 std::string NMD::LHU_GP_(uint64 instruction)
8726 {
8727     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8728     uint64 u_value = extract_u_17_to_1__s1(instruction);
8729
8730     std::string rt = GPR(copy(rt_value));
8731     std::string u = IMMEDIATE(copy(u_value));
8732
8733     return img::format("LHU %s, %s($%d)", rt, u, 28);
8734 }
8735
8736
8737 /*
8738  *
8739  *
8740  *   3         2         1
8741  *  10987654321098765432109876543210
8742  *  001000               x1110000101
8743  *     rt -----
8744  *          rs -----
8745  *               rd -----
8746  */
8747 std::string NMD::LHU_S9_(uint64 instruction)
8748 {
8749     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8750     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8751     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8752
8753     std::string rt = GPR(copy(rt_value));
8754     std::string s = IMMEDIATE(copy(s_value));
8755     std::string rs = GPR(copy(rs_value));
8756
8757     return img::format("LHU %s, %s(%s)", rt, s, rs);
8758 }
8759
8760
8761 /*
8762  *
8763  *
8764  *   3         2         1
8765  *  10987654321098765432109876543210
8766  *  001000               x1110000101
8767  *     rt -----
8768  *          rs -----
8769  *               rd -----
8770  */
8771 std::string NMD::LHU_U12_(uint64 instruction)
8772 {
8773     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8774     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8775     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8776
8777     std::string rt = GPR(copy(rt_value));
8778     std::string u = IMMEDIATE(copy(u_value));
8779     std::string rs = GPR(copy(rs_value));
8780
8781     return img::format("LHU %s, %s(%s)", rt, u, rs);
8782 }
8783
8784
8785 /*
8786  *
8787  *
8788  *   3         2         1
8789  *  10987654321098765432109876543210
8790  *  001000               x1110000101
8791  *     rt -----
8792  *          rs -----
8793  *               rd -----
8794  */
8795 std::string NMD::LHUE(uint64 instruction)
8796 {
8797     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8798     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8799     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8800
8801     std::string rt = GPR(copy(rt_value));
8802     std::string s = IMMEDIATE(copy(s_value));
8803     std::string rs = GPR(copy(rs_value));
8804
8805     return img::format("LHUE %s, %s(%s)", rt, s, rs);
8806 }
8807
8808
8809 /*
8810  *
8811  *
8812  *   3         2         1
8813  *  10987654321098765432109876543210
8814  *  001000               x1110000101
8815  *     rt -----
8816  *          rs -----
8817  *               rd -----
8818  */
8819 std::string NMD::LHUX(uint64 instruction)
8820 {
8821     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8822     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8823     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8824
8825     std::string rd = GPR(copy(rd_value));
8826     std::string rs = GPR(copy(rs_value));
8827     std::string rt = GPR(copy(rt_value));
8828
8829     return img::format("LHUX %s, %s(%s)", rd, rs, rt);
8830 }
8831
8832
8833 /*
8834  *
8835  *
8836  *   3         2         1
8837  *  10987654321098765432109876543210
8838  *  001000               x1110000101
8839  *     rt -----
8840  *          rs -----
8841  *               rd -----
8842  */
8843 std::string NMD::LHUXS(uint64 instruction)
8844 {
8845     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8846     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8847     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8848
8849     std::string rd = GPR(copy(rd_value));
8850     std::string rs = GPR(copy(rs_value));
8851     std::string rt = GPR(copy(rt_value));
8852
8853     return img::format("LHUXS %s, %s(%s)", rd, rs, rt);
8854 }
8855
8856
8857 /*
8858  *
8859  *
8860  *   3         2         1
8861  *  10987654321098765432109876543210
8862  *  001000               x1110000101
8863  *     rt -----
8864  *          rs -----
8865  *               rd -----
8866  */
8867 std::string NMD::LHXS(uint64 instruction)
8868 {
8869     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8870     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8871     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8872
8873     std::string rd = GPR(copy(rd_value));
8874     std::string rs = GPR(copy(rs_value));
8875     std::string rt = GPR(copy(rt_value));
8876
8877     return img::format("LHXS %s, %s(%s)", rd, rs, rt);
8878 }
8879
8880
8881 /*
8882  *
8883  *
8884  *   3         2         1
8885  *  10987654321098765432109876543210
8886  *  001000               x1110000101
8887  *     rt -----
8888  *          rs -----
8889  *               rd -----
8890  */
8891 std::string NMD::LHX(uint64 instruction)
8892 {
8893     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8894     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8895     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8896
8897     std::string rd = GPR(copy(rd_value));
8898     std::string rs = GPR(copy(rs_value));
8899     std::string rt = GPR(copy(rt_value));
8900
8901     return img::format("LHX %s, %s(%s)", rd, rs, rt);
8902 }
8903
8904
8905 /*
8906  *
8907  *
8908  *   3         2         1
8909  *  10987654321098765432109876543210
8910  *  001000               x1110000101
8911  *     rt -----
8912  *          rs -----
8913  *               rd -----
8914  */
8915 std::string NMD::LI_16_(uint64 instruction)
8916 {
8917     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8918     uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
8919
8920     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8921     std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
8922
8923     return img::format("LI %s, %s", rt3, eu);
8924 }
8925
8926
8927 /*
8928  *
8929  *
8930  *   3         2         1
8931  *  10987654321098765432109876543210
8932  *  001000               x1110000101
8933  *     rt -----
8934  *          rs -----
8935  *               rd -----
8936  */
8937 std::string NMD::LI_48_(uint64 instruction)
8938 {
8939     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8940     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8941
8942     std::string rt = GPR(copy(rt_value));
8943     std::string s = IMMEDIATE(copy(s_value));
8944
8945     return img::format("LI %s, %s", rt, s);
8946 }
8947
8948
8949 /*
8950  *
8951  *
8952  *   3         2         1
8953  *  10987654321098765432109876543210
8954  *  001000               x1110000101
8955  *     rt -----
8956  *          rs -----
8957  *               rd -----
8958  */
8959 std::string NMD::LL(uint64 instruction)
8960 {
8961     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8962     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8963     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8964
8965     std::string rt = GPR(copy(rt_value));
8966     std::string s = IMMEDIATE(copy(s_value));
8967     std::string rs = GPR(copy(rs_value));
8968
8969     return img::format("LL %s, %s(%s)", rt, s, rs);
8970 }
8971
8972
8973 /*
8974  *
8975  *
8976  *   3         2         1
8977  *  10987654321098765432109876543210
8978  *  001000               x1110000101
8979  *     rt -----
8980  *          rs -----
8981  *               rd -----
8982  */
8983 std::string NMD::LLD(uint64 instruction)
8984 {
8985     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8986     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8987     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
8988
8989     std::string rt = GPR(copy(rt_value));
8990     std::string s = IMMEDIATE(copy(s_value));
8991     std::string rs = GPR(copy(rs_value));
8992
8993     return img::format("LLD %s, %s(%s)", rt, s, rs);
8994 }
8995
8996
8997 /*
8998  *
8999  *
9000  *   3         2         1
9001  *  10987654321098765432109876543210
9002  *  001000               x1110000101
9003  *     rt -----
9004  *          rs -----
9005  *               rd -----
9006  */
9007 std::string NMD::LLDP(uint64 instruction)
9008 {
9009     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9010     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9011     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
9012
9013     std::string rt = GPR(copy(rt_value));
9014     std::string ru = GPR(copy(ru_value));
9015     std::string rs = GPR(copy(rs_value));
9016
9017     return img::format("LLDP %s, %s, (%s)", rt, ru, rs);
9018 }
9019
9020
9021 /*
9022  *
9023  *
9024  *   3         2         1
9025  *  10987654321098765432109876543210
9026  *  001000               x1110000101
9027  *     rt -----
9028  *          rs -----
9029  *               rd -----
9030  */
9031 std::string NMD::LLE(uint64 instruction)
9032 {
9033     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9034     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9035     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
9036
9037     std::string rt = GPR(copy(rt_value));
9038     std::string s = IMMEDIATE(copy(s_value));
9039     std::string rs = GPR(copy(rs_value));
9040
9041     return img::format("LLE %s, %s(%s)", rt, s, rs);
9042 }
9043
9044
9045 /*
9046  *
9047  *
9048  *   3         2         1
9049  *  10987654321098765432109876543210
9050  *  001000               x1110000101
9051  *     rt -----
9052  *          rs -----
9053  *               rd -----
9054  */
9055 std::string NMD::LLWP(uint64 instruction)
9056 {
9057     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9058     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9059     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
9060
9061     std::string rt = GPR(copy(rt_value));
9062     std::string ru = GPR(copy(ru_value));
9063     std::string rs = GPR(copy(rs_value));
9064
9065     return img::format("LLWP %s, %s, (%s)", rt, ru, rs);
9066 }
9067
9068
9069 /*
9070  *
9071  *
9072  *   3         2         1
9073  *  10987654321098765432109876543210
9074  *  001000               x1110000101
9075  *     rt -----
9076  *          rs -----
9077  *               rd -----
9078  */
9079 std::string NMD::LLWPE(uint64 instruction)
9080 {
9081     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9082     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9083     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
9084
9085     std::string rt = GPR(copy(rt_value));
9086     std::string ru = GPR(copy(ru_value));
9087     std::string rs = GPR(copy(rs_value));
9088
9089     return img::format("LLWPE %s, %s, (%s)", rt, ru, rs);
9090 }
9091
9092
9093 /*
9094  *
9095  *
9096  *   3         2         1
9097  *  10987654321098765432109876543210
9098  *  001000               x1110000101
9099  *     rt -----
9100  *          rs -----
9101  *               rd -----
9102  */
9103 std::string NMD::LSA(uint64 instruction)
9104 {
9105     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9106     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9107     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9108     uint64 u2_value = extract_u2_10_9(instruction);
9109
9110     std::string rd = GPR(copy(rd_value));
9111     std::string rs = GPR(copy(rs_value));
9112     std::string rt = GPR(copy(rt_value));
9113     std::string u2 = IMMEDIATE(copy(u2_value));
9114
9115     return img::format("LSA %s, %s, %s, %s", rd, rs, rt, u2);
9116 }
9117
9118
9119 /*
9120  *
9121  *
9122  *   3         2         1
9123  *  10987654321098765432109876543210
9124  *  001000               x1110000101
9125  *     rt -----
9126  *          rs -----
9127  *               rd -----
9128  */
9129 std::string NMD::LUI(uint64 instruction)
9130 {
9131     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9132     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
9133
9134     std::string rt = GPR(copy(rt_value));
9135     std::string s = IMMEDIATE(copy(s_value));
9136
9137     return img::format("LUI %s, %%hi(%s)", rt, s);
9138 }
9139
9140
9141 /*
9142  *
9143  *
9144  *   3         2         1
9145  *  10987654321098765432109876543210
9146  *  001000               x1110000101
9147  *     rt -----
9148  *          rs -----
9149  *               rd -----
9150  */
9151 std::string NMD::LW_16_(uint64 instruction)
9152 {
9153     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9154     uint64 rs3_value = extract_rs3_6_5_4(instruction);
9155     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
9156
9157     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9158     std::string u = IMMEDIATE(copy(u_value));
9159     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9160
9161     return img::format("LW %s, %s(%s)", rt3, u, rs3);
9162 }
9163
9164
9165 /*
9166  *
9167  *
9168  *   3         2         1
9169  *  10987654321098765432109876543210
9170  *  001000               x1110000101
9171  *     rt -----
9172  *          rs -----
9173  *               rd -----
9174  */
9175 std::string NMD::LW_4X4_(uint64 instruction)
9176 {
9177     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
9178     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
9179     uint64 u_value = extract_u_3_8__s2(instruction);
9180
9181     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
9182     std::string u = IMMEDIATE(copy(u_value));
9183     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
9184
9185     return img::format("LW %s, %s(%s)", rt4, u, rs4);
9186 }
9187
9188
9189 /*
9190  *
9191  *
9192  *   3         2         1
9193  *  10987654321098765432109876543210
9194  *  001000               x1110000101
9195  *     rt -----
9196  *          rs -----
9197  *               rd -----
9198  */
9199 std::string NMD::LW_GP_(uint64 instruction)
9200 {
9201     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9202     uint64 u_value = extract_u_20_to_2__s2(instruction);
9203
9204     std::string rt = GPR(copy(rt_value));
9205     std::string u = IMMEDIATE(copy(u_value));
9206
9207     return img::format("LW %s, %s($%d)", rt, u, 28);
9208 }
9209
9210
9211 /*
9212  *
9213  *
9214  *   3         2         1
9215  *  10987654321098765432109876543210
9216  *  001000               x1110000101
9217  *     rt -----
9218  *          rs -----
9219  *               rd -----
9220  */
9221 std::string NMD::LW_GP16_(uint64 instruction)
9222 {
9223     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9224     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
9225
9226     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9227     std::string u = IMMEDIATE(copy(u_value));
9228
9229     return img::format("LW %s, %s($%d)", rt3, u, 28);
9230 }
9231
9232
9233 /*
9234  *
9235  *
9236  *   3         2         1
9237  *  10987654321098765432109876543210
9238  *  001000               x1110000101
9239  *     rt -----
9240  *          rs -----
9241  *               rd -----
9242  */
9243 std::string NMD::LW_S9_(uint64 instruction)
9244 {
9245     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9246     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9247     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9248
9249     std::string rt = GPR(copy(rt_value));
9250     std::string s = IMMEDIATE(copy(s_value));
9251     std::string rs = GPR(copy(rs_value));
9252
9253     return img::format("LW %s, %s(%s)", rt, s, rs);
9254 }
9255
9256
9257 /*
9258  *
9259  *
9260  *   3         2         1
9261  *  10987654321098765432109876543210
9262  *  001000               x1110000101
9263  *     rt -----
9264  *          rs -----
9265  *               rd -----
9266  */
9267 std::string NMD::LW_SP_(uint64 instruction)
9268 {
9269     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
9270     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
9271
9272     std::string rt = GPR(copy(rt_value));
9273     std::string u = IMMEDIATE(copy(u_value));
9274
9275     return img::format("LW %s, %s($%d)", rt, u, 29);
9276 }
9277
9278
9279 /*
9280  *
9281  *
9282  *   3         2         1
9283  *  10987654321098765432109876543210
9284  *  001000               x1110000101
9285  *     rt -----
9286  *          rs -----
9287  *               rd -----
9288  */
9289 std::string NMD::LW_U12_(uint64 instruction)
9290 {
9291     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9292     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9293     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9294
9295     std::string rt = GPR(copy(rt_value));
9296     std::string u = IMMEDIATE(copy(u_value));
9297     std::string rs = GPR(copy(rs_value));
9298
9299     return img::format("LW %s, %s(%s)", rt, u, rs);
9300 }
9301
9302
9303 /*
9304  *
9305  *
9306  *   3         2         1
9307  *  10987654321098765432109876543210
9308  *  001000               x1110000101
9309  *     rt -----
9310  *          rs -----
9311  *               rd -----
9312  */
9313 std::string NMD::LWC1_GP_(uint64 instruction)
9314 {
9315     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9316     uint64 u_value = extract_u_17_to_2__s2(instruction);
9317
9318     std::string ft = FPR(copy(ft_value));
9319     std::string u = IMMEDIATE(copy(u_value));
9320
9321     return img::format("LWC1 %s, %s($%d)", ft, u, 28);
9322 }
9323
9324
9325 /*
9326  *
9327  *
9328  *   3         2         1
9329  *  10987654321098765432109876543210
9330  *  001000               x1110000101
9331  *     rt -----
9332  *          rs -----
9333  *               rd -----
9334  */
9335 std::string NMD::LWC1_S9_(uint64 instruction)
9336 {
9337     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9338     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9339     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9340
9341     std::string ft = FPR(copy(ft_value));
9342     std::string s = IMMEDIATE(copy(s_value));
9343     std::string rs = GPR(copy(rs_value));
9344
9345     return img::format("LWC1 %s, %s(%s)", ft, s, rs);
9346 }
9347
9348
9349 /*
9350  *
9351  *
9352  *   3         2         1
9353  *  10987654321098765432109876543210
9354  *  001000               x1110000101
9355  *     rt -----
9356  *          rs -----
9357  *               rd -----
9358  */
9359 std::string NMD::LWC1_U12_(uint64 instruction)
9360 {
9361     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9362     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9363     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9364
9365     std::string ft = FPR(copy(ft_value));
9366     std::string u = IMMEDIATE(copy(u_value));
9367     std::string rs = GPR(copy(rs_value));
9368
9369     return img::format("LWC1 %s, %s(%s)", ft, u, rs);
9370 }
9371
9372
9373 /*
9374  *
9375  *
9376  *   3         2         1
9377  *  10987654321098765432109876543210
9378  *  001000               x1110000101
9379  *     rt -----
9380  *          rs -----
9381  *               rd -----
9382  */
9383 std::string NMD::LWC1X(uint64 instruction)
9384 {
9385     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9386     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9387     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9388
9389     std::string ft = FPR(copy(ft_value));
9390     std::string rs = GPR(copy(rs_value));
9391     std::string rt = GPR(copy(rt_value));
9392
9393     return img::format("LWC1X %s, %s(%s)", ft, rs, rt);
9394 }
9395
9396
9397 /*
9398  *
9399  *
9400  *   3         2         1
9401  *  10987654321098765432109876543210
9402  *  001000               x1110000101
9403  *     rt -----
9404  *          rs -----
9405  *               rd -----
9406  */
9407 std::string NMD::LWC1XS(uint64 instruction)
9408 {
9409     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9410     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9411     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9412
9413     std::string ft = FPR(copy(ft_value));
9414     std::string rs = GPR(copy(rs_value));
9415     std::string rt = GPR(copy(rt_value));
9416
9417     return img::format("LWC1XS %s, %s(%s)", ft, rs, rt);
9418 }
9419
9420
9421 /*
9422  *
9423  *
9424  *   3         2         1
9425  *  10987654321098765432109876543210
9426  *  001000               x1110000101
9427  *     rt -----
9428  *          rs -----
9429  *               rd -----
9430  */
9431 std::string NMD::LWC2(uint64 instruction)
9432 {
9433     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
9434     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9435     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9436
9437     std::string ct = CPR(copy(ct_value));
9438     std::string s = IMMEDIATE(copy(s_value));
9439     std::string rs = GPR(copy(rs_value));
9440
9441     return img::format("LWC2 %s, %s(%s)", ct, s, rs);
9442 }
9443
9444
9445 /*
9446  *
9447  *
9448  *   3         2         1
9449  *  10987654321098765432109876543210
9450  *  001000               x1110000101
9451  *     rt -----
9452  *          rs -----
9453  *               rd -----
9454  */
9455 std::string NMD::LWE(uint64 instruction)
9456 {
9457     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9458     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9459     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9460
9461     std::string rt = GPR(copy(rt_value));
9462     std::string s = IMMEDIATE(copy(s_value));
9463     std::string rs = GPR(copy(rs_value));
9464
9465     return img::format("LWE %s, %s(%s)", rt, s, rs);
9466 }
9467
9468
9469 /*
9470  *
9471  *
9472  *   3         2         1
9473  *  10987654321098765432109876543210
9474  *  001000               x1110000101
9475  *     rt -----
9476  *          rs -----
9477  *               rd -----
9478  */
9479 std::string NMD::LWM(uint64 instruction)
9480 {
9481     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9482     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9483     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9484     uint64 count3_value = extract_count3_14_13_12(instruction);
9485
9486     std::string rt = GPR(copy(rt_value));
9487     std::string s = IMMEDIATE(copy(s_value));
9488     std::string rs = GPR(copy(rs_value));
9489     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
9490
9491     return img::format("LWM %s, %s(%s), %s", rt, s, rs, count3);
9492 }
9493
9494
9495 /*
9496  *
9497  *
9498  *   3         2         1
9499  *  10987654321098765432109876543210
9500  *  001000               x1110000101
9501  *     rt -----
9502  *          rs -----
9503  *               rd -----
9504  */
9505 std::string NMD::LWPC_48_(uint64 instruction)
9506 {
9507     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
9508     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
9509
9510     std::string rt = GPR(copy(rt_value));
9511     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
9512
9513     return img::format("LWPC %s, %s", rt, s);
9514 }
9515
9516
9517 /*
9518  *
9519  *
9520  *   3         2         1
9521  *  10987654321098765432109876543210
9522  *  001000               x1110000101
9523  *     rt -----
9524  *          rs -----
9525  *               rd -----
9526  */
9527 std::string NMD::LWU_GP_(uint64 instruction)
9528 {
9529     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9530     uint64 u_value = extract_u_17_to_2__s2(instruction);
9531
9532     std::string rt = GPR(copy(rt_value));
9533     std::string u = IMMEDIATE(copy(u_value));
9534
9535     return img::format("LWU %s, %s($%d)", rt, u, 28);
9536 }
9537
9538
9539 /*
9540  *
9541  *
9542  *   3         2         1
9543  *  10987654321098765432109876543210
9544  *  001000               x1110000101
9545  *     rt -----
9546  *          rs -----
9547  *               rd -----
9548  */
9549 std::string NMD::LWU_S9_(uint64 instruction)
9550 {
9551     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9552     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9553     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9554
9555     std::string rt = GPR(copy(rt_value));
9556     std::string s = IMMEDIATE(copy(s_value));
9557     std::string rs = GPR(copy(rs_value));
9558
9559     return img::format("LWU %s, %s(%s)", rt, s, rs);
9560 }
9561
9562
9563 /*
9564  *
9565  *
9566  *   3         2         1
9567  *  10987654321098765432109876543210
9568  *  001000               x1110000101
9569  *     rt -----
9570  *          rs -----
9571  *               rd -----
9572  */
9573 std::string NMD::LWU_U12_(uint64 instruction)
9574 {
9575     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9576     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9577     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9578
9579     std::string rt = GPR(copy(rt_value));
9580     std::string u = IMMEDIATE(copy(u_value));
9581     std::string rs = GPR(copy(rs_value));
9582
9583     return img::format("LWU %s, %s(%s)", rt, u, rs);
9584 }
9585
9586
9587 /*
9588  *
9589  *
9590  *   3         2         1
9591  *  10987654321098765432109876543210
9592  *  001000               x1110000101
9593  *     rt -----
9594  *          rs -----
9595  *               rd -----
9596  */
9597 std::string NMD::LWUX(uint64 instruction)
9598 {
9599     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9600     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9601     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9602
9603     std::string rd = GPR(copy(rd_value));
9604     std::string rs = GPR(copy(rs_value));
9605     std::string rt = GPR(copy(rt_value));
9606
9607     return img::format("LWUX %s, %s(%s)", rd, rs, rt);
9608 }
9609
9610
9611 /*
9612  *
9613  *
9614  *   3         2         1
9615  *  10987654321098765432109876543210
9616  *  001000               x1110000101
9617  *     rt -----
9618  *          rs -----
9619  *               rd -----
9620  */
9621 std::string NMD::LWUXS(uint64 instruction)
9622 {
9623     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9624     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9625     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9626
9627     std::string rd = GPR(copy(rd_value));
9628     std::string rs = GPR(copy(rs_value));
9629     std::string rt = GPR(copy(rt_value));
9630
9631     return img::format("LWUXS %s, %s(%s)", rd, rs, rt);
9632 }
9633
9634
9635 /*
9636  *
9637  *
9638  *   3         2         1
9639  *  10987654321098765432109876543210
9640  *  001000               x1110000101
9641  *     rt -----
9642  *          rs -----
9643  *               rd -----
9644  */
9645 std::string NMD::LWX(uint64 instruction)
9646 {
9647     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9648     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9649     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9650
9651     std::string rd = GPR(copy(rd_value));
9652     std::string rs = GPR(copy(rs_value));
9653     std::string rt = GPR(copy(rt_value));
9654
9655     return img::format("LWX %s, %s(%s)", rd, rs, rt);
9656 }
9657
9658
9659 /*
9660  *
9661  *
9662  *   3         2         1
9663  *  10987654321098765432109876543210
9664  *  001000               x1110000101
9665  *     rt -----
9666  *          rs -----
9667  *               rd -----
9668  */
9669 std::string NMD::LWXS_16_(uint64 instruction)
9670 {
9671     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9672     uint64 rs3_value = extract_rs3_6_5_4(instruction);
9673     uint64 rd3_value = extract_rd3_3_2_1(instruction);
9674
9675     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
9676     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9677     std::string rt3 = IMMEDIATE(decode_gpr_gpr3(rt3_value));
9678
9679     return img::format("LWXS %s, %s(%s)", rd3, rs3, rt3);
9680 }
9681
9682
9683 /*
9684  *
9685  *
9686  *   3         2         1
9687  *  10987654321098765432109876543210
9688  *  001000               x1110000101
9689  *     rt -----
9690  *          rs -----
9691  *               rd -----
9692  */
9693 std::string NMD::LWXS_32_(uint64 instruction)
9694 {
9695     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9696     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9697     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9698
9699     std::string rd = GPR(copy(rd_value));
9700     std::string rs = GPR(copy(rs_value));
9701     std::string rt = GPR(copy(rt_value));
9702
9703     return img::format("LWXS %s, %s(%s)", rd, rs, rt);
9704 }
9705
9706
9707 /*
9708  * [DSP] MADD ac, rs, rt - Multiply two words and add to the specified
9709  *         accumulator
9710  *
9711  *   3         2         1
9712  *  10987654321098765432109876543210
9713  *  001000               x1110000101
9714  *     rt -----
9715  *          rs -----
9716  *               rd -----
9717  */
9718 std::string NMD::MADD_DSP_(uint64 instruction)
9719 {
9720     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9721     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9722     uint64 ac_value = extract_ac_13_12(instruction);
9723
9724     std::string ac = AC(copy(ac_value));
9725     std::string rs = GPR(copy(rs_value));
9726     std::string rt = GPR(copy(rt_value));
9727
9728     return img::format("MADD %s, %s, %s", ac, rs, rt);
9729 }
9730
9731
9732 /*
9733  *
9734  *
9735  *   3         2         1
9736  *  10987654321098765432109876543210
9737  *  001000               x1110000101
9738  *     rt -----
9739  *          rs -----
9740  *               rd -----
9741  */
9742 std::string NMD::MADDF_D(uint64 instruction)
9743 {
9744     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9745     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9746     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9747
9748     std::string fd = FPR(copy(fd_value));
9749     std::string fs = FPR(copy(fs_value));
9750     std::string ft = FPR(copy(ft_value));
9751
9752     return img::format("MADDF.D %s, %s, %s", fd, fs, ft);
9753 }
9754
9755
9756 /*
9757  *
9758  *
9759  *   3         2         1
9760  *  10987654321098765432109876543210
9761  *  001000               x1110000101
9762  *     rt -----
9763  *          rs -----
9764  *               rd -----
9765  */
9766 std::string NMD::MADDF_S(uint64 instruction)
9767 {
9768     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9769     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9770     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9771
9772     std::string fd = FPR(copy(fd_value));
9773     std::string fs = FPR(copy(fs_value));
9774     std::string ft = FPR(copy(ft_value));
9775
9776     return img::format("MADDF.S %s, %s, %s", fd, fs, ft);
9777 }
9778
9779
9780 /*
9781  * [DSP] MADDU ac, rs, rt - Multiply two unsigned words and add to the
9782  *         specified accumulator
9783  *
9784  *   3         2         1
9785  *  10987654321098765432109876543210
9786  *  001000               x1110000101
9787  *     rt -----
9788  *          rs -----
9789  *               rd -----
9790  */
9791 std::string NMD::MADDU_DSP_(uint64 instruction)
9792 {
9793     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9794     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9795     uint64 ac_value = extract_ac_13_12(instruction);
9796
9797     std::string ac = AC(copy(ac_value));
9798     std::string rs = GPR(copy(rs_value));
9799     std::string rt = GPR(copy(rt_value));
9800
9801     return img::format("MADDU %s, %s, %s", ac, rs, rt);
9802 }
9803
9804
9805 /*
9806  * [DSP] MAQ_S.W.PHL ac, rs, rt - Multiply the left-most single vector
9807  *         fractional halfword elements with accumulation
9808  *
9809  *   3         2         1
9810  *  10987654321098765432109876543210
9811  *  001000               x1110000101
9812  *     rt -----
9813  *          rs -----
9814  *               rd -----
9815  */
9816 std::string NMD::MAQ_S_W_PHL(uint64 instruction)
9817 {
9818     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9819     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9820     uint64 ac_value = extract_ac_13_12(instruction);
9821
9822     std::string ac = AC(copy(ac_value));
9823     std::string rs = GPR(copy(rs_value));
9824     std::string rt = GPR(copy(rt_value));
9825
9826     return img::format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt);
9827 }
9828
9829
9830 /*
9831  * [DSP] MAQ_S.W.PHR ac, rs, rt - Multiply the right-most single vector
9832  *         fractional halfword elements with accumulation
9833  *
9834  *   3         2         1
9835  *  10987654321098765432109876543210
9836  *  001000               x1110000101
9837  *     rt -----
9838  *          rs -----
9839  *               rd -----
9840  */
9841 std::string NMD::MAQ_S_W_PHR(uint64 instruction)
9842 {
9843     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9844     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9845     uint64 ac_value = extract_ac_13_12(instruction);
9846
9847     std::string ac = AC(copy(ac_value));
9848     std::string rs = GPR(copy(rs_value));
9849     std::string rt = GPR(copy(rt_value));
9850
9851     return img::format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt);
9852 }
9853
9854
9855 /*
9856  * [DSP] MAQ_SA.W.PHL ac, rs, rt - Multiply the left-most single vector
9857  *         fractional halfword elements with saturating accumulation
9858  *
9859  *   3         2         1
9860  *  10987654321098765432109876543210
9861  *  001000               x1110000101
9862  *     rt -----
9863  *          rs -----
9864  *               rd -----
9865  */
9866 std::string NMD::MAQ_SA_W_PHL(uint64 instruction)
9867 {
9868     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9869     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9870     uint64 ac_value = extract_ac_13_12(instruction);
9871
9872     std::string ac = AC(copy(ac_value));
9873     std::string rs = GPR(copy(rs_value));
9874     std::string rt = GPR(copy(rt_value));
9875
9876     return img::format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt);
9877 }
9878
9879
9880 /*
9881  * [DSP] MAQ_SA.W.PHR ac, rs, rt - Multiply the right-most single vector
9882  *         fractional halfword elements with saturating accumulation
9883  *
9884  *   3         2         1
9885  *  10987654321098765432109876543210
9886  *  001000               x1110000101
9887  *     rt -----
9888  *          rs -----
9889  *               rd -----
9890  */
9891 std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
9892 {
9893     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9894     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9895     uint64 ac_value = extract_ac_13_12(instruction);
9896
9897     std::string ac = AC(copy(ac_value));
9898     std::string rs = GPR(copy(rs_value));
9899     std::string rt = GPR(copy(rt_value));
9900
9901     return img::format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt);
9902 }
9903
9904
9905 /*
9906  *
9907  *
9908  *   3         2         1
9909  *  10987654321098765432109876543210
9910  *  001000               x1110000101
9911  *     rt -----
9912  *          rs -----
9913  *               rd -----
9914  */
9915 std::string NMD::MAX_D(uint64 instruction)
9916 {
9917     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9918     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9919     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9920
9921     std::string fd = FPR(copy(fd_value));
9922     std::string fs = FPR(copy(fs_value));
9923     std::string ft = FPR(copy(ft_value));
9924
9925     return img::format("MAX.D %s, %s, %s", fd, fs, ft);
9926 }
9927
9928
9929 /*
9930  *
9931  *
9932  *   3         2         1
9933  *  10987654321098765432109876543210
9934  *  001000               x1110000101
9935  *     rt -----
9936  *          rs -----
9937  *               rd -----
9938  */
9939 std::string NMD::MAX_S(uint64 instruction)
9940 {
9941     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9942     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9943     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9944
9945     std::string fd = FPR(copy(fd_value));
9946     std::string fs = FPR(copy(fs_value));
9947     std::string ft = FPR(copy(ft_value));
9948
9949     return img::format("MAX.S %s, %s, %s", fd, fs, ft);
9950 }
9951
9952
9953 /*
9954  *
9955  *
9956  *   3         2         1
9957  *  10987654321098765432109876543210
9958  *  001000               x1110000101
9959  *     rt -----
9960  *          rs -----
9961  *               rd -----
9962  */
9963 std::string NMD::MAXA_D(uint64 instruction)
9964 {
9965     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9966     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9967     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9968
9969     std::string fd = FPR(copy(fd_value));
9970     std::string fs = FPR(copy(fs_value));
9971     std::string ft = FPR(copy(ft_value));
9972
9973     return img::format("MAXA.D %s, %s, %s", fd, fs, ft);
9974 }
9975
9976
9977 /*
9978  *
9979  *
9980  *   3         2         1
9981  *  10987654321098765432109876543210
9982  *  001000               x1110000101
9983  *     rt -----
9984  *          rs -----
9985  *               rd -----
9986  */
9987 std::string NMD::MAXA_S(uint64 instruction)
9988 {
9989     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9990     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9991     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9992
9993     std::string fd = FPR(copy(fd_value));
9994     std::string fs = FPR(copy(fs_value));
9995     std::string ft = FPR(copy(ft_value));
9996
9997     return img::format("MAXA.S %s, %s, %s", fd, fs, ft);
9998 }
9999
10000
10001 /*
10002  *
10003  *
10004  *   3         2         1
10005  *  10987654321098765432109876543210
10006  *  001000               x1110000101
10007  *     rt -----
10008  *          rs -----
10009  *               rd -----
10010  */
10011 std::string NMD::MFC0(uint64 instruction)
10012 {
10013     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10014     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10015     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10016
10017     std::string rt = GPR(copy(rt_value));
10018     std::string c0s = CPR(copy(c0s_value));
10019     std::string sel = IMMEDIATE(copy(sel_value));
10020
10021     return img::format("MFC0 %s, %s, %s", rt, c0s, sel);
10022 }
10023
10024
10025 /*
10026  *
10027  *
10028  *   3         2         1
10029  *  10987654321098765432109876543210
10030  *  001000               x1110000101
10031  *     rt -----
10032  *          rs -----
10033  *               rd -----
10034  */
10035 std::string NMD::MFC1(uint64 instruction)
10036 {
10037     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10038     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10039
10040     std::string rt = GPR(copy(rt_value));
10041     std::string fs = FPR(copy(fs_value));
10042
10043     return img::format("MFC1 %s, %s", rt, fs);
10044 }
10045
10046
10047 /*
10048  *
10049  *
10050  *   3         2         1
10051  *  10987654321098765432109876543210
10052  *  001000               x1110000101
10053  *     rt -----
10054  *          rs -----
10055  *               rd -----
10056  */
10057 std::string NMD::MFC2(uint64 instruction)
10058 {
10059     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10060     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10061
10062     std::string rt = GPR(copy(rt_value));
10063     std::string cs = CPR(copy(cs_value));
10064
10065     return img::format("MFC2 %s, %s", rt, cs);
10066 }
10067
10068
10069 /*
10070  *
10071  *
10072  *   3         2         1
10073  *  10987654321098765432109876543210
10074  *  001000               x1110000101
10075  *     rt -----
10076  *          rs -----
10077  *               rd -----
10078  */
10079 std::string NMD::MFGC0(uint64 instruction)
10080 {
10081     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10082     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10083     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10084
10085     std::string rt = GPR(copy(rt_value));
10086     std::string c0s = CPR(copy(c0s_value));
10087     std::string sel = IMMEDIATE(copy(sel_value));
10088
10089     return img::format("MFGC0 %s, %s, %s", rt, c0s, sel);
10090 }
10091
10092
10093 /*
10094  *
10095  *
10096  *   3         2         1
10097  *  10987654321098765432109876543210
10098  *  001000               x1110000101
10099  *     rt -----
10100  *          rs -----
10101  *               rd -----
10102  */
10103 std::string NMD::MFHC0(uint64 instruction)
10104 {
10105     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10106     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10107     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10108
10109     std::string rt = GPR(copy(rt_value));
10110     std::string c0s = CPR(copy(c0s_value));
10111     std::string sel = IMMEDIATE(copy(sel_value));
10112
10113     return img::format("MFHC0 %s, %s, %s", rt, c0s, sel);
10114 }
10115
10116
10117 /*
10118  *
10119  *
10120  *   3         2         1
10121  *  10987654321098765432109876543210
10122  *  001000               x1110000101
10123  *     rt -----
10124  *          rs -----
10125  *               rd -----
10126  */
10127 std::string NMD::MFHC1(uint64 instruction)
10128 {
10129     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10130     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10131
10132     std::string rt = GPR(copy(rt_value));
10133     std::string fs = FPR(copy(fs_value));
10134
10135     return img::format("MFHC1 %s, %s", rt, fs);
10136 }
10137
10138
10139 /*
10140  *
10141  *
10142  *   3         2         1
10143  *  10987654321098765432109876543210
10144  *  001000               x1110000101
10145  *     rt -----
10146  *          rs -----
10147  *               rd -----
10148  */
10149 std::string NMD::MFHC2(uint64 instruction)
10150 {
10151     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10152     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10153
10154     std::string rt = GPR(copy(rt_value));
10155     std::string cs = CPR(copy(cs_value));
10156
10157     return img::format("MFHC2 %s, %s", rt, cs);
10158 }
10159
10160
10161 /*
10162  *
10163  *
10164  *   3         2         1
10165  *  10987654321098765432109876543210
10166  *  001000               x1110000101
10167  *     rt -----
10168  *          rs -----
10169  *               rd -----
10170  */
10171 std::string NMD::MFHGC0(uint64 instruction)
10172 {
10173     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10174     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10175     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10176
10177     std::string rt = GPR(copy(rt_value));
10178     std::string c0s = CPR(copy(c0s_value));
10179     std::string sel = IMMEDIATE(copy(sel_value));
10180
10181     return img::format("MFHGC0 %s, %s, %s", rt, c0s, sel);
10182 }
10183
10184
10185 /*
10186  *
10187  *
10188  *   3         2         1
10189  *  10987654321098765432109876543210
10190  *  001000               x1110000101
10191  *     rt -----
10192  *          rs -----
10193  *               rd -----
10194  */
10195 std::string NMD::MFHI_DSP_(uint64 instruction)
10196 {
10197     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10198     uint64 ac_value = extract_ac_13_12(instruction);
10199
10200     std::string rt = GPR(copy(rt_value));
10201     std::string ac = AC(copy(ac_value));
10202
10203     return img::format("MFHI %s, %s", rt, ac);
10204 }
10205
10206
10207 /*
10208  *
10209  *
10210  *   3         2         1
10211  *  10987654321098765432109876543210
10212  *  001000               x1110000101
10213  *     rt -----
10214  *          rs -----
10215  *               rd -----
10216  */
10217 std::string NMD::MFHTR(uint64 instruction)
10218 {
10219     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10220     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10221     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10222     uint64 u_value = extract_u_10(instruction);
10223
10224     std::string rt = GPR(copy(rt_value));
10225     std::string c0s = IMMEDIATE(copy(c0s_value));
10226     std::string u = IMMEDIATE(copy(u_value));
10227     std::string sel = IMMEDIATE(copy(sel_value));
10228
10229     return img::format("MFHTR %s, %s, %s, %s", rt, c0s, u, sel);
10230 }
10231
10232
10233 /*
10234  *
10235  *
10236  *   3         2         1
10237  *  10987654321098765432109876543210
10238  *  001000               x1110000101
10239  *     rt -----
10240  *          rs -----
10241  *               rd -----
10242  */
10243 std::string NMD::MFLO_DSP_(uint64 instruction)
10244 {
10245     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10246     uint64 ac_value = extract_ac_13_12(instruction);
10247
10248     std::string rt = GPR(copy(rt_value));
10249     std::string ac = AC(copy(ac_value));
10250
10251     return img::format("MFLO %s, %s", rt, ac);
10252 }
10253
10254
10255 /*
10256  *
10257  *
10258  *   3         2         1
10259  *  10987654321098765432109876543210
10260  *  001000               x1110000101
10261  *     rt -----
10262  *          rs -----
10263  *               rd -----
10264  */
10265 std::string NMD::MFTR(uint64 instruction)
10266 {
10267     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10268     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10269     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10270     uint64 u_value = extract_u_10(instruction);
10271
10272     std::string rt = GPR(copy(rt_value));
10273     std::string c0s = IMMEDIATE(copy(c0s_value));
10274     std::string u = IMMEDIATE(copy(u_value));
10275     std::string sel = IMMEDIATE(copy(sel_value));
10276
10277     return img::format("MFTR %s, %s, %s, %s", rt, c0s, u, sel);
10278 }
10279
10280
10281 /*
10282  *
10283  *
10284  *   3         2         1
10285  *  10987654321098765432109876543210
10286  *  001000               x1110000101
10287  *     rt -----
10288  *          rs -----
10289  *               rd -----
10290  */
10291 std::string NMD::MIN_D(uint64 instruction)
10292 {
10293     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10294     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10295     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10296
10297     std::string fd = FPR(copy(fd_value));
10298     std::string fs = FPR(copy(fs_value));
10299     std::string ft = FPR(copy(ft_value));
10300
10301     return img::format("MIN.D %s, %s, %s", fd, fs, ft);
10302 }
10303
10304
10305 /*
10306  *
10307  *
10308  *   3         2         1
10309  *  10987654321098765432109876543210
10310  *  001000               x1110000101
10311  *     rt -----
10312  *          rs -----
10313  *               rd -----
10314  */
10315 std::string NMD::MIN_S(uint64 instruction)
10316 {
10317     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10318     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10319     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10320
10321     std::string fd = FPR(copy(fd_value));
10322     std::string fs = FPR(copy(fs_value));
10323     std::string ft = FPR(copy(ft_value));
10324
10325     return img::format("MIN.S %s, %s, %s", fd, fs, ft);
10326 }
10327
10328
10329 /*
10330  *
10331  *
10332  *   3         2         1
10333  *  10987654321098765432109876543210
10334  *  001000               x1110000101
10335  *     rt -----
10336  *          rs -----
10337  *               rd -----
10338  */
10339 std::string NMD::MINA_D(uint64 instruction)
10340 {
10341     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10342     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10343     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10344
10345     std::string fd = FPR(copy(fd_value));
10346     std::string fs = FPR(copy(fs_value));
10347     std::string ft = FPR(copy(ft_value));
10348
10349     return img::format("MINA.D %s, %s, %s", fd, fs, ft);
10350 }
10351
10352
10353 /*
10354  *
10355  *
10356  *   3         2         1
10357  *  10987654321098765432109876543210
10358  *  001000               x1110000101
10359  *     rt -----
10360  *          rs -----
10361  *               rd -----
10362  */
10363 std::string NMD::MINA_S(uint64 instruction)
10364 {
10365     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10366     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10367     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10368
10369     std::string fd = FPR(copy(fd_value));
10370     std::string fs = FPR(copy(fs_value));
10371     std::string ft = FPR(copy(ft_value));
10372
10373     return img::format("MINA.S %s, %s, %s", fd, fs, ft);
10374 }
10375
10376
10377 /*
10378  *
10379  *
10380  *   3         2         1
10381  *  10987654321098765432109876543210
10382  *  001000               x1110000101
10383  *     rt -----
10384  *          rs -----
10385  *               rd -----
10386  */
10387 std::string NMD::MOD(uint64 instruction)
10388 {
10389     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10390     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10391     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10392
10393     std::string rd = GPR(copy(rd_value));
10394     std::string rs = GPR(copy(rs_value));
10395     std::string rt = GPR(copy(rt_value));
10396
10397     return img::format("MOD %s, %s, %s", rd, rs, rt);
10398 }
10399
10400
10401 /*
10402  *
10403  *
10404  *   3         2         1
10405  *  10987654321098765432109876543210
10406  *  001000               x1110000101
10407  *     rt -----
10408  *          rs -----
10409  *               rd -----
10410  */
10411 std::string NMD::MODSUB(uint64 instruction)
10412 {
10413     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10414     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10415     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10416
10417     std::string rd = GPR(copy(rd_value));
10418     std::string rs = GPR(copy(rs_value));
10419     std::string rt = GPR(copy(rt_value));
10420
10421     return img::format("MODSUB %s, %s, %s", rd, rs, rt);
10422 }
10423
10424
10425 /*
10426  *
10427  *
10428  *   3         2         1
10429  *  10987654321098765432109876543210
10430  *  001000               x1110000101
10431  *     rt -----
10432  *          rs -----
10433  *               rd -----
10434  */
10435 std::string NMD::MODU(uint64 instruction)
10436 {
10437     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10438     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10439     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10440
10441     std::string rd = GPR(copy(rd_value));
10442     std::string rs = GPR(copy(rs_value));
10443     std::string rt = GPR(copy(rt_value));
10444
10445     return img::format("MODU %s, %s, %s", rd, rs, rt);
10446 }
10447
10448
10449 /*
10450  *
10451  *
10452  *   3         2         1
10453  *  10987654321098765432109876543210
10454  *  001000               x1110000101
10455  *     rt -----
10456  *          rs -----
10457  *               rd -----
10458  */
10459 std::string NMD::MOV_D(uint64 instruction)
10460 {
10461     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10462     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10463
10464     std::string ft = FPR(copy(ft_value));
10465     std::string fs = FPR(copy(fs_value));
10466
10467     return img::format("MOV.D %s, %s", ft, fs);
10468 }
10469
10470
10471 /*
10472  *
10473  *
10474  *   3         2         1
10475  *  10987654321098765432109876543210
10476  *  001000               x1110000101
10477  *     rt -----
10478  *          rs -----
10479  *               rd -----
10480  */
10481 std::string NMD::MOV_S(uint64 instruction)
10482 {
10483     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10484     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10485
10486     std::string ft = FPR(copy(ft_value));
10487     std::string fs = FPR(copy(fs_value));
10488
10489     return img::format("MOV.S %s, %s", ft, fs);
10490 }
10491
10492
10493 /*
10494  *
10495  *
10496  *   3         2         1
10497  *  10987654321098765432109876543210
10498  *  001000               x1110000101
10499  *     rt -----
10500  *          rs -----
10501  *               rd -----
10502  */
10503 std::string NMD::MOVE_BALC(uint64 instruction)
10504 {
10505     uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
10506     uint64 rd1_value = extract_rdl_25_24(instruction);
10507     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
10508
10509     std::string rd1 = GPR(decode_gpr_gpr1(rd1_value));
10510     std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
10511     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
10512
10513     return img::format("MOVE.BALC %s, %s, %s", rd1, rtz4, s);
10514 }
10515
10516
10517 /*
10518  *
10519  *
10520  *   3         2         1
10521  *  10987654321098765432109876543210
10522  *  001000               x1110000101
10523  *     rt -----
10524  *          rs -----
10525  *               rd -----
10526  */
10527 std::string NMD::MOVEP(uint64 instruction)
10528 {
10529     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
10530     uint64 rd2_value = extract_rd2_3_8(instruction);
10531     uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
10532
10533     std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
10534     std::string re2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
10535     /* !!!!!!!!!! - no conversion function */
10536     std::string rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value));
10537     std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
10538
10539     return img::format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4);
10540     /* hand edited */
10541 }
10542
10543
10544 /*
10545  *
10546  *
10547  *   3         2         1
10548  *  10987654321098765432109876543210
10549  *  001000               x1110000101
10550  *     rt -----
10551  *          rs -----
10552  *               rd -----
10553  */
10554 std::string NMD::MOVEP_REV_(uint64 instruction)
10555 {
10556     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10557     uint64 rd2_value = extract_rd2_3_8(instruction);
10558     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10559
10560     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
10561     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
10562     std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
10563     std::string rs2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
10564     /* !!!!!!!!!! - no conversion function */
10565
10566     return img::format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2);
10567     /* hand edited */
10568 }
10569
10570
10571 /*
10572  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10573  *
10574  *   3         2         1
10575  *  10987654321098765432109876543210
10576  *  001000               00010001101
10577  *     rt -----
10578  *          rs -----
10579  *               rd -----
10580  */
10581 std::string NMD::MOVE(uint64 instruction)
10582 {
10583     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
10584     uint64 rs_value = extract_rs_4_3_2_1_0(instruction);
10585
10586     std::string rt = GPR(copy(rt_value));
10587     std::string rs = GPR(copy(rs_value));
10588
10589     return img::format("MOVE %s, %s", rt, rs);
10590 }
10591
10592
10593 /*
10594  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10595  *
10596  *   3         2         1
10597  *  10987654321098765432109876543210
10598  *  001000               00010001101
10599  *     rt -----
10600  *          rs -----
10601  *               rd -----
10602  */
10603 std::string NMD::MOVN(uint64 instruction)
10604 {
10605     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10606     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10607     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10608
10609     std::string rd = GPR(copy(rd_value));
10610     std::string rs = GPR(copy(rs_value));
10611     std::string rt = GPR(copy(rt_value));
10612
10613     return img::format("MOVN %s, %s, %s", rd, rs, rt);
10614 }
10615
10616
10617 /*
10618  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10619  *
10620  *   3         2         1
10621  *  10987654321098765432109876543210
10622  *  001000               00010001101
10623  *     rt -----
10624  *          rs -----
10625  *               rd -----
10626  */
10627 std::string NMD::MOVZ(uint64 instruction)
10628 {
10629     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10630     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10631     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10632
10633     std::string rd = GPR(copy(rd_value));
10634     std::string rs = GPR(copy(rs_value));
10635     std::string rt = GPR(copy(rt_value));
10636
10637     return img::format("MOVZ %s, %s, %s", rd, rs, rt);
10638 }
10639
10640
10641 /*
10642  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10643  *
10644  *   3         2         1
10645  *  10987654321098765432109876543210
10646  *  001000               00010001101
10647  *     rt -----
10648  *          rs -----
10649  *               rd -----
10650  */
10651 std::string NMD::MSUB_DSP_(uint64 instruction)
10652 {
10653     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10654     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10655     uint64 ac_value = extract_ac_13_12(instruction);
10656
10657     std::string ac = AC(copy(ac_value));
10658     std::string rs = GPR(copy(rs_value));
10659     std::string rt = GPR(copy(rt_value));
10660
10661     return img::format("MSUB %s, %s, %s", ac, rs, rt);
10662 }
10663
10664
10665 /*
10666  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10667  *
10668  *   3         2         1
10669  *  10987654321098765432109876543210
10670  *  001000               00010001101
10671  *     rt -----
10672  *          rs -----
10673  *               rd -----
10674  */
10675 std::string NMD::MSUBF_D(uint64 instruction)
10676 {
10677     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10678     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10679     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10680
10681     std::string fd = FPR(copy(fd_value));
10682     std::string fs = FPR(copy(fs_value));
10683     std::string ft = FPR(copy(ft_value));
10684
10685     return img::format("MSUBF.D %s, %s, %s", fd, fs, ft);
10686 }
10687
10688
10689 /*
10690  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10691  *
10692  *   3         2         1
10693  *  10987654321098765432109876543210
10694  *  001000               00010001101
10695  *     rt -----
10696  *          rs -----
10697  *               rd -----
10698  */
10699 std::string NMD::MSUBF_S(uint64 instruction)
10700 {
10701     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10702     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10703     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10704
10705     std::string fd = FPR(copy(fd_value));
10706     std::string fs = FPR(copy(fs_value));
10707     std::string ft = FPR(copy(ft_value));
10708
10709     return img::format("MSUBF.S %s, %s, %s", fd, fs, ft);
10710 }
10711
10712
10713 /*
10714  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10715  *
10716  *   3         2         1
10717  *  10987654321098765432109876543210
10718  *  001000               00010001101
10719  *     rt -----
10720  *          rs -----
10721  *               rd -----
10722  */
10723 std::string NMD::MSUBU_DSP_(uint64 instruction)
10724 {
10725     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10726     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10727     uint64 ac_value = extract_ac_13_12(instruction);
10728
10729     std::string ac = AC(copy(ac_value));
10730     std::string rs = GPR(copy(rs_value));
10731     std::string rt = GPR(copy(rt_value));
10732
10733     return img::format("MSUBU %s, %s, %s", ac, rs, rt);
10734 }
10735
10736
10737 /*
10738  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10739  *
10740  *   3         2         1
10741  *  10987654321098765432109876543210
10742  *  001000               00010001101
10743  *     rt -----
10744  *          rs -----
10745  *               rd -----
10746  */
10747 std::string NMD::MTC0(uint64 instruction)
10748 {
10749     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10750     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10751     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10752
10753     std::string rt = GPR(copy(rt_value));
10754     std::string c0s = CPR(copy(c0s_value));
10755     std::string sel = IMMEDIATE(copy(sel_value));
10756
10757     return img::format("MTC0 %s, %s, %s", rt, c0s, sel);
10758 }
10759
10760
10761 /*
10762  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10763  *
10764  *   3         2         1
10765  *  10987654321098765432109876543210
10766  *  001000               00010001101
10767  *     rt -----
10768  *          rs -----
10769  *               rd -----
10770  */
10771 std::string NMD::MTC1(uint64 instruction)
10772 {
10773     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10774     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10775
10776     std::string rt = GPR(copy(rt_value));
10777     std::string fs = FPR(copy(fs_value));
10778
10779     return img::format("MTC1 %s, %s", rt, fs);
10780 }
10781
10782
10783 /*
10784  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10785  *
10786  *   3         2         1
10787  *  10987654321098765432109876543210
10788  *  001000               00010001101
10789  *     rt -----
10790  *          rs -----
10791  *               rd -----
10792  */
10793 std::string NMD::MTC2(uint64 instruction)
10794 {
10795     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10796     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10797
10798     std::string rt = GPR(copy(rt_value));
10799     std::string cs = CPR(copy(cs_value));
10800
10801     return img::format("MTC2 %s, %s", rt, cs);
10802 }
10803
10804
10805 /*
10806  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10807  *
10808  *   3         2         1
10809  *  10987654321098765432109876543210
10810  *  001000               00010001101
10811  *     rt -----
10812  *          rs -----
10813  *               rd -----
10814  */
10815 std::string NMD::MTGC0(uint64 instruction)
10816 {
10817     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10818     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10819     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10820
10821     std::string rt = GPR(copy(rt_value));
10822     std::string c0s = CPR(copy(c0s_value));
10823     std::string sel = IMMEDIATE(copy(sel_value));
10824
10825     return img::format("MTGC0 %s, %s, %s", rt, c0s, sel);
10826 }
10827
10828
10829 /*
10830  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10831  *
10832  *   3         2         1
10833  *  10987654321098765432109876543210
10834  *  001000               00010001101
10835  *     rt -----
10836  *          rs -----
10837  *               rd -----
10838  */
10839 std::string NMD::MTHC0(uint64 instruction)
10840 {
10841     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10842     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10843     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10844
10845     std::string rt = GPR(copy(rt_value));
10846     std::string c0s = CPR(copy(c0s_value));
10847     std::string sel = IMMEDIATE(copy(sel_value));
10848
10849     return img::format("MTHC0 %s, %s, %s", rt, c0s, sel);
10850 }
10851
10852
10853 /*
10854  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10855  *
10856  *   3         2         1
10857  *  10987654321098765432109876543210
10858  *  001000               00010001101
10859  *     rt -----
10860  *          rs -----
10861  *               rd -----
10862  */
10863 std::string NMD::MTHC1(uint64 instruction)
10864 {
10865     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10866     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10867
10868     std::string rt = GPR(copy(rt_value));
10869     std::string fs = FPR(copy(fs_value));
10870
10871     return img::format("MTHC1 %s, %s", rt, fs);
10872 }
10873
10874
10875 /*
10876  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10877  *
10878  *   3         2         1
10879  *  10987654321098765432109876543210
10880  *  001000               00010001101
10881  *     rt -----
10882  *          rs -----
10883  *               rd -----
10884  */
10885 std::string NMD::MTHC2(uint64 instruction)
10886 {
10887     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10888     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10889
10890     std::string rt = GPR(copy(rt_value));
10891     std::string cs = CPR(copy(cs_value));
10892
10893     return img::format("MTHC2 %s, %s", rt, cs);
10894 }
10895
10896
10897 /*
10898  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10899  *
10900  *   3         2         1
10901  *  10987654321098765432109876543210
10902  *  001000               00010001101
10903  *     rt -----
10904  *          rs -----
10905  *               rd -----
10906  */
10907 std::string NMD::MTHGC0(uint64 instruction)
10908 {
10909     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10910     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10911     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10912
10913     std::string rt = GPR(copy(rt_value));
10914     std::string c0s = CPR(copy(c0s_value));
10915     std::string sel = IMMEDIATE(copy(sel_value));
10916
10917     return img::format("MTHGC0 %s, %s, %s", rt, c0s, sel);
10918 }
10919
10920
10921 /*
10922  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10923  *
10924  *   3         2         1
10925  *  10987654321098765432109876543210
10926  *  001000               00010001101
10927  *     rt -----
10928  *          rs -----
10929  *               rd -----
10930  */
10931 std::string NMD::MTHI_DSP_(uint64 instruction)
10932 {
10933     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10934     uint64 ac_value = extract_ac_13_12(instruction);
10935
10936     std::string rs = GPR(copy(rs_value));
10937     std::string ac = AC(copy(ac_value));
10938
10939     return img::format("MTHI %s, %s", rs, ac);
10940 }
10941
10942
10943 /*
10944  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10945  *
10946  *   3         2         1
10947  *  10987654321098765432109876543210
10948  *  001000               00010001101
10949  *     rt -----
10950  *          rs -----
10951  *               rd -----
10952  */
10953 std::string NMD::MTHLIP(uint64 instruction)
10954 {
10955     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10956     uint64 ac_value = extract_ac_13_12(instruction);
10957
10958     std::string rs = GPR(copy(rs_value));
10959     std::string ac = AC(copy(ac_value));
10960
10961     return img::format("MTHLIP %s, %s", rs, ac);
10962 }
10963
10964
10965 /*
10966  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10967  *
10968  *   3         2         1
10969  *  10987654321098765432109876543210
10970  *  001000               00010001101
10971  *     rt -----
10972  *          rs -----
10973  *               rd -----
10974  */
10975 std::string NMD::MTHTR(uint64 instruction)
10976 {
10977     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10978     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10979     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10980     uint64 u_value = extract_u_10(instruction);
10981
10982     std::string rt = GPR(copy(rt_value));
10983     std::string c0s = IMMEDIATE(copy(c0s_value));
10984     std::string u = IMMEDIATE(copy(u_value));
10985     std::string sel = IMMEDIATE(copy(sel_value));
10986
10987     return img::format("MTHTR %s, %s, %s, %s", rt, c0s, u, sel);
10988 }
10989
10990
10991 /*
10992  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10993  *
10994  *   3         2         1
10995  *  10987654321098765432109876543210
10996  *  001000               00010001101
10997  *     rt -----
10998  *          rs -----
10999  *               rd -----
11000  */
11001 std::string NMD::MTLO_DSP_(uint64 instruction)
11002 {
11003     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11004     uint64 ac_value = extract_ac_13_12(instruction);
11005
11006     std::string rs = GPR(copy(rs_value));
11007     std::string ac = AC(copy(ac_value));
11008
11009     return img::format("MTLO %s, %s", rs, ac);
11010 }
11011
11012
11013 /*
11014  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11015  *
11016  *   3         2         1
11017  *  10987654321098765432109876543210
11018  *  001000               00010001101
11019  *     rt -----
11020  *          rs -----
11021  *               rd -----
11022  */
11023 std::string NMD::MTTR(uint64 instruction)
11024 {
11025     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11026     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
11027     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
11028     uint64 u_value = extract_u_10(instruction);
11029
11030     std::string rt = GPR(copy(rt_value));
11031     std::string c0s = IMMEDIATE(copy(c0s_value));
11032     std::string u = IMMEDIATE(copy(u_value));
11033     std::string sel = IMMEDIATE(copy(sel_value));
11034
11035     return img::format("MTTR %s, %s, %s, %s", rt, c0s, u, sel);
11036 }
11037
11038
11039 /*
11040  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11041  *
11042  *   3         2         1
11043  *  10987654321098765432109876543210
11044  *  001000               00010001101
11045  *     rt -----
11046  *          rs -----
11047  *               rd -----
11048  */
11049 std::string NMD::MUH(uint64 instruction)
11050 {
11051     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11052     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11053     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11054
11055     std::string rd = GPR(copy(rd_value));
11056     std::string rs = GPR(copy(rs_value));
11057     std::string rt = GPR(copy(rt_value));
11058
11059     return img::format("MUH %s, %s, %s", rd, rs, rt);
11060 }
11061
11062
11063 /*
11064  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11065  *
11066  *   3         2         1
11067  *  10987654321098765432109876543210
11068  *  001000               00010001101
11069  *     rt -----
11070  *          rs -----
11071  *               rd -----
11072  */
11073 std::string NMD::MUHU(uint64 instruction)
11074 {
11075     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11076     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11077     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11078
11079     std::string rd = GPR(copy(rd_value));
11080     std::string rs = GPR(copy(rs_value));
11081     std::string rt = GPR(copy(rt_value));
11082
11083     return img::format("MUHU %s, %s, %s", rd, rs, rt);
11084 }
11085
11086
11087 /*
11088  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11089  *
11090  *   3         2         1
11091  *  10987654321098765432109876543210
11092  *  001000               00010001101
11093  *     rt -----
11094  *          rs -----
11095  *               rd -----
11096  */
11097 std::string NMD::MUL_32_(uint64 instruction)
11098 {
11099     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11100     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11101     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11102
11103     std::string rd = GPR(copy(rd_value));
11104     std::string rs = GPR(copy(rs_value));
11105     std::string rt = GPR(copy(rt_value));
11106
11107     return img::format("MUL %s, %s, %s", rd, rs, rt);
11108 }
11109
11110
11111 /*
11112  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11113  *
11114  *   3         2         1
11115  *  10987654321098765432109876543210
11116  *  001000               00010001101
11117  *     rt -----
11118  *          rs -----
11119  *               rd -----
11120  */
11121 std::string NMD::MUL_4X4_(uint64 instruction)
11122 {
11123     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
11124     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
11125
11126     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
11127     std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
11128
11129     return img::format("MUL %s, %s", rs4, rt4);
11130 }
11131
11132
11133 /*
11134  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11135  *
11136  *   3         2         1
11137  *  10987654321098765432109876543210
11138  *  001000               00010001101
11139  *     rt -----
11140  *          rs -----
11141  *               rd -----
11142  */
11143 std::string NMD::MUL_D(uint64 instruction)
11144 {
11145     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11146     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11147     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11148
11149     std::string fd = FPR(copy(fd_value));
11150     std::string fs = FPR(copy(fs_value));
11151     std::string ft = FPR(copy(ft_value));
11152
11153     return img::format("MUL.D %s, %s, %s", fd, fs, ft);
11154 }
11155
11156
11157 /*
11158  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11159  *
11160  *   3         2         1
11161  *  10987654321098765432109876543210
11162  *  001000               00010001101
11163  *     rt -----
11164  *          rs -----
11165  *               rd -----
11166  */
11167 std::string NMD::MUL_PH(uint64 instruction)
11168 {
11169     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11170     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11171     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11172
11173     std::string rd = GPR(copy(rd_value));
11174     std::string rs = GPR(copy(rs_value));
11175     std::string rt = GPR(copy(rt_value));
11176
11177     return img::format("MUL.PH %s, %s, %s", rd, rs, rt);
11178 }
11179
11180
11181 /*
11182  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11183  *
11184  *   3         2         1
11185  *  10987654321098765432109876543210
11186  *  001000               00010001101
11187  *     rt -----
11188  *          rs -----
11189  *               rd -----
11190  */
11191 std::string NMD::MUL_S_PH(uint64 instruction)
11192 {
11193     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11194     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11195     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11196
11197     std::string rd = GPR(copy(rd_value));
11198     std::string rs = GPR(copy(rs_value));
11199     std::string rt = GPR(copy(rt_value));
11200
11201     return img::format("MUL_S.PH %s, %s, %s", rd, rs, rt);
11202 }
11203
11204
11205 /*
11206  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11207  *
11208  *   3         2         1
11209  *  10987654321098765432109876543210
11210  *  001000               00010001101
11211  *     rt -----
11212  *          rs -----
11213  *               rd -----
11214  */
11215 std::string NMD::MUL_S(uint64 instruction)
11216 {
11217     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11218     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11219     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11220
11221     std::string fd = FPR(copy(fd_value));
11222     std::string fs = FPR(copy(fs_value));
11223     std::string ft = FPR(copy(ft_value));
11224
11225     return img::format("MUL.S %s, %s, %s", fd, fs, ft);
11226 }
11227
11228
11229 /*
11230  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11231  *
11232  *   3         2         1
11233  *  10987654321098765432109876543210
11234  *  001000               00010001101
11235  *     rt -----
11236  *          rs -----
11237  *               rd -----
11238  */
11239 std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
11240 {
11241     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11242     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11243     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11244
11245     std::string rd = GPR(copy(rd_value));
11246     std::string rs = GPR(copy(rs_value));
11247     std::string rt = GPR(copy(rt_value));
11248
11249     return img::format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt);
11250 }
11251
11252
11253 /*
11254  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11255  *
11256  *   3         2         1
11257  *  10987654321098765432109876543210
11258  *  001000               00010001101
11259  *     rt -----
11260  *          rs -----
11261  *               rd -----
11262  */
11263 std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
11264 {
11265     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11266     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11267     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11268
11269     std::string rd = GPR(copy(rd_value));
11270     std::string rs = GPR(copy(rs_value));
11271     std::string rt = GPR(copy(rt_value));
11272
11273     return img::format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt);
11274 }
11275
11276
11277 /*
11278  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11279  *
11280  *   3         2         1
11281  *  10987654321098765432109876543210
11282  *  001000               00010001101
11283  *     rt -----
11284  *          rs -----
11285  *               rd -----
11286  */
11287 std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
11288 {
11289     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11290     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11291     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11292
11293     std::string rd = GPR(copy(rd_value));
11294     std::string rs = GPR(copy(rs_value));
11295     std::string rt = GPR(copy(rt_value));
11296
11297     return img::format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt);
11298 }
11299
11300
11301 /*
11302  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11303  *
11304  *   3         2         1
11305  *  10987654321098765432109876543210
11306  *  001000               00010001101
11307  *     rt -----
11308  *          rs -----
11309  *               rd -----
11310  */
11311 std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
11312 {
11313     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11314     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11315     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11316
11317     std::string rd = GPR(copy(rd_value));
11318     std::string rs = GPR(copy(rs_value));
11319     std::string rt = GPR(copy(rt_value));
11320
11321     return img::format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt);
11322 }
11323
11324
11325 /*
11326  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11327  *
11328  *   3         2         1
11329  *  10987654321098765432109876543210
11330  *  001000               00010001101
11331  *     rt -----
11332  *          rs -----
11333  *               rd -----
11334  */
11335 std::string NMD::MULQ_RS_PH(uint64 instruction)
11336 {
11337     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11338     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11339     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11340
11341     std::string rd = GPR(copy(rd_value));
11342     std::string rs = GPR(copy(rs_value));
11343     std::string rt = GPR(copy(rt_value));
11344
11345     return img::format("MULQ_RS.PH %s, %s, %s", rd, rs, rt);
11346 }
11347
11348
11349 /*
11350  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11351  *
11352  *   3         2         1
11353  *  10987654321098765432109876543210
11354  *  001000               00010001101
11355  *     rt -----
11356  *          rs -----
11357  *               rd -----
11358  */
11359 std::string NMD::MULQ_RS_W(uint64 instruction)
11360 {
11361     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11362     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11363     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11364
11365     std::string rd = GPR(copy(rd_value));
11366     std::string rs = GPR(copy(rs_value));
11367     std::string rt = GPR(copy(rt_value));
11368
11369     return img::format("MULQ_RS.W %s, %s, %s", rd, rs, rt);
11370 }
11371
11372
11373 /*
11374  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11375  *
11376  *   3         2         1
11377  *  10987654321098765432109876543210
11378  *  001000               00010001101
11379  *     rt -----
11380  *          rs -----
11381  *               rd -----
11382  */
11383 std::string NMD::MULQ_S_PH(uint64 instruction)
11384 {
11385     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11386     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11387     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11388
11389     std::string rd = GPR(copy(rd_value));
11390     std::string rs = GPR(copy(rs_value));
11391     std::string rt = GPR(copy(rt_value));
11392
11393     return img::format("MULQ_S.PH %s, %s, %s", rd, rs, rt);
11394 }
11395
11396
11397 /*
11398  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11399  *
11400  *   3         2         1
11401  *  10987654321098765432109876543210
11402  *  001000               00010001101
11403  *     rt -----
11404  *          rs -----
11405  *               rd -----
11406  */
11407 std::string NMD::MULQ_S_W(uint64 instruction)
11408 {
11409     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11410     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11411     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11412
11413     std::string rd = GPR(copy(rd_value));
11414     std::string rs = GPR(copy(rs_value));
11415     std::string rt = GPR(copy(rt_value));
11416
11417     return img::format("MULQ_S.W %s, %s, %s", rd, rs, rt);
11418 }
11419
11420
11421 /*
11422  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11423  *
11424  *   3         2         1
11425  *  10987654321098765432109876543210
11426  *  001000               00010001101
11427  *     rt -----
11428  *          rs -----
11429  *               rd -----
11430  */
11431 std::string NMD::MULSA_W_PH(uint64 instruction)
11432 {
11433     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11434     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11435     uint64 ac_value = extract_ac_13_12(instruction);
11436
11437     std::string ac = AC(copy(ac_value));
11438     std::string rs = GPR(copy(rs_value));
11439     std::string rt = GPR(copy(rt_value));
11440
11441     return img::format("MULSA.W.PH %s, %s, %s", ac, rs, rt);
11442 }
11443
11444
11445 /*
11446  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11447  *
11448  *   3         2         1
11449  *  10987654321098765432109876543210
11450  *  001000               00010001101
11451  *     rt -----
11452  *          rs -----
11453  *               rd -----
11454  */
11455 std::string NMD::MULSAQ_S_W_PH(uint64 instruction)
11456 {
11457     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11458     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11459     uint64 ac_value = extract_ac_13_12(instruction);
11460
11461     std::string ac = AC(copy(ac_value));
11462     std::string rs = GPR(copy(rs_value));
11463     std::string rt = GPR(copy(rt_value));
11464
11465     return img::format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt);
11466 }
11467
11468
11469 /*
11470  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11471  *
11472  *   3         2         1
11473  *  10987654321098765432109876543210
11474  *  001000               00010001101
11475  *     rt -----
11476  *          rs -----
11477  *               rd -----
11478  */
11479 std::string NMD::MULT_DSP_(uint64 instruction)
11480 {
11481     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11482     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11483     uint64 ac_value = extract_ac_13_12(instruction);
11484
11485     std::string ac = AC(copy(ac_value));
11486     std::string rs = GPR(copy(rs_value));
11487     std::string rt = GPR(copy(rt_value));
11488
11489     return img::format("MULT %s, %s, %s", ac, rs, rt);
11490 }
11491
11492
11493 /*
11494  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11495  *
11496  *   3         2         1
11497  *  10987654321098765432109876543210
11498  *  001000               00010001101
11499  *     rt -----
11500  *          rs -----
11501  *               rd -----
11502  */
11503 std::string NMD::MULTU_DSP_(uint64 instruction)
11504 {
11505     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11506     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11507     uint64 ac_value = extract_ac_13_12(instruction);
11508
11509     std::string ac = AC(copy(ac_value));
11510     std::string rs = GPR(copy(rs_value));
11511     std::string rt = GPR(copy(rt_value));
11512
11513     return img::format("MULTU %s, %s, %s", ac, rs, rt);
11514 }
11515
11516
11517 /*
11518  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11519  *
11520  *   3         2         1
11521  *  10987654321098765432109876543210
11522  *  001000               00010001101
11523  *     rt -----
11524  *          rs -----
11525  *               rd -----
11526  */
11527 std::string NMD::MULU(uint64 instruction)
11528 {
11529     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11530     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11531     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11532
11533     std::string rd = GPR(copy(rd_value));
11534     std::string rs = GPR(copy(rs_value));
11535     std::string rt = GPR(copy(rt_value));
11536
11537     return img::format("MULU %s, %s, %s", rd, rs, rt);
11538 }
11539
11540
11541 /*
11542  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11543  *
11544  *   3         2         1
11545  *  10987654321098765432109876543210
11546  *  001000               00010001101
11547  *     rt -----
11548  *          rs -----
11549  *               rd -----
11550  */
11551 std::string NMD::NEG_D(uint64 instruction)
11552 {
11553     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11554     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11555
11556     std::string ft = FPR(copy(ft_value));
11557     std::string fs = FPR(copy(fs_value));
11558
11559     return img::format("NEG.D %s, %s", ft, fs);
11560 }
11561
11562
11563 /*
11564  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11565  *
11566  *   3         2         1
11567  *  10987654321098765432109876543210
11568  *  001000               00010001101
11569  *     rt -----
11570  *          rs -----
11571  *               rd -----
11572  */
11573 std::string NMD::NEG_S(uint64 instruction)
11574 {
11575     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11576     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11577
11578     std::string ft = FPR(copy(ft_value));
11579     std::string fs = FPR(copy(fs_value));
11580
11581     return img::format("NEG.S %s, %s", ft, fs);
11582 }
11583
11584
11585 /*
11586  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11587  *
11588  *   3         2         1
11589  *  10987654321098765432109876543210
11590  *  001000               00010001101
11591  *     rt -----
11592  *          rs -----
11593  *               rd -----
11594  */
11595 std::string NMD::NOP_16_(uint64 instruction)
11596 {
11597     (void)instruction;
11598
11599     return "NOP ";
11600 }
11601
11602
11603 /*
11604  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11605  *
11606  *   3         2         1
11607  *  10987654321098765432109876543210
11608  *  001000               00010001101
11609  *     rt -----
11610  *          rs -----
11611  *               rd -----
11612  */
11613 std::string NMD::NOP_32_(uint64 instruction)
11614 {
11615     (void)instruction;
11616
11617     return "NOP ";
11618 }
11619
11620
11621 /*
11622  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11623  *
11624  *   3         2         1
11625  *  10987654321098765432109876543210
11626  *  001000               00010001101
11627  *     rt -----
11628  *          rs -----
11629  *               rd -----
11630  */
11631 std::string NMD::NOR(uint64 instruction)
11632 {
11633     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11634     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11635     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11636
11637     std::string rd = GPR(copy(rd_value));
11638     std::string rs = GPR(copy(rs_value));
11639     std::string rt = GPR(copy(rt_value));
11640
11641     return img::format("NOR %s, %s, %s", rd, rs, rt);
11642 }
11643
11644
11645 /*
11646  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11647  *
11648  *   3         2         1
11649  *  10987654321098765432109876543210
11650  *  001000               00010001101
11651  *     rt -----
11652  *          rs -----
11653  *               rd -----
11654  */
11655 std::string NMD::NOT_16_(uint64 instruction)
11656 {
11657     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11658     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11659
11660     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11661     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11662
11663     return img::format("NOT %s, %s", rt3, rs3);
11664 }
11665
11666
11667 /*
11668  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11669  *
11670  *   3         2         1
11671  *  10987654321098765432109876543210
11672  *  001000               00010001101
11673  *     rt -----
11674  *          rs -----
11675  *               rd -----
11676  */
11677 std::string NMD::OR_16_(uint64 instruction)
11678 {
11679     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11680     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11681
11682     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11683     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11684
11685     return img::format("OR %s, %s", rs3, rt3);
11686 }
11687
11688
11689 /*
11690  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11691  *
11692  *   3         2         1
11693  *  10987654321098765432109876543210
11694  *  001000               00010001101
11695  *     rt -----
11696  *          rs -----
11697  *               rd -----
11698  */
11699 std::string NMD::OR_32_(uint64 instruction)
11700 {
11701     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11702     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11703     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11704
11705     std::string rd = GPR(copy(rd_value));
11706     std::string rs = GPR(copy(rs_value));
11707     std::string rt = GPR(copy(rt_value));
11708
11709     return img::format("OR %s, %s, %s", rd, rs, rt);
11710 }
11711
11712
11713 /*
11714  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11715  *
11716  *   3         2         1
11717  *  10987654321098765432109876543210
11718  *  001000               00010001101
11719  *     rt -----
11720  *          rs -----
11721  *               rd -----
11722  */
11723 std::string NMD::ORI(uint64 instruction)
11724 {
11725     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11726     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11727     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
11728
11729     std::string rt = GPR(copy(rt_value));
11730     std::string rs = GPR(copy(rs_value));
11731     std::string u = IMMEDIATE(copy(u_value));
11732
11733     return img::format("ORI %s, %s, %s", rt, rs, u);
11734 }
11735
11736
11737 /*
11738  * [DSP] PACKRL.PH rd, rs, rt - Pack a word using the right halfword from one
11739  *         source register and left halfword from another source register
11740  *
11741  *   3         2         1
11742  *  10987654321098765432109876543210
11743  *  001000               00010001101
11744  *     rt -----
11745  *          rs -----
11746  *               rd -----
11747  */
11748 std::string NMD::PACKRL_PH(uint64 instruction)
11749 {
11750     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11751     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11752     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11753
11754     std::string rd = GPR(copy(rd_value));
11755     std::string rs = GPR(copy(rs_value));
11756     std::string rt = GPR(copy(rt_value));
11757
11758     return img::format("PACKRL.PH %s, %s, %s", rd, rs, rt);
11759 }
11760
11761
11762 /*
11763  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11764  *
11765  *   3         2         1
11766  *  10987654321098765432109876543210
11767  *  001000               00010001101
11768  *     rt -----
11769  *          rs -----
11770  *               rd -----
11771  */
11772 std::string NMD::PAUSE(uint64 instruction)
11773 {
11774     (void)instruction;
11775
11776     return "PAUSE ";
11777 }
11778
11779
11780 /*
11781  * [DSP] PICK.PH rd, rs, rt - Pick a vector of halfwords based on condition
11782  *         code bits
11783  *
11784  *   3         2         1
11785  *  10987654321098765432109876543210
11786  *  001000               00010001101
11787  *     rt -----
11788  *          rs -----
11789  *               rd -----
11790  */
11791 std::string NMD::PICK_PH(uint64 instruction)
11792 {
11793     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11794     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11795     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11796
11797     std::string rd = GPR(copy(rd_value));
11798     std::string rs = GPR(copy(rs_value));
11799     std::string rt = GPR(copy(rt_value));
11800
11801     return img::format("PICK.PH %s, %s, %s", rd, rs, rt);
11802 }
11803
11804
11805 /*
11806  * [DSP] PICK.QB rd, rs, rt - Pick a vector of byte values based on condition
11807  *         code bits
11808  *
11809  *   3         2         1
11810  *  10987654321098765432109876543210
11811  *  001000               00010001101
11812  *     rt -----
11813  *          rs -----
11814  *               rd -----
11815  */
11816 std::string NMD::PICK_QB(uint64 instruction)
11817 {
11818     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11819     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11820     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11821
11822     std::string rd = GPR(copy(rd_value));
11823     std::string rs = GPR(copy(rs_value));
11824     std::string rt = GPR(copy(rt_value));
11825
11826     return img::format("PICK.QB %s, %s, %s", rd, rs, rt);
11827 }
11828
11829
11830 /*
11831  * [DSP] PRECEQ.W.PHL rt, rs - Expand the precision of the left-most element
11832  *         of a paired halfword
11833  *
11834  *   3         2         1
11835  *  10987654321098765432109876543210
11836  *  001000               00010001101
11837  *     rt -----
11838  *          rs -----
11839  *               rd -----
11840  */
11841 std::string NMD::PRECEQ_W_PHL(uint64 instruction)
11842 {
11843     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11844     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11845
11846     std::string rt = GPR(copy(rt_value));
11847     std::string rs = GPR(copy(rs_value));
11848
11849     return img::format("PRECEQ.W.PHL %s, %s", rt, rs);
11850 }
11851
11852
11853 /*
11854  * [DSP] PRECEQ.W.PHR rt, rs - Expand the precision of the right-most element
11855  *         of a paired halfword
11856  *
11857  *   3         2         1
11858  *  10987654321098765432109876543210
11859  *  001000               00010001101
11860  *     rt -----
11861  *          rs -----
11862  *               rd -----
11863  */
11864 std::string NMD::PRECEQ_W_PHR(uint64 instruction)
11865 {
11866     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11867     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11868
11869     std::string rt = GPR(copy(rt_value));
11870     std::string rs = GPR(copy(rs_value));
11871
11872     return img::format("PRECEQ.W.PHR %s, %s", rt, rs);
11873 }
11874
11875
11876 /*
11877  * [DSP] PRECEQU.PH.QBLA rt, rs - Expand the precision of the two
11878  *         left-alternate elements of a quad byte vector
11879  *
11880  *   3         2         1
11881  *  10987654321098765432109876543210
11882  *  001000               00010001101
11883  *     rt -----
11884  *          rs -----
11885  *               rd -----
11886  */
11887 std::string NMD::PRECEQU_PH_QBLA(uint64 instruction)
11888 {
11889     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11890     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11891
11892     std::string rt = GPR(copy(rt_value));
11893     std::string rs = GPR(copy(rs_value));
11894
11895     return img::format("PRECEQU.PH.QBLA %s, %s", rt, rs);
11896 }
11897
11898
11899 /*
11900  * [DSP] PRECEQU.PH.QBL rt, rs - Expand the precision of the two left-most
11901  *         elements of a quad byte vector
11902  *
11903  *   3         2         1
11904  *  10987654321098765432109876543210
11905  *  001000               00010001101
11906  *     rt -----
11907  *          rs -----
11908  *               rd -----
11909  */
11910 std::string NMD::PRECEQU_PH_QBL(uint64 instruction)
11911 {
11912     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11913     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11914
11915     std::string rt = GPR(copy(rt_value));
11916     std::string rs = GPR(copy(rs_value));
11917
11918     return img::format("PRECEQU.PH.QBL %s, %s", rt, rs);
11919 }
11920
11921
11922 /*
11923  * [DSP] PRECEQU.PH.QBRA rt, rs - Expand the precision of the two
11924  *         right-alternate elements of a quad byte vector
11925  *
11926  *   3         2         1
11927  *  10987654321098765432109876543210
11928  *  001000               00010001101
11929  *     rt -----
11930  *          rs -----
11931  *               rd -----
11932  */
11933 std::string NMD::PRECEQU_PH_QBRA(uint64 instruction)
11934 {
11935     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11936     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11937
11938     std::string rt = GPR(copy(rt_value));
11939     std::string rs = GPR(copy(rs_value));
11940
11941     return img::format("PRECEQU.PH.QBRA %s, %s", rt, rs);
11942 }
11943
11944
11945 /*
11946  * [DSP] PRECEQU.PH.QBR rt, rs - Expand the precision of the two right-most
11947  *         elements of a quad byte vector
11948  *
11949  *   3         2         1
11950  *  10987654321098765432109876543210
11951  *  001000               00010001101
11952  *     rt -----
11953  *          rs -----
11954  *               rd -----
11955  */
11956 std::string NMD::PRECEQU_PH_QBR(uint64 instruction)
11957 {
11958     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11959     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11960
11961     std::string rt = GPR(copy(rt_value));
11962     std::string rs = GPR(copy(rs_value));
11963
11964     return img::format("PRECEQU.PH.QBR %s, %s", rt, rs);
11965 }
11966
11967
11968 /*
11969  * [DSP] PRECEU.PH.QBLA rt, rs - Expand the precision of the two
11970  *         left-alternate elements of a quad byte vector to four unsigned
11971  *         halfwords
11972  *
11973  *   3         2         1
11974  *  10987654321098765432109876543210
11975  *  001000               00010001101
11976  *     rt -----
11977  *          rs -----
11978  *               rd -----
11979  */
11980 std::string NMD::PRECEU_PH_QBLA(uint64 instruction)
11981 {
11982     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11983     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11984
11985     std::string rt = GPR(copy(rt_value));
11986     std::string rs = GPR(copy(rs_value));
11987
11988     return img::format("PRECEU.PH.QBLA %s, %s", rt, rs);
11989 }
11990
11991
11992 /*
11993  * [DSP] PRECEU.PH.QBL rt, rs - Expand the precision of the two left-most
11994  *         elements of a quad byte vector to form unsigned halfwords
11995  *
11996  *   3         2         1
11997  *  10987654321098765432109876543210
11998  *  001000               00010001101
11999  *     rt -----
12000  *          rs -----
12001  *               rd -----
12002  */
12003 std::string NMD::PRECEU_PH_QBL(uint64 instruction)
12004 {
12005     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12006     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12007
12008     std::string rt = GPR(copy(rt_value));
12009     std::string rs = GPR(copy(rs_value));
12010
12011     return img::format("PRECEU.PH.QBL %s, %s", rt, rs);
12012 }
12013
12014
12015 /*
12016  * [DSP] PRECEU.PH.QBRA rt, rs - Expand the precision of the two
12017  *         right-alternate elements of a quad byte vector to form four
12018  *         unsigned halfwords
12019  *
12020  *   3         2         1
12021  *  10987654321098765432109876543210
12022  *  001000               00010001101
12023  *     rt -----
12024  *          rs -----
12025  *               rd -----
12026  */
12027 std::string NMD::PRECEU_PH_QBRA(uint64 instruction)
12028 {
12029     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12030     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12031
12032     std::string rt = GPR(copy(rt_value));
12033     std::string rs = GPR(copy(rs_value));
12034
12035     return img::format("PRECEU.PH.QBRA %s, %s", rt, rs);
12036 }
12037
12038
12039 /*
12040  * [DSP] PRECEU.PH.QBR rt, rs - Expand the precision of the two right-most
12041  *         elements of a quad byte vector to form unsigned halfwords
12042  *
12043  *   3         2         1
12044  *  10987654321098765432109876543210
12045  *  001000               00010001101
12046  *     rt -----
12047  *          rs -----
12048  *               rd -----
12049  */
12050 std::string NMD::PRECEU_PH_QBR(uint64 instruction)
12051 {
12052     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12053     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12054
12055     std::string rt = GPR(copy(rt_value));
12056     std::string rs = GPR(copy(rs_value));
12057
12058     return img::format("PRECEU.PH.QBR %s, %s", rt, rs);
12059 }
12060
12061
12062 /*
12063  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
12064  *
12065  *   3         2         1
12066  *  10987654321098765432109876543210
12067  *  001000               00010001101
12068  *     rt -----
12069  *          rs -----
12070  *               rd -----
12071  */
12072 std::string NMD::PRECR_QB_PH(uint64 instruction)
12073 {
12074     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12075     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12076     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12077
12078     std::string rd = GPR(copy(rd_value));
12079     std::string rs = GPR(copy(rs_value));
12080     std::string rt = GPR(copy(rt_value));
12081
12082     return img::format("PRECR.QB.PH %s, %s, %s", rd, rs, rt);
12083 }
12084
12085
12086 /*
12087  *
12088  *
12089  *   3         2         1
12090  *  10987654321098765432109876543210
12091  *  001000               x1110000101
12092  *     rt -----
12093  *          rs -----
12094  *               rd -----
12095  */
12096 std::string NMD::PRECR_SRA_PH_W(uint64 instruction)
12097 {
12098     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12099     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12100     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12101
12102     std::string rt = GPR(copy(rt_value));
12103     std::string rs = GPR(copy(rs_value));
12104     std::string sa = IMMEDIATE(copy(sa_value));
12105
12106     return img::format("PRECR_SRA.PH.W %s, %s, %s", rt, rs, sa);
12107 }
12108
12109
12110 /*
12111  *
12112  *
12113  *   3         2         1
12114  *  10987654321098765432109876543210
12115  *  001000               x1110000101
12116  *     rt -----
12117  *          rs -----
12118  *               rd -----
12119  */
12120 std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
12121 {
12122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12123     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12124     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12125
12126     std::string rt = GPR(copy(rt_value));
12127     std::string rs = GPR(copy(rs_value));
12128     std::string sa = IMMEDIATE(copy(sa_value));
12129
12130     return img::format("PRECR_SRA_R.PH.W %s, %s, %s", rt, rs, sa);
12131 }
12132
12133
12134 /*
12135  *
12136  *
12137  *   3         2         1
12138  *  10987654321098765432109876543210
12139  *  001000               x1110000101
12140  *     rt -----
12141  *          rs -----
12142  *               rd -----
12143  */
12144 std::string NMD::PRECRQ_PH_W(uint64 instruction)
12145 {
12146     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12147     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12148     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12149
12150     std::string rd = GPR(copy(rd_value));
12151     std::string rs = GPR(copy(rs_value));
12152     std::string rt = GPR(copy(rt_value));
12153
12154     return img::format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt);
12155 }
12156
12157
12158 /*
12159  *
12160  *
12161  *   3         2         1
12162  *  10987654321098765432109876543210
12163  *  001000               x1110000101
12164  *     rt -----
12165  *          rs -----
12166  *               rd -----
12167  */
12168 std::string NMD::PRECRQ_QB_PH(uint64 instruction)
12169 {
12170     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12171     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12172     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12173
12174     std::string rd = GPR(copy(rd_value));
12175     std::string rs = GPR(copy(rs_value));
12176     std::string rt = GPR(copy(rt_value));
12177
12178     return img::format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt);
12179 }
12180
12181
12182 /*
12183  *
12184  *
12185  *   3         2         1
12186  *  10987654321098765432109876543210
12187  *  001000               x1110000101
12188  *     rt -----
12189  *          rs -----
12190  *               rd -----
12191  */
12192 std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
12193 {
12194     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12195     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12196     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12197
12198     std::string rd = GPR(copy(rd_value));
12199     std::string rs = GPR(copy(rs_value));
12200     std::string rt = GPR(copy(rt_value));
12201
12202     return img::format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt);
12203 }
12204
12205
12206 /*
12207  *
12208  *
12209  *   3         2         1
12210  *  10987654321098765432109876543210
12211  *  001000               x1110000101
12212  *     rt -----
12213  *          rs -----
12214  *               rd -----
12215  */
12216 std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
12217 {
12218     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12219     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12220     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12221
12222     std::string rd = GPR(copy(rd_value));
12223     std::string rs = GPR(copy(rs_value));
12224     std::string rt = GPR(copy(rt_value));
12225
12226     return img::format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt);
12227 }
12228
12229
12230 /*
12231  *
12232  *
12233  *   3         2         1
12234  *  10987654321098765432109876543210
12235  *  001000               x1110000101
12236  *     rt -----
12237  *          rs -----
12238  *               rd -----
12239  */
12240 std::string NMD::PREF_S9_(uint64 instruction)
12241 {
12242     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12243     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12244     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12245
12246     std::string hint = IMMEDIATE(copy(hint_value));
12247     std::string s = IMMEDIATE(copy(s_value));
12248     std::string rs = GPR(copy(rs_value));
12249
12250     return img::format("PREF %s, %s(%s)", hint, s, rs);
12251 }
12252
12253
12254 /*
12255  *
12256  *
12257  *   3         2         1
12258  *  10987654321098765432109876543210
12259  *  001000               x1110000101
12260  *     rt -----
12261  *          rs -----
12262  *               rd -----
12263  */
12264 std::string NMD::PREF_U12_(uint64 instruction)
12265 {
12266     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12267     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12268     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12269
12270     std::string hint = IMMEDIATE(copy(hint_value));
12271     std::string u = IMMEDIATE(copy(u_value));
12272     std::string rs = GPR(copy(rs_value));
12273
12274     return img::format("PREF %s, %s(%s)", hint, u, rs);
12275 }
12276
12277
12278 /*
12279  *
12280  *
12281  *   3         2         1
12282  *  10987654321098765432109876543210
12283  *  001000               x1110000101
12284  *     rt -----
12285  *          rs -----
12286  *               rd -----
12287  */
12288 std::string NMD::PREFE(uint64 instruction)
12289 {
12290     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12291     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12292     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12293
12294     std::string hint = IMMEDIATE(copy(hint_value));
12295     std::string s = IMMEDIATE(copy(s_value));
12296     std::string rs = GPR(copy(rs_value));
12297
12298     return img::format("PREFE %s, %s(%s)", hint, s, rs);
12299 }
12300
12301
12302 /*
12303  *
12304  *
12305  *   3         2         1
12306  *  10987654321098765432109876543210
12307  *  001000               x1110000101
12308  *     rt -----
12309  *          rs -----
12310  *               rd -----
12311  */
12312 std::string NMD::PREPEND(uint64 instruction)
12313 {
12314     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12315     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12316     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12317
12318     std::string rt = GPR(copy(rt_value));
12319     std::string rs = GPR(copy(rs_value));
12320     std::string sa = IMMEDIATE(copy(sa_value));
12321
12322     return img::format("PREPEND %s, %s, %s", rt, rs, sa);
12323 }
12324
12325
12326 /*
12327  *
12328  *
12329  *   3         2         1
12330  *  10987654321098765432109876543210
12331  *  001000               x1110000101
12332  *     rt -----
12333  *          rs -----
12334  *               rd -----
12335  */
12336 std::string NMD::RADDU_W_QB(uint64 instruction)
12337 {
12338     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12339     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12340
12341     std::string rt = GPR(copy(rt_value));
12342     std::string rs = GPR(copy(rs_value));
12343
12344     return img::format("RADDU.W.QB %s, %s", rt, rs);
12345 }
12346
12347
12348 /*
12349  *
12350  *
12351  *   3         2         1
12352  *  10987654321098765432109876543210
12353  *  001000               x1110000101
12354  *     rt -----
12355  *          rs -----
12356  *               rd -----
12357  */
12358 std::string NMD::RDDSP(uint64 instruction)
12359 {
12360     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12361     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
12362
12363     std::string rt = GPR(copy(rt_value));
12364     std::string mask = IMMEDIATE(copy(mask_value));
12365
12366     return img::format("RDDSP %s, %s", rt, mask);
12367 }
12368
12369
12370 /*
12371  *
12372  *
12373  *   3         2         1
12374  *  10987654321098765432109876543210
12375  *  001000               x1110000101
12376  *     rt -----
12377  *          rs -----
12378  *               rd -----
12379  */
12380 std::string NMD::RDHWR(uint64 instruction)
12381 {
12382     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12383     uint64 hs_value = extract_hs_20_19_18_17_16(instruction);
12384     uint64 sel_value = extract_sel_13_12_11(instruction);
12385
12386     std::string rt = GPR(copy(rt_value));
12387     std::string hs = CPR(copy(hs_value));
12388     std::string sel = IMMEDIATE(copy(sel_value));
12389
12390     return img::format("RDHWR %s, %s, %s", rt, hs, sel);
12391 }
12392
12393
12394 /*
12395  *
12396  *
12397  *   3         2         1
12398  *  10987654321098765432109876543210
12399  *  001000               x1110000101
12400  *     rt -----
12401  *          rs -----
12402  *               rd -----
12403  */
12404 std::string NMD::RDPGPR(uint64 instruction)
12405 {
12406     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12407     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12408
12409     std::string rt = GPR(copy(rt_value));
12410     std::string rs = GPR(copy(rs_value));
12411
12412     return img::format("RDPGPR %s, %s", rt, rs);
12413 }
12414
12415
12416 /*
12417  *
12418  *
12419  *   3         2         1
12420  *  10987654321098765432109876543210
12421  *  001000               x1110000101
12422  *     rt -----
12423  *          rs -----
12424  *               rd -----
12425  */
12426 std::string NMD::RECIP_D(uint64 instruction)
12427 {
12428     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12429     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12430
12431     std::string ft = FPR(copy(ft_value));
12432     std::string fs = FPR(copy(fs_value));
12433
12434     return img::format("RECIP.D %s, %s", ft, fs);
12435 }
12436
12437
12438 /*
12439  *
12440  *
12441  *   3         2         1
12442  *  10987654321098765432109876543210
12443  *  001000               x1110000101
12444  *     rt -----
12445  *          rs -----
12446  *               rd -----
12447  */
12448 std::string NMD::RECIP_S(uint64 instruction)
12449 {
12450     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12451     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12452
12453     std::string ft = FPR(copy(ft_value));
12454     std::string fs = FPR(copy(fs_value));
12455
12456     return img::format("RECIP.S %s, %s", ft, fs);
12457 }
12458
12459
12460 /*
12461  *
12462  *
12463  *   3         2         1
12464  *  10987654321098765432109876543210
12465  *  001000               x1110000101
12466  *     rt -----
12467  *          rs -----
12468  *               rd -----
12469  */
12470 std::string NMD::REPL_PH(uint64 instruction)
12471 {
12472     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12473     int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction);
12474
12475     std::string rt = GPR(copy(rt_value));
12476     std::string s = IMMEDIATE(copy(s_value));
12477
12478     return img::format("REPL.PH %s, %s", rt, s);
12479 }
12480
12481
12482 /*
12483  *
12484  *
12485  *   3         2         1
12486  *  10987654321098765432109876543210
12487  *  001000               x1110000101
12488  *     rt -----
12489  *          rs -----
12490  *               rd -----
12491  */
12492 std::string NMD::REPL_QB(uint64 instruction)
12493 {
12494     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12495     uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction);
12496
12497     std::string rt = GPR(copy(rt_value));
12498     std::string u = IMMEDIATE(copy(u_value));
12499
12500     return img::format("REPL.QB %s, %s", rt, u);
12501 }
12502
12503
12504 /*
12505  *
12506  *
12507  *   3         2         1
12508  *  10987654321098765432109876543210
12509  *  001000               x1110000101
12510  *     rt -----
12511  *          rs -----
12512  *               rd -----
12513  */
12514 std::string NMD::REPLV_PH(uint64 instruction)
12515 {
12516     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12517     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12518
12519     std::string rt = GPR(copy(rt_value));
12520     std::string rs = GPR(copy(rs_value));
12521
12522     return img::format("REPLV.PH %s, %s", rt, rs);
12523 }
12524
12525
12526 /*
12527  *
12528  *
12529  *   3         2         1
12530  *  10987654321098765432109876543210
12531  *  001000               x1110000101
12532  *     rt -----
12533  *          rs -----
12534  *               rd -----
12535  */
12536 std::string NMD::REPLV_QB(uint64 instruction)
12537 {
12538     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12539     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12540
12541     std::string rt = GPR(copy(rt_value));
12542     std::string rs = GPR(copy(rs_value));
12543
12544     return img::format("REPLV.QB %s, %s", rt, rs);
12545 }
12546
12547
12548 /*
12549  *
12550  *
12551  *   3         2         1
12552  *  10987654321098765432109876543210
12553  *  001000               x1110000101
12554  *     rt -----
12555  *          rs -----
12556  *               rd -----
12557  */
12558 std::string NMD::RESTORE_32_(uint64 instruction)
12559 {
12560     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12561     uint64 count_value = extract_count_19_18_17_16(instruction);
12562     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12563     uint64 gp_value = extract_gp_2(instruction);
12564
12565     std::string u = IMMEDIATE(copy(u_value));
12566     return img::format("RESTORE %s%s", u,
12567                save_restore_list(rt_value, count_value, gp_value));
12568 }
12569
12570
12571 /*
12572  *
12573  *
12574  *   3         2         1
12575  *  10987654321098765432109876543210
12576  *  001000               x1110000101
12577  *     rt -----
12578  *          rs -----
12579  *               rd -----
12580  */
12581 std::string NMD::RESTORE_JRC_16_(uint64 instruction)
12582 {
12583     uint64 rt1_value = extract_rtl_11(instruction);
12584     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12585     uint64 count_value = extract_count_3_2_1_0(instruction);
12586
12587     std::string u = IMMEDIATE(copy(u_value));
12588     return img::format("RESTORE.JRC %s%s", u,
12589         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12590 }
12591
12592
12593 /*
12594  *
12595  *
12596  *   3         2         1
12597  *  10987654321098765432109876543210
12598  *  001000               x1110000101
12599  *     rt -----
12600  *          rs -----
12601  *               rd -----
12602  */
12603 std::string NMD::RESTORE_JRC_32_(uint64 instruction)
12604 {
12605     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12606     uint64 count_value = extract_count_19_18_17_16(instruction);
12607     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12608     uint64 gp_value = extract_gp_2(instruction);
12609
12610     std::string u = IMMEDIATE(copy(u_value));
12611     return img::format("RESTORE.JRC %s%s", u,
12612                save_restore_list(rt_value, count_value, gp_value));
12613 }
12614
12615
12616 /*
12617  *
12618  *
12619  *   3         2         1
12620  *  10987654321098765432109876543210
12621  *  001000               x1110000101
12622  *     rt -----
12623  *          rs -----
12624  *               rd -----
12625  */
12626 std::string NMD::RESTOREF(uint64 instruction)
12627 {
12628     uint64 count_value = extract_count_19_18_17_16(instruction);
12629     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12630
12631     std::string u = IMMEDIATE(copy(u_value));
12632     std::string count = IMMEDIATE(copy(count_value));
12633
12634     return img::format("RESTOREF %s, %s", u, count);
12635 }
12636
12637
12638 /*
12639  *
12640  *
12641  *   3         2         1
12642  *  10987654321098765432109876543210
12643  *  001000               x1110000101
12644  *     rt -----
12645  *          rs -----
12646  *               rd -----
12647  */
12648 std::string NMD::RINT_D(uint64 instruction)
12649 {
12650     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12651     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12652
12653     std::string ft = FPR(copy(ft_value));
12654     std::string fs = FPR(copy(fs_value));
12655
12656     return img::format("RINT.D %s, %s", ft, fs);
12657 }
12658
12659
12660 /*
12661  *
12662  *
12663  *   3         2         1
12664  *  10987654321098765432109876543210
12665  *  001000               x1110000101
12666  *     rt -----
12667  *          rs -----
12668  *               rd -----
12669  */
12670 std::string NMD::RINT_S(uint64 instruction)
12671 {
12672     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12673     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12674
12675     std::string ft = FPR(copy(ft_value));
12676     std::string fs = FPR(copy(fs_value));
12677
12678     return img::format("RINT.S %s, %s", ft, fs);
12679 }
12680
12681
12682 /*
12683  *
12684  *
12685  *   3         2         1
12686  *  10987654321098765432109876543210
12687  *  001000               x1110000101
12688  *     rt -----
12689  *          rs -----
12690  *               rd -----
12691  */
12692 std::string NMD::ROTR(uint64 instruction)
12693 {
12694     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12695     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12696     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12697
12698     std::string rt = GPR(copy(rt_value));
12699     std::string rs = GPR(copy(rs_value));
12700     std::string shift = IMMEDIATE(copy(shift_value));
12701
12702     return img::format("ROTR %s, %s, %s", rt, rs, shift);
12703 }
12704
12705
12706 /*
12707  *
12708  *
12709  *   3         2         1
12710  *  10987654321098765432109876543210
12711  *  001000               x1110000101
12712  *     rt -----
12713  *          rs -----
12714  *               rd -----
12715  */
12716 std::string NMD::ROTRV(uint64 instruction)
12717 {
12718     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12719     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12720     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12721
12722     std::string rd = GPR(copy(rd_value));
12723     std::string rs = GPR(copy(rs_value));
12724     std::string rt = GPR(copy(rt_value));
12725
12726     return img::format("ROTRV %s, %s, %s", rd, rs, rt);
12727 }
12728
12729
12730 /*
12731  *
12732  *
12733  *   3         2         1
12734  *  10987654321098765432109876543210
12735  *  001000               x1110000101
12736  *     rt -----
12737  *          rs -----
12738  *               rd -----
12739  */
12740 std::string NMD::ROTX(uint64 instruction)
12741 {
12742     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12743     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12744     uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction);
12745     uint64 stripe_value = extract_stripe_6(instruction);
12746     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12747
12748     std::string rt = GPR(copy(rt_value));
12749     std::string rs = GPR(copy(rs_value));
12750     std::string shift = IMMEDIATE(copy(shift_value));
12751     std::string shiftx = IMMEDIATE(copy(shiftx_value));
12752     std::string stripe = IMMEDIATE(copy(stripe_value));
12753
12754     return img::format("ROTX %s, %s, %s, %s, %s",
12755                        rt, rs, shift, shiftx, stripe);
12756 }
12757
12758
12759 /*
12760  *
12761  *
12762  *   3         2         1
12763  *  10987654321098765432109876543210
12764  *  001000               x1110000101
12765  *     rt -----
12766  *          rs -----
12767  *               rd -----
12768  */
12769 std::string NMD::ROUND_L_D(uint64 instruction)
12770 {
12771     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12772     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12773
12774     std::string ft = FPR(copy(ft_value));
12775     std::string fs = FPR(copy(fs_value));
12776
12777     return img::format("ROUND.L.D %s, %s", ft, fs);
12778 }
12779
12780
12781 /*
12782  *
12783  *
12784  *   3         2         1
12785  *  10987654321098765432109876543210
12786  *  001000               x1110000101
12787  *     rt -----
12788  *          rs -----
12789  *               rd -----
12790  */
12791 std::string NMD::ROUND_L_S(uint64 instruction)
12792 {
12793     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12794     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12795
12796     std::string ft = FPR(copy(ft_value));
12797     std::string fs = FPR(copy(fs_value));
12798
12799     return img::format("ROUND.L.S %s, %s", ft, fs);
12800 }
12801
12802
12803 /*
12804  *
12805  *
12806  *   3         2         1
12807  *  10987654321098765432109876543210
12808  *  001000               x1110000101
12809  *     rt -----
12810  *          rs -----
12811  *               rd -----
12812  */
12813 std::string NMD::ROUND_W_D(uint64 instruction)
12814 {
12815     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12816     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12817
12818     std::string ft = FPR(copy(ft_value));
12819     std::string fs = FPR(copy(fs_value));
12820
12821     return img::format("ROUND.W.D %s, %s", ft, fs);
12822 }
12823
12824
12825 /*
12826  *
12827  *
12828  *   3         2         1
12829  *  10987654321098765432109876543210
12830  *  001000               x1110000101
12831  *     rt -----
12832  *          rs -----
12833  *               rd -----
12834  */
12835 std::string NMD::ROUND_W_S(uint64 instruction)
12836 {
12837     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12838     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12839
12840     std::string ft = FPR(copy(ft_value));
12841     std::string fs = FPR(copy(fs_value));
12842
12843     return img::format("ROUND.W.S %s, %s", ft, fs);
12844 }
12845
12846
12847 /*
12848  *
12849  *
12850  *   3         2         1
12851  *  10987654321098765432109876543210
12852  *  001000               x1110000101
12853  *     rt -----
12854  *          rs -----
12855  *               rd -----
12856  */
12857 std::string NMD::RSQRT_D(uint64 instruction)
12858 {
12859     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12860     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12861
12862     std::string ft = FPR(copy(ft_value));
12863     std::string fs = FPR(copy(fs_value));
12864
12865     return img::format("RSQRT.D %s, %s", ft, fs);
12866 }
12867
12868
12869 /*
12870  *
12871  *
12872  *   3         2         1
12873  *  10987654321098765432109876543210
12874  *  001000               x1110000101
12875  *     rt -----
12876  *          rs -----
12877  *               rd -----
12878  */
12879 std::string NMD::RSQRT_S(uint64 instruction)
12880 {
12881     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12882     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12883
12884     std::string ft = FPR(copy(ft_value));
12885     std::string fs = FPR(copy(fs_value));
12886
12887     return img::format("RSQRT.S %s, %s", ft, fs);
12888 }
12889
12890
12891 /*
12892  *
12893  *
12894  *   3         2         1
12895  *  10987654321098765432109876543210
12896  *  001000               01001001101
12897  *     rt -----
12898  *          rs -----
12899  *               rd -----
12900  */
12901 std::string NMD::SAVE_16_(uint64 instruction)
12902 {
12903     uint64 rt1_value = extract_rtl_11(instruction);
12904     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12905     uint64 count_value = extract_count_3_2_1_0(instruction);
12906
12907     std::string u = IMMEDIATE(copy(u_value));
12908     return img::format("SAVE %s%s", u,
12909         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12910 }
12911
12912
12913 /*
12914  *
12915  *
12916  *   3         2         1
12917  *  10987654321098765432109876543210
12918  *  001000               01001001101
12919  *     rt -----
12920  *          rs -----
12921  *               rd -----
12922  */
12923 std::string NMD::SAVE_32_(uint64 instruction)
12924 {
12925     uint64 count_value = extract_count_19_18_17_16(instruction);
12926     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12927     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12928     uint64 gp_value = extract_gp_2(instruction);
12929
12930     std::string u = IMMEDIATE(copy(u_value));
12931     return img::format("SAVE %s%s", u,
12932                save_restore_list(rt_value, count_value, gp_value));
12933 }
12934
12935
12936 /*
12937  *
12938  *
12939  *   3         2         1
12940  *  10987654321098765432109876543210
12941  *  001000               01001001101
12942  *     rt -----
12943  *          rs -----
12944  *               rd -----
12945  */
12946 std::string NMD::SAVEF(uint64 instruction)
12947 {
12948     uint64 count_value = extract_count_19_18_17_16(instruction);
12949     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12950
12951     std::string u = IMMEDIATE(copy(u_value));
12952     std::string count = IMMEDIATE(copy(count_value));
12953
12954     return img::format("SAVEF %s, %s", u, count);
12955 }
12956
12957
12958 /*
12959  *
12960  *
12961  *   3         2         1
12962  *  10987654321098765432109876543210
12963  *  001000               01001001101
12964  *     rt -----
12965  *          rs -----
12966  *               rd -----
12967  */
12968 std::string NMD::SB_16_(uint64 instruction)
12969 {
12970     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
12971     uint64 rs3_value = extract_rs3_6_5_4(instruction);
12972     uint64 u_value = extract_u_1_0(instruction);
12973
12974     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
12975     std::string u = IMMEDIATE(copy(u_value));
12976     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
12977
12978     return img::format("SB %s, %s(%s)", rtz3, u, rs3);
12979 }
12980
12981
12982 /*
12983  *
12984  *
12985  *   3         2         1
12986  *  10987654321098765432109876543210
12987  *  001000               01001001101
12988  *     rt -----
12989  *          rs -----
12990  *               rd -----
12991  */
12992 std::string NMD::SB_GP_(uint64 instruction)
12993 {
12994     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12995     uint64 u_value = extract_u_17_to_0(instruction);
12996
12997     std::string rt = GPR(copy(rt_value));
12998     std::string u = IMMEDIATE(copy(u_value));
12999
13000     return img::format("SB %s, %s($%d)", rt, u, 28);
13001 }
13002
13003
13004 /*
13005  *
13006  *
13007  *   3         2         1
13008  *  10987654321098765432109876543210
13009  *  001000               01001001101
13010  *     rt -----
13011  *          rs -----
13012  *               rd -----
13013  */
13014 std::string NMD::SB_S9_(uint64 instruction)
13015 {
13016     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13017     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13018     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13019
13020     std::string rt = GPR(copy(rt_value));
13021     std::string s = IMMEDIATE(copy(s_value));
13022     std::string rs = GPR(copy(rs_value));
13023
13024     return img::format("SB %s, %s(%s)", rt, s, rs);
13025 }
13026
13027
13028 /*
13029  *
13030  *
13031  *   3         2         1
13032  *  10987654321098765432109876543210
13033  *  001000               01001001101
13034  *     rt -----
13035  *          rs -----
13036  *               rd -----
13037  */
13038 std::string NMD::SB_U12_(uint64 instruction)
13039 {
13040     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13041     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13042     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13043
13044     std::string rt = GPR(copy(rt_value));
13045     std::string u = IMMEDIATE(copy(u_value));
13046     std::string rs = GPR(copy(rs_value));
13047
13048     return img::format("SB %s, %s(%s)", rt, u, rs);
13049 }
13050
13051
13052 /*
13053  *
13054  *
13055  *   3         2         1
13056  *  10987654321098765432109876543210
13057  *  001000               01001001101
13058  *     rt -----
13059  *          rs -----
13060  *               rd -----
13061  */
13062 std::string NMD::SBE(uint64 instruction)
13063 {
13064     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13065     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13066     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13067
13068     std::string rt = GPR(copy(rt_value));
13069     std::string s = IMMEDIATE(copy(s_value));
13070     std::string rs = GPR(copy(rs_value));
13071
13072     return img::format("SBE %s, %s(%s)", rt, s, rs);
13073 }
13074
13075
13076 /*
13077  *
13078  *
13079  *   3         2         1
13080  *  10987654321098765432109876543210
13081  *  001000               01001001101
13082  *     rt -----
13083  *          rs -----
13084  *               rd -----
13085  */
13086 std::string NMD::SBX(uint64 instruction)
13087 {
13088     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13089     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13090     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13091
13092     std::string rd = GPR(copy(rd_value));
13093     std::string rs = GPR(copy(rs_value));
13094     std::string rt = GPR(copy(rt_value));
13095
13096     return img::format("SBX %s, %s(%s)", rd, rs, rt);
13097 }
13098
13099
13100 /*
13101  *
13102  *
13103  *   3         2         1
13104  *  10987654321098765432109876543210
13105  *  001000               01001001101
13106  *     rt -----
13107  *          rs -----
13108  *               rd -----
13109  */
13110 std::string NMD::SC(uint64 instruction)
13111 {
13112     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13113     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13114     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
13115
13116     std::string rt = GPR(copy(rt_value));
13117     std::string s = IMMEDIATE(copy(s_value));
13118     std::string rs = GPR(copy(rs_value));
13119
13120     return img::format("SC %s, %s(%s)", rt, s, rs);
13121 }
13122
13123
13124 /*
13125  *
13126  *
13127  *   3         2         1
13128  *  10987654321098765432109876543210
13129  *  001000               01001001101
13130  *     rt -----
13131  *          rs -----
13132  *               rd -----
13133  */
13134 std::string NMD::SCD(uint64 instruction)
13135 {
13136     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13137     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13138     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
13139
13140     std::string rt = GPR(copy(rt_value));
13141     std::string s = IMMEDIATE(copy(s_value));
13142     std::string rs = GPR(copy(rs_value));
13143
13144     return img::format("SCD %s, %s(%s)", rt, s, rs);
13145 }
13146
13147
13148 /*
13149  *
13150  *
13151  *   3         2         1
13152  *  10987654321098765432109876543210
13153  *  001000               01001001101
13154  *     rt -----
13155  *          rs -----
13156  *               rd -----
13157  */
13158 std::string NMD::SCDP(uint64 instruction)
13159 {
13160     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13161     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13162     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13163
13164     std::string rt = GPR(copy(rt_value));
13165     std::string ru = GPR(copy(ru_value));
13166     std::string rs = GPR(copy(rs_value));
13167
13168     return img::format("SCDP %s, %s, (%s)", rt, ru, rs);
13169 }
13170
13171
13172 /*
13173  *
13174  *
13175  *   3         2         1
13176  *  10987654321098765432109876543210
13177  *  001000               01001001101
13178  *     rt -----
13179  *          rs -----
13180  *               rd -----
13181  */
13182 std::string NMD::SCE(uint64 instruction)
13183 {
13184     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13185     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13186     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
13187
13188     std::string rt = GPR(copy(rt_value));
13189     std::string s = IMMEDIATE(copy(s_value));
13190     std::string rs = GPR(copy(rs_value));
13191
13192     return img::format("SCE %s, %s(%s)", rt, s, rs);
13193 }
13194
13195
13196 /*
13197  *
13198  *
13199  *   3         2         1
13200  *  10987654321098765432109876543210
13201  *  001000               01001001101
13202  *     rt -----
13203  *          rs -----
13204  *               rd -----
13205  */
13206 std::string NMD::SCWP(uint64 instruction)
13207 {
13208     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13209     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13210     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13211
13212     std::string rt = GPR(copy(rt_value));
13213     std::string ru = GPR(copy(ru_value));
13214     std::string rs = GPR(copy(rs_value));
13215
13216     return img::format("SCWP %s, %s, (%s)", rt, ru, rs);
13217 }
13218
13219
13220 /*
13221  *
13222  *
13223  *   3         2         1
13224  *  10987654321098765432109876543210
13225  *  001000               01001001101
13226  *     rt -----
13227  *          rs -----
13228  *               rd -----
13229  */
13230 std::string NMD::SCWPE(uint64 instruction)
13231 {
13232     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13233     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13234     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13235
13236     std::string rt = GPR(copy(rt_value));
13237     std::string ru = GPR(copy(ru_value));
13238     std::string rs = GPR(copy(rs_value));
13239
13240     return img::format("SCWPE %s, %s, (%s)", rt, ru, rs);
13241 }
13242
13243
13244 /*
13245  *
13246  *
13247  *   3         2         1
13248  *  10987654321098765432109876543210
13249  *  001000               01001001101
13250  *     rt -----
13251  *          rs -----
13252  *               rd -----
13253  */
13254 std::string NMD::SD_GP_(uint64 instruction)
13255 {
13256     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13257     uint64 u_value = extract_u_20_to_3__s3(instruction);
13258
13259     std::string rt = GPR(copy(rt_value));
13260     std::string u = IMMEDIATE(copy(u_value));
13261
13262     return img::format("SD %s, %s($%d)", rt, u, 28);
13263 }
13264
13265
13266 /*
13267  *
13268  *
13269  *   3         2         1
13270  *  10987654321098765432109876543210
13271  *  001000               01001001101
13272  *     rt -----
13273  *          rs -----
13274  *               rd -----
13275  */
13276 std::string NMD::SD_S9_(uint64 instruction)
13277 {
13278     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13279     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13280     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13281
13282     std::string rt = GPR(copy(rt_value));
13283     std::string s = IMMEDIATE(copy(s_value));
13284     std::string rs = GPR(copy(rs_value));
13285
13286     return img::format("SD %s, %s(%s)", rt, s, rs);
13287 }
13288
13289
13290 /*
13291  *
13292  *
13293  *   3         2         1
13294  *  10987654321098765432109876543210
13295  *  001000               01001001101
13296  *     rt -----
13297  *          rs -----
13298  *               rd -----
13299  */
13300 std::string NMD::SD_U12_(uint64 instruction)
13301 {
13302     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13303     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13304     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13305
13306     std::string rt = GPR(copy(rt_value));
13307     std::string u = IMMEDIATE(copy(u_value));
13308     std::string rs = GPR(copy(rs_value));
13309
13310     return img::format("SD %s, %s(%s)", rt, u, rs);
13311 }
13312
13313
13314 /*
13315  *
13316  *
13317  *   3         2         1
13318  *  10987654321098765432109876543210
13319  *  001000               01001001101
13320  *     rt -----
13321  *          rs -----
13322  *               rd -----
13323  */
13324 std::string NMD::SDBBP_16_(uint64 instruction)
13325 {
13326     uint64 code_value = extract_code_2_1_0(instruction);
13327
13328     std::string code = IMMEDIATE(copy(code_value));
13329
13330     return img::format("SDBBP %s", code);
13331 }
13332
13333
13334 /*
13335  *
13336  *
13337  *   3         2         1
13338  *  10987654321098765432109876543210
13339  *  001000               01001001101
13340  *     rt -----
13341  *          rs -----
13342  *               rd -----
13343  */
13344 std::string NMD::SDBBP_32_(uint64 instruction)
13345 {
13346     uint64 code_value = extract_code_18_to_0(instruction);
13347
13348     std::string code = IMMEDIATE(copy(code_value));
13349
13350     return img::format("SDBBP %s", code);
13351 }
13352
13353
13354 /*
13355  *
13356  *
13357  *   3         2         1
13358  *  10987654321098765432109876543210
13359  *  001000               01001001101
13360  *     rt -----
13361  *          rs -----
13362  *               rd -----
13363  */
13364 std::string NMD::SDC1_GP_(uint64 instruction)
13365 {
13366     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13367     uint64 u_value = extract_u_17_to_2__s2(instruction);
13368
13369     std::string ft = FPR(copy(ft_value));
13370     std::string u = IMMEDIATE(copy(u_value));
13371
13372     return img::format("SDC1 %s, %s($%d)", ft, u, 28);
13373 }
13374
13375
13376 /*
13377  *
13378  *
13379  *   3         2         1
13380  *  10987654321098765432109876543210
13381  *  001000               01001001101
13382  *     rt -----
13383  *          rs -----
13384  *               rd -----
13385  */
13386 std::string NMD::SDC1_S9_(uint64 instruction)
13387 {
13388     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13389     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13390     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13391
13392     std::string ft = FPR(copy(ft_value));
13393     std::string s = IMMEDIATE(copy(s_value));
13394     std::string rs = GPR(copy(rs_value));
13395
13396     return img::format("SDC1 %s, %s(%s)", ft, s, rs);
13397 }
13398
13399
13400 /*
13401  *
13402  *
13403  *   3         2         1
13404  *  10987654321098765432109876543210
13405  *  001000               01001001101
13406  *     rt -----
13407  *          rs -----
13408  *               rd -----
13409  */
13410 std::string NMD::SDC1_U12_(uint64 instruction)
13411 {
13412     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13413     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13414     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13415
13416     std::string ft = FPR(copy(ft_value));
13417     std::string u = IMMEDIATE(copy(u_value));
13418     std::string rs = GPR(copy(rs_value));
13419
13420     return img::format("SDC1 %s, %s(%s)", ft, u, rs);
13421 }
13422
13423
13424 /*
13425  *
13426  *
13427  *   3         2         1
13428  *  10987654321098765432109876543210
13429  *  001000               01001001101
13430  *     rt -----
13431  *          rs -----
13432  *               rd -----
13433  */
13434 std::string NMD::SDC1X(uint64 instruction)
13435 {
13436     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13437     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13438     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13439
13440     std::string ft = FPR(copy(ft_value));
13441     std::string rs = GPR(copy(rs_value));
13442     std::string rt = GPR(copy(rt_value));
13443
13444     return img::format("SDC1X %s, %s(%s)", ft, rs, rt);
13445 }
13446
13447
13448 /*
13449  *
13450  *
13451  *   3         2         1
13452  *  10987654321098765432109876543210
13453  *  001000               01001001101
13454  *     rt -----
13455  *          rs -----
13456  *               rd -----
13457  */
13458 std::string NMD::SDC1XS(uint64 instruction)
13459 {
13460     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13461     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13462     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13463
13464     std::string ft = FPR(copy(ft_value));
13465     std::string rs = GPR(copy(rs_value));
13466     std::string rt = GPR(copy(rt_value));
13467
13468     return img::format("SDC1XS %s, %s(%s)", ft, rs, rt);
13469 }
13470
13471
13472 /*
13473  *
13474  *
13475  *   3         2         1
13476  *  10987654321098765432109876543210
13477  *  001000               01001001101
13478  *     rt -----
13479  *          rs -----
13480  *               rd -----
13481  */
13482 std::string NMD::SDC2(uint64 instruction)
13483 {
13484     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
13485     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13486     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13487
13488     std::string cs = CPR(copy(cs_value));
13489     std::string s = IMMEDIATE(copy(s_value));
13490     std::string rs = GPR(copy(rs_value));
13491
13492     return img::format("SDC2 %s, %s(%s)", cs, s, rs);
13493 }
13494
13495
13496 /*
13497  *
13498  *
13499  *   3         2         1
13500  *  10987654321098765432109876543210
13501  *  001000               01001001101
13502  *     rt -----
13503  *          rs -----
13504  *               rd -----
13505  */
13506 std::string NMD::SDM(uint64 instruction)
13507 {
13508     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13509     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13510     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13511     uint64 count3_value = extract_count3_14_13_12(instruction);
13512
13513     std::string rt = GPR(copy(rt_value));
13514     std::string s = IMMEDIATE(copy(s_value));
13515     std::string rs = GPR(copy(rs_value));
13516     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
13517
13518     return img::format("SDM %s, %s(%s), %s", rt, s, rs, count3);
13519 }
13520
13521
13522 /*
13523  *
13524  *
13525  *   3         2         1
13526  *  10987654321098765432109876543210
13527  *  001000               01001001101
13528  *     rt -----
13529  *          rs -----
13530  *               rd -----
13531  */
13532 std::string NMD::SDPC_48_(uint64 instruction)
13533 {
13534     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
13535     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
13536
13537     std::string rt = GPR(copy(rt_value));
13538     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
13539
13540     return img::format("SDPC %s, %s", rt, s);
13541 }
13542
13543
13544 /*
13545  *
13546  *
13547  *   3         2         1
13548  *  10987654321098765432109876543210
13549  *  001000               01001001101
13550  *     rt -----
13551  *          rs -----
13552  *               rd -----
13553  */
13554 std::string NMD::SDXS(uint64 instruction)
13555 {
13556     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13557     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13558     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13559
13560     std::string rd = GPR(copy(rd_value));
13561     std::string rs = GPR(copy(rs_value));
13562     std::string rt = GPR(copy(rt_value));
13563
13564     return img::format("SDXS %s, %s(%s)", rd, rs, rt);
13565 }
13566
13567
13568 /*
13569  *
13570  *
13571  *   3         2         1
13572  *  10987654321098765432109876543210
13573  *  001000               01001001101
13574  *     rt -----
13575  *          rs -----
13576  *               rd -----
13577  */
13578 std::string NMD::SDX(uint64 instruction)
13579 {
13580     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13581     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13582     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13583
13584     std::string rd = GPR(copy(rd_value));
13585     std::string rs = GPR(copy(rs_value));
13586     std::string rt = GPR(copy(rt_value));
13587
13588     return img::format("SDX %s, %s(%s)", rd, rs, rt);
13589 }
13590
13591
13592 /*
13593  *
13594  *
13595  *   3         2         1
13596  *  10987654321098765432109876543210
13597  *  001000               01001001101
13598  *     rt -----
13599  *          rs -----
13600  *               rd -----
13601  */
13602 std::string NMD::SEB(uint64 instruction)
13603 {
13604     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13605     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13606
13607     std::string rt = GPR(copy(rt_value));
13608     std::string rs = GPR(copy(rs_value));
13609
13610     return img::format("SEB %s, %s", rt, rs);
13611 }
13612
13613
13614 /*
13615  *
13616  *
13617  *   3         2         1
13618  *  10987654321098765432109876543210
13619  *  001000               01001001101
13620  *     rt -----
13621  *          rs -----
13622  *               rd -----
13623  */
13624 std::string NMD::SEH(uint64 instruction)
13625 {
13626     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13627     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13628
13629     std::string rt = GPR(copy(rt_value));
13630     std::string rs = GPR(copy(rs_value));
13631
13632     return img::format("SEH %s, %s", rt, rs);
13633 }
13634
13635
13636 /*
13637  *
13638  *
13639  *   3         2         1
13640  *  10987654321098765432109876543210
13641  *  001000               01001001101
13642  *     rt -----
13643  *          rs -----
13644  *               rd -----
13645  */
13646 std::string NMD::SEL_D(uint64 instruction)
13647 {
13648     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13649     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13650     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13651
13652     std::string fd = FPR(copy(fd_value));
13653     std::string fs = FPR(copy(fs_value));
13654     std::string ft = FPR(copy(ft_value));
13655
13656     return img::format("SEL.D %s, %s, %s", fd, fs, ft);
13657 }
13658
13659
13660 /*
13661  *
13662  *
13663  *   3         2         1
13664  *  10987654321098765432109876543210
13665  *  001000               01001001101
13666  *     rt -----
13667  *          rs -----
13668  *               rd -----
13669  */
13670 std::string NMD::SEL_S(uint64 instruction)
13671 {
13672     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13673     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13674     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13675
13676     std::string fd = FPR(copy(fd_value));
13677     std::string fs = FPR(copy(fs_value));
13678     std::string ft = FPR(copy(ft_value));
13679
13680     return img::format("SEL.S %s, %s, %s", fd, fs, ft);
13681 }
13682
13683
13684 /*
13685  *
13686  *
13687  *   3         2         1
13688  *  10987654321098765432109876543210
13689  *  001000               01001001101
13690  *     rt -----
13691  *          rs -----
13692  *               rd -----
13693  */
13694 std::string NMD::SELEQZ_D(uint64 instruction)
13695 {
13696     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13697     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13698     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13699
13700     std::string fd = FPR(copy(fd_value));
13701     std::string fs = FPR(copy(fs_value));
13702     std::string ft = FPR(copy(ft_value));
13703
13704     return img::format("SELEQZ.D %s, %s, %s", fd, fs, ft);
13705 }
13706
13707
13708 /*
13709  *
13710  *
13711  *   3         2         1
13712  *  10987654321098765432109876543210
13713  *  001000               01001001101
13714  *     rt -----
13715  *          rs -----
13716  *               rd -----
13717  */
13718 std::string NMD::SELEQZ_S(uint64 instruction)
13719 {
13720     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13721     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13722     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13723
13724     std::string fd = FPR(copy(fd_value));
13725     std::string fs = FPR(copy(fs_value));
13726     std::string ft = FPR(copy(ft_value));
13727
13728     return img::format("SELEQZ.S %s, %s, %s", fd, fs, ft);
13729 }
13730
13731
13732 /*
13733  *
13734  *
13735  *   3         2         1
13736  *  10987654321098765432109876543210
13737  *  001000               01001001101
13738  *     rt -----
13739  *          rs -----
13740  *               rd -----
13741  */
13742 std::string NMD::SELNEZ_D(uint64 instruction)
13743 {
13744     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13745     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13746     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13747
13748     std::string fd = FPR(copy(fd_value));
13749     std::string fs = FPR(copy(fs_value));
13750     std::string ft = FPR(copy(ft_value));
13751
13752     return img::format("SELNEZ.D %s, %s, %s", fd, fs, ft);
13753 }
13754
13755
13756 /*
13757  *
13758  *
13759  *   3         2         1
13760  *  10987654321098765432109876543210
13761  *  001000               01001001101
13762  *     rt -----
13763  *          rs -----
13764  *               rd -----
13765  */
13766 std::string NMD::SELNEZ_S(uint64 instruction)
13767 {
13768     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13769     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13770     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13771
13772     std::string fd = FPR(copy(fd_value));
13773     std::string fs = FPR(copy(fs_value));
13774     std::string ft = FPR(copy(ft_value));
13775
13776     return img::format("SELNEZ.S %s, %s, %s", fd, fs, ft);
13777 }
13778
13779
13780 /*
13781  *
13782  *
13783  *   3         2         1
13784  *  10987654321098765432109876543210
13785  *  001000               01001001101
13786  *     rt -----
13787  *          rs -----
13788  *               rd -----
13789  */
13790 std::string NMD::SEQI(uint64 instruction)
13791 {
13792     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13793     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13794     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13795
13796     std::string rt = GPR(copy(rt_value));
13797     std::string rs = GPR(copy(rs_value));
13798     std::string u = IMMEDIATE(copy(u_value));
13799
13800     return img::format("SEQI %s, %s, %s", rt, rs, u);
13801 }
13802
13803
13804 /*
13805  *
13806  *
13807  *   3         2         1
13808  *  10987654321098765432109876543210
13809  *  001000               01001001101
13810  *     rt -----
13811  *          rs -----
13812  *               rd -----
13813  */
13814 std::string NMD::SH_16_(uint64 instruction)
13815 {
13816     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
13817     uint64 rs3_value = extract_rs3_6_5_4(instruction);
13818     uint64 u_value = extract_u_2_1__s1(instruction);
13819
13820     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
13821     std::string u = IMMEDIATE(copy(u_value));
13822     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
13823
13824     return img::format("SH %s, %s(%s)", rtz3, u, rs3);
13825 }
13826
13827
13828 /*
13829  *
13830  *
13831  *   3         2         1
13832  *  10987654321098765432109876543210
13833  *  001000               01001001101
13834  *     rt -----
13835  *          rs -----
13836  *               rd -----
13837  */
13838 std::string NMD::SH_GP_(uint64 instruction)
13839 {
13840     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13841     uint64 u_value = extract_u_17_to_1__s1(instruction);
13842
13843     std::string rt = GPR(copy(rt_value));
13844     std::string u = IMMEDIATE(copy(u_value));
13845
13846     return img::format("SH %s, %s($%d)", rt, u, 28);
13847 }
13848
13849
13850 /*
13851  *
13852  *
13853  *   3         2         1
13854  *  10987654321098765432109876543210
13855  *  001000               01001001101
13856  *     rt -----
13857  *          rs -----
13858  *               rd -----
13859  */
13860 std::string NMD::SH_S9_(uint64 instruction)
13861 {
13862     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13863     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13864     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13865
13866     std::string rt = GPR(copy(rt_value));
13867     std::string s = IMMEDIATE(copy(s_value));
13868     std::string rs = GPR(copy(rs_value));
13869
13870     return img::format("SH %s, %s(%s)", rt, s, rs);
13871 }
13872
13873
13874 /*
13875  *
13876  *
13877  *   3         2         1
13878  *  10987654321098765432109876543210
13879  *  001000               01001001101
13880  *     rt -----
13881  *          rs -----
13882  *               rd -----
13883  */
13884 std::string NMD::SH_U12_(uint64 instruction)
13885 {
13886     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13887     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13888     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13889
13890     std::string rt = GPR(copy(rt_value));
13891     std::string u = IMMEDIATE(copy(u_value));
13892     std::string rs = GPR(copy(rs_value));
13893
13894     return img::format("SH %s, %s(%s)", rt, u, rs);
13895 }
13896
13897
13898 /*
13899  *
13900  *
13901  *   3         2         1
13902  *  10987654321098765432109876543210
13903  *  001000               01001001101
13904  *     rt -----
13905  *          rs -----
13906  *               rd -----
13907  */
13908 std::string NMD::SHE(uint64 instruction)
13909 {
13910     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13911     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13912     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13913
13914     std::string rt = GPR(copy(rt_value));
13915     std::string s = IMMEDIATE(copy(s_value));
13916     std::string rs = GPR(copy(rs_value));
13917
13918     return img::format("SHE %s, %s(%s)", rt, s, rs);
13919 }
13920
13921
13922 /*
13923  * SHILO ac, shift - Shift an Accumulator Value Leaving the Result in the Same
13924  *                     Accumulator
13925  *
13926  *   3         2         1
13927  *  10987654321098765432109876543210
13928  *  001000xxxx        xxxx0000011101
13929  *      shift ------
13930  *               ac --
13931  */
13932 std::string NMD::SHILO(uint64 instruction)
13933 {
13934     int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction);
13935     uint64 ac_value = extract_ac_13_12(instruction);
13936
13937     std::string shift = IMMEDIATE(copy(shift_value));
13938     std::string ac = AC(copy(ac_value));
13939
13940     return img::format("SHILO %s, %s", ac, shift);
13941 }
13942
13943
13944 /*
13945  * SHILOV ac, rs - Variable Shift of Accumulator Value Leaving the Result in
13946  *                   the Same Accumulator
13947  *
13948  *   3         2         1
13949  *  10987654321098765432109876543210
13950  *  001000xxxxx       01001001111111
13951  *          rs -----
13952  *               ac --
13953  */
13954 std::string NMD::SHILOV(uint64 instruction)
13955 {
13956     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13957     uint64 ac_value = extract_ac_13_12(instruction);
13958
13959     std::string rs = GPR(copy(rs_value));
13960     std::string ac = AC(copy(ac_value));
13961
13962     return img::format("SHILOV %s, %s", ac, rs);
13963 }
13964
13965
13966 /*
13967  * SHLL.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords
13968  *
13969  *   3         2         1
13970  *  10987654321098765432109876543210
13971  *  001000              001110110101
13972  *     rt -----
13973  *          rs -----
13974  *               sa ----
13975  */
13976 std::string NMD::SHLL_PH(uint64 instruction)
13977 {
13978     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13979     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13980     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13981
13982     std::string rt = GPR(copy(rt_value));
13983     std::string rs = GPR(copy(rs_value));
13984     std::string sa = IMMEDIATE(copy(sa_value));
13985
13986     return img::format("SHLL.PH %s, %s, %s", rt, rs, sa);
13987 }
13988
13989
13990 /*
13991  * SHLL.QB rt, rs, sa - Shift Left Logical Vector Quad Bytes
13992  *
13993  *   3         2         1
13994  *  10987654321098765432109876543210
13995  *  001000             0100001111111
13996  *     rt -----
13997  *          rs -----
13998  *               sa ---
13999  */
14000 std::string NMD::SHLL_QB(uint64 instruction)
14001 {
14002     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14003     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14004     uint64 sa_value = extract_sa_15_14_13(instruction);
14005
14006     std::string rt = GPR(copy(rt_value));
14007     std::string rs = GPR(copy(rs_value));
14008     std::string sa = IMMEDIATE(copy(sa_value));
14009
14010     return img::format("SHLL.QB %s, %s, %s", rt, rs, sa);
14011 }
14012
14013
14014 /*
14015  * SHLL_S.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords (saturated)
14016  *
14017  *   3         2         1
14018  *  10987654321098765432109876543210
14019  *  001000              001110110101
14020  *     rt -----
14021  *          rs -----
14022  *               sa ----
14023  */
14024 std::string NMD::SHLL_S_PH(uint64 instruction)
14025 {
14026     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14027     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14028     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14029
14030     std::string rt = GPR(copy(rt_value));
14031     std::string rs = GPR(copy(rs_value));
14032     std::string sa = IMMEDIATE(copy(sa_value));
14033
14034     return img::format("SHLL_S.PH %s, %s, %s", rt, rs, sa);
14035 }
14036
14037
14038 /*
14039  *
14040  *
14041  *   3         2         1
14042  *  10987654321098765432109876543210
14043  *  001000               01001001101
14044  *     rt -----
14045  *          rs -----
14046  *               rd -----
14047  */
14048 std::string NMD::SHLL_S_W(uint64 instruction)
14049 {
14050     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14051     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14052     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14053
14054     std::string rt = GPR(copy(rt_value));
14055     std::string rs = GPR(copy(rs_value));
14056     std::string sa = IMMEDIATE(copy(sa_value));
14057
14058     return img::format("SHLL_S.W %s, %s, %s", rt, rs, sa);
14059 }
14060
14061
14062 /*
14063  *
14064  *
14065  *   3         2         1
14066  *  10987654321098765432109876543210
14067  *  001000               01001001101
14068  *     rt -----
14069  *          rs -----
14070  *               rd -----
14071  */
14072 std::string NMD::SHLLV_PH(uint64 instruction)
14073 {
14074     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14075     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14076     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14077
14078     std::string rd = GPR(copy(rd_value));
14079     std::string rt = GPR(copy(rt_value));
14080     std::string rs = GPR(copy(rs_value));
14081
14082     return img::format("SHLLV.PH %s, %s, %s", rd, rt, rs);
14083 }
14084
14085
14086 /*
14087  *
14088  *
14089  *   3         2         1
14090  *  10987654321098765432109876543210
14091  *  001000               01001001101
14092  *     rt -----
14093  *          rs -----
14094  *               rd -----
14095  */
14096 std::string NMD::SHLLV_QB(uint64 instruction)
14097 {
14098     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14099     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14100     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14101
14102     std::string rd = GPR(copy(rd_value));
14103     std::string rt = GPR(copy(rt_value));
14104     std::string rs = GPR(copy(rs_value));
14105
14106     return img::format("SHLLV.QB %s, %s, %s", rd, rt, rs);
14107 }
14108
14109
14110 /*
14111  *
14112  *
14113  *   3         2         1
14114  *  10987654321098765432109876543210
14115  *  001000               01001001101
14116  *     rt -----
14117  *          rs -----
14118  *               rd -----
14119  */
14120 std::string NMD::SHLLV_S_PH(uint64 instruction)
14121 {
14122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14123     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14124     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14125
14126     std::string rd = GPR(copy(rd_value));
14127     std::string rt = GPR(copy(rt_value));
14128     std::string rs = GPR(copy(rs_value));
14129
14130     return img::format("SHLLV_S.PH %s, %s, %s", rd, rt, rs);
14131 }
14132
14133
14134 /*
14135  *
14136  *
14137  *   3         2         1
14138  *  10987654321098765432109876543210
14139  *  001000               01001001101
14140  *     rt -----
14141  *          rs -----
14142  *               rd -----
14143  */
14144 std::string NMD::SHLLV_S_W(uint64 instruction)
14145 {
14146     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14147     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14148     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14149
14150     std::string rd = GPR(copy(rd_value));
14151     std::string rt = GPR(copy(rt_value));
14152     std::string rs = GPR(copy(rs_value));
14153
14154     return img::format("SHLLV_S.W %s, %s, %s", rd, rt, rs);
14155 }
14156
14157
14158 /*
14159  *
14160  *
14161  *   3         2         1
14162  *  10987654321098765432109876543210
14163  *  001000               01001001101
14164  *     rt -----
14165  *          rs -----
14166  *               rd -----
14167  */
14168 std::string NMD::SHRA_PH(uint64 instruction)
14169 {
14170     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14171     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14172     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14173
14174     std::string rt = GPR(copy(rt_value));
14175     std::string rs = GPR(copy(rs_value));
14176     std::string sa = IMMEDIATE(copy(sa_value));
14177
14178     return img::format("SHRA.PH %s, %s, %s", rt, rs, sa);
14179 }
14180
14181
14182 /*
14183  *
14184  *
14185  *   3         2         1
14186  *  10987654321098765432109876543210
14187  *  001000               01001001101
14188  *     rt -----
14189  *          rs -----
14190  *               rd -----
14191  */
14192 std::string NMD::SHRA_QB(uint64 instruction)
14193 {
14194     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14195     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14196     uint64 sa_value = extract_sa_15_14_13(instruction);
14197
14198     std::string rt = GPR(copy(rt_value));
14199     std::string rs = GPR(copy(rs_value));
14200     std::string sa = IMMEDIATE(copy(sa_value));
14201
14202     return img::format("SHRA.QB %s, %s, %s", rt, rs, sa);
14203 }
14204
14205
14206 /*
14207  *
14208  *
14209  *   3         2         1
14210  *  10987654321098765432109876543210
14211  *  001000               01001001101
14212  *     rt -----
14213  *          rs -----
14214  *               rd -----
14215  */
14216 std::string NMD::SHRA_R_PH(uint64 instruction)
14217 {
14218     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14219     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14220     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14221
14222     std::string rt = GPR(copy(rt_value));
14223     std::string rs = GPR(copy(rs_value));
14224     std::string sa = IMMEDIATE(copy(sa_value));
14225
14226     return img::format("SHRA_R.PH %s, %s, %s", rt, rs, sa);
14227 }
14228
14229
14230 /*
14231  *
14232  *
14233  *   3         2         1
14234  *  10987654321098765432109876543210
14235  *  001000               01001001101
14236  *     rt -----
14237  *          rs -----
14238  *               rd -----
14239  */
14240 std::string NMD::SHRA_R_QB(uint64 instruction)
14241 {
14242     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14243     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14244     uint64 sa_value = extract_sa_15_14_13(instruction);
14245
14246     std::string rt = GPR(copy(rt_value));
14247     std::string rs = GPR(copy(rs_value));
14248     std::string sa = IMMEDIATE(copy(sa_value));
14249
14250     return img::format("SHRA_R.QB %s, %s, %s", rt, rs, sa);
14251 }
14252
14253
14254 /*
14255  *
14256  *
14257  *   3         2         1
14258  *  10987654321098765432109876543210
14259  *  001000               01001001101
14260  *     rt -----
14261  *          rs -----
14262  *               rd -----
14263  */
14264 std::string NMD::SHRA_R_W(uint64 instruction)
14265 {
14266     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14267     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14268     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14269
14270     std::string rt = GPR(copy(rt_value));
14271     std::string rs = GPR(copy(rs_value));
14272     std::string sa = IMMEDIATE(copy(sa_value));
14273
14274     return img::format("SHRA_R.W %s, %s, %s", rt, rs, sa);
14275 }
14276
14277
14278 /*
14279  *
14280  *
14281  *   3         2         1
14282  *  10987654321098765432109876543210
14283  *  001000               01001001101
14284  *     rt -----
14285  *          rs -----
14286  *               rd -----
14287  */
14288 std::string NMD::SHRAV_PH(uint64 instruction)
14289 {
14290     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14291     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14292     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14293
14294     std::string rd = GPR(copy(rd_value));
14295     std::string rt = GPR(copy(rt_value));
14296     std::string rs = GPR(copy(rs_value));
14297
14298     return img::format("SHRAV.PH %s, %s, %s", rd, rt, rs);
14299 }
14300
14301
14302 /*
14303  *
14304  *
14305  *   3         2         1
14306  *  10987654321098765432109876543210
14307  *  001000               01001001101
14308  *     rt -----
14309  *          rs -----
14310  *               rd -----
14311  */
14312 std::string NMD::SHRAV_QB(uint64 instruction)
14313 {
14314     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14315     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14316     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14317
14318     std::string rd = GPR(copy(rd_value));
14319     std::string rt = GPR(copy(rt_value));
14320     std::string rs = GPR(copy(rs_value));
14321
14322     return img::format("SHRAV.QB %s, %s, %s", rd, rt, rs);
14323 }
14324
14325
14326 /*
14327  *
14328  *
14329  *   3         2         1
14330  *  10987654321098765432109876543210
14331  *  001000               01001001101
14332  *     rt -----
14333  *          rs -----
14334  *               rd -----
14335  */
14336 std::string NMD::SHRAV_R_PH(uint64 instruction)
14337 {
14338     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14339     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14340     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14341
14342     std::string rd = GPR(copy(rd_value));
14343     std::string rt = GPR(copy(rt_value));
14344     std::string rs = GPR(copy(rs_value));
14345
14346     return img::format("SHRAV_R.PH %s, %s, %s", rd, rt, rs);
14347 }
14348
14349
14350 /*
14351  *
14352  *
14353  *   3         2         1
14354  *  10987654321098765432109876543210
14355  *  001000               01001001101
14356  *     rt -----
14357  *          rs -----
14358  *               rd -----
14359  */
14360 std::string NMD::SHRAV_R_QB(uint64 instruction)
14361 {
14362     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14363     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14364     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14365
14366     std::string rd = GPR(copy(rd_value));
14367     std::string rt = GPR(copy(rt_value));
14368     std::string rs = GPR(copy(rs_value));
14369
14370     return img::format("SHRAV_R.QB %s, %s, %s", rd, rt, rs);
14371 }
14372
14373
14374 /*
14375  *
14376  *
14377  *   3         2         1
14378  *  10987654321098765432109876543210
14379  *  001000               01001001101
14380  *     rt -----
14381  *          rs -----
14382  *               rd -----
14383  */
14384 std::string NMD::SHRAV_R_W(uint64 instruction)
14385 {
14386     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14387     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14388     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14389
14390     std::string rd = GPR(copy(rd_value));
14391     std::string rt = GPR(copy(rt_value));
14392     std::string rs = GPR(copy(rs_value));
14393
14394     return img::format("SHRAV_R.W %s, %s, %s", rd, rt, rs);
14395 }
14396
14397
14398 /*
14399  *
14400  *
14401  *   3         2         1
14402  *  10987654321098765432109876543210
14403  *  001000               01001001101
14404  *     rt -----
14405  *          rs -----
14406  *               rd -----
14407  */
14408 std::string NMD::SHRL_PH(uint64 instruction)
14409 {
14410     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14411     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14412     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14413
14414     std::string rt = GPR(copy(rt_value));
14415     std::string rs = GPR(copy(rs_value));
14416     std::string sa = IMMEDIATE(copy(sa_value));
14417
14418     return img::format("SHRL.PH %s, %s, %s", rt, rs, sa);
14419 }
14420
14421
14422 /*
14423  *
14424  *
14425  *   3         2         1
14426  *  10987654321098765432109876543210
14427  *  001000               01001001101
14428  *     rt -----
14429  *          rs -----
14430  *               rd -----
14431  */
14432 std::string NMD::SHRL_QB(uint64 instruction)
14433 {
14434     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14435     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14436     uint64 sa_value = extract_sa_15_14_13(instruction);
14437
14438     std::string rt = GPR(copy(rt_value));
14439     std::string rs = GPR(copy(rs_value));
14440     std::string sa = IMMEDIATE(copy(sa_value));
14441
14442     return img::format("SHRL.QB %s, %s, %s", rt, rs, sa);
14443 }
14444
14445
14446 /*
14447  *
14448  *
14449  *   3         2         1
14450  *  10987654321098765432109876543210
14451  *  001000               01001001101
14452  *     rt -----
14453  *          rs -----
14454  *               rd -----
14455  */
14456 std::string NMD::SHRLV_PH(uint64 instruction)
14457 {
14458     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14459     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14460     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14461
14462     std::string rd = GPR(copy(rd_value));
14463     std::string rt = GPR(copy(rt_value));
14464     std::string rs = GPR(copy(rs_value));
14465
14466     return img::format("SHRLV.PH %s, %s, %s", rd, rt, rs);
14467 }
14468
14469
14470 /*
14471  *
14472  *
14473  *   3         2         1
14474  *  10987654321098765432109876543210
14475  *  001000               01001001101
14476  *     rt -----
14477  *          rs -----
14478  *               rd -----
14479  */
14480 std::string NMD::SHRLV_QB(uint64 instruction)
14481 {
14482     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14483     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14484     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14485
14486     std::string rd = GPR(copy(rd_value));
14487     std::string rt = GPR(copy(rt_value));
14488     std::string rs = GPR(copy(rs_value));
14489
14490     return img::format("SHRLV.QB %s, %s, %s", rd, rt, rs);
14491 }
14492
14493
14494 /*
14495  *
14496  *
14497  *   3         2         1
14498  *  10987654321098765432109876543210
14499  *  001000               01001001101
14500  *     rt -----
14501  *          rs -----
14502  *               rd -----
14503  */
14504 std::string NMD::SHX(uint64 instruction)
14505 {
14506     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14507     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14508     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14509
14510     std::string rd = GPR(copy(rd_value));
14511     std::string rs = GPR(copy(rs_value));
14512     std::string rt = GPR(copy(rt_value));
14513
14514     return img::format("SHX %s, %s(%s)", rd, rs, rt);
14515 }
14516
14517
14518 /*
14519  *
14520  *
14521  *   3         2         1
14522  *  10987654321098765432109876543210
14523  *  001000               01001001101
14524  *     rt -----
14525  *          rs -----
14526  *               rd -----
14527  */
14528 std::string NMD::SHXS(uint64 instruction)
14529 {
14530     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14531     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14532     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14533
14534     std::string rd = GPR(copy(rd_value));
14535     std::string rs = GPR(copy(rs_value));
14536     std::string rt = GPR(copy(rt_value));
14537
14538     return img::format("SHXS %s, %s(%s)", rd, rs, rt);
14539 }
14540
14541
14542 /*
14543  *
14544  *
14545  *   3         2         1
14546  *  10987654321098765432109876543210
14547  *  001000               01001001101
14548  *     rt -----
14549  *          rs -----
14550  *               rd -----
14551  */
14552 std::string NMD::SIGRIE(uint64 instruction)
14553 {
14554     uint64 code_value = extract_code_18_to_0(instruction);
14555
14556     std::string code = IMMEDIATE(copy(code_value));
14557
14558     return img::format("SIGRIE %s", code);
14559 }
14560
14561
14562 /*
14563  *
14564  *
14565  *   3         2         1
14566  *  10987654321098765432109876543210
14567  *  001000               01001001101
14568  *     rt -----
14569  *          rs -----
14570  *               rd -----
14571  */
14572 std::string NMD::SLL_16_(uint64 instruction)
14573 {
14574     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14575     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14576     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14577
14578     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14579     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14580     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14581
14582     return img::format("SLL %s, %s, %s", rt3, rs3, shift3);
14583 }
14584
14585
14586 /*
14587  *
14588  *
14589  *   3         2         1
14590  *  10987654321098765432109876543210
14591  *  001000               01001001101
14592  *     rt -----
14593  *          rs -----
14594  *               rd -----
14595  */
14596 std::string NMD::SLL_32_(uint64 instruction)
14597 {
14598     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14599     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14600     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14601
14602     std::string rt = GPR(copy(rt_value));
14603     std::string rs = GPR(copy(rs_value));
14604     std::string shift = IMMEDIATE(copy(shift_value));
14605
14606     return img::format("SLL %s, %s, %s", rt, rs, shift);
14607 }
14608
14609
14610 /*
14611  *
14612  *
14613  *   3         2         1
14614  *  10987654321098765432109876543210
14615  *  001000               01001001101
14616  *     rt -----
14617  *          rs -----
14618  *               rd -----
14619  */
14620 std::string NMD::SLLV(uint64 instruction)
14621 {
14622     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14623     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14624     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14625
14626     std::string rd = GPR(copy(rd_value));
14627     std::string rs = GPR(copy(rs_value));
14628     std::string rt = GPR(copy(rt_value));
14629
14630     return img::format("SLLV %s, %s, %s", rd, rs, rt);
14631 }
14632
14633
14634 /*
14635  *
14636  *
14637  *   3         2         1
14638  *  10987654321098765432109876543210
14639  *  001000               01001001101
14640  *     rt -----
14641  *          rs -----
14642  *               rd -----
14643  */
14644 std::string NMD::SLT(uint64 instruction)
14645 {
14646     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14647     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14648     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14649
14650     std::string rd = GPR(copy(rd_value));
14651     std::string rs = GPR(copy(rs_value));
14652     std::string rt = GPR(copy(rt_value));
14653
14654     return img::format("SLT %s, %s, %s", rd, rs, rt);
14655 }
14656
14657
14658 /*
14659  *
14660  *
14661  *   3         2         1
14662  *  10987654321098765432109876543210
14663  *  001000               01001001101
14664  *     rt -----
14665  *          rs -----
14666  *               rd -----
14667  */
14668 std::string NMD::SLTI(uint64 instruction)
14669 {
14670     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14671     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14672     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14673
14674     std::string rt = GPR(copy(rt_value));
14675     std::string rs = GPR(copy(rs_value));
14676     std::string u = IMMEDIATE(copy(u_value));
14677
14678     return img::format("SLTI %s, %s, %s", rt, rs, u);
14679 }
14680
14681
14682 /*
14683  *
14684  *
14685  *   3         2         1
14686  *  10987654321098765432109876543210
14687  *  001000               01001001101
14688  *     rt -----
14689  *          rs -----
14690  *               rd -----
14691  */
14692 std::string NMD::SLTIU(uint64 instruction)
14693 {
14694     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14695     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14696     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14697
14698     std::string rt = GPR(copy(rt_value));
14699     std::string rs = GPR(copy(rs_value));
14700     std::string u = IMMEDIATE(copy(u_value));
14701
14702     return img::format("SLTIU %s, %s, %s", rt, rs, u);
14703 }
14704
14705
14706 /*
14707  *
14708  *
14709  *   3         2         1
14710  *  10987654321098765432109876543210
14711  *  001000               01001001101
14712  *     rt -----
14713  *          rs -----
14714  *               rd -----
14715  */
14716 std::string NMD::SLTU(uint64 instruction)
14717 {
14718     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14719     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14720     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14721
14722     std::string rd = GPR(copy(rd_value));
14723     std::string rs = GPR(copy(rs_value));
14724     std::string rt = GPR(copy(rt_value));
14725
14726     return img::format("SLTU %s, %s, %s", rd, rs, rt);
14727 }
14728
14729
14730 /*
14731  *
14732  *
14733  *   3         2         1
14734  *  10987654321098765432109876543210
14735  *  001000               01001001101
14736  *     rt -----
14737  *          rs -----
14738  *               rd -----
14739  */
14740 std::string NMD::SOV(uint64 instruction)
14741 {
14742     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14743     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14744     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14745
14746     std::string rd = GPR(copy(rd_value));
14747     std::string rs = GPR(copy(rs_value));
14748     std::string rt = GPR(copy(rt_value));
14749
14750     return img::format("SOV %s, %s, %s", rd, rs, rt);
14751 }
14752
14753
14754 /*
14755  *
14756  *
14757  *   3         2         1
14758  *  10987654321098765432109876543210
14759  *  001000               01001001101
14760  *     rt -----
14761  *          rs -----
14762  *               rd -----
14763  */
14764 std::string NMD::SPECIAL2(uint64 instruction)
14765 {
14766     uint64 op_value = extract_op_25_to_3(instruction);
14767
14768     std::string op = IMMEDIATE(copy(op_value));
14769
14770     return img::format("SPECIAL2 %s", op);
14771 }
14772
14773
14774 /*
14775  *
14776  *
14777  *   3         2         1
14778  *  10987654321098765432109876543210
14779  *  001000               01001001101
14780  *     rt -----
14781  *          rs -----
14782  *               rd -----
14783  */
14784 std::string NMD::SQRT_D(uint64 instruction)
14785 {
14786     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14787     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14788
14789     std::string ft = FPR(copy(ft_value));
14790     std::string fs = FPR(copy(fs_value));
14791
14792     return img::format("SQRT.D %s, %s", ft, fs);
14793 }
14794
14795
14796 /*
14797  *
14798  *
14799  *   3         2         1
14800  *  10987654321098765432109876543210
14801  *  001000               01001001101
14802  *     rt -----
14803  *          rs -----
14804  *               rd -----
14805  */
14806 std::string NMD::SQRT_S(uint64 instruction)
14807 {
14808     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14809     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14810
14811     std::string ft = FPR(copy(ft_value));
14812     std::string fs = FPR(copy(fs_value));
14813
14814     return img::format("SQRT.S %s, %s", ft, fs);
14815 }
14816
14817
14818 /*
14819  * SRA rd, rt, sa - Shift Word Right Arithmetic
14820  *
14821  *   3         2         1
14822  *  10987654321098765432109876543210
14823  *  00000000000               000011
14824  *          rt -----
14825  *               rd -----
14826  *                    sa -----
14827  */
14828 std::string NMD::SRA(uint64 instruction)
14829 {
14830     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14831     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14832     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14833
14834     std::string rt = GPR(copy(rt_value));
14835     std::string rs = GPR(copy(rs_value));
14836     std::string shift = IMMEDIATE(copy(shift_value));
14837
14838     return img::format("SRA %s, %s, %s", rt, rs, shift);
14839 }
14840
14841
14842 /*
14843  * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable
14844  *
14845  *   3         2         1
14846  *  10987654321098765432109876543210
14847  *  001000               00000000111
14848  *     rs -----
14849  *          rt -----
14850  *               rd -----
14851  */
14852 std::string NMD::SRAV(uint64 instruction)
14853 {
14854     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14855     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14856     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14857
14858     std::string rd = GPR(copy(rd_value));
14859     std::string rs = GPR(copy(rs_value));
14860     std::string rt = GPR(copy(rt_value));
14861
14862     return img::format("SRAV %s, %s, %s", rd, rs, rt);
14863 }
14864
14865
14866 /*
14867  *
14868  *
14869  *   3         2         1
14870  *  10987654321098765432109876543210
14871  *  001000               00000000111
14872  *     rs -----
14873  *          rt -----
14874  *               rd -----
14875  */
14876 std::string NMD::SRL_16_(uint64 instruction)
14877 {
14878     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14879     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14880     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14881
14882     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14883     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14884     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14885
14886     return img::format("SRL %s, %s, %s", rt3, rs3, shift3);
14887 }
14888
14889
14890 /*
14891  *
14892  *
14893  *   3         2         1
14894  *  10987654321098765432109876543210
14895  *  001000               01001001101
14896  *     rt -----
14897  *          rs -----
14898  *               rd -----
14899  */
14900 std::string NMD::SRL_32_(uint64 instruction)
14901 {
14902     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14903     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14904     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14905
14906     std::string rt = GPR(copy(rt_value));
14907     std::string rs = GPR(copy(rs_value));
14908     std::string shift = IMMEDIATE(copy(shift_value));
14909
14910     return img::format("SRL %s, %s, %s", rt, rs, shift);
14911 }
14912
14913
14914 /*
14915  *
14916  *
14917  *   3         2         1
14918  *  10987654321098765432109876543210
14919  *  001000               01001001101
14920  *     rt -----
14921  *          rs -----
14922  *               rd -----
14923  */
14924 std::string NMD::SRLV(uint64 instruction)
14925 {
14926     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14927     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14928     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14929
14930     std::string rd = GPR(copy(rd_value));
14931     std::string rs = GPR(copy(rs_value));
14932     std::string rt = GPR(copy(rt_value));
14933
14934     return img::format("SRLV %s, %s, %s", rd, rs, rt);
14935 }
14936
14937
14938 /*
14939  *
14940  *
14941  *   3         2         1
14942  *  10987654321098765432109876543210
14943  *  001000               01001001101
14944  *     rt -----
14945  *          rs -----
14946  *               rd -----
14947  */
14948 std::string NMD::SUB(uint64 instruction)
14949 {
14950     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14951     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14952     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14953
14954     std::string rd = GPR(copy(rd_value));
14955     std::string rs = GPR(copy(rs_value));
14956     std::string rt = GPR(copy(rt_value));
14957
14958     return img::format("SUB %s, %s, %s", rd, rs, rt);
14959 }
14960
14961
14962 /*
14963  *
14964  *
14965  *   3         2         1
14966  *  10987654321098765432109876543210
14967  *  001000               01001001101
14968  *     rt -----
14969  *          rs -----
14970  *               rd -----
14971  */
14972 std::string NMD::SUB_D(uint64 instruction)
14973 {
14974     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14975     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14976     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14977
14978     std::string fd = FPR(copy(fd_value));
14979     std::string fs = FPR(copy(fs_value));
14980     std::string ft = FPR(copy(ft_value));
14981
14982     return img::format("SUB.D %s, %s, %s", fd, fs, ft);
14983 }
14984
14985
14986 /*
14987  *
14988  *
14989  *   3         2         1
14990  *  10987654321098765432109876543210
14991  *  001000               01001001101
14992  *     rt -----
14993  *          rs -----
14994  *               rd -----
14995  */
14996 std::string NMD::SUB_S(uint64 instruction)
14997 {
14998     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14999     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
15000     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
15001
15002     std::string fd = FPR(copy(fd_value));
15003     std::string fs = FPR(copy(fs_value));
15004     std::string ft = FPR(copy(ft_value));
15005
15006     return img::format("SUB.S %s, %s, %s", fd, fs, ft);
15007 }
15008
15009
15010 /*
15011  *
15012  *
15013  *   3         2         1
15014  *  10987654321098765432109876543210
15015  *  001000               01001001101
15016  *     rt -----
15017  *          rs -----
15018  *               rd -----
15019  */
15020 std::string NMD::SUBQ_PH(uint64 instruction)
15021 {
15022     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15023     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15024     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15025
15026     std::string rd = GPR(copy(rd_value));
15027     std::string rs = GPR(copy(rs_value));
15028     std::string rt = GPR(copy(rt_value));
15029
15030     return img::format("SUBQ.PH %s, %s, %s", rd, rs, rt);
15031 }
15032
15033
15034 /*
15035  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
15036  *                         to Halve Results
15037  *
15038  *   3         2         1
15039  *  10987654321098765432109876543210
15040  *  001000               01001001101
15041  *     rt -----
15042  *          rs -----
15043  *               rd -----
15044  */
15045 std::string NMD::SUBQ_S_PH(uint64 instruction)
15046 {
15047     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15048     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15049     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15050
15051     std::string rd = GPR(copy(rd_value));
15052     std::string rs = GPR(copy(rs_value));
15053     std::string rt = GPR(copy(rt_value));
15054
15055     return img::format("SUBQ_S.PH %s, %s, %s", rd, rs, rt);
15056 }
15057
15058
15059 /*
15060  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
15061  *                         to Halve Results
15062  *
15063  *   3         2         1
15064  *  10987654321098765432109876543210
15065  *  001000               01001001101
15066  *     rt -----
15067  *          rs -----
15068  *               rd -----
15069  */
15070 std::string NMD::SUBQ_S_W(uint64 instruction)
15071 {
15072     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15073     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15074     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15075
15076     std::string rd = GPR(copy(rd_value));
15077     std::string rs = GPR(copy(rs_value));
15078     std::string rt = GPR(copy(rt_value));
15079
15080     return img::format("SUBQ_S.W %s, %s, %s", rd, rs, rt);
15081 }
15082
15083
15084 /*
15085  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
15086  *                         to Halve Results
15087  *
15088  *   3         2         1
15089  *  10987654321098765432109876543210
15090  *  001000               01001001101
15091  *     rt -----
15092  *          rs -----
15093  *               rd -----
15094  */
15095 std::string NMD::SUBQH_PH(uint64 instruction)
15096 {
15097     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15098     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15099     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15100
15101     std::string rd = GPR(copy(rd_value));
15102     std::string rs = GPR(copy(rs_value));
15103     std::string rt = GPR(copy(rt_value));
15104
15105     return img::format("SUBQH.PH %s, %s, %s", rd, rs, rt);
15106 }
15107
15108
15109 /*
15110  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
15111  *                         to Halve Results
15112  *
15113  *   3         2         1
15114  *  10987654321098765432109876543210
15115  *  001000               01001001101
15116  *     rt -----
15117  *          rs -----
15118  *               rd -----
15119  */
15120 std::string NMD::SUBQH_R_PH(uint64 instruction)
15121 {
15122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15123     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15124     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15125
15126     std::string rd = GPR(copy(rd_value));
15127     std::string rs = GPR(copy(rs_value));
15128     std::string rt = GPR(copy(rt_value));
15129
15130     return img::format("SUBQH_R.PH %s, %s, %s", rd, rs, rt);
15131 }
15132
15133
15134 /*
15135  * SUBQH_R.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
15136  *                           to Halve Results (rounding)
15137  *
15138  *   3         2         1
15139  *  10987654321098765432109876543210
15140  *  001000               11001001101
15141  *     rt -----
15142  *          rs -----
15143  *               rd -----
15144  */
15145 std::string NMD::SUBQH_R_W(uint64 instruction)
15146 {
15147     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15148     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15149     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15150
15151     std::string rd = GPR(copy(rd_value));
15152     std::string rs = GPR(copy(rs_value));
15153     std::string rt = GPR(copy(rt_value));
15154
15155     return img::format("SUBQH_R.W %s, %s, %s", rd, rs, rt);
15156 }
15157
15158
15159 /*
15160  * SUBQH.W rd, rs, rt - Subtract Fractional Words And Shift Right to Halve
15161  *                        Results
15162  *
15163  *   3         2         1
15164  *  10987654321098765432109876543210
15165  *  001000               01010001101
15166  *     rt -----
15167  *          rs -----
15168  *               rd -----
15169  */
15170 std::string NMD::SUBQH_W(uint64 instruction)
15171 {
15172     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15173     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15174     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15175
15176     std::string rd = GPR(copy(rd_value));
15177     std::string rs = GPR(copy(rs_value));
15178     std::string rt = GPR(copy(rt_value));
15179
15180     return img::format("SUBQH.W %s, %s, %s", rd, rs, rt);
15181 }
15182
15183
15184 /*
15185  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15186  *
15187  *   3         2         1
15188  *  10987654321098765432109876543210
15189  *  001000               00010001101
15190  *     rt -----
15191  *          rs -----
15192  *               rd -----
15193  */
15194 std::string NMD::SUBU_16_(uint64 instruction)
15195 {
15196     uint64 rt3_value = extract_rt3_9_8_7(instruction);
15197     uint64 rs3_value = extract_rs3_6_5_4(instruction);
15198     uint64 rd3_value = extract_rd3_3_2_1(instruction);
15199
15200     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
15201     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15202     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
15203
15204     return img::format("SUBU %s, %s, %s", rd3, rs3, rt3);
15205 }
15206
15207
15208 /*
15209  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15210  *
15211  *   3         2         1
15212  *  10987654321098765432109876543210
15213  *  001000               00010001101
15214  *     rt -----
15215  *          rs -----
15216  *               rd -----
15217  */
15218 std::string NMD::SUBU_32_(uint64 instruction)
15219 {
15220     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15221     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15222     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15223
15224     std::string rd = GPR(copy(rd_value));
15225     std::string rs = GPR(copy(rs_value));
15226     std::string rt = GPR(copy(rt_value));
15227
15228     return img::format("SUBU %s, %s, %s", rd, rs, rt);
15229 }
15230
15231
15232 /*
15233  * [DSP] SUBU.PH rd, rs, rt - Subtract unsigned unsigned halfwords
15234  *
15235  *   3         2         1
15236  *  10987654321098765432109876543210
15237  *  001000               01100001101
15238  *     rt -----
15239  *          rs -----
15240  *               rd -----
15241  */
15242 std::string NMD::SUBU_PH(uint64 instruction)
15243 {
15244     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15245     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15246     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15247
15248     std::string rd = GPR(copy(rd_value));
15249     std::string rs = GPR(copy(rs_value));
15250     std::string rt = GPR(copy(rt_value));
15251
15252     return img::format("SUBU.PH %s, %s, %s", rd, rs, rt);
15253 }
15254
15255
15256 /*
15257  * [DSP] SUBU.QB rd, rs, rt - Subtract unsigned quad byte vectors
15258  *
15259  *   3         2         1
15260  *  10987654321098765432109876543210
15261  *  001000               01011001101
15262  *     rt -----
15263  *          rs -----
15264  *               rd -----
15265  */
15266 std::string NMD::SUBU_QB(uint64 instruction)
15267 {
15268     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15269     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15270     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15271
15272     std::string rd = GPR(copy(rd_value));
15273     std::string rs = GPR(copy(rs_value));
15274     std::string rt = GPR(copy(rt_value));
15275
15276     return img::format("SUBU.QB %s, %s, %s", rd, rs, rt);
15277 }
15278
15279
15280 /*
15281  * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with
15282  *         8-bit saturation
15283  *
15284  *   3         2         1
15285  *  10987654321098765432109876543210
15286  *  001000               11100001101
15287  *     rt -----
15288  *          rs -----
15289  *               rd -----
15290  */
15291 std::string NMD::SUBU_S_PH(uint64 instruction)
15292 {
15293     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15294     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15295     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15296
15297     std::string rd = GPR(copy(rd_value));
15298     std::string rs = GPR(copy(rs_value));
15299     std::string rt = GPR(copy(rt_value));
15300
15301     return img::format("SUBU_S.PH %s, %s, %s", rd, rs, rt);
15302 }
15303
15304
15305 /*
15306  * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with
15307  *         8-bit saturation
15308  *
15309  *   3         2         1
15310  *  10987654321098765432109876543210
15311  *  001000               11011001101
15312  *     rt -----
15313  *          rs -----
15314  *               rd -----
15315  */
15316 std::string NMD::SUBU_S_QB(uint64 instruction)
15317 {
15318     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15319     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15320     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15321
15322     std::string rd = GPR(copy(rd_value));
15323     std::string rs = GPR(copy(rs_value));
15324     std::string rt = GPR(copy(rt_value));
15325
15326     return img::format("SUBU_S.QB %s, %s, %s", rd, rs, rt);
15327 }
15328
15329
15330 /*
15331  * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift
15332  *         to halve results
15333  *
15334  *   3         2         1
15335  *  10987654321098765432109876543210
15336  *  001000               01101001101
15337  *     rt -----
15338  *          rs -----
15339  *               rd -----
15340  */
15341 std::string NMD::SUBUH_QB(uint64 instruction)
15342 {
15343     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15344     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15345     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15346
15347     std::string rd = GPR(copy(rd_value));
15348     std::string rs = GPR(copy(rs_value));
15349     std::string rt = GPR(copy(rt_value));
15350
15351     return img::format("SUBUH.QB %s, %s, %s", rd, rs, rt);
15352 }
15353
15354
15355 /*
15356  * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift
15357  *         to halve results with rounding
15358  *
15359  *   3         2         1
15360  *  10987654321098765432109876543210
15361  *  001000               11101001101
15362  *     rt -----
15363  *          rs -----
15364  *               rd -----
15365  */
15366 std::string NMD::SUBUH_R_QB(uint64 instruction)
15367 {
15368     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15369     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15370     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15371
15372     std::string rd = GPR(copy(rd_value));
15373     std::string rs = GPR(copy(rs_value));
15374     std::string rt = GPR(copy(rt_value));
15375
15376     return img::format("SUBUH_R.QB %s, %s, %s", rd, rs, rt);
15377 }
15378
15379
15380 /*
15381  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15382  *
15383  *   3         2         1
15384  *  10987654321098765432109876543210
15385  *  001000               00010001101
15386  *     rt -----
15387  *          rs -----
15388  *               rd -----
15389  */
15390 std::string NMD::SW_16_(uint64 instruction)
15391 {
15392     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15393     uint64 rs3_value = extract_rs3_6_5_4(instruction);
15394     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
15395
15396     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15397     std::string u = IMMEDIATE(copy(u_value));
15398     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15399
15400     return img::format("SW %s, %s(%s)", rtz3, u, rs3);
15401 }
15402
15403
15404 /*
15405  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15406  *
15407  *   3         2         1
15408  *  10987654321098765432109876543210
15409  *  001000               00010001101
15410  *     rt -----
15411  *          rs -----
15412  *               rd -----
15413  */
15414 std::string NMD::SW_4X4_(uint64 instruction)
15415 {
15416     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
15417     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
15418     uint64 u_value = extract_u_3_8__s2(instruction);
15419
15420     std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
15421     std::string u = IMMEDIATE(copy(u_value));
15422     std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
15423
15424     return img::format("SW %s, %s(%s)", rtz4, u, rs4);
15425 }
15426
15427
15428 /*
15429  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15430  *
15431  *   3         2         1
15432  *  10987654321098765432109876543210
15433  *  001000               00010001101
15434  *     rt -----
15435  *          rs -----
15436  *               rd -----
15437  */
15438 std::string NMD::SW_GP16_(uint64 instruction)
15439 {
15440     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
15441     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15442
15443     std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15444     std::string u = IMMEDIATE(copy(u_value));
15445
15446     return img::format("SW %s, %s($%d)", rtz3, u, 28);
15447 }
15448
15449
15450 /*
15451  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15452  *
15453  *   3         2         1
15454  *  10987654321098765432109876543210
15455  *  001000               00010001101
15456  *     rt -----
15457  *          rs -----
15458  *               rd -----
15459  */
15460 std::string NMD::SW_GP_(uint64 instruction)
15461 {
15462     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15463     uint64 u_value = extract_u_20_to_2__s2(instruction);
15464
15465     std::string rt = GPR(copy(rt_value));
15466     std::string u = IMMEDIATE(copy(u_value));
15467
15468     return img::format("SW %s, %s($%d)", rt, u, 28);
15469 }
15470
15471
15472 /*
15473  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15474  *
15475  *   3         2         1
15476  *  10987654321098765432109876543210
15477  *  001000               00010001101
15478  *     rt -----
15479  *          rs -----
15480  *               rd -----
15481  */
15482 std::string NMD::SW_S9_(uint64 instruction)
15483 {
15484     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15485     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15486     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15487
15488     std::string rt = GPR(copy(rt_value));
15489     std::string s = IMMEDIATE(copy(s_value));
15490     std::string rs = GPR(copy(rs_value));
15491
15492     return img::format("SW %s, %s(%s)", rt, s, rs);
15493 }
15494
15495
15496 /*
15497  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15498  *
15499  *   3         2         1
15500  *  10987654321098765432109876543210
15501  *  001000               00010001101
15502  *     rt -----
15503  *          rs -----
15504  *               rd -----
15505  */
15506 std::string NMD::SW_SP_(uint64 instruction)
15507 {
15508     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
15509     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
15510
15511     std::string rt = GPR(copy(rt_value));
15512     std::string u = IMMEDIATE(copy(u_value));
15513
15514     return img::format("SW %s, %s($%d)", rt, u, 29);
15515 }
15516
15517
15518 /*
15519  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15520  *
15521  *   3         2         1
15522  *  10987654321098765432109876543210
15523  *  001000               00010001101
15524  *     rt -----
15525  *          rs -----
15526  *               rd -----
15527  */
15528 std::string NMD::SW_U12_(uint64 instruction)
15529 {
15530     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15531     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15532     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15533
15534     std::string rt = GPR(copy(rt_value));
15535     std::string u = IMMEDIATE(copy(u_value));
15536     std::string rs = GPR(copy(rs_value));
15537
15538     return img::format("SW %s, %s(%s)", rt, u, rs);
15539 }
15540
15541
15542 /*
15543  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15544  *
15545  *   3         2         1
15546  *  10987654321098765432109876543210
15547  *  001000               00010001101
15548  *     rt -----
15549  *          rs -----
15550  *               rd -----
15551  */
15552 std::string NMD::SWC1_GP_(uint64 instruction)
15553 {
15554     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15555     uint64 u_value = extract_u_17_to_2__s2(instruction);
15556
15557     std::string ft = FPR(copy(ft_value));
15558     std::string u = IMMEDIATE(copy(u_value));
15559
15560     return img::format("SWC1 %s, %s($%d)", ft, u, 28);
15561 }
15562
15563
15564 /*
15565  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15566  *
15567  *   3         2         1
15568  *  10987654321098765432109876543210
15569  *  001000               00010001101
15570  *     rt -----
15571  *          rs -----
15572  *               rd -----
15573  */
15574 std::string NMD::SWC1_S9_(uint64 instruction)
15575 {
15576     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15577     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15578     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15579
15580     std::string ft = FPR(copy(ft_value));
15581     std::string s = IMMEDIATE(copy(s_value));
15582     std::string rs = GPR(copy(rs_value));
15583
15584     return img::format("SWC1 %s, %s(%s)", ft, s, rs);
15585 }
15586
15587
15588 /*
15589  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15590  *
15591  *   3         2         1
15592  *  10987654321098765432109876543210
15593  *  001000               00010001101
15594  *     rt -----
15595  *          rs -----
15596  *               rd -----
15597  */
15598 std::string NMD::SWC1_U12_(uint64 instruction)
15599 {
15600     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15601     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15602     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15603
15604     std::string ft = FPR(copy(ft_value));
15605     std::string u = IMMEDIATE(copy(u_value));
15606     std::string rs = GPR(copy(rs_value));
15607
15608     return img::format("SWC1 %s, %s(%s)", ft, u, rs);
15609 }
15610
15611
15612 /*
15613  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15614  *
15615  *   3         2         1
15616  *  10987654321098765432109876543210
15617  *  001000               00010001101
15618  *     rt -----
15619  *          rs -----
15620  *               rd -----
15621  */
15622 std::string NMD::SWC1X(uint64 instruction)
15623 {
15624     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15625     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15626     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15627
15628     std::string ft = FPR(copy(ft_value));
15629     std::string rs = GPR(copy(rs_value));
15630     std::string rt = GPR(copy(rt_value));
15631
15632     return img::format("SWC1X %s, %s(%s)", ft, rs, rt);
15633 }
15634
15635
15636 /*
15637  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15638  *
15639  *   3         2         1
15640  *  10987654321098765432109876543210
15641  *  001000               00010001101
15642  *     rt -----
15643  *          rs -----
15644  *               rd -----
15645  */
15646 std::string NMD::SWC1XS(uint64 instruction)
15647 {
15648     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15649     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15650     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15651
15652     std::string ft = FPR(copy(ft_value));
15653     std::string rs = GPR(copy(rs_value));
15654     std::string rt = GPR(copy(rt_value));
15655
15656     return img::format("SWC1XS %s, %s(%s)", ft, rs, rt);
15657 }
15658
15659
15660 /*
15661  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15662  *
15663  *   3         2         1
15664  *  10987654321098765432109876543210
15665  *  001000               00010001101
15666  *     rt -----
15667  *          rs -----
15668  *               rd -----
15669  */
15670 std::string NMD::SWC2(uint64 instruction)
15671 {
15672     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
15673     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15674     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15675
15676     std::string cs = CPR(copy(cs_value));
15677     std::string s = IMMEDIATE(copy(s_value));
15678     std::string rs = GPR(copy(rs_value));
15679
15680     return img::format("SWC2 %s, %s(%s)", cs, s, rs);
15681 }
15682
15683
15684 /*
15685  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15686  *
15687  *   3         2         1
15688  *  10987654321098765432109876543210
15689  *  001000               00010001101
15690  *     rt -----
15691  *          rs -----
15692  *               rd -----
15693  */
15694 std::string NMD::SWE(uint64 instruction)
15695 {
15696     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15697     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15698     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15699
15700     std::string rt = GPR(copy(rt_value));
15701     std::string s = IMMEDIATE(copy(s_value));
15702     std::string rs = GPR(copy(rs_value));
15703
15704     return img::format("SWE %s, %s(%s)", rt, s, rs);
15705 }
15706
15707
15708 /*
15709  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15710  *
15711  *   3         2         1
15712  *  10987654321098765432109876543210
15713  *  001000               00010001101
15714  *     rt -----
15715  *          rs -----
15716  *               rd -----
15717  */
15718 std::string NMD::SWM(uint64 instruction)
15719 {
15720     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15721     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15722     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15723     uint64 count3_value = extract_count3_14_13_12(instruction);
15724
15725     std::string rt = GPR(copy(rt_value));
15726     std::string s = IMMEDIATE(copy(s_value));
15727     std::string rs = GPR(copy(rs_value));
15728     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
15729
15730     return img::format("SWM %s, %s(%s), %s", rt, s, rs, count3);
15731 }
15732
15733
15734 /*
15735  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15736  *
15737  *   3         2         1
15738  *  10987654321098765432109876543210
15739  *  001000               00010001101
15740  *     rt -----
15741  *          rs -----
15742  *               rd -----
15743  */
15744 std::string NMD::SWPC_48_(uint64 instruction)
15745 {
15746     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
15747     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
15748
15749     std::string rt = GPR(copy(rt_value));
15750     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
15751
15752     return img::format("SWPC %s, %s", rt, s);
15753 }
15754
15755
15756 /*
15757  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15758  *
15759  *   3         2         1
15760  *  10987654321098765432109876543210
15761  *  001000               00010001101
15762  *     rt -----
15763  *          rs -----
15764  *               rd -----
15765  */
15766 std::string NMD::SWX(uint64 instruction)
15767 {
15768     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15769     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15770     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15771
15772     std::string rd = GPR(copy(rd_value));
15773     std::string rs = GPR(copy(rs_value));
15774     std::string rt = GPR(copy(rt_value));
15775
15776     return img::format("SWX %s, %s(%s)", rd, rs, rt);
15777 }
15778
15779
15780 /*
15781  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15782  *
15783  *   3         2         1
15784  *  10987654321098765432109876543210
15785  *  001000               00010001101
15786  *     rt -----
15787  *          rs -----
15788  *               rd -----
15789  */
15790 std::string NMD::SWXS(uint64 instruction)
15791 {
15792     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15793     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15794     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15795
15796     std::string rd = GPR(copy(rd_value));
15797     std::string rs = GPR(copy(rs_value));
15798     std::string rt = GPR(copy(rt_value));
15799
15800     return img::format("SWXS %s, %s(%s)", rd, rs, rt);
15801 }
15802
15803
15804 /*
15805  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15806  *
15807  *   3         2         1
15808  *  10987654321098765432109876543210
15809  *  001000               00010001101
15810  *     rt -----
15811  *          rs -----
15812  *               rd -----
15813  */
15814 std::string NMD::SYNC(uint64 instruction)
15815 {
15816     uint64 stype_value = extract_stype_20_19_18_17_16(instruction);
15817
15818     std::string stype = IMMEDIATE(copy(stype_value));
15819
15820     return img::format("SYNC %s", stype);
15821 }
15822
15823
15824 /*
15825  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15826  *
15827  *   3         2         1
15828  *  10987654321098765432109876543210
15829  *  001000               00010001101
15830  *     rt -----
15831  *          rs -----
15832  *               rd -----
15833  */
15834 std::string NMD::SYNCI(uint64 instruction)
15835 {
15836     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15837     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15838
15839     std::string s = IMMEDIATE(copy(s_value));
15840     std::string rs = GPR(copy(rs_value));
15841
15842     return img::format("SYNCI %s(%s)", s, rs);
15843 }
15844
15845
15846 /*
15847  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15848  *
15849  *   3         2         1
15850  *  10987654321098765432109876543210
15851  *  001000               00010001101
15852  *     rt -----
15853  *          rs -----
15854  *               rd -----
15855  */
15856 std::string NMD::SYNCIE(uint64 instruction)
15857 {
15858     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15859     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15860
15861     std::string s = IMMEDIATE(copy(s_value));
15862     std::string rs = GPR(copy(rs_value));
15863
15864     return img::format("SYNCIE %s(%s)", s, rs);
15865 }
15866
15867
15868 /*
15869  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15870  *
15871  *   3         2         1
15872  *  10987654321098765432109876543210
15873  *  001000               00010001101
15874  *     rt -----
15875  *          rs -----
15876  *               rd -----
15877  */
15878 std::string NMD::SYSCALL_16_(uint64 instruction)
15879 {
15880     uint64 code_value = extract_code_1_0(instruction);
15881
15882     std::string code = IMMEDIATE(copy(code_value));
15883
15884     return img::format("SYSCALL %s", code);
15885 }
15886
15887
15888 /*
15889  * SYSCALL code - System Call. Cause a System Call Exception
15890  *
15891  *   3         2         1
15892  *  10987654321098765432109876543210
15893  *  00000000000010
15894  *           code ------------------
15895  */
15896 std::string NMD::SYSCALL_32_(uint64 instruction)
15897 {
15898     uint64 code_value = extract_code_17_to_0(instruction);
15899
15900     std::string code = IMMEDIATE(copy(code_value));
15901
15902     return img::format("SYSCALL %s", code);
15903 }
15904
15905
15906 /*
15907  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15908  *
15909  *   3         2         1
15910  *  10987654321098765432109876543210
15911  *  001000               00010001101
15912  *     rt -----
15913  *          rs -----
15914  *               rd -----
15915  */
15916 std::string NMD::TEQ(uint64 instruction)
15917 {
15918     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15919     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15920
15921     std::string rs = GPR(copy(rs_value));
15922     std::string rt = GPR(copy(rt_value));
15923
15924     return img::format("TEQ %s, %s", rs, rt);
15925 }
15926
15927
15928 /*
15929  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15930  *
15931  *   3         2         1
15932  *  10987654321098765432109876543210
15933  *  001000               00010001101
15934  *     rt -----
15935  *          rs -----
15936  *               rd -----
15937  */
15938 std::string NMD::TLBGINV(uint64 instruction)
15939 {
15940     (void)instruction;
15941
15942     return "TLBGINV ";
15943 }
15944
15945
15946 /*
15947  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15948  *
15949  *   3         2         1
15950  *  10987654321098765432109876543210
15951  *  001000               00010001101
15952  *     rt -----
15953  *          rs -----
15954  *               rd -----
15955  */
15956 std::string NMD::TLBGINVF(uint64 instruction)
15957 {
15958     (void)instruction;
15959
15960     return "TLBGINVF ";
15961 }
15962
15963
15964 /*
15965  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15966  *
15967  *   3         2         1
15968  *  10987654321098765432109876543210
15969  *  001000               00010001101
15970  *     rt -----
15971  *          rs -----
15972  *               rd -----
15973  */
15974 std::string NMD::TLBGP(uint64 instruction)
15975 {
15976     (void)instruction;
15977
15978     return "TLBGP ";
15979 }
15980
15981
15982 /*
15983  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15984  *
15985  *   3         2         1
15986  *  10987654321098765432109876543210
15987  *  001000               00010001101
15988  *     rt -----
15989  *          rs -----
15990  *               rd -----
15991  */
15992 std::string NMD::TLBGR(uint64 instruction)
15993 {
15994     (void)instruction;
15995
15996     return "TLBGR ";
15997 }
15998
15999
16000 /*
16001  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16002  *
16003  *   3         2         1
16004  *  10987654321098765432109876543210
16005  *  001000               00010001101
16006  *     rt -----
16007  *          rs -----
16008  *               rd -----
16009  */
16010 std::string NMD::TLBGWI(uint64 instruction)
16011 {
16012     (void)instruction;
16013
16014     return "TLBGWI ";
16015 }
16016
16017
16018 /*
16019  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16020  *
16021  *   3         2         1
16022  *  10987654321098765432109876543210
16023  *  001000               00010001101
16024  *     rt -----
16025  *          rs -----
16026  *               rd -----
16027  */
16028 std::string NMD::TLBGWR(uint64 instruction)
16029 {
16030     (void)instruction;
16031
16032     return "TLBGWR ";
16033 }
16034
16035
16036 /*
16037  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16038  *
16039  *   3         2         1
16040  *  10987654321098765432109876543210
16041  *  001000               00010001101
16042  *     rt -----
16043  *          rs -----
16044  *               rd -----
16045  */
16046 std::string NMD::TLBINV(uint64 instruction)
16047 {
16048     (void)instruction;
16049
16050     return "TLBINV ";
16051 }
16052
16053
16054 /*
16055  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16056  *
16057  *   3         2         1
16058  *  10987654321098765432109876543210
16059  *  001000               00010001101
16060  *     rt -----
16061  *          rs -----
16062  *               rd -----
16063  */
16064 std::string NMD::TLBINVF(uint64 instruction)
16065 {
16066     (void)instruction;
16067
16068     return "TLBINVF ";
16069 }
16070
16071
16072 /*
16073  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16074  *
16075  *   3         2         1
16076  *  10987654321098765432109876543210
16077  *  001000               00010001101
16078  *     rt -----
16079  *          rs -----
16080  *               rd -----
16081  */
16082 std::string NMD::TLBP(uint64 instruction)
16083 {
16084     (void)instruction;
16085
16086     return "TLBP ";
16087 }
16088
16089
16090 /*
16091  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16092  *
16093  *   3         2         1
16094  *  10987654321098765432109876543210
16095  *  001000               00010001101
16096  *     rt -----
16097  *          rs -----
16098  *               rd -----
16099  */
16100 std::string NMD::TLBR(uint64 instruction)
16101 {
16102     (void)instruction;
16103
16104     return "TLBR ";
16105 }
16106
16107
16108 /*
16109  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16110  *
16111  *   3         2         1
16112  *  10987654321098765432109876543210
16113  *  001000               00010001101
16114  *     rt -----
16115  *          rs -----
16116  *               rd -----
16117  */
16118 std::string NMD::TLBWI(uint64 instruction)
16119 {
16120     (void)instruction;
16121
16122     return "TLBWI ";
16123 }
16124
16125
16126 /*
16127  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16128  *
16129  *   3         2         1
16130  *  10987654321098765432109876543210
16131  *  001000               00010001101
16132  *     rt -----
16133  *          rs -----
16134  *               rd -----
16135  */
16136 std::string NMD::TLBWR(uint64 instruction)
16137 {
16138     (void)instruction;
16139
16140     return "TLBWR ";
16141 }
16142
16143
16144 /*
16145  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16146  *
16147  *   3         2         1
16148  *  10987654321098765432109876543210
16149  *  001000               00010001101
16150  *     rt -----
16151  *          rs -----
16152  *               rd -----
16153  */
16154 std::string NMD::TNE(uint64 instruction)
16155 {
16156     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16157     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16158
16159     std::string rs = GPR(copy(rs_value));
16160     std::string rt = GPR(copy(rt_value));
16161
16162     return img::format("TNE %s, %s", rs, rt);
16163 }
16164
16165
16166 /*
16167  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16168  *
16169  *   3         2         1
16170  *  10987654321098765432109876543210
16171  *  001000               00010001101
16172  *     rt -----
16173  *          rs -----
16174  *               rd -----
16175  */
16176 std::string NMD::TRUNC_L_D(uint64 instruction)
16177 {
16178     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16179     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16180
16181     std::string ft = FPR(copy(ft_value));
16182     std::string fs = FPR(copy(fs_value));
16183
16184     return img::format("TRUNC.L.D %s, %s", ft, fs);
16185 }
16186
16187
16188 /*
16189  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16190  *
16191  *   3         2         1
16192  *  10987654321098765432109876543210
16193  *  001000               00010001101
16194  *     rt -----
16195  *          rs -----
16196  *               rd -----
16197  */
16198 std::string NMD::TRUNC_L_S(uint64 instruction)
16199 {
16200     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16201     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16202
16203     std::string ft = FPR(copy(ft_value));
16204     std::string fs = FPR(copy(fs_value));
16205
16206     return img::format("TRUNC.L.S %s, %s", ft, fs);
16207 }
16208
16209
16210 /*
16211  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16212  *
16213  *   3         2         1
16214  *  10987654321098765432109876543210
16215  *  001000               00010001101
16216  *     rt -----
16217  *          rs -----
16218  *               rd -----
16219  */
16220 std::string NMD::TRUNC_W_D(uint64 instruction)
16221 {
16222     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16223     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16224
16225     std::string ft = FPR(copy(ft_value));
16226     std::string fs = FPR(copy(fs_value));
16227
16228     return img::format("TRUNC.W.D %s, %s", ft, fs);
16229 }
16230
16231
16232 /*
16233  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16234  *
16235  *   3         2         1
16236  *  10987654321098765432109876543210
16237  *  001000               00010001101
16238  *     rt -----
16239  *          rs -----
16240  *               rd -----
16241  */
16242 std::string NMD::TRUNC_W_S(uint64 instruction)
16243 {
16244     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16245     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16246
16247     std::string ft = FPR(copy(ft_value));
16248     std::string fs = FPR(copy(fs_value));
16249
16250     return img::format("TRUNC.W.S %s, %s", ft, fs);
16251 }
16252
16253
16254 /*
16255  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16256  *
16257  *   3         2         1
16258  *  10987654321098765432109876543210
16259  *  001000               00010001101
16260  *     rt -----
16261  *          rs -----
16262  *               rd -----
16263  */
16264 std::string NMD::UALDM(uint64 instruction)
16265 {
16266     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16267     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16268     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16269     uint64 count3_value = extract_count3_14_13_12(instruction);
16270
16271     std::string rt = GPR(copy(rt_value));
16272     std::string s = IMMEDIATE(copy(s_value));
16273     std::string rs = GPR(copy(rs_value));
16274     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16275
16276     return img::format("UALDM %s, %s(%s), %s", rt, s, rs, count3);
16277 }
16278
16279
16280 /*
16281  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16282  *
16283  *   3         2         1
16284  *  10987654321098765432109876543210
16285  *  001000               00010001101
16286  *     rt -----
16287  *          rs -----
16288  *               rd -----
16289  */
16290 std::string NMD::UALH(uint64 instruction)
16291 {
16292     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16293     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16294     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16295
16296     std::string rt = GPR(copy(rt_value));
16297     std::string s = IMMEDIATE(copy(s_value));
16298     std::string rs = GPR(copy(rs_value));
16299
16300     return img::format("UALH %s, %s(%s)", rt, s, rs);
16301 }
16302
16303
16304 /*
16305  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16306  *
16307  *   3         2         1
16308  *  10987654321098765432109876543210
16309  *  001000               00010001101
16310  *     rt -----
16311  *          rs -----
16312  *               rd -----
16313  */
16314 std::string NMD::UALWM(uint64 instruction)
16315 {
16316     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16317     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16318     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16319     uint64 count3_value = extract_count3_14_13_12(instruction);
16320
16321     std::string rt = GPR(copy(rt_value));
16322     std::string s = IMMEDIATE(copy(s_value));
16323     std::string rs = GPR(copy(rs_value));
16324     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16325
16326     return img::format("UALWM %s, %s(%s), %s", rt, s, rs, count3);
16327 }
16328
16329
16330 /*
16331  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16332  *
16333  *   3         2         1
16334  *  10987654321098765432109876543210
16335  *  001000               00010001101
16336  *     rt -----
16337  *          rs -----
16338  *               rd -----
16339  */
16340 std::string NMD::UASDM(uint64 instruction)
16341 {
16342     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16343     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16344     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16345     uint64 count3_value = extract_count3_14_13_12(instruction);
16346
16347     std::string rt = GPR(copy(rt_value));
16348     std::string s = IMMEDIATE(copy(s_value));
16349     std::string rs = GPR(copy(rs_value));
16350     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16351
16352     return img::format("UASDM %s, %s(%s), %s", rt, s, rs, count3);
16353 }
16354
16355
16356 /*
16357  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16358  *
16359  *   3         2         1
16360  *  10987654321098765432109876543210
16361  *  001000               00010001101
16362  *     rt -----
16363  *          rs -----
16364  *               rd -----
16365  */
16366 std::string NMD::UASH(uint64 instruction)
16367 {
16368     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16369     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16370     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16371
16372     std::string rt = GPR(copy(rt_value));
16373     std::string s = IMMEDIATE(copy(s_value));
16374     std::string rs = GPR(copy(rs_value));
16375
16376     return img::format("UASH %s, %s(%s)", rt, s, rs);
16377 }
16378
16379
16380 /*
16381  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16382  *
16383  *   3         2         1
16384  *  10987654321098765432109876543210
16385  *  001000               00010001101
16386  *     rt -----
16387  *          rs -----
16388  *               rd -----
16389  */
16390 std::string NMD::UASWM(uint64 instruction)
16391 {
16392     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16393     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16394     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16395     uint64 count3_value = extract_count3_14_13_12(instruction);
16396
16397     std::string rt = GPR(copy(rt_value));
16398     std::string s = IMMEDIATE(copy(s_value));
16399     std::string rs = GPR(copy(rs_value));
16400     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16401
16402     return img::format("UASWM %s, %s(%s), %s", rt, s, rs, count3);
16403 }
16404
16405
16406 /*
16407  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16408  *
16409  *   3         2         1
16410  *  10987654321098765432109876543210
16411  *  001000               00010001101
16412  *     rt -----
16413  *          rs -----
16414  *               rd -----
16415  */
16416 std::string NMD::UDI(uint64 instruction)
16417 {
16418     uint64 op_value = extract_op_25_to_3(instruction);
16419
16420     std::string op = IMMEDIATE(copy(op_value));
16421
16422     return img::format("UDI %s", op);
16423 }
16424
16425
16426 /*
16427  * WAIT code - Enter Wait State
16428  *
16429  *   3         2         1
16430  *  10987654321098765432109876543210
16431  *  001000          1100001101111111
16432  *   code ----------
16433  */
16434 std::string NMD::WAIT(uint64 instruction)
16435 {
16436     uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction);
16437
16438     std::string code = IMMEDIATE(copy(code_value));
16439
16440     return img::format("WAIT %s", code);
16441 }
16442
16443
16444 /*
16445  * [DSP] WRDSP rt, mask - Write selected fields from a GPR to the DSPControl
16446  *         register
16447  *
16448  *   3         2         1
16449  *  10987654321098765432109876543210
16450  *  001000            01011001111111
16451  *     rt -----
16452  *        mask -------
16453  */
16454 std::string NMD::WRDSP(uint64 instruction)
16455 {
16456     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16457     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
16458
16459     std::string rt = GPR(copy(rt_value));
16460     std::string mask = IMMEDIATE(copy(mask_value));
16461
16462     return img::format("WRDSP %s, %s", rt, mask);
16463 }
16464
16465
16466 /*
16467  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16468  *
16469  *   3         2         1
16470  *  10987654321098765432109876543210
16471  *  001000               00010001101
16472  *     rt -----
16473  *          rs -----
16474  *               rd -----
16475  */
16476 std::string NMD::WRPGPR(uint64 instruction)
16477 {
16478     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16479     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16480
16481     std::string rt = GPR(copy(rt_value));
16482     std::string rs = GPR(copy(rs_value));
16483
16484     return img::format("WRPGPR %s, %s", rt, rs);
16485 }
16486
16487
16488 /*
16489  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16490  *
16491  *   3         2         1
16492  *  10987654321098765432109876543210
16493  *  001000               00010001101
16494  *     rt -----
16495  *          rs -----
16496  *               rd -----
16497  */
16498 std::string NMD::XOR_16_(uint64 instruction)
16499 {
16500     uint64 rt3_value = extract_rt3_9_8_7(instruction);
16501     uint64 rs3_value = extract_rs3_6_5_4(instruction);
16502
16503     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
16504     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
16505
16506     return img::format("XOR %s, %s", rs3, rt3);
16507 }
16508
16509
16510 /*
16511  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16512  *
16513  *   3         2         1
16514  *  10987654321098765432109876543210
16515  *  001000               00010001101
16516  *     rt -----
16517  *          rs -----
16518  *               rd -----
16519  */
16520 std::string NMD::XOR_32_(uint64 instruction)
16521 {
16522     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16523     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16524     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
16525
16526     std::string rd = GPR(copy(rd_value));
16527     std::string rs = GPR(copy(rs_value));
16528     std::string rt = GPR(copy(rt_value));
16529
16530     return img::format("XOR %s, %s, %s", rd, rs, rt);
16531 }
16532
16533
16534 /*
16535  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16536  *
16537  *   3         2         1
16538  *  10987654321098765432109876543210
16539  *  001000               00010001101
16540  *     rt -----
16541  *          rs -----
16542  *               rd -----
16543  */
16544 std::string NMD::XORI(uint64 instruction)
16545 {
16546     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16547     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16548     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
16549
16550     std::string rt = GPR(copy(rt_value));
16551     std::string rs = GPR(copy(rs_value));
16552     std::string u = IMMEDIATE(copy(u_value));
16553
16554     return img::format("XORI %s, %s, %s", rt, rs, u);
16555 }
16556
16557
16558 /*
16559  * YIELD rt, rs -
16560  *
16561  *   3         2         1
16562  *  10987654321098765432109876543210
16563  *  001000               00010001101
16564  *     rt -----
16565  *          rs -----
16566  */
16567 std::string NMD::YIELD(uint64 instruction)
16568 {
16569     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16570     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16571
16572     std::string rt = GPR(copy(rt_value));
16573     std::string rs = GPR(copy(rs_value));
16574
16575     return img::format("YIELD %s, %s", rt, rs);
16576 }
16577
16578
16579
16580 NMD::Pool NMD::P_SYSCALL[2] = {
16581     { instruction         , 0                   , 0   , 32,
16582        0xfffc0000, 0x00080000, &NMD::SYSCALL_32_      , 0,
16583        0x0                 },        /* SYSCALL[32] */
16584     { instruction         , 0                   , 0   , 32,
16585        0xfffc0000, 0x000c0000, &NMD::HYPCALL          , 0,
16586        CP0_ | VZ_          },        /* HYPCALL */
16587 };
16588
16589
16590 NMD::Pool NMD::P_RI[4] = {
16591     { instruction         , 0                   , 0   , 32,
16592        0xfff80000, 0x00000000, &NMD::SIGRIE           , 0,
16593        0x0                 },        /* SIGRIE */
16594     { pool                , P_SYSCALL           , 2   , 32,
16595        0xfff80000, 0x00080000, 0                      , 0,
16596        0x0                 },        /* P.SYSCALL */
16597     { instruction         , 0                   , 0   , 32,
16598        0xfff80000, 0x00100000, &NMD::BREAK_32_        , 0,
16599        0x0                 },        /* BREAK[32] */
16600     { instruction         , 0                   , 0   , 32,
16601        0xfff80000, 0x00180000, &NMD::SDBBP_32_        , 0,
16602        EJTAG_              },        /* SDBBP[32] */
16603 };
16604
16605
16606 NMD::Pool NMD::P_ADDIU[2] = {
16607     { pool                , P_RI                , 4   , 32,
16608        0xffe00000, 0x00000000, 0                      , 0,
16609        0x0                 },        /* P.RI */
16610     { instruction         , 0                   , 0   , 32,
16611        0xfc000000, 0x00000000, &NMD::ADDIU_32_        , &NMD::ADDIU_32__cond   ,
16612        0x0                 },        /* ADDIU[32] */
16613 };
16614
16615
16616 NMD::Pool NMD::P_TRAP[2] = {
16617     { instruction         , 0                   , 0   , 32,
16618        0xfc0007ff, 0x20000000, &NMD::TEQ              , 0,
16619        XMMS_               },        /* TEQ */
16620     { instruction         , 0                   , 0   , 32,
16621        0xfc0007ff, 0x20000400, &NMD::TNE              , 0,
16622        XMMS_               },        /* TNE */
16623 };
16624
16625
16626 NMD::Pool NMD::P_CMOVE[2] = {
16627     { instruction         , 0                   , 0   , 32,
16628        0xfc0007ff, 0x20000210, &NMD::MOVZ             , 0,
16629        0x0                 },        /* MOVZ */
16630     { instruction         , 0                   , 0   , 32,
16631        0xfc0007ff, 0x20000610, &NMD::MOVN             , 0,
16632        0x0                 },        /* MOVN */
16633 };
16634
16635
16636 NMD::Pool NMD::P_D_MT_VPE[2] = {
16637     { instruction         , 0                   , 0   , 32,
16638        0xfc1f3fff, 0x20010ab0, &NMD::DMT              , 0,
16639        MT_                 },        /* DMT */
16640     { instruction         , 0                   , 0   , 32,
16641        0xfc1f3fff, 0x20000ab0, &NMD::DVPE             , 0,
16642        MT_                 },        /* DVPE */
16643 };
16644
16645
16646 NMD::Pool NMD::P_E_MT_VPE[2] = {
16647     { instruction         , 0                   , 0   , 32,
16648        0xfc1f3fff, 0x20010eb0, &NMD::EMT              , 0,
16649        MT_                 },        /* EMT */
16650     { instruction         , 0                   , 0   , 32,
16651        0xfc1f3fff, 0x20000eb0, &NMD::EVPE             , 0,
16652        MT_                 },        /* EVPE */
16653 };
16654
16655
16656 NMD::Pool NMD::_P_MT_VPE[2] = {
16657     { pool                , P_D_MT_VPE          , 2   , 32,
16658        0xfc003fff, 0x20000ab0, 0                      , 0,
16659        0x0                 },        /* P.D_MT_VPE */
16660     { pool                , P_E_MT_VPE          , 2   , 32,
16661        0xfc003fff, 0x20000eb0, 0                      , 0,
16662        0x0                 },        /* P.E_MT_VPE */
16663 };
16664
16665
16666 NMD::Pool NMD::P_MT_VPE[8] = {
16667     { reserved_block      , 0                   , 0   , 32,
16668        0xfc003bff, 0x200002b0, 0                      , 0,
16669        0x0                 },        /* P.MT_VPE~*(0) */
16670     { pool                , _P_MT_VPE           , 2   , 32,
16671        0xfc003bff, 0x20000ab0, 0                      , 0,
16672        0x0                 },        /* _P.MT_VPE */
16673     { reserved_block      , 0                   , 0   , 32,
16674        0xfc003bff, 0x200012b0, 0                      , 0,
16675        0x0                 },        /* P.MT_VPE~*(2) */
16676     { reserved_block      , 0                   , 0   , 32,
16677        0xfc003bff, 0x20001ab0, 0                      , 0,
16678        0x0                 },        /* P.MT_VPE~*(3) */
16679     { reserved_block      , 0                   , 0   , 32,
16680        0xfc003bff, 0x200022b0, 0                      , 0,
16681        0x0                 },        /* P.MT_VPE~*(4) */
16682     { reserved_block      , 0                   , 0   , 32,
16683        0xfc003bff, 0x20002ab0, 0                      , 0,
16684        0x0                 },        /* P.MT_VPE~*(5) */
16685     { reserved_block      , 0                   , 0   , 32,
16686        0xfc003bff, 0x200032b0, 0                      , 0,
16687        0x0                 },        /* P.MT_VPE~*(6) */
16688     { reserved_block      , 0                   , 0   , 32,
16689        0xfc003bff, 0x20003ab0, 0                      , 0,
16690        0x0                 },        /* P.MT_VPE~*(7) */
16691 };
16692
16693
16694 NMD::Pool NMD::P_DVP[2] = {
16695     { instruction         , 0                   , 0   , 32,
16696        0xfc00ffff, 0x20000390, &NMD::DVP              , 0,
16697        0x0                 },        /* DVP */
16698     { instruction         , 0                   , 0   , 32,
16699        0xfc00ffff, 0x20000790, &NMD::EVP              , 0,
16700        0x0                 },        /* EVP */
16701 };
16702
16703
16704 NMD::Pool NMD::P_SLTU[2] = {
16705     { pool                , P_DVP               , 2   , 32,
16706        0xfc00fbff, 0x20000390, 0                      , 0,
16707        0x0                 },        /* P.DVP */
16708     { instruction         , 0                   , 0   , 32,
16709        0xfc0003ff, 0x20000390, &NMD::SLTU             , &NMD::SLTU_cond        ,
16710        0x0                 },        /* SLTU */
16711 };
16712
16713
16714 NMD::Pool NMD::_POOL32A0[128] = {
16715     { pool                , P_TRAP              , 2   , 32,
16716        0xfc0003ff, 0x20000000, 0                      , 0,
16717        0x0                 },        /* P.TRAP */
16718     { instruction         , 0                   , 0   , 32,
16719        0xfc0003ff, 0x20000008, &NMD::SEB              , 0,
16720        XMMS_               },        /* SEB */
16721     { instruction         , 0                   , 0   , 32,
16722        0xfc0003ff, 0x20000010, &NMD::SLLV             , 0,
16723        0x0                 },        /* SLLV */
16724     { instruction         , 0                   , 0   , 32,
16725        0xfc0003ff, 0x20000018, &NMD::MUL_32_          , 0,
16726        0x0                 },        /* MUL[32] */
16727     { reserved_block      , 0                   , 0   , 32,
16728        0xfc0003ff, 0x20000020, 0                      , 0,
16729        0x0                 },        /* _POOL32A0~*(4) */
16730     { reserved_block      , 0                   , 0   , 32,
16731        0xfc0003ff, 0x20000028, 0                      , 0,
16732        0x0                 },        /* _POOL32A0~*(5) */
16733     { instruction         , 0                   , 0   , 32,
16734        0xfc0003ff, 0x20000030, &NMD::MFC0             , 0,
16735        0x0                 },        /* MFC0 */
16736     { instruction         , 0                   , 0   , 32,
16737        0xfc0003ff, 0x20000038, &NMD::MFHC0            , 0,
16738        CP0_ | MVH_         },        /* MFHC0 */
16739     { reserved_block      , 0                   , 0   , 32,
16740        0xfc0003ff, 0x20000040, 0                      , 0,
16741        0x0                 },        /* _POOL32A0~*(8) */
16742     { instruction         , 0                   , 0   , 32,
16743        0xfc0003ff, 0x20000048, &NMD::SEH              , 0,
16744        0x0                 },        /* SEH */
16745     { instruction         , 0                   , 0   , 32,
16746        0xfc0003ff, 0x20000050, &NMD::SRLV             , 0,
16747        0x0                 },        /* SRLV */
16748     { instruction         , 0                   , 0   , 32,
16749        0xfc0003ff, 0x20000058, &NMD::MUH              , 0,
16750        0x0                 },        /* MUH */
16751     { reserved_block      , 0                   , 0   , 32,
16752        0xfc0003ff, 0x20000060, 0                      , 0,
16753        0x0                 },        /* _POOL32A0~*(12) */
16754     { reserved_block      , 0                   , 0   , 32,
16755        0xfc0003ff, 0x20000068, 0                      , 0,
16756        0x0                 },        /* _POOL32A0~*(13) */
16757     { instruction         , 0                   , 0   , 32,
16758        0xfc0003ff, 0x20000070, &NMD::MTC0             , 0,
16759        CP0_                },        /* MTC0 */
16760     { instruction         , 0                   , 0   , 32,
16761        0xfc0003ff, 0x20000078, &NMD::MTHC0            , 0,
16762        CP0_ | MVH_         },        /* MTHC0 */
16763     { reserved_block      , 0                   , 0   , 32,
16764        0xfc0003ff, 0x20000080, 0                      , 0,
16765        0x0                 },        /* _POOL32A0~*(16) */
16766     { reserved_block      , 0                   , 0   , 32,
16767        0xfc0003ff, 0x20000088, 0                      , 0,
16768        0x0                 },        /* _POOL32A0~*(17) */
16769     { instruction         , 0                   , 0   , 32,
16770        0xfc0003ff, 0x20000090, &NMD::SRAV             , 0,
16771        0x0                 },        /* SRAV */
16772     { instruction         , 0                   , 0   , 32,
16773        0xfc0003ff, 0x20000098, &NMD::MULU             , 0,
16774        0x0                 },        /* MULU */
16775     { reserved_block      , 0                   , 0   , 32,
16776        0xfc0003ff, 0x200000a0, 0                      , 0,
16777        0x0                 },        /* _POOL32A0~*(20) */
16778     { reserved_block      , 0                   , 0   , 32,
16779        0xfc0003ff, 0x200000a8, 0                      , 0,
16780        0x0                 },        /* _POOL32A0~*(21) */
16781     { instruction         , 0                   , 0   , 32,
16782        0xfc0003ff, 0x200000b0, &NMD::MFGC0            , 0,
16783        CP0_ | VZ_          },        /* MFGC0 */
16784     { instruction         , 0                   , 0   , 32,
16785        0xfc0003ff, 0x200000b8, &NMD::MFHGC0           , 0,
16786        CP0_ | VZ_ | MVH_   },        /* MFHGC0 */
16787     { reserved_block      , 0                   , 0   , 32,
16788        0xfc0003ff, 0x200000c0, 0                      , 0,
16789        0x0                 },        /* _POOL32A0~*(24) */
16790     { reserved_block      , 0                   , 0   , 32,
16791        0xfc0003ff, 0x200000c8, 0                      , 0,
16792        0x0                 },        /* _POOL32A0~*(25) */
16793     { instruction         , 0                   , 0   , 32,
16794        0xfc0003ff, 0x200000d0, &NMD::ROTRV            , 0,
16795        0x0                 },        /* ROTRV */
16796     { instruction         , 0                   , 0   , 32,
16797        0xfc0003ff, 0x200000d8, &NMD::MUHU             , 0,
16798        0x0                 },        /* MUHU */
16799     { reserved_block      , 0                   , 0   , 32,
16800        0xfc0003ff, 0x200000e0, 0                      , 0,
16801        0x0                 },        /* _POOL32A0~*(28) */
16802     { reserved_block      , 0                   , 0   , 32,
16803        0xfc0003ff, 0x200000e8, 0                      , 0,
16804        0x0                 },        /* _POOL32A0~*(29) */
16805     { instruction         , 0                   , 0   , 32,
16806        0xfc0003ff, 0x200000f0, &NMD::MTGC0            , 0,
16807        CP0_ | VZ_          },        /* MTGC0 */
16808     { instruction         , 0                   , 0   , 32,
16809        0xfc0003ff, 0x200000f8, &NMD::MTHGC0           , 0,
16810        CP0_ | VZ_ | MVH_   },        /* MTHGC0 */
16811     { reserved_block      , 0                   , 0   , 32,
16812        0xfc0003ff, 0x20000100, 0                      , 0,
16813        0x0                 },        /* _POOL32A0~*(32) */
16814     { reserved_block      , 0                   , 0   , 32,
16815        0xfc0003ff, 0x20000108, 0                      , 0,
16816        0x0                 },        /* _POOL32A0~*(33) */
16817     { instruction         , 0                   , 0   , 32,
16818        0xfc0003ff, 0x20000110, &NMD::ADD              , 0,
16819        XMMS_               },        /* ADD */
16820     { instruction         , 0                   , 0   , 32,
16821        0xfc0003ff, 0x20000118, &NMD::DIV              , 0,
16822        0x0                 },        /* DIV */
16823     { reserved_block      , 0                   , 0   , 32,
16824        0xfc0003ff, 0x20000120, 0                      , 0,
16825        0x0                 },        /* _POOL32A0~*(36) */
16826     { reserved_block      , 0                   , 0   , 32,
16827        0xfc0003ff, 0x20000128, 0                      , 0,
16828        0x0                 },        /* _POOL32A0~*(37) */
16829     { instruction         , 0                   , 0   , 32,
16830        0xfc0003ff, 0x20000130, &NMD::DMFC0            , 0,
16831        CP0_ | MIPS64_      },        /* DMFC0 */
16832     { reserved_block      , 0                   , 0   , 32,
16833        0xfc0003ff, 0x20000138, 0                      , 0,
16834        0x0                 },        /* _POOL32A0~*(39) */
16835     { reserved_block      , 0                   , 0   , 32,
16836        0xfc0003ff, 0x20000140, 0                      , 0,
16837        0x0                 },        /* _POOL32A0~*(40) */
16838     { reserved_block      , 0                   , 0   , 32,
16839        0xfc0003ff, 0x20000148, 0                      , 0,
16840        0x0                 },        /* _POOL32A0~*(41) */
16841     { instruction         , 0                   , 0   , 32,
16842        0xfc0003ff, 0x20000150, &NMD::ADDU_32_         , 0,
16843        0x0                 },        /* ADDU[32] */
16844     { instruction         , 0                   , 0   , 32,
16845        0xfc0003ff, 0x20000158, &NMD::MOD              , 0,
16846        0x0                 },        /* MOD */
16847     { reserved_block      , 0                   , 0   , 32,
16848        0xfc0003ff, 0x20000160, 0                      , 0,
16849        0x0                 },        /* _POOL32A0~*(44) */
16850     { reserved_block      , 0                   , 0   , 32,
16851        0xfc0003ff, 0x20000168, 0                      , 0,
16852        0x0                 },        /* _POOL32A0~*(45) */
16853     { instruction         , 0                   , 0   , 32,
16854        0xfc0003ff, 0x20000170, &NMD::DMTC0            , 0,
16855        CP0_ | MIPS64_      },        /* DMTC0 */
16856     { reserved_block      , 0                   , 0   , 32,
16857        0xfc0003ff, 0x20000178, 0                      , 0,
16858        0x0                 },        /* _POOL32A0~*(47) */
16859     { reserved_block      , 0                   , 0   , 32,
16860        0xfc0003ff, 0x20000180, 0                      , 0,
16861        0x0                 },        /* _POOL32A0~*(48) */
16862     { reserved_block      , 0                   , 0   , 32,
16863        0xfc0003ff, 0x20000188, 0                      , 0,
16864        0x0                 },        /* _POOL32A0~*(49) */
16865     { instruction         , 0                   , 0   , 32,
16866        0xfc0003ff, 0x20000190, &NMD::SUB              , 0,
16867        XMMS_               },        /* SUB */
16868     { instruction         , 0                   , 0   , 32,
16869        0xfc0003ff, 0x20000198, &NMD::DIVU             , 0,
16870        0x0                 },        /* DIVU */
16871     { reserved_block      , 0                   , 0   , 32,
16872        0xfc0003ff, 0x200001a0, 0                      , 0,
16873        0x0                 },        /* _POOL32A0~*(52) */
16874     { reserved_block      , 0                   , 0   , 32,
16875        0xfc0003ff, 0x200001a8, 0                      , 0,
16876        0x0                 },        /* _POOL32A0~*(53) */
16877     { instruction         , 0                   , 0   , 32,
16878        0xfc0003ff, 0x200001b0, &NMD::DMFGC0           , 0,
16879        CP0_ | MIPS64_ | VZ_},        /* DMFGC0 */
16880     { reserved_block      , 0                   , 0   , 32,
16881        0xfc0003ff, 0x200001b8, 0                      , 0,
16882        0x0                 },        /* _POOL32A0~*(55) */
16883     { instruction         , 0                   , 0   , 32,
16884        0xfc0003ff, 0x200001c0, &NMD::RDHWR            , 0,
16885        XMMS_               },        /* RDHWR */
16886     { reserved_block      , 0                   , 0   , 32,
16887        0xfc0003ff, 0x200001c8, 0                      , 0,
16888        0x0                 },        /* _POOL32A0~*(57) */
16889     { instruction         , 0                   , 0   , 32,
16890        0xfc0003ff, 0x200001d0, &NMD::SUBU_32_         , 0,
16891        0x0                 },        /* SUBU[32] */
16892     { instruction         , 0                   , 0   , 32,
16893        0xfc0003ff, 0x200001d8, &NMD::MODU             , 0,
16894        0x0                 },        /* MODU */
16895     { reserved_block      , 0                   , 0   , 32,
16896        0xfc0003ff, 0x200001e0, 0                      , 0,
16897        0x0                 },        /* _POOL32A0~*(60) */
16898     { reserved_block      , 0                   , 0   , 32,
16899        0xfc0003ff, 0x200001e8, 0                      , 0,
16900        0x0                 },        /* _POOL32A0~*(61) */
16901     { instruction         , 0                   , 0   , 32,
16902        0xfc0003ff, 0x200001f0, &NMD::DMTGC0           , 0,
16903        CP0_ | MIPS64_ | VZ_},        /* DMTGC0 */
16904     { reserved_block      , 0                   , 0   , 32,
16905        0xfc0003ff, 0x200001f8, 0                      , 0,
16906        0x0                 },        /* _POOL32A0~*(63) */
16907     { reserved_block      , 0                   , 0   , 32,
16908        0xfc0003ff, 0x20000200, 0                      , 0,
16909        0x0                 },        /* _POOL32A0~*(64) */
16910     { reserved_block      , 0                   , 0   , 32,
16911        0xfc0003ff, 0x20000208, 0                      , 0,
16912        0x0                 },        /* _POOL32A0~*(65) */
16913     { pool                , P_CMOVE             , 2   , 32,
16914        0xfc0003ff, 0x20000210, 0                      , 0,
16915        0x0                 },        /* P.CMOVE */
16916     { reserved_block      , 0                   , 0   , 32,
16917        0xfc0003ff, 0x20000218, 0                      , 0,
16918        0x0                 },        /* _POOL32A0~*(67) */
16919     { reserved_block      , 0                   , 0   , 32,
16920        0xfc0003ff, 0x20000220, 0                      , 0,
16921        0x0                 },        /* _POOL32A0~*(68) */
16922     { instruction         , 0                   , 0   , 32,
16923        0xfc0003ff, 0x20000228, &NMD::FORK             , 0,
16924        MT_                 },        /* FORK */
16925     { instruction         , 0                   , 0   , 32,
16926        0xfc0003ff, 0x20000230, &NMD::MFTR             , 0,
16927        MT_                 },        /* MFTR */
16928     { instruction         , 0                   , 0   , 32,
16929        0xfc0003ff, 0x20000238, &NMD::MFHTR            , 0,
16930        MT_                 },        /* MFHTR */
16931     { reserved_block      , 0                   , 0   , 32,
16932        0xfc0003ff, 0x20000240, 0                      , 0,
16933        0x0                 },        /* _POOL32A0~*(72) */
16934     { reserved_block      , 0                   , 0   , 32,
16935        0xfc0003ff, 0x20000248, 0                      , 0,
16936        0x0                 },        /* _POOL32A0~*(73) */
16937     { instruction         , 0                   , 0   , 32,
16938        0xfc0003ff, 0x20000250, &NMD::AND_32_          , 0,
16939        0x0                 },        /* AND[32] */
16940     { reserved_block      , 0                   , 0   , 32,
16941        0xfc0003ff, 0x20000258, 0                      , 0,
16942        0x0                 },        /* _POOL32A0~*(75) */
16943     { reserved_block      , 0                   , 0   , 32,
16944        0xfc0003ff, 0x20000260, 0                      , 0,
16945        0x0                 },        /* _POOL32A0~*(76) */
16946     { instruction         , 0                   , 0   , 32,
16947        0xfc0003ff, 0x20000268, &NMD::YIELD            , 0,
16948        MT_                 },        /* YIELD */
16949     { instruction         , 0                   , 0   , 32,
16950        0xfc0003ff, 0x20000270, &NMD::MTTR             , 0,
16951        MT_                 },        /* MTTR */
16952     { instruction         , 0                   , 0   , 32,
16953        0xfc0003ff, 0x20000278, &NMD::MTHTR            , 0,
16954        MT_                 },        /* MTHTR */
16955     { reserved_block      , 0                   , 0   , 32,
16956        0xfc0003ff, 0x20000280, 0                      , 0,
16957        0x0                 },        /* _POOL32A0~*(80) */
16958     { reserved_block      , 0                   , 0   , 32,
16959        0xfc0003ff, 0x20000288, 0                      , 0,
16960        0x0                 },        /* _POOL32A0~*(81) */
16961     { instruction         , 0                   , 0   , 32,
16962        0xfc0003ff, 0x20000290, &NMD::OR_32_           , 0,
16963        0x0                 },        /* OR[32] */
16964     { reserved_block      , 0                   , 0   , 32,
16965        0xfc0003ff, 0x20000298, 0                      , 0,
16966        0x0                 },        /* _POOL32A0~*(83) */
16967     { reserved_block      , 0                   , 0   , 32,
16968        0xfc0003ff, 0x200002a0, 0                      , 0,
16969        0x0                 },        /* _POOL32A0~*(84) */
16970     { reserved_block      , 0                   , 0   , 32,
16971        0xfc0003ff, 0x200002a8, 0                      , 0,
16972        0x0                 },        /* _POOL32A0~*(85) */
16973     { pool                , P_MT_VPE            , 8   , 32,
16974        0xfc0003ff, 0x200002b0, 0                      , 0,
16975        0x0                 },        /* P.MT_VPE */
16976     { reserved_block      , 0                   , 0   , 32,
16977        0xfc0003ff, 0x200002b8, 0                      , 0,
16978        0x0                 },        /* _POOL32A0~*(87) */
16979     { reserved_block      , 0                   , 0   , 32,
16980        0xfc0003ff, 0x200002c0, 0                      , 0,
16981        0x0                 },        /* _POOL32A0~*(88) */
16982     { reserved_block      , 0                   , 0   , 32,
16983        0xfc0003ff, 0x200002c8, 0                      , 0,
16984        0x0                 },        /* _POOL32A0~*(89) */
16985     { instruction         , 0                   , 0   , 32,
16986        0xfc0003ff, 0x200002d0, &NMD::NOR              , 0,
16987        0x0                 },        /* NOR */
16988     { reserved_block      , 0                   , 0   , 32,
16989        0xfc0003ff, 0x200002d8, 0                      , 0,
16990        0x0                 },        /* _POOL32A0~*(91) */
16991     { reserved_block      , 0                   , 0   , 32,
16992        0xfc0003ff, 0x200002e0, 0                      , 0,
16993        0x0                 },        /* _POOL32A0~*(92) */
16994     { reserved_block      , 0                   , 0   , 32,
16995        0xfc0003ff, 0x200002e8, 0                      , 0,
16996        0x0                 },        /* _POOL32A0~*(93) */
16997     { reserved_block      , 0                   , 0   , 32,
16998        0xfc0003ff, 0x200002f0, 0                      , 0,
16999        0x0                 },        /* _POOL32A0~*(94) */
17000     { reserved_block      , 0                   , 0   , 32,
17001        0xfc0003ff, 0x200002f8, 0                      , 0,
17002        0x0                 },        /* _POOL32A0~*(95) */
17003     { reserved_block      , 0                   , 0   , 32,
17004        0xfc0003ff, 0x20000300, 0                      , 0,
17005        0x0                 },        /* _POOL32A0~*(96) */
17006     { reserved_block      , 0                   , 0   , 32,
17007        0xfc0003ff, 0x20000308, 0                      , 0,
17008        0x0                 },        /* _POOL32A0~*(97) */
17009     { instruction         , 0                   , 0   , 32,
17010        0xfc0003ff, 0x20000310, &NMD::XOR_32_          , 0,
17011        0x0                 },        /* XOR[32] */
17012     { reserved_block      , 0                   , 0   , 32,
17013        0xfc0003ff, 0x20000318, 0                      , 0,
17014        0x0                 },        /* _POOL32A0~*(99) */
17015     { reserved_block      , 0                   , 0   , 32,
17016        0xfc0003ff, 0x20000320, 0                      , 0,
17017        0x0                 },        /* _POOL32A0~*(100) */
17018     { reserved_block      , 0                   , 0   , 32,
17019        0xfc0003ff, 0x20000328, 0                      , 0,
17020        0x0                 },        /* _POOL32A0~*(101) */
17021     { reserved_block      , 0                   , 0   , 32,
17022        0xfc0003ff, 0x20000330, 0                      , 0,
17023        0x0                 },        /* _POOL32A0~*(102) */
17024     { reserved_block      , 0                   , 0   , 32,
17025        0xfc0003ff, 0x20000338, 0                      , 0,
17026        0x0                 },        /* _POOL32A0~*(103) */
17027     { reserved_block      , 0                   , 0   , 32,
17028        0xfc0003ff, 0x20000340, 0                      , 0,
17029        0x0                 },        /* _POOL32A0~*(104) */
17030     { reserved_block      , 0                   , 0   , 32,
17031        0xfc0003ff, 0x20000348, 0                      , 0,
17032        0x0                 },        /* _POOL32A0~*(105) */
17033     { instruction         , 0                   , 0   , 32,
17034        0xfc0003ff, 0x20000350, &NMD::SLT              , 0,
17035        0x0                 },        /* SLT */
17036     { reserved_block      , 0                   , 0   , 32,
17037        0xfc0003ff, 0x20000358, 0                      , 0,
17038        0x0                 },        /* _POOL32A0~*(107) */
17039     { reserved_block      , 0                   , 0   , 32,
17040        0xfc0003ff, 0x20000360, 0                      , 0,
17041        0x0                 },        /* _POOL32A0~*(108) */
17042     { reserved_block      , 0                   , 0   , 32,
17043        0xfc0003ff, 0x20000368, 0                      , 0,
17044        0x0                 },        /* _POOL32A0~*(109) */
17045     { reserved_block      , 0                   , 0   , 32,
17046        0xfc0003ff, 0x20000370, 0                      , 0,
17047        0x0                 },        /* _POOL32A0~*(110) */
17048     { reserved_block      , 0                   , 0   , 32,
17049        0xfc0003ff, 0x20000378, 0                      , 0,
17050        0x0                 },        /* _POOL32A0~*(111) */
17051     { reserved_block      , 0                   , 0   , 32,
17052        0xfc0003ff, 0x20000380, 0                      , 0,
17053        0x0                 },        /* _POOL32A0~*(112) */
17054     { reserved_block      , 0                   , 0   , 32,
17055        0xfc0003ff, 0x20000388, 0                      , 0,
17056        0x0                 },        /* _POOL32A0~*(113) */
17057     { pool                , P_SLTU              , 2   , 32,
17058        0xfc0003ff, 0x20000390, 0                      , 0,
17059        0x0                 },        /* P.SLTU */
17060     { reserved_block      , 0                   , 0   , 32,
17061        0xfc0003ff, 0x20000398, 0                      , 0,
17062        0x0                 },        /* _POOL32A0~*(115) */
17063     { reserved_block      , 0                   , 0   , 32,
17064        0xfc0003ff, 0x200003a0, 0                      , 0,
17065        0x0                 },        /* _POOL32A0~*(116) */
17066     { reserved_block      , 0                   , 0   , 32,
17067        0xfc0003ff, 0x200003a8, 0                      , 0,
17068        0x0                 },        /* _POOL32A0~*(117) */
17069     { reserved_block      , 0                   , 0   , 32,
17070        0xfc0003ff, 0x200003b0, 0                      , 0,
17071        0x0                 },        /* _POOL32A0~*(118) */
17072     { reserved_block      , 0                   , 0   , 32,
17073        0xfc0003ff, 0x200003b8, 0                      , 0,
17074        0x0                 },        /* _POOL32A0~*(119) */
17075     { reserved_block      , 0                   , 0   , 32,
17076        0xfc0003ff, 0x200003c0, 0                      , 0,
17077        0x0                 },        /* _POOL32A0~*(120) */
17078     { reserved_block      , 0                   , 0   , 32,
17079        0xfc0003ff, 0x200003c8, 0                      , 0,
17080        0x0                 },        /* _POOL32A0~*(121) */
17081     { instruction         , 0                   , 0   , 32,
17082        0xfc0003ff, 0x200003d0, &NMD::SOV              , 0,
17083        0x0                 },        /* SOV */
17084     { reserved_block      , 0                   , 0   , 32,
17085        0xfc0003ff, 0x200003d8, 0                      , 0,
17086        0x0                 },        /* _POOL32A0~*(123) */
17087     { reserved_block      , 0                   , 0   , 32,
17088        0xfc0003ff, 0x200003e0, 0                      , 0,
17089        0x0                 },        /* _POOL32A0~*(124) */
17090     { reserved_block      , 0                   , 0   , 32,
17091        0xfc0003ff, 0x200003e8, 0                      , 0,
17092        0x0                 },        /* _POOL32A0~*(125) */
17093     { reserved_block      , 0                   , 0   , 32,
17094        0xfc0003ff, 0x200003f0, 0                      , 0,
17095        0x0                 },        /* _POOL32A0~*(126) */
17096     { reserved_block      , 0                   , 0   , 32,
17097        0xfc0003ff, 0x200003f8, 0                      , 0,
17098        0x0                 },        /* _POOL32A0~*(127) */
17099 };
17100
17101
17102 NMD::Pool NMD::ADDQ__S__PH[2] = {
17103     { instruction         , 0                   , 0   , 32,
17104        0xfc0007ff, 0x2000000d, &NMD::ADDQ_PH          , 0,
17105        DSP_                },        /* ADDQ.PH */
17106     { instruction         , 0                   , 0   , 32,
17107        0xfc0007ff, 0x2000040d, &NMD::ADDQ_S_PH        , 0,
17108        DSP_                },        /* ADDQ_S.PH */
17109 };
17110
17111
17112 NMD::Pool NMD::MUL__S__PH[2] = {
17113     { instruction         , 0                   , 0   , 32,
17114        0xfc0007ff, 0x2000002d, &NMD::MUL_PH           , 0,
17115        DSP_                },        /* MUL.PH */
17116     { instruction         , 0                   , 0   , 32,
17117        0xfc0007ff, 0x2000042d, &NMD::MUL_S_PH         , 0,
17118        DSP_                },        /* MUL_S.PH */
17119 };
17120
17121
17122 NMD::Pool NMD::ADDQH__R__PH[2] = {
17123     { instruction         , 0                   , 0   , 32,
17124        0xfc0007ff, 0x2000004d, &NMD::ADDQH_PH         , 0,
17125        DSP_                },        /* ADDQH.PH */
17126     { instruction         , 0                   , 0   , 32,
17127        0xfc0007ff, 0x2000044d, &NMD::ADDQH_R_PH       , 0,
17128        DSP_                },        /* ADDQH_R.PH */
17129 };
17130
17131
17132 NMD::Pool NMD::ADDQH__R__W[2] = {
17133     { instruction         , 0                   , 0   , 32,
17134        0xfc0007ff, 0x2000008d, &NMD::ADDQH_W          , 0,
17135        DSP_                },        /* ADDQH.W */
17136     { instruction         , 0                   , 0   , 32,
17137        0xfc0007ff, 0x2000048d, &NMD::ADDQH_R_W        , 0,
17138        DSP_                },        /* ADDQH_R.W */
17139 };
17140
17141
17142 NMD::Pool NMD::ADDU__S__QB[2] = {
17143     { instruction         , 0                   , 0   , 32,
17144        0xfc0007ff, 0x200000cd, &NMD::ADDU_QB          , 0,
17145        DSP_                },        /* ADDU.QB */
17146     { instruction         , 0                   , 0   , 32,
17147        0xfc0007ff, 0x200004cd, &NMD::ADDU_S_QB        , 0,
17148        DSP_                },        /* ADDU_S.QB */
17149 };
17150
17151
17152 NMD::Pool NMD::ADDU__S__PH[2] = {
17153     { instruction         , 0                   , 0   , 32,
17154        0xfc0007ff, 0x2000010d, &NMD::ADDU_PH          , 0,
17155        DSP_                },        /* ADDU.PH */
17156     { instruction         , 0                   , 0   , 32,
17157        0xfc0007ff, 0x2000050d, &NMD::ADDU_S_PH        , 0,
17158        DSP_                },        /* ADDU_S.PH */
17159 };
17160
17161
17162 NMD::Pool NMD::ADDUH__R__QB[2] = {
17163     { instruction         , 0                   , 0   , 32,
17164        0xfc0007ff, 0x2000014d, &NMD::ADDUH_QB         , 0,
17165        DSP_                },        /* ADDUH.QB */
17166     { instruction         , 0                   , 0   , 32,
17167        0xfc0007ff, 0x2000054d, &NMD::ADDUH_R_QB       , 0,
17168        DSP_                },        /* ADDUH_R.QB */
17169 };
17170
17171
17172 NMD::Pool NMD::SHRAV__R__PH[2] = {
17173     { instruction         , 0                   , 0   , 32,
17174        0xfc0007ff, 0x2000018d, &NMD::SHRAV_PH         , 0,
17175        DSP_                },        /* SHRAV.PH */
17176     { instruction         , 0                   , 0   , 32,
17177        0xfc0007ff, 0x2000058d, &NMD::SHRAV_R_PH       , 0,
17178        DSP_                },        /* SHRAV_R.PH */
17179 };
17180
17181
17182 NMD::Pool NMD::SHRAV__R__QB[2] = {
17183     { instruction         , 0                   , 0   , 32,
17184        0xfc0007ff, 0x200001cd, &NMD::SHRAV_QB         , 0,
17185        DSP_                },        /* SHRAV.QB */
17186     { instruction         , 0                   , 0   , 32,
17187        0xfc0007ff, 0x200005cd, &NMD::SHRAV_R_QB       , 0,
17188        DSP_                },        /* SHRAV_R.QB */
17189 };
17190
17191
17192 NMD::Pool NMD::SUBQ__S__PH[2] = {
17193     { instruction         , 0                   , 0   , 32,
17194        0xfc0007ff, 0x2000020d, &NMD::SUBQ_PH          , 0,
17195        DSP_                },        /* SUBQ.PH */
17196     { instruction         , 0                   , 0   , 32,
17197        0xfc0007ff, 0x2000060d, &NMD::SUBQ_S_PH        , 0,
17198        DSP_                },        /* SUBQ_S.PH */
17199 };
17200
17201
17202 NMD::Pool NMD::SUBQH__R__PH[2] = {
17203     { instruction         , 0                   , 0   , 32,
17204        0xfc0007ff, 0x2000024d, &NMD::SUBQH_PH         , 0,
17205        DSP_                },        /* SUBQH.PH */
17206     { instruction         , 0                   , 0   , 32,
17207        0xfc0007ff, 0x2000064d, &NMD::SUBQH_R_PH       , 0,
17208        DSP_                },        /* SUBQH_R.PH */
17209 };
17210
17211
17212 NMD::Pool NMD::SUBQH__R__W[2] = {
17213     { instruction         , 0                   , 0   , 32,
17214        0xfc0007ff, 0x2000028d, &NMD::SUBQH_W          , 0,
17215        DSP_                },        /* SUBQH.W */
17216     { instruction         , 0                   , 0   , 32,
17217        0xfc0007ff, 0x2000068d, &NMD::SUBQH_R_W        , 0,
17218        DSP_                },        /* SUBQH_R.W */
17219 };
17220
17221
17222 NMD::Pool NMD::SUBU__S__QB[2] = {
17223     { instruction         , 0                   , 0   , 32,
17224        0xfc0007ff, 0x200002cd, &NMD::SUBU_QB          , 0,
17225        DSP_                },        /* SUBU.QB */
17226     { instruction         , 0                   , 0   , 32,
17227        0xfc0007ff, 0x200006cd, &NMD::SUBU_S_QB        , 0,
17228        DSP_                },        /* SUBU_S.QB */
17229 };
17230
17231
17232 NMD::Pool NMD::SUBU__S__PH[2] = {
17233     { instruction         , 0                   , 0   , 32,
17234        0xfc0007ff, 0x2000030d, &NMD::SUBU_PH          , 0,
17235        DSP_                },        /* SUBU.PH */
17236     { instruction         , 0                   , 0   , 32,
17237        0xfc0007ff, 0x2000070d, &NMD::SUBU_S_PH        , 0,
17238        DSP_                },        /* SUBU_S.PH */
17239 };
17240
17241
17242 NMD::Pool NMD::SHRA__R__PH[2] = {
17243     { instruction         , 0                   , 0   , 32,
17244        0xfc0007ff, 0x20000335, &NMD::SHRA_PH          , 0,
17245        DSP_                },        /* SHRA.PH */
17246     { instruction         , 0                   , 0   , 32,
17247        0xfc0007ff, 0x20000735, &NMD::SHRA_R_PH        , 0,
17248        DSP_                },        /* SHRA_R.PH */
17249 };
17250
17251
17252 NMD::Pool NMD::SUBUH__R__QB[2] = {
17253     { instruction         , 0                   , 0   , 32,
17254        0xfc0007ff, 0x2000034d, &NMD::SUBUH_QB         , 0,
17255        DSP_                },        /* SUBUH.QB */
17256     { instruction         , 0                   , 0   , 32,
17257        0xfc0007ff, 0x2000074d, &NMD::SUBUH_R_QB       , 0,
17258        DSP_                },        /* SUBUH_R.QB */
17259 };
17260
17261
17262 NMD::Pool NMD::SHLLV__S__PH[2] = {
17263     { instruction         , 0                   , 0   , 32,
17264        0xfc0007ff, 0x2000038d, &NMD::SHLLV_PH         , 0,
17265        DSP_                },        /* SHLLV.PH */
17266     { instruction         , 0                   , 0   , 32,
17267        0xfc0007ff, 0x2000078d, &NMD::SHLLV_S_PH       , 0,
17268        DSP_                },        /* SHLLV_S.PH */
17269 };
17270
17271
17272 NMD::Pool NMD::SHLL__S__PH[4] = {
17273     { instruction         , 0                   , 0   , 32,
17274        0xfc000fff, 0x200003b5, &NMD::SHLL_PH          , 0,
17275        DSP_                },        /* SHLL.PH */
17276     { reserved_block      , 0                   , 0   , 32,
17277        0xfc000fff, 0x200007b5, 0                      , 0,
17278        0x0                 },        /* SHLL[_S].PH~*(1) */
17279     { instruction         , 0                   , 0   , 32,
17280        0xfc000fff, 0x20000bb5, &NMD::SHLL_S_PH        , 0,
17281        DSP_                },        /* SHLL_S.PH */
17282     { reserved_block      , 0                   , 0   , 32,
17283        0xfc000fff, 0x20000fb5, 0                      , 0,
17284        0x0                 },        /* SHLL[_S].PH~*(3) */
17285 };
17286
17287
17288 NMD::Pool NMD::PRECR_SRA__R__PH_W[2] = {
17289     { instruction         , 0                   , 0   , 32,
17290        0xfc0007ff, 0x200003cd, &NMD::PRECR_SRA_PH_W   , 0,
17291        DSP_                },        /* PRECR_SRA.PH.W */
17292     { instruction         , 0                   , 0   , 32,
17293        0xfc0007ff, 0x200007cd, &NMD::PRECR_SRA_R_PH_W , 0,
17294        DSP_                },        /* PRECR_SRA_R.PH.W */
17295 };
17296
17297
17298 NMD::Pool NMD::_POOL32A5[128] = {
17299     { instruction         , 0                   , 0   , 32,
17300        0xfc0003ff, 0x20000005, &NMD::CMP_EQ_PH        , 0,
17301        DSP_                },        /* CMP.EQ.PH */
17302     { pool                , ADDQ__S__PH         , 2   , 32,
17303        0xfc0003ff, 0x2000000d, 0                      , 0,
17304        0x0                 },        /* ADDQ[_S].PH */
17305     { reserved_block      , 0                   , 0   , 32,
17306        0xfc0003ff, 0x20000015, 0                      , 0,
17307        0x0                 },        /* _POOL32A5~*(2) */
17308     { instruction         , 0                   , 0   , 32,
17309        0xfc0003ff, 0x2000001d, &NMD::SHILO            , 0,
17310        DSP_                },        /* SHILO */
17311     { instruction         , 0                   , 0   , 32,
17312        0xfc0003ff, 0x20000025, &NMD::MULEQ_S_W_PHL    , 0,
17313        DSP_                },        /* MULEQ_S.W.PHL */
17314     { pool                , MUL__S__PH          , 2   , 32,
17315        0xfc0003ff, 0x2000002d, 0                      , 0,
17316        0x0                 },        /* MUL[_S].PH */
17317     { reserved_block      , 0                   , 0   , 32,
17318        0xfc0003ff, 0x20000035, 0                      , 0,
17319        0x0                 },        /* _POOL32A5~*(6) */
17320     { instruction         , 0                   , 0   , 32,
17321        0xfc0003ff, 0x2000003d, &NMD::REPL_PH          , 0,
17322        DSP_                },        /* REPL.PH */
17323     { instruction         , 0                   , 0   , 32,
17324        0xfc0003ff, 0x20000045, &NMD::CMP_LT_PH        , 0,
17325        DSP_                },        /* CMP.LT.PH */
17326     { pool                , ADDQH__R__PH        , 2   , 32,
17327        0xfc0003ff, 0x2000004d, 0                      , 0,
17328        0x0                 },        /* ADDQH[_R].PH */
17329     { reserved_block      , 0                   , 0   , 32,
17330        0xfc0003ff, 0x20000055, 0                      , 0,
17331        0x0                 },        /* _POOL32A5~*(10) */
17332     { reserved_block      , 0                   , 0   , 32,
17333        0xfc0003ff, 0x2000005d, 0                      , 0,
17334        0x0                 },        /* _POOL32A5~*(11) */
17335     { instruction         , 0                   , 0   , 32,
17336        0xfc0003ff, 0x20000065, &NMD::MULEQ_S_W_PHR    , 0,
17337        DSP_                },        /* MULEQ_S.W.PHR */
17338     { instruction         , 0                   , 0   , 32,
17339        0xfc0003ff, 0x2000006d, &NMD::PRECR_QB_PH      , 0,
17340        DSP_                },        /* PRECR.QB.PH */
17341     { reserved_block      , 0                   , 0   , 32,
17342        0xfc0003ff, 0x20000075, 0                      , 0,
17343        0x0                 },        /* _POOL32A5~*(14) */
17344     { reserved_block      , 0                   , 0   , 32,
17345        0xfc0003ff, 0x2000007d, 0                      , 0,
17346        0x0                 },        /* _POOL32A5~*(15) */
17347     { instruction         , 0                   , 0   , 32,
17348        0xfc0003ff, 0x20000085, &NMD::CMP_LE_PH        , 0,
17349        DSP_                },        /* CMP.LE.PH */
17350     { pool                , ADDQH__R__W         , 2   , 32,
17351        0xfc0003ff, 0x2000008d, 0                      , 0,
17352        0x0                 },        /* ADDQH[_R].W */
17353     { instruction         , 0                   , 0   , 32,
17354        0xfc0003ff, 0x20000095, &NMD::MULEU_S_PH_QBL   , 0,
17355        DSP_                },        /* MULEU_S.PH.QBL */
17356     { reserved_block      , 0                   , 0   , 32,
17357        0xfc0003ff, 0x2000009d, 0                      , 0,
17358        0x0                 },        /* _POOL32A5~*(19) */
17359     { reserved_block      , 0                   , 0   , 32,
17360        0xfc0003ff, 0x200000a5, 0                      , 0,
17361        0x0                 },        /* _POOL32A5~*(20) */
17362     { instruction         , 0                   , 0   , 32,
17363        0xfc0003ff, 0x200000ad, &NMD::PRECRQ_QB_PH     , 0,
17364        DSP_                },        /* PRECRQ.QB.PH */
17365     { reserved_block      , 0                   , 0   , 32,
17366        0xfc0003ff, 0x200000b5, 0                      , 0,
17367        0x0                 },        /* _POOL32A5~*(22) */
17368     { reserved_block      , 0                   , 0   , 32,
17369        0xfc0003ff, 0x200000bd, 0                      , 0,
17370        0x0                 },        /* _POOL32A5~*(23) */
17371     { instruction         , 0                   , 0   , 32,
17372        0xfc0003ff, 0x200000c5, &NMD::CMPGU_EQ_QB      , 0,
17373        DSP_                },        /* CMPGU.EQ.QB */
17374     { pool                , ADDU__S__QB         , 2   , 32,
17375        0xfc0003ff, 0x200000cd, 0                      , 0,
17376        0x0                 },        /* ADDU[_S].QB */
17377     { instruction         , 0                   , 0   , 32,
17378        0xfc0003ff, 0x200000d5, &NMD::MULEU_S_PH_QBR   , 0,
17379        DSP_                },        /* MULEU_S.PH.QBR */
17380     { reserved_block      , 0                   , 0   , 32,
17381        0xfc0003ff, 0x200000dd, 0                      , 0,
17382        0x0                 },        /* _POOL32A5~*(27) */
17383     { reserved_block      , 0                   , 0   , 32,
17384        0xfc0003ff, 0x200000e5, 0                      , 0,
17385        0x0                 },        /* _POOL32A5~*(28) */
17386     { instruction         , 0                   , 0   , 32,
17387        0xfc0003ff, 0x200000ed, &NMD::PRECRQ_PH_W      , 0,
17388        DSP_                },        /* PRECRQ.PH.W */
17389     { reserved_block      , 0                   , 0   , 32,
17390        0xfc0003ff, 0x200000f5, 0                      , 0,
17391        0x0                 },        /* _POOL32A5~*(30) */
17392     { reserved_block      , 0                   , 0   , 32,
17393        0xfc0003ff, 0x200000fd, 0                      , 0,
17394        0x0                 },        /* _POOL32A5~*(31) */
17395     { instruction         , 0                   , 0   , 32,
17396        0xfc0003ff, 0x20000105, &NMD::CMPGU_LT_QB      , 0,
17397        DSP_                },        /* CMPGU.LT.QB */
17398     { pool                , ADDU__S__PH         , 2   , 32,
17399        0xfc0003ff, 0x2000010d, 0                      , 0,
17400        0x0                 },        /* ADDU[_S].PH */
17401     { instruction         , 0                   , 0   , 32,
17402        0xfc0003ff, 0x20000115, &NMD::MULQ_RS_PH       , 0,
17403        DSP_                },        /* MULQ_RS.PH */
17404     { reserved_block      , 0                   , 0   , 32,
17405        0xfc0003ff, 0x2000011d, 0                      , 0,
17406        0x0                 },        /* _POOL32A5~*(35) */
17407     { reserved_block      , 0                   , 0   , 32,
17408        0xfc0003ff, 0x20000125, 0                      , 0,
17409        0x0                 },        /* _POOL32A5~*(36) */
17410     { instruction         , 0                   , 0   , 32,
17411        0xfc0003ff, 0x2000012d, &NMD::PRECRQ_RS_PH_W   , 0,
17412        DSP_                },        /* PRECRQ_RS.PH.W */
17413     { reserved_block      , 0                   , 0   , 32,
17414        0xfc0003ff, 0x20000135, 0                      , 0,
17415        0x0                 },        /* _POOL32A5~*(38) */
17416     { reserved_block      , 0                   , 0   , 32,
17417        0xfc0003ff, 0x2000013d, 0                      , 0,
17418        0x0                 },        /* _POOL32A5~*(39) */
17419     { instruction         , 0                   , 0   , 32,
17420        0xfc0003ff, 0x20000145, &NMD::CMPGU_LE_QB      , 0,
17421        DSP_                },        /* CMPGU.LE.QB */
17422     { pool                , ADDUH__R__QB        , 2   , 32,
17423        0xfc0003ff, 0x2000014d, 0                      , 0,
17424        0x0                 },        /* ADDUH[_R].QB */
17425     { instruction         , 0                   , 0   , 32,
17426        0xfc0003ff, 0x20000155, &NMD::MULQ_S_PH        , 0,
17427        DSP_                },        /* MULQ_S.PH */
17428     { reserved_block      , 0                   , 0   , 32,
17429        0xfc0003ff, 0x2000015d, 0                      , 0,
17430        0x0                 },        /* _POOL32A5~*(43) */
17431     { reserved_block      , 0                   , 0   , 32,
17432        0xfc0003ff, 0x20000165, 0                      , 0,
17433        0x0                 },        /* _POOL32A5~*(44) */
17434     { instruction         , 0                   , 0   , 32,
17435        0xfc0003ff, 0x2000016d, &NMD::PRECRQU_S_QB_PH  , 0,
17436        DSP_                },        /* PRECRQU_S.QB.PH */
17437     { reserved_block      , 0                   , 0   , 32,
17438        0xfc0003ff, 0x20000175, 0                      , 0,
17439        0x0                 },        /* _POOL32A5~*(46) */
17440     { reserved_block      , 0                   , 0   , 32,
17441        0xfc0003ff, 0x2000017d, 0                      , 0,
17442        0x0                 },        /* _POOL32A5~*(47) */
17443     { instruction         , 0                   , 0   , 32,
17444        0xfc0003ff, 0x20000185, &NMD::CMPGDU_EQ_QB     , 0,
17445        DSP_                },        /* CMPGDU.EQ.QB */
17446     { pool                , SHRAV__R__PH        , 2   , 32,
17447        0xfc0003ff, 0x2000018d, 0                      , 0,
17448        0x0                 },        /* SHRAV[_R].PH */
17449     { instruction         , 0                   , 0   , 32,
17450        0xfc0003ff, 0x20000195, &NMD::MULQ_RS_W        , 0,
17451        DSP_                },        /* MULQ_RS.W */
17452     { reserved_block      , 0                   , 0   , 32,
17453        0xfc0003ff, 0x2000019d, 0                      , 0,
17454        0x0                 },        /* _POOL32A5~*(51) */
17455     { reserved_block      , 0                   , 0   , 32,
17456        0xfc0003ff, 0x200001a5, 0                      , 0,
17457        0x0                 },        /* _POOL32A5~*(52) */
17458     { instruction         , 0                   , 0   , 32,
17459        0xfc0003ff, 0x200001ad, &NMD::PACKRL_PH        , 0,
17460        DSP_                },        /* PACKRL.PH */
17461     { reserved_block      , 0                   , 0   , 32,
17462        0xfc0003ff, 0x200001b5, 0                      , 0,
17463        0x0                 },        /* _POOL32A5~*(54) */
17464     { reserved_block      , 0                   , 0   , 32,
17465        0xfc0003ff, 0x200001bd, 0                      , 0,
17466        0x0                 },        /* _POOL32A5~*(55) */
17467     { instruction         , 0                   , 0   , 32,
17468        0xfc0003ff, 0x200001c5, &NMD::CMPGDU_LT_QB     , 0,
17469        DSP_                },        /* CMPGDU.LT.QB */
17470     { pool                , SHRAV__R__QB        , 2   , 32,
17471        0xfc0003ff, 0x200001cd, 0                      , 0,
17472        0x0                 },        /* SHRAV[_R].QB */
17473     { instruction         , 0                   , 0   , 32,
17474        0xfc0003ff, 0x200001d5, &NMD::MULQ_S_W         , 0,
17475        DSP_                },        /* MULQ_S.W */
17476     { reserved_block      , 0                   , 0   , 32,
17477        0xfc0003ff, 0x200001dd, 0                      , 0,
17478        0x0                 },        /* _POOL32A5~*(59) */
17479     { reserved_block      , 0                   , 0   , 32,
17480        0xfc0003ff, 0x200001e5, 0                      , 0,
17481        0x0                 },        /* _POOL32A5~*(60) */
17482     { instruction         , 0                   , 0   , 32,
17483        0xfc0003ff, 0x200001ed, &NMD::PICK_QB          , 0,
17484        DSP_                },        /* PICK.QB */
17485     { reserved_block      , 0                   , 0   , 32,
17486        0xfc0003ff, 0x200001f5, 0                      , 0,
17487        0x0                 },        /* _POOL32A5~*(62) */
17488     { reserved_block      , 0                   , 0   , 32,
17489        0xfc0003ff, 0x200001fd, 0                      , 0,
17490        0x0                 },        /* _POOL32A5~*(63) */
17491     { instruction         , 0                   , 0   , 32,
17492        0xfc0003ff, 0x20000205, &NMD::CMPGDU_LE_QB     , 0,
17493        DSP_                },        /* CMPGDU.LE.QB */
17494     { pool                , SUBQ__S__PH         , 2   , 32,
17495        0xfc0003ff, 0x2000020d, 0                      , 0,
17496        0x0                 },        /* SUBQ[_S].PH */
17497     { instruction         , 0                   , 0   , 32,
17498        0xfc0003ff, 0x20000215, &NMD::APPEND           , 0,
17499        DSP_                },        /* APPEND */
17500     { reserved_block      , 0                   , 0   , 32,
17501        0xfc0003ff, 0x2000021d, 0                      , 0,
17502        0x0                 },        /* _POOL32A5~*(67) */
17503     { reserved_block      , 0                   , 0   , 32,
17504        0xfc0003ff, 0x20000225, 0                      , 0,
17505        0x0                 },        /* _POOL32A5~*(68) */
17506     { instruction         , 0                   , 0   , 32,
17507        0xfc0003ff, 0x2000022d, &NMD::PICK_PH          , 0,
17508        DSP_                },        /* PICK.PH */
17509     { reserved_block      , 0                   , 0   , 32,
17510        0xfc0003ff, 0x20000235, 0                      , 0,
17511        0x0                 },        /* _POOL32A5~*(70) */
17512     { reserved_block      , 0                   , 0   , 32,
17513        0xfc0003ff, 0x2000023d, 0                      , 0,
17514        0x0                 },        /* _POOL32A5~*(71) */
17515     { instruction         , 0                   , 0   , 32,
17516        0xfc0003ff, 0x20000245, &NMD::CMPU_EQ_QB       , 0,
17517        DSP_                },        /* CMPU.EQ.QB */
17518     { pool                , SUBQH__R__PH        , 2   , 32,
17519        0xfc0003ff, 0x2000024d, 0                      , 0,
17520        0x0                 },        /* SUBQH[_R].PH */
17521     { instruction         , 0                   , 0   , 32,
17522        0xfc0003ff, 0x20000255, &NMD::PREPEND          , 0,
17523        DSP_                },        /* PREPEND */
17524     { reserved_block      , 0                   , 0   , 32,
17525        0xfc0003ff, 0x2000025d, 0                      , 0,
17526        0x0                 },        /* _POOL32A5~*(75) */
17527     { reserved_block      , 0                   , 0   , 32,
17528        0xfc0003ff, 0x20000265, 0                      , 0,
17529        0x0                 },        /* _POOL32A5~*(76) */
17530     { reserved_block      , 0                   , 0   , 32,
17531        0xfc0003ff, 0x2000026d, 0                      , 0,
17532        0x0                 },        /* _POOL32A5~*(77) */
17533     { reserved_block      , 0                   , 0   , 32,
17534        0xfc0003ff, 0x20000275, 0                      , 0,
17535        0x0                 },        /* _POOL32A5~*(78) */
17536     { reserved_block      , 0                   , 0   , 32,
17537        0xfc0003ff, 0x2000027d, 0                      , 0,
17538        0x0                 },        /* _POOL32A5~*(79) */
17539     { instruction         , 0                   , 0   , 32,
17540        0xfc0003ff, 0x20000285, &NMD::CMPU_LT_QB       , 0,
17541        DSP_                },        /* CMPU.LT.QB */
17542     { pool                , SUBQH__R__W         , 2   , 32,
17543        0xfc0003ff, 0x2000028d, 0                      , 0,
17544        0x0                 },        /* SUBQH[_R].W */
17545     { instruction         , 0                   , 0   , 32,
17546        0xfc0003ff, 0x20000295, &NMD::MODSUB           , 0,
17547        DSP_                },        /* MODSUB */
17548     { reserved_block      , 0                   , 0   , 32,
17549        0xfc0003ff, 0x2000029d, 0                      , 0,
17550        0x0                 },        /* _POOL32A5~*(83) */
17551     { reserved_block      , 0                   , 0   , 32,
17552        0xfc0003ff, 0x200002a5, 0                      , 0,
17553        0x0                 },        /* _POOL32A5~*(84) */
17554     { reserved_block      , 0                   , 0   , 32,
17555        0xfc0003ff, 0x200002ad, 0                      , 0,
17556        0x0                 },        /* _POOL32A5~*(85) */
17557     { reserved_block      , 0                   , 0   , 32,
17558        0xfc0003ff, 0x200002b5, 0                      , 0,
17559        0x0                 },        /* _POOL32A5~*(86) */
17560     { reserved_block      , 0                   , 0   , 32,
17561        0xfc0003ff, 0x200002bd, 0                      , 0,
17562        0x0                 },        /* _POOL32A5~*(87) */
17563     { instruction         , 0                   , 0   , 32,
17564        0xfc0003ff, 0x200002c5, &NMD::CMPU_LE_QB       , 0,
17565        DSP_                },        /* CMPU.LE.QB */
17566     { pool                , SUBU__S__QB         , 2   , 32,
17567        0xfc0003ff, 0x200002cd, 0                      , 0,
17568        0x0                 },        /* SUBU[_S].QB */
17569     { instruction         , 0                   , 0   , 32,
17570        0xfc0003ff, 0x200002d5, &NMD::SHRAV_R_W        , 0,
17571        DSP_                },        /* SHRAV_R.W */
17572     { reserved_block      , 0                   , 0   , 32,
17573        0xfc0003ff, 0x200002dd, 0                      , 0,
17574        0x0                 },        /* _POOL32A5~*(91) */
17575     { reserved_block      , 0                   , 0   , 32,
17576        0xfc0003ff, 0x200002e5, 0                      , 0,
17577        0x0                 },        /* _POOL32A5~*(92) */
17578     { reserved_block      , 0                   , 0   , 32,
17579        0xfc0003ff, 0x200002ed, 0                      , 0,
17580        0x0                 },        /* _POOL32A5~*(93) */
17581     { instruction         , 0                   , 0   , 32,
17582        0xfc0003ff, 0x200002f5, &NMD::SHRA_R_W         , 0,
17583        DSP_                },        /* SHRA_R.W */
17584     { reserved_block      , 0                   , 0   , 32,
17585        0xfc0003ff, 0x200002fd, 0                      , 0,
17586        0x0                 },        /* _POOL32A5~*(95) */
17587     { instruction         , 0                   , 0   , 32,
17588        0xfc0003ff, 0x20000305, &NMD::ADDQ_S_W         , 0,
17589        DSP_                },        /* ADDQ_S.W */
17590     { pool                , SUBU__S__PH         , 2   , 32,
17591        0xfc0003ff, 0x2000030d, 0                      , 0,
17592        0x0                 },        /* SUBU[_S].PH */
17593     { instruction         , 0                   , 0   , 32,
17594        0xfc0003ff, 0x20000315, &NMD::SHRLV_PH         , 0,
17595        DSP_                },        /* SHRLV.PH */
17596     { reserved_block      , 0                   , 0   , 32,
17597        0xfc0003ff, 0x2000031d, 0                      , 0,
17598        0x0                 },        /* _POOL32A5~*(99) */
17599     { reserved_block      , 0                   , 0   , 32,
17600        0xfc0003ff, 0x20000325, 0                      , 0,
17601        0x0                 },        /* _POOL32A5~*(100) */
17602     { reserved_block      , 0                   , 0   , 32,
17603        0xfc0003ff, 0x2000032d, 0                      , 0,
17604        0x0                 },        /* _POOL32A5~*(101) */
17605     { pool                , SHRA__R__PH         , 2   , 32,
17606        0xfc0003ff, 0x20000335, 0                      , 0,
17607        0x0                 },        /* SHRA[_R].PH */
17608     { reserved_block      , 0                   , 0   , 32,
17609        0xfc0003ff, 0x2000033d, 0                      , 0,
17610        0x0                 },        /* _POOL32A5~*(103) */
17611     { instruction         , 0                   , 0   , 32,
17612        0xfc0003ff, 0x20000345, &NMD::SUBQ_S_W         , 0,
17613        DSP_                },        /* SUBQ_S.W */
17614     { pool                , SUBUH__R__QB        , 2   , 32,
17615        0xfc0003ff, 0x2000034d, 0                      , 0,
17616        0x0                 },        /* SUBUH[_R].QB */
17617     { instruction         , 0                   , 0   , 32,
17618        0xfc0003ff, 0x20000355, &NMD::SHRLV_QB         , 0,
17619        DSP_                },        /* SHRLV.QB */
17620     { reserved_block      , 0                   , 0   , 32,
17621        0xfc0003ff, 0x2000035d, 0                      , 0,
17622        0x0                 },        /* _POOL32A5~*(107) */
17623     { reserved_block      , 0                   , 0   , 32,
17624        0xfc0003ff, 0x20000365, 0                      , 0,
17625        0x0                 },        /* _POOL32A5~*(108) */
17626     { reserved_block      , 0                   , 0   , 32,
17627        0xfc0003ff, 0x2000036d, 0                      , 0,
17628        0x0                 },        /* _POOL32A5~*(109) */
17629     { reserved_block      , 0                   , 0   , 32,
17630        0xfc0003ff, 0x20000375, 0                      , 0,
17631        0x0                 },        /* _POOL32A5~*(110) */
17632     { reserved_block      , 0                   , 0   , 32,
17633        0xfc0003ff, 0x2000037d, 0                      , 0,
17634        0x0                 },        /* _POOL32A5~*(111) */
17635     { instruction         , 0                   , 0   , 32,
17636        0xfc0003ff, 0x20000385, &NMD::ADDSC            , 0,
17637        DSP_                },        /* ADDSC */
17638     { pool                , SHLLV__S__PH        , 2   , 32,
17639        0xfc0003ff, 0x2000038d, 0                      , 0,
17640        0x0                 },        /* SHLLV[_S].PH */
17641     { instruction         , 0                   , 0   , 32,
17642        0xfc0003ff, 0x20000395, &NMD::SHLLV_QB         , 0,
17643        DSP_                },        /* SHLLV.QB */
17644     { reserved_block      , 0                   , 0   , 32,
17645        0xfc0003ff, 0x2000039d, 0                      , 0,
17646        0x0                 },        /* _POOL32A5~*(115) */
17647     { reserved_block      , 0                   , 0   , 32,
17648        0xfc0003ff, 0x200003a5, 0                      , 0,
17649        0x0                 },        /* _POOL32A5~*(116) */
17650     { reserved_block      , 0                   , 0   , 32,
17651        0xfc0003ff, 0x200003ad, 0                      , 0,
17652        0x0                 },        /* _POOL32A5~*(117) */
17653     { pool                , SHLL__S__PH         , 4   , 32,
17654        0xfc0003ff, 0x200003b5, 0                      , 0,
17655        0x0                 },        /* SHLL[_S].PH */
17656     { reserved_block      , 0                   , 0   , 32,
17657        0xfc0003ff, 0x200003bd, 0                      , 0,
17658        0x0                 },        /* _POOL32A5~*(119) */
17659     { instruction         , 0                   , 0   , 32,
17660        0xfc0003ff, 0x200003c5, &NMD::ADDWC            , 0,
17661        DSP_                },        /* ADDWC */
17662     { pool                , PRECR_SRA__R__PH_W  , 2   , 32,
17663        0xfc0003ff, 0x200003cd, 0                      , 0,
17664        0x0                 },        /* PRECR_SRA[_R].PH.W */
17665     { instruction         , 0                   , 0   , 32,
17666        0xfc0003ff, 0x200003d5, &NMD::SHLLV_S_W        , 0,
17667        DSP_                },        /* SHLLV_S.W */
17668     { reserved_block      , 0                   , 0   , 32,
17669        0xfc0003ff, 0x200003dd, 0                      , 0,
17670        0x0                 },        /* _POOL32A5~*(123) */
17671     { reserved_block      , 0                   , 0   , 32,
17672        0xfc0003ff, 0x200003e5, 0                      , 0,
17673        0x0                 },        /* _POOL32A5~*(124) */
17674     { reserved_block      , 0                   , 0   , 32,
17675        0xfc0003ff, 0x200003ed, 0                      , 0,
17676        0x0                 },        /* _POOL32A5~*(125) */
17677     { instruction         , 0                   , 0   , 32,
17678        0xfc0003ff, 0x200003f5, &NMD::SHLL_S_W         , 0,
17679        DSP_                },        /* SHLL_S.W */
17680     { reserved_block      , 0                   , 0   , 32,
17681        0xfc0003ff, 0x200003fd, 0                      , 0,
17682        0x0                 },        /* _POOL32A5~*(127) */
17683 };
17684
17685
17686 NMD::Pool NMD::PP_LSX[16] = {
17687     { instruction         , 0                   , 0   , 32,
17688        0xfc0007ff, 0x20000007, &NMD::LBX              , 0,
17689        0x0                 },        /* LBX */
17690     { instruction         , 0                   , 0   , 32,
17691        0xfc0007ff, 0x20000087, &NMD::SBX              , 0,
17692        XMMS_               },        /* SBX */
17693     { instruction         , 0                   , 0   , 32,
17694        0xfc0007ff, 0x20000107, &NMD::LBUX             , 0,
17695        0x0                 },        /* LBUX */
17696     { reserved_block      , 0                   , 0   , 32,
17697        0xfc0007ff, 0x20000187, 0                      , 0,
17698        0x0                 },        /* PP.LSX~*(3) */
17699     { instruction         , 0                   , 0   , 32,
17700        0xfc0007ff, 0x20000207, &NMD::LHX              , 0,
17701        0x0                 },        /* LHX */
17702     { instruction         , 0                   , 0   , 32,
17703        0xfc0007ff, 0x20000287, &NMD::SHX              , 0,
17704        XMMS_               },        /* SHX */
17705     { instruction         , 0                   , 0   , 32,
17706        0xfc0007ff, 0x20000307, &NMD::LHUX             , 0,
17707        0x0                 },        /* LHUX */
17708     { instruction         , 0                   , 0   , 32,
17709        0xfc0007ff, 0x20000387, &NMD::LWUX             , 0,
17710        MIPS64_             },        /* LWUX */
17711     { instruction         , 0                   , 0   , 32,
17712        0xfc0007ff, 0x20000407, &NMD::LWX              , 0,
17713        0x0                 },        /* LWX */
17714     { instruction         , 0                   , 0   , 32,
17715        0xfc0007ff, 0x20000487, &NMD::SWX              , 0,
17716        XMMS_               },        /* SWX */
17717     { instruction         , 0                   , 0   , 32,
17718        0xfc0007ff, 0x20000507, &NMD::LWC1X            , 0,
17719        CP1_                },        /* LWC1X */
17720     { instruction         , 0                   , 0   , 32,
17721        0xfc0007ff, 0x20000587, &NMD::SWC1X            , 0,
17722        CP1_                },        /* SWC1X */
17723     { instruction         , 0                   , 0   , 32,
17724        0xfc0007ff, 0x20000607, &NMD::LDX              , 0,
17725        MIPS64_             },        /* LDX */
17726     { instruction         , 0                   , 0   , 32,
17727        0xfc0007ff, 0x20000687, &NMD::SDX              , 0,
17728        MIPS64_             },        /* SDX */
17729     { instruction         , 0                   , 0   , 32,
17730        0xfc0007ff, 0x20000707, &NMD::LDC1X            , 0,
17731        CP1_                },        /* LDC1X */
17732     { instruction         , 0                   , 0   , 32,
17733        0xfc0007ff, 0x20000787, &NMD::SDC1X            , 0,
17734        CP1_                },        /* SDC1X */
17735 };
17736
17737
17738 NMD::Pool NMD::PP_LSXS[16] = {
17739     { reserved_block      , 0                   , 0   , 32,
17740        0xfc0007ff, 0x20000047, 0                      , 0,
17741        0x0                 },        /* PP.LSXS~*(0) */
17742     { reserved_block      , 0                   , 0   , 32,
17743        0xfc0007ff, 0x200000c7, 0                      , 0,
17744        0x0                 },        /* PP.LSXS~*(1) */
17745     { reserved_block      , 0                   , 0   , 32,
17746        0xfc0007ff, 0x20000147, 0                      , 0,
17747        0x0                 },        /* PP.LSXS~*(2) */
17748     { reserved_block      , 0                   , 0   , 32,
17749        0xfc0007ff, 0x200001c7, 0                      , 0,
17750        0x0                 },        /* PP.LSXS~*(3) */
17751     { instruction         , 0                   , 0   , 32,
17752        0xfc0007ff, 0x20000247, &NMD::LHXS             , 0,
17753        0x0                 },        /* LHXS */
17754     { instruction         , 0                   , 0   , 32,
17755        0xfc0007ff, 0x200002c7, &NMD::SHXS             , 0,
17756        XMMS_               },        /* SHXS */
17757     { instruction         , 0                   , 0   , 32,
17758        0xfc0007ff, 0x20000347, &NMD::LHUXS            , 0,
17759        0x0                 },        /* LHUXS */
17760     { instruction         , 0                   , 0   , 32,
17761        0xfc0007ff, 0x200003c7, &NMD::LWUXS            , 0,
17762        MIPS64_             },        /* LWUXS */
17763     { instruction         , 0                   , 0   , 32,
17764        0xfc0007ff, 0x20000447, &NMD::LWXS_32_         , 0,
17765        0x0                 },        /* LWXS[32] */
17766     { instruction         , 0                   , 0   , 32,
17767        0xfc0007ff, 0x200004c7, &NMD::SWXS             , 0,
17768        XMMS_               },        /* SWXS */
17769     { instruction         , 0                   , 0   , 32,
17770        0xfc0007ff, 0x20000547, &NMD::LWC1XS           , 0,
17771        CP1_                },        /* LWC1XS */
17772     { instruction         , 0                   , 0   , 32,
17773        0xfc0007ff, 0x200005c7, &NMD::SWC1XS           , 0,
17774        CP1_                },        /* SWC1XS */
17775     { instruction         , 0                   , 0   , 32,
17776        0xfc0007ff, 0x20000647, &NMD::LDXS             , 0,
17777        MIPS64_             },        /* LDXS */
17778     { instruction         , 0                   , 0   , 32,
17779        0xfc0007ff, 0x200006c7, &NMD::SDXS             , 0,
17780        MIPS64_             },        /* SDXS */
17781     { instruction         , 0                   , 0   , 32,
17782        0xfc0007ff, 0x20000747, &NMD::LDC1XS           , 0,
17783        CP1_                },        /* LDC1XS */
17784     { instruction         , 0                   , 0   , 32,
17785        0xfc0007ff, 0x200007c7, &NMD::SDC1XS           , 0,
17786        CP1_                },        /* SDC1XS */
17787 };
17788
17789
17790 NMD::Pool NMD::P_LSX[2] = {
17791     { pool                , PP_LSX              , 16  , 32,
17792        0xfc00007f, 0x20000007, 0                      , 0,
17793        0x0                 },        /* PP.LSX */
17794     { pool                , PP_LSXS             , 16  , 32,
17795        0xfc00007f, 0x20000047, 0                      , 0,
17796        0x0                 },        /* PP.LSXS */
17797 };
17798
17799
17800 NMD::Pool NMD::POOL32Axf_1_0[4] = {
17801     { instruction         , 0                   , 0   , 32,
17802        0xfc003fff, 0x2000007f, &NMD::MFHI_DSP_        , 0,
17803        DSP_                },        /* MFHI[DSP] */
17804     { instruction         , 0                   , 0   , 32,
17805        0xfc003fff, 0x2000107f, &NMD::MFLO_DSP_        , 0,
17806        DSP_                },        /* MFLO[DSP] */
17807     { instruction         , 0                   , 0   , 32,
17808        0xfc003fff, 0x2000207f, &NMD::MTHI_DSP_        , 0,
17809        DSP_                },        /* MTHI[DSP] */
17810     { instruction         , 0                   , 0   , 32,
17811        0xfc003fff, 0x2000307f, &NMD::MTLO_DSP_        , 0,
17812        DSP_                },        /* MTLO[DSP] */
17813 };
17814
17815
17816 NMD::Pool NMD::POOL32Axf_1_1[4] = {
17817     { instruction         , 0                   , 0   , 32,
17818        0xfc003fff, 0x2000027f, &NMD::MTHLIP           , 0,
17819        DSP_                },        /* MTHLIP */
17820     { instruction         , 0                   , 0   , 32,
17821        0xfc003fff, 0x2000127f, &NMD::SHILOV           , 0,
17822        DSP_                },        /* SHILOV */
17823     { reserved_block      , 0                   , 0   , 32,
17824        0xfc003fff, 0x2000227f, 0                      , 0,
17825        0x0                 },        /* POOL32Axf_1_1~*(2) */
17826     { reserved_block      , 0                   , 0   , 32,
17827        0xfc003fff, 0x2000327f, 0                      , 0,
17828        0x0                 },        /* POOL32Axf_1_1~*(3) */
17829 };
17830
17831
17832 NMD::Pool NMD::POOL32Axf_1_3[4] = {
17833     { instruction         , 0                   , 0   , 32,
17834        0xfc003fff, 0x2000067f, &NMD::RDDSP            , 0,
17835        DSP_                },        /* RDDSP */
17836     { instruction         , 0                   , 0   , 32,
17837        0xfc003fff, 0x2000167f, &NMD::WRDSP            , 0,
17838        DSP_                },        /* WRDSP */
17839     { instruction         , 0                   , 0   , 32,
17840        0xfc003fff, 0x2000267f, &NMD::EXTP             , 0,
17841        DSP_                },        /* EXTP */
17842     { instruction         , 0                   , 0   , 32,
17843        0xfc003fff, 0x2000367f, &NMD::EXTPDP           , 0,
17844        DSP_                },        /* EXTPDP */
17845 };
17846
17847
17848 NMD::Pool NMD::POOL32Axf_1_4[2] = {
17849     { instruction         , 0                   , 0   , 32,
17850        0xfc001fff, 0x2000087f, &NMD::SHLL_QB          , 0,
17851        DSP_                },        /* SHLL.QB */
17852     { instruction         , 0                   , 0   , 32,
17853        0xfc001fff, 0x2000187f, &NMD::SHRL_QB          , 0,
17854        DSP_                },        /* SHRL.QB */
17855 };
17856
17857
17858 NMD::Pool NMD::MAQ_S_A__W_PHR[2] = {
17859     { instruction         , 0                   , 0   , 32,
17860        0xfc003fff, 0x20000a7f, &NMD::MAQ_S_W_PHR      , 0,
17861        DSP_                },        /* MAQ_S.W.PHR */
17862     { instruction         , 0                   , 0   , 32,
17863        0xfc003fff, 0x20002a7f, &NMD::MAQ_SA_W_PHR     , 0,
17864        DSP_                },        /* MAQ_SA.W.PHR */
17865 };
17866
17867
17868 NMD::Pool NMD::MAQ_S_A__W_PHL[2] = {
17869     { instruction         , 0                   , 0   , 32,
17870        0xfc003fff, 0x20001a7f, &NMD::MAQ_S_W_PHL      , 0,
17871        DSP_                },        /* MAQ_S.W.PHL */
17872     { instruction         , 0                   , 0   , 32,
17873        0xfc003fff, 0x20003a7f, &NMD::MAQ_SA_W_PHL     , 0,
17874        DSP_                },        /* MAQ_SA.W.PHL */
17875 };
17876
17877
17878 NMD::Pool NMD::POOL32Axf_1_5[2] = {
17879     { pool                , MAQ_S_A__W_PHR      , 2   , 32,
17880        0xfc001fff, 0x20000a7f, 0                      , 0,
17881        0x0                 },        /* MAQ_S[A].W.PHR */
17882     { pool                , MAQ_S_A__W_PHL      , 2   , 32,
17883        0xfc001fff, 0x20001a7f, 0                      , 0,
17884        0x0                 },        /* MAQ_S[A].W.PHL */
17885 };
17886
17887
17888 NMD::Pool NMD::POOL32Axf_1_7[4] = {
17889     { instruction         , 0                   , 0   , 32,
17890        0xfc003fff, 0x20000e7f, &NMD::EXTR_W           , 0,
17891        DSP_                },        /* EXTR.W */
17892     { instruction         , 0                   , 0   , 32,
17893        0xfc003fff, 0x20001e7f, &NMD::EXTR_R_W         , 0,
17894        DSP_                },        /* EXTR_R.W */
17895     { instruction         , 0                   , 0   , 32,
17896        0xfc003fff, 0x20002e7f, &NMD::EXTR_RS_W        , 0,
17897        DSP_                },        /* EXTR_RS.W */
17898     { instruction         , 0                   , 0   , 32,
17899        0xfc003fff, 0x20003e7f, &NMD::EXTR_S_H         , 0,
17900        DSP_                },        /* EXTR_S.H */
17901 };
17902
17903
17904 NMD::Pool NMD::POOL32Axf_1[8] = {
17905     { pool                , POOL32Axf_1_0       , 4   , 32,
17906        0xfc000fff, 0x2000007f, 0                      , 0,
17907        0x0                 },        /* POOL32Axf_1_0 */
17908     { pool                , POOL32Axf_1_1       , 4   , 32,
17909        0xfc000fff, 0x2000027f, 0                      , 0,
17910        0x0                 },        /* POOL32Axf_1_1 */
17911     { reserved_block      , 0                   , 0   , 32,
17912        0xfc000fff, 0x2000047f, 0                      , 0,
17913        0x0                 },        /* POOL32Axf_1~*(2) */
17914     { pool                , POOL32Axf_1_3       , 4   , 32,
17915        0xfc000fff, 0x2000067f, 0                      , 0,
17916        0x0                 },        /* POOL32Axf_1_3 */
17917     { pool                , POOL32Axf_1_4       , 2   , 32,
17918        0xfc000fff, 0x2000087f, 0                      , 0,
17919        0x0                 },        /* POOL32Axf_1_4 */
17920     { pool                , POOL32Axf_1_5       , 2   , 32,
17921        0xfc000fff, 0x20000a7f, 0                      , 0,
17922        0x0                 },        /* POOL32Axf_1_5 */
17923     { reserved_block      , 0                   , 0   , 32,
17924        0xfc000fff, 0x20000c7f, 0                      , 0,
17925        0x0                 },        /* POOL32Axf_1~*(6) */
17926     { pool                , POOL32Axf_1_7       , 4   , 32,
17927        0xfc000fff, 0x20000e7f, 0                      , 0,
17928        0x0                 },        /* POOL32Axf_1_7 */
17929 };
17930
17931
17932 NMD::Pool NMD::POOL32Axf_2_DSP__0_7[8] = {
17933     { instruction         , 0                   , 0   , 32,
17934        0xfc003fff, 0x200000bf, &NMD::DPA_W_PH         , 0,
17935        DSP_                },        /* DPA.W.PH */
17936     { instruction         , 0                   , 0   , 32,
17937        0xfc003fff, 0x200002bf, &NMD::DPAQ_S_W_PH      , 0,
17938        DSP_                },        /* DPAQ_S.W.PH */
17939     { instruction         , 0                   , 0   , 32,
17940        0xfc003fff, 0x200004bf, &NMD::DPS_W_PH         , 0,
17941        DSP_                },        /* DPS.W.PH */
17942     { instruction         , 0                   , 0   , 32,
17943        0xfc003fff, 0x200006bf, &NMD::DPSQ_S_W_PH      , 0,
17944        DSP_                },        /* DPSQ_S.W.PH */
17945     { reserved_block      , 0                   , 0   , 32,
17946        0xfc003fff, 0x200008bf, 0                      , 0,
17947        0x0                 },        /* POOL32Axf_2(DSP)_0_7~*(4) */
17948     { instruction         , 0                   , 0   , 32,
17949        0xfc003fff, 0x20000abf, &NMD::MADD_DSP_        , 0,
17950        DSP_                },        /* MADD[DSP] */
17951     { instruction         , 0                   , 0   , 32,
17952        0xfc003fff, 0x20000cbf, &NMD::MULT_DSP_        , 0,
17953        DSP_                },        /* MULT[DSP] */
17954     { instruction         , 0                   , 0   , 32,
17955        0xfc003fff, 0x20000ebf, &NMD::EXTRV_W          , 0,
17956        DSP_                },        /* EXTRV.W */
17957 };
17958
17959
17960 NMD::Pool NMD::POOL32Axf_2_DSP__8_15[8] = {
17961     { instruction         , 0                   , 0   , 32,
17962        0xfc003fff, 0x200010bf, &NMD::DPAX_W_PH        , 0,
17963        DSP_                },        /* DPAX.W.PH */
17964     { instruction         , 0                   , 0   , 32,
17965        0xfc003fff, 0x200012bf, &NMD::DPAQ_SA_L_W      , 0,
17966        DSP_                },        /* DPAQ_SA.L.W */
17967     { instruction         , 0                   , 0   , 32,
17968        0xfc003fff, 0x200014bf, &NMD::DPSX_W_PH        , 0,
17969        DSP_                },        /* DPSX.W.PH */
17970     { instruction         , 0                   , 0   , 32,
17971        0xfc003fff, 0x200016bf, &NMD::DPSQ_SA_L_W      , 0,
17972        DSP_                },        /* DPSQ_SA.L.W */
17973     { reserved_block      , 0                   , 0   , 32,
17974        0xfc003fff, 0x200018bf, 0                      , 0,
17975        0x0                 },        /* POOL32Axf_2(DSP)_8_15~*(4) */
17976     { instruction         , 0                   , 0   , 32,
17977        0xfc003fff, 0x20001abf, &NMD::MADDU_DSP_       , 0,
17978        DSP_                },        /* MADDU[DSP] */
17979     { instruction         , 0                   , 0   , 32,
17980        0xfc003fff, 0x20001cbf, &NMD::MULTU_DSP_       , 0,
17981        DSP_                },        /* MULTU[DSP] */
17982     { instruction         , 0                   , 0   , 32,
17983        0xfc003fff, 0x20001ebf, &NMD::EXTRV_R_W        , 0,
17984        DSP_                },        /* EXTRV_R.W */
17985 };
17986
17987
17988 NMD::Pool NMD::POOL32Axf_2_DSP__16_23[8] = {
17989     { instruction         , 0                   , 0   , 32,
17990        0xfc003fff, 0x200020bf, &NMD::DPAU_H_QBL       , 0,
17991        DSP_                },        /* DPAU.H.QBL */
17992     { instruction         , 0                   , 0   , 32,
17993        0xfc003fff, 0x200022bf, &NMD::DPAQX_S_W_PH     , 0,
17994        DSP_                },        /* DPAQX_S.W.PH */
17995     { instruction         , 0                   , 0   , 32,
17996        0xfc003fff, 0x200024bf, &NMD::DPSU_H_QBL       , 0,
17997        DSP_                },        /* DPSU.H.QBL */
17998     { instruction         , 0                   , 0   , 32,
17999        0xfc003fff, 0x200026bf, &NMD::DPSQX_S_W_PH     , 0,
18000        DSP_                },        /* DPSQX_S.W.PH */
18001     { instruction         , 0                   , 0   , 32,
18002        0xfc003fff, 0x200028bf, &NMD::EXTPV            , 0,
18003        DSP_                },        /* EXTPV */
18004     { instruction         , 0                   , 0   , 32,
18005        0xfc003fff, 0x20002abf, &NMD::MSUB_DSP_        , 0,
18006        DSP_                },        /* MSUB[DSP] */
18007     { instruction         , 0                   , 0   , 32,
18008        0xfc003fff, 0x20002cbf, &NMD::MULSA_W_PH       , 0,
18009        DSP_                },        /* MULSA.W.PH */
18010     { instruction         , 0                   , 0   , 32,
18011        0xfc003fff, 0x20002ebf, &NMD::EXTRV_RS_W       , 0,
18012        DSP_                },        /* EXTRV_RS.W */
18013 };
18014
18015
18016 NMD::Pool NMD::POOL32Axf_2_DSP__24_31[8] = {
18017     { instruction         , 0                   , 0   , 32,
18018        0xfc003fff, 0x200030bf, &NMD::DPAU_H_QBR       , 0,
18019        DSP_                },        /* DPAU.H.QBR */
18020     { instruction         , 0                   , 0   , 32,
18021        0xfc003fff, 0x200032bf, &NMD::DPAQX_SA_W_PH    , 0,
18022        DSP_                },        /* DPAQX_SA.W.PH */
18023     { instruction         , 0                   , 0   , 32,
18024        0xfc003fff, 0x200034bf, &NMD::DPSU_H_QBR       , 0,
18025        DSP_                },        /* DPSU.H.QBR */
18026     { instruction         , 0                   , 0   , 32,
18027        0xfc003fff, 0x200036bf, &NMD::DPSQX_SA_W_PH    , 0,
18028        DSP_                },        /* DPSQX_SA.W.PH */
18029     { instruction         , 0                   , 0   , 32,
18030        0xfc003fff, 0x200038bf, &NMD::EXTPDPV          , 0,
18031        DSP_                },        /* EXTPDPV */
18032     { instruction         , 0                   , 0   , 32,
18033        0xfc003fff, 0x20003abf, &NMD::MSUBU_DSP_       , 0,
18034        DSP_                },        /* MSUBU[DSP] */
18035     { instruction         , 0                   , 0   , 32,
18036        0xfc003fff, 0x20003cbf, &NMD::MULSAQ_S_W_PH    , 0,
18037        DSP_                },        /* MULSAQ_S.W.PH */
18038     { instruction         , 0                   , 0   , 32,
18039        0xfc003fff, 0x20003ebf, &NMD::EXTRV_S_H        , 0,
18040        DSP_                },        /* EXTRV_S.H */
18041 };
18042
18043
18044 NMD::Pool NMD::POOL32Axf_2[4] = {
18045     { pool                , POOL32Axf_2_DSP__0_7, 8   , 32,
18046        0xfc0031ff, 0x200000bf, 0                      , 0,
18047        0x0                 },        /* POOL32Axf_2(DSP)_0_7 */
18048     { pool                , POOL32Axf_2_DSP__8_15, 8   , 32,
18049        0xfc0031ff, 0x200010bf, 0                      , 0,
18050        0x0                 },        /* POOL32Axf_2(DSP)_8_15 */
18051     { pool                , POOL32Axf_2_DSP__16_23, 8   , 32,
18052        0xfc0031ff, 0x200020bf, 0                      , 0,
18053        0x0                 },        /* POOL32Axf_2(DSP)_16_23 */
18054     { pool                , POOL32Axf_2_DSP__24_31, 8   , 32,
18055        0xfc0031ff, 0x200030bf, 0                      , 0,
18056        0x0                 },        /* POOL32Axf_2(DSP)_24_31 */
18057 };
18058
18059
18060 NMD::Pool NMD::POOL32Axf_4[128] = {
18061     { instruction         , 0                   , 0   , 32,
18062        0xfc00ffff, 0x2000013f, &NMD::ABSQ_S_QB        , 0,
18063        DSP_                },        /* ABSQ_S.QB */
18064     { instruction         , 0                   , 0   , 32,
18065        0xfc00ffff, 0x2000033f, &NMD::REPLV_PH         , 0,
18066        DSP_                },        /* REPLV.PH */
18067     { reserved_block      , 0                   , 0   , 32,
18068        0xfc00ffff, 0x2000053f, 0                      , 0,
18069        0x0                 },        /* POOL32Axf_4~*(2) */
18070     { reserved_block      , 0                   , 0   , 32,
18071        0xfc00ffff, 0x2000073f, 0                      , 0,
18072        0x0                 },        /* POOL32Axf_4~*(3) */
18073     { reserved_block      , 0                   , 0   , 32,
18074        0xfc00ffff, 0x2000093f, 0                      , 0,
18075        0x0                 },        /* POOL32Axf_4~*(4) */
18076     { reserved_block      , 0                   , 0   , 32,
18077        0xfc00ffff, 0x20000b3f, 0                      , 0,
18078        0x0                 },        /* POOL32Axf_4~*(5) */
18079     { reserved_block      , 0                   , 0   , 32,
18080        0xfc00ffff, 0x20000d3f, 0                      , 0,
18081        0x0                 },        /* POOL32Axf_4~*(6) */
18082     { reserved_block      , 0                   , 0   , 32,
18083        0xfc00ffff, 0x20000f3f, 0                      , 0,
18084        0x0                 },        /* POOL32Axf_4~*(7) */
18085     { instruction         , 0                   , 0   , 32,
18086        0xfc00ffff, 0x2000113f, &NMD::ABSQ_S_PH        , 0,
18087        DSP_                },        /* ABSQ_S.PH */
18088     { instruction         , 0                   , 0   , 32,
18089        0xfc00ffff, 0x2000133f, &NMD::REPLV_QB         , 0,
18090        DSP_                },        /* REPLV.QB */
18091     { reserved_block      , 0                   , 0   , 32,
18092        0xfc00ffff, 0x2000153f, 0                      , 0,
18093        0x0                 },        /* POOL32Axf_4~*(10) */
18094     { reserved_block      , 0                   , 0   , 32,
18095        0xfc00ffff, 0x2000173f, 0                      , 0,
18096        0x0                 },        /* POOL32Axf_4~*(11) */
18097     { reserved_block      , 0                   , 0   , 32,
18098        0xfc00ffff, 0x2000193f, 0                      , 0,
18099        0x0                 },        /* POOL32Axf_4~*(12) */
18100     { reserved_block      , 0                   , 0   , 32,
18101        0xfc00ffff, 0x20001b3f, 0                      , 0,
18102        0x0                 },        /* POOL32Axf_4~*(13) */
18103     { reserved_block      , 0                   , 0   , 32,
18104        0xfc00ffff, 0x20001d3f, 0                      , 0,
18105        0x0                 },        /* POOL32Axf_4~*(14) */
18106     { reserved_block      , 0                   , 0   , 32,
18107        0xfc00ffff, 0x20001f3f, 0                      , 0,
18108        0x0                 },        /* POOL32Axf_4~*(15) */
18109     { instruction         , 0                   , 0   , 32,
18110        0xfc00ffff, 0x2000213f, &NMD::ABSQ_S_W         , 0,
18111        DSP_                },        /* ABSQ_S.W */
18112     { reserved_block      , 0                   , 0   , 32,
18113        0xfc00ffff, 0x2000233f, 0                      , 0,
18114        0x0                 },        /* POOL32Axf_4~*(17) */
18115     { reserved_block      , 0                   , 0   , 32,
18116        0xfc00ffff, 0x2000253f, 0                      , 0,
18117        0x0                 },        /* POOL32Axf_4~*(18) */
18118     { reserved_block      , 0                   , 0   , 32,
18119        0xfc00ffff, 0x2000273f, 0                      , 0,
18120        0x0                 },        /* POOL32Axf_4~*(19) */
18121     { reserved_block      , 0                   , 0   , 32,
18122        0xfc00ffff, 0x2000293f, 0                      , 0,
18123        0x0                 },        /* POOL32Axf_4~*(20) */
18124     { reserved_block      , 0                   , 0   , 32,
18125        0xfc00ffff, 0x20002b3f, 0                      , 0,
18126        0x0                 },        /* POOL32Axf_4~*(21) */
18127     { reserved_block      , 0                   , 0   , 32,
18128        0xfc00ffff, 0x20002d3f, 0                      , 0,
18129        0x0                 },        /* POOL32Axf_4~*(22) */
18130     { reserved_block      , 0                   , 0   , 32,
18131        0xfc00ffff, 0x20002f3f, 0                      , 0,
18132        0x0                 },        /* POOL32Axf_4~*(23) */
18133     { reserved_block      , 0                   , 0   , 32,
18134        0xfc00ffff, 0x2000313f, 0                      , 0,
18135        0x0                 },        /* POOL32Axf_4~*(24) */
18136     { reserved_block      , 0                   , 0   , 32,
18137        0xfc00ffff, 0x2000333f, 0                      , 0,
18138        0x0                 },        /* POOL32Axf_4~*(25) */
18139     { reserved_block      , 0                   , 0   , 32,
18140        0xfc00ffff, 0x2000353f, 0                      , 0,
18141        0x0                 },        /* POOL32Axf_4~*(26) */
18142     { reserved_block      , 0                   , 0   , 32,
18143        0xfc00ffff, 0x2000373f, 0                      , 0,
18144        0x0                 },        /* POOL32Axf_4~*(27) */
18145     { reserved_block      , 0                   , 0   , 32,
18146        0xfc00ffff, 0x2000393f, 0                      , 0,
18147        0x0                 },        /* POOL32Axf_4~*(28) */
18148     { reserved_block      , 0                   , 0   , 32,
18149        0xfc00ffff, 0x20003b3f, 0                      , 0,
18150        0x0                 },        /* POOL32Axf_4~*(29) */
18151     { reserved_block      , 0                   , 0   , 32,
18152        0xfc00ffff, 0x20003d3f, 0                      , 0,
18153        0x0                 },        /* POOL32Axf_4~*(30) */
18154     { reserved_block      , 0                   , 0   , 32,
18155        0xfc00ffff, 0x20003f3f, 0                      , 0,
18156        0x0                 },        /* POOL32Axf_4~*(31) */
18157     { instruction         , 0                   , 0   , 32,
18158        0xfc00ffff, 0x2000413f, &NMD::INSV             , 0,
18159        DSP_                },        /* INSV */
18160     { reserved_block      , 0                   , 0   , 32,
18161        0xfc00ffff, 0x2000433f, 0                      , 0,
18162        0x0                 },        /* POOL32Axf_4~*(33) */
18163     { reserved_block      , 0                   , 0   , 32,
18164        0xfc00ffff, 0x2000453f, 0                      , 0,
18165        0x0                 },        /* POOL32Axf_4~*(34) */
18166     { reserved_block      , 0                   , 0   , 32,
18167        0xfc00ffff, 0x2000473f, 0                      , 0,
18168        0x0                 },        /* POOL32Axf_4~*(35) */
18169     { reserved_block      , 0                   , 0   , 32,
18170        0xfc00ffff, 0x2000493f, 0                      , 0,
18171        0x0                 },        /* POOL32Axf_4~*(36) */
18172     { instruction         , 0                   , 0   , 32,
18173        0xfc00ffff, 0x20004b3f, &NMD::CLO              , 0,
18174        XMMS_               },        /* CLO */
18175     { instruction         , 0                   , 0   , 32,
18176        0xfc00ffff, 0x20004d3f, &NMD::MFC2             , 0,
18177        CP2_                },        /* MFC2 */
18178     { reserved_block      , 0                   , 0   , 32,
18179        0xfc00ffff, 0x20004f3f, 0                      , 0,
18180        0x0                 },        /* POOL32Axf_4~*(39) */
18181     { instruction         , 0                   , 0   , 32,
18182        0xfc00ffff, 0x2000513f, &NMD::PRECEQ_W_PHL     , 0,
18183        DSP_                },        /* PRECEQ.W.PHL */
18184     { reserved_block      , 0                   , 0   , 32,
18185        0xfc00ffff, 0x2000533f, 0                      , 0,
18186        0x0                 },        /* POOL32Axf_4~*(41) */
18187     { reserved_block      , 0                   , 0   , 32,
18188        0xfc00ffff, 0x2000553f, 0                      , 0,
18189        0x0                 },        /* POOL32Axf_4~*(42) */
18190     { reserved_block      , 0                   , 0   , 32,
18191        0xfc00ffff, 0x2000573f, 0                      , 0,
18192        0x0                 },        /* POOL32Axf_4~*(43) */
18193     { reserved_block      , 0                   , 0   , 32,
18194        0xfc00ffff, 0x2000593f, 0                      , 0,
18195        0x0                 },        /* POOL32Axf_4~*(44) */
18196     { instruction         , 0                   , 0   , 32,
18197        0xfc00ffff, 0x20005b3f, &NMD::CLZ              , 0,
18198        XMMS_               },        /* CLZ */
18199     { instruction         , 0                   , 0   , 32,
18200        0xfc00ffff, 0x20005d3f, &NMD::MTC2             , 0,
18201        CP2_                },        /* MTC2 */
18202     { reserved_block      , 0                   , 0   , 32,
18203        0xfc00ffff, 0x20005f3f, 0                      , 0,
18204        0x0                 },        /* POOL32Axf_4~*(47) */
18205     { instruction         , 0                   , 0   , 32,
18206        0xfc00ffff, 0x2000613f, &NMD::PRECEQ_W_PHR     , 0,
18207        DSP_                },        /* PRECEQ.W.PHR */
18208     { reserved_block      , 0                   , 0   , 32,
18209        0xfc00ffff, 0x2000633f, 0                      , 0,
18210        0x0                 },        /* POOL32Axf_4~*(49) */
18211     { reserved_block      , 0                   , 0   , 32,
18212        0xfc00ffff, 0x2000653f, 0                      , 0,
18213        0x0                 },        /* POOL32Axf_4~*(50) */
18214     { reserved_block      , 0                   , 0   , 32,
18215        0xfc00ffff, 0x2000673f, 0                      , 0,
18216        0x0                 },        /* POOL32Axf_4~*(51) */
18217     { reserved_block      , 0                   , 0   , 32,
18218        0xfc00ffff, 0x2000693f, 0                      , 0,
18219        0x0                 },        /* POOL32Axf_4~*(52) */
18220     { reserved_block      , 0                   , 0   , 32,
18221        0xfc00ffff, 0x20006b3f, 0                      , 0,
18222        0x0                 },        /* POOL32Axf_4~*(53) */
18223     { instruction         , 0                   , 0   , 32,
18224        0xfc00ffff, 0x20006d3f, &NMD::DMFC2            , 0,
18225        CP2_                },        /* DMFC2 */
18226     { reserved_block      , 0                   , 0   , 32,
18227        0xfc00ffff, 0x20006f3f, 0                      , 0,
18228        0x0                 },        /* POOL32Axf_4~*(55) */
18229     { instruction         , 0                   , 0   , 32,
18230        0xfc00ffff, 0x2000713f, &NMD::PRECEQU_PH_QBL   , 0,
18231        DSP_                },        /* PRECEQU.PH.QBL */
18232     { instruction         , 0                   , 0   , 32,
18233        0xfc00ffff, 0x2000733f, &NMD::PRECEQU_PH_QBLA  , 0,
18234        DSP_                },        /* PRECEQU.PH.QBLA */
18235     { reserved_block      , 0                   , 0   , 32,
18236        0xfc00ffff, 0x2000753f, 0                      , 0,
18237        0x0                 },        /* POOL32Axf_4~*(58) */
18238     { reserved_block      , 0                   , 0   , 32,
18239        0xfc00ffff, 0x2000773f, 0                      , 0,
18240        0x0                 },        /* POOL32Axf_4~*(59) */
18241     { reserved_block      , 0                   , 0   , 32,
18242        0xfc00ffff, 0x2000793f, 0                      , 0,
18243        0x0                 },        /* POOL32Axf_4~*(60) */
18244     { reserved_block      , 0                   , 0   , 32,
18245        0xfc00ffff, 0x20007b3f, 0                      , 0,
18246        0x0                 },        /* POOL32Axf_4~*(61) */
18247     { instruction         , 0                   , 0   , 32,
18248        0xfc00ffff, 0x20007d3f, &NMD::DMTC2            , 0,
18249        CP2_                },        /* DMTC2 */
18250     { reserved_block      , 0                   , 0   , 32,
18251        0xfc00ffff, 0x20007f3f, 0                      , 0,
18252        0x0                 },        /* POOL32Axf_4~*(63) */
18253     { reserved_block      , 0                   , 0   , 32,
18254        0xfc00ffff, 0x2000813f, 0                      , 0,
18255        0x0                 },        /* POOL32Axf_4~*(64) */
18256     { reserved_block      , 0                   , 0   , 32,
18257        0xfc00ffff, 0x2000833f, 0                      , 0,
18258        0x0                 },        /* POOL32Axf_4~*(65) */
18259     { reserved_block      , 0                   , 0   , 32,
18260        0xfc00ffff, 0x2000853f, 0                      , 0,
18261        0x0                 },        /* POOL32Axf_4~*(66) */
18262     { reserved_block      , 0                   , 0   , 32,
18263        0xfc00ffff, 0x2000873f, 0                      , 0,
18264        0x0                 },        /* POOL32Axf_4~*(67) */
18265     { reserved_block      , 0                   , 0   , 32,
18266        0xfc00ffff, 0x2000893f, 0                      , 0,
18267        0x0                 },        /* POOL32Axf_4~*(68) */
18268     { reserved_block      , 0                   , 0   , 32,
18269        0xfc00ffff, 0x20008b3f, 0                      , 0,
18270        0x0                 },        /* POOL32Axf_4~*(69) */
18271     { instruction         , 0                   , 0   , 32,
18272        0xfc00ffff, 0x20008d3f, &NMD::MFHC2            , 0,
18273        CP2_                },        /* MFHC2 */
18274     { reserved_block      , 0                   , 0   , 32,
18275        0xfc00ffff, 0x20008f3f, 0                      , 0,
18276        0x0                 },        /* POOL32Axf_4~*(71) */
18277     { instruction         , 0                   , 0   , 32,
18278        0xfc00ffff, 0x2000913f, &NMD::PRECEQU_PH_QBR   , 0,
18279        DSP_                },        /* PRECEQU.PH.QBR */
18280     { instruction         , 0                   , 0   , 32,
18281        0xfc00ffff, 0x2000933f, &NMD::PRECEQU_PH_QBRA  , 0,
18282        DSP_                },        /* PRECEQU.PH.QBRA */
18283     { reserved_block      , 0                   , 0   , 32,
18284        0xfc00ffff, 0x2000953f, 0                      , 0,
18285        0x0                 },        /* POOL32Axf_4~*(74) */
18286     { reserved_block      , 0                   , 0   , 32,
18287        0xfc00ffff, 0x2000973f, 0                      , 0,
18288        0x0                 },        /* POOL32Axf_4~*(75) */
18289     { reserved_block      , 0                   , 0   , 32,
18290        0xfc00ffff, 0x2000993f, 0                      , 0,
18291        0x0                 },        /* POOL32Axf_4~*(76) */
18292     { reserved_block      , 0                   , 0   , 32,
18293        0xfc00ffff, 0x20009b3f, 0                      , 0,
18294        0x0                 },        /* POOL32Axf_4~*(77) */
18295     { instruction         , 0                   , 0   , 32,
18296        0xfc00ffff, 0x20009d3f, &NMD::MTHC2            , 0,
18297        CP2_                },        /* MTHC2 */
18298     { reserved_block      , 0                   , 0   , 32,
18299        0xfc00ffff, 0x20009f3f, 0                      , 0,
18300        0x0                 },        /* POOL32Axf_4~*(79) */
18301     { reserved_block      , 0                   , 0   , 32,
18302        0xfc00ffff, 0x2000a13f, 0                      , 0,
18303        0x0                 },        /* POOL32Axf_4~*(80) */
18304     { reserved_block      , 0                   , 0   , 32,
18305        0xfc00ffff, 0x2000a33f, 0                      , 0,
18306        0x0                 },        /* POOL32Axf_4~*(81) */
18307     { reserved_block      , 0                   , 0   , 32,
18308        0xfc00ffff, 0x2000a53f, 0                      , 0,
18309        0x0                 },        /* POOL32Axf_4~*(82) */
18310     { reserved_block      , 0                   , 0   , 32,
18311        0xfc00ffff, 0x2000a73f, 0                      , 0,
18312        0x0                 },        /* POOL32Axf_4~*(83) */
18313     { reserved_block      , 0                   , 0   , 32,
18314        0xfc00ffff, 0x2000a93f, 0                      , 0,
18315        0x0                 },        /* POOL32Axf_4~*(84) */
18316     { reserved_block      , 0                   , 0   , 32,
18317        0xfc00ffff, 0x2000ab3f, 0                      , 0,
18318        0x0                 },        /* POOL32Axf_4~*(85) */
18319     { reserved_block      , 0                   , 0   , 32,
18320        0xfc00ffff, 0x2000ad3f, 0                      , 0,
18321        0x0                 },        /* POOL32Axf_4~*(86) */
18322     { reserved_block      , 0                   , 0   , 32,
18323        0xfc00ffff, 0x2000af3f, 0                      , 0,
18324        0x0                 },        /* POOL32Axf_4~*(87) */
18325     { instruction         , 0                   , 0   , 32,
18326        0xfc00ffff, 0x2000b13f, &NMD::PRECEU_PH_QBL    , 0,
18327        DSP_                },        /* PRECEU.PH.QBL */
18328     { instruction         , 0                   , 0   , 32,
18329        0xfc00ffff, 0x2000b33f, &NMD::PRECEU_PH_QBLA   , 0,
18330        DSP_                },        /* PRECEU.PH.QBLA */
18331     { reserved_block      , 0                   , 0   , 32,
18332        0xfc00ffff, 0x2000b53f, 0                      , 0,
18333        0x0                 },        /* POOL32Axf_4~*(90) */
18334     { reserved_block      , 0                   , 0   , 32,
18335        0xfc00ffff, 0x2000b73f, 0                      , 0,
18336        0x0                 },        /* POOL32Axf_4~*(91) */
18337     { reserved_block      , 0                   , 0   , 32,
18338        0xfc00ffff, 0x2000b93f, 0                      , 0,
18339        0x0                 },        /* POOL32Axf_4~*(92) */
18340     { reserved_block      , 0                   , 0   , 32,
18341        0xfc00ffff, 0x2000bb3f, 0                      , 0,
18342        0x0                 },        /* POOL32Axf_4~*(93) */
18343     { reserved_block      , 0                   , 0   , 32,
18344        0xfc00ffff, 0x2000bd3f, 0                      , 0,
18345        0x0                 },        /* POOL32Axf_4~*(94) */
18346     { reserved_block      , 0                   , 0   , 32,
18347        0xfc00ffff, 0x2000bf3f, 0                      , 0,
18348        0x0                 },        /* POOL32Axf_4~*(95) */
18349     { reserved_block      , 0                   , 0   , 32,
18350        0xfc00ffff, 0x2000c13f, 0                      , 0,
18351        0x0                 },        /* POOL32Axf_4~*(96) */
18352     { reserved_block      , 0                   , 0   , 32,
18353        0xfc00ffff, 0x2000c33f, 0                      , 0,
18354        0x0                 },        /* POOL32Axf_4~*(97) */
18355     { reserved_block      , 0                   , 0   , 32,
18356        0xfc00ffff, 0x2000c53f, 0                      , 0,
18357        0x0                 },        /* POOL32Axf_4~*(98) */
18358     { reserved_block      , 0                   , 0   , 32,
18359        0xfc00ffff, 0x2000c73f, 0                      , 0,
18360        0x0                 },        /* POOL32Axf_4~*(99) */
18361     { reserved_block      , 0                   , 0   , 32,
18362        0xfc00ffff, 0x2000c93f, 0                      , 0,
18363        0x0                 },        /* POOL32Axf_4~*(100) */
18364     { reserved_block      , 0                   , 0   , 32,
18365        0xfc00ffff, 0x2000cb3f, 0                      , 0,
18366        0x0                 },        /* POOL32Axf_4~*(101) */
18367     { instruction         , 0                   , 0   , 32,
18368        0xfc00ffff, 0x2000cd3f, &NMD::CFC2             , 0,
18369        CP2_                },        /* CFC2 */
18370     { reserved_block      , 0                   , 0   , 32,
18371        0xfc00ffff, 0x2000cf3f, 0                      , 0,
18372        0x0                 },        /* POOL32Axf_4~*(103) */
18373     { instruction         , 0                   , 0   , 32,
18374        0xfc00ffff, 0x2000d13f, &NMD::PRECEU_PH_QBR    , 0,
18375        DSP_                },        /* PRECEU.PH.QBR */
18376     { instruction         , 0                   , 0   , 32,
18377        0xfc00ffff, 0x2000d33f, &NMD::PRECEU_PH_QBRA   , 0,
18378        DSP_                },        /* PRECEU.PH.QBRA */
18379     { reserved_block      , 0                   , 0   , 32,
18380        0xfc00ffff, 0x2000d53f, 0                      , 0,
18381        0x0                 },        /* POOL32Axf_4~*(106) */
18382     { reserved_block      , 0                   , 0   , 32,
18383        0xfc00ffff, 0x2000d73f, 0                      , 0,
18384        0x0                 },        /* POOL32Axf_4~*(107) */
18385     { reserved_block      , 0                   , 0   , 32,
18386        0xfc00ffff, 0x2000d93f, 0                      , 0,
18387        0x0                 },        /* POOL32Axf_4~*(108) */
18388     { reserved_block      , 0                   , 0   , 32,
18389        0xfc00ffff, 0x2000db3f, 0                      , 0,
18390        0x0                 },        /* POOL32Axf_4~*(109) */
18391     { instruction         , 0                   , 0   , 32,
18392        0xfc00ffff, 0x2000dd3f, &NMD::CTC2             , 0,
18393        CP2_                },        /* CTC2 */
18394     { reserved_block      , 0                   , 0   , 32,
18395        0xfc00ffff, 0x2000df3f, 0                      , 0,
18396        0x0                 },        /* POOL32Axf_4~*(111) */
18397     { reserved_block      , 0                   , 0   , 32,
18398        0xfc00ffff, 0x2000e13f, 0                      , 0,
18399        0x0                 },        /* POOL32Axf_4~*(112) */
18400     { reserved_block      , 0                   , 0   , 32,
18401        0xfc00ffff, 0x2000e33f, 0                      , 0,
18402        0x0                 },        /* POOL32Axf_4~*(113) */
18403     { reserved_block      , 0                   , 0   , 32,
18404        0xfc00ffff, 0x2000e53f, 0                      , 0,
18405        0x0                 },        /* POOL32Axf_4~*(114) */
18406     { reserved_block      , 0                   , 0   , 32,
18407        0xfc00ffff, 0x2000e73f, 0                      , 0,
18408        0x0                 },        /* POOL32Axf_4~*(115) */
18409     { reserved_block      , 0                   , 0   , 32,
18410        0xfc00ffff, 0x2000e93f, 0                      , 0,
18411        0x0                 },        /* POOL32Axf_4~*(116) */
18412     { reserved_block      , 0                   , 0   , 32,
18413        0xfc00ffff, 0x2000eb3f, 0                      , 0,
18414        0x0                 },        /* POOL32Axf_4~*(117) */
18415     { reserved_block      , 0                   , 0   , 32,
18416        0xfc00ffff, 0x2000ed3f, 0                      , 0,
18417        0x0                 },        /* POOL32Axf_4~*(118) */
18418     { reserved_block      , 0                   , 0   , 32,
18419        0xfc00ffff, 0x2000ef3f, 0                      , 0,
18420        0x0                 },        /* POOL32Axf_4~*(119) */
18421     { instruction         , 0                   , 0   , 32,
18422        0xfc00ffff, 0x2000f13f, &NMD::RADDU_W_QB       , 0,
18423        DSP_                },        /* RADDU.W.QB */
18424     { reserved_block      , 0                   , 0   , 32,
18425        0xfc00ffff, 0x2000f33f, 0                      , 0,
18426        0x0                 },        /* POOL32Axf_4~*(121) */
18427     { reserved_block      , 0                   , 0   , 32,
18428        0xfc00ffff, 0x2000f53f, 0                      , 0,
18429        0x0                 },        /* POOL32Axf_4~*(122) */
18430     { reserved_block      , 0                   , 0   , 32,
18431        0xfc00ffff, 0x2000f73f, 0                      , 0,
18432        0x0                 },        /* POOL32Axf_4~*(123) */
18433     { reserved_block      , 0                   , 0   , 32,
18434        0xfc00ffff, 0x2000f93f, 0                      , 0,
18435        0x0                 },        /* POOL32Axf_4~*(124) */
18436     { reserved_block      , 0                   , 0   , 32,
18437        0xfc00ffff, 0x2000fb3f, 0                      , 0,
18438        0x0                 },        /* POOL32Axf_4~*(125) */
18439     { reserved_block      , 0                   , 0   , 32,
18440        0xfc00ffff, 0x2000fd3f, 0                      , 0,
18441        0x0                 },        /* POOL32Axf_4~*(126) */
18442     { reserved_block      , 0                   , 0   , 32,
18443        0xfc00ffff, 0x2000ff3f, 0                      , 0,
18444        0x0                 },        /* POOL32Axf_4~*(127) */
18445 };
18446
18447
18448 NMD::Pool NMD::POOL32Axf_5_group0[32] = {
18449     { instruction         , 0                   , 0   , 32,
18450        0xfc00ffff, 0x2000017f, &NMD::TLBGP            , 0,
18451        CP0_ | VZ_ | TLB_   },        /* TLBGP */
18452     { instruction         , 0                   , 0   , 32,
18453        0xfc00ffff, 0x2000037f, &NMD::TLBP             , 0,
18454        CP0_ | TLB_         },        /* TLBP */
18455     { instruction         , 0                   , 0   , 32,
18456        0xfc00ffff, 0x2000057f, &NMD::TLBGINV          , 0,
18457        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINV */
18458     { instruction         , 0                   , 0   , 32,
18459        0xfc00ffff, 0x2000077f, &NMD::TLBINV           , 0,
18460        CP0_ | TLB_ | TLBINV_},        /* TLBINV */
18461     { reserved_block      , 0                   , 0   , 32,
18462        0xfc00ffff, 0x2000097f, 0                      , 0,
18463        0x0                 },        /* POOL32Axf_5_group0~*(4) */
18464     { reserved_block      , 0                   , 0   , 32,
18465        0xfc00ffff, 0x20000b7f, 0                      , 0,
18466        0x0                 },        /* POOL32Axf_5_group0~*(5) */
18467     { reserved_block      , 0                   , 0   , 32,
18468        0xfc00ffff, 0x20000d7f, 0                      , 0,
18469        0x0                 },        /* POOL32Axf_5_group0~*(6) */
18470     { reserved_block      , 0                   , 0   , 32,
18471        0xfc00ffff, 0x20000f7f, 0                      , 0,
18472        0x0                 },        /* POOL32Axf_5_group0~*(7) */
18473     { instruction         , 0                   , 0   , 32,
18474        0xfc00ffff, 0x2000117f, &NMD::TLBGR            , 0,
18475        CP0_ | VZ_ | TLB_   },        /* TLBGR */
18476     { instruction         , 0                   , 0   , 32,
18477        0xfc00ffff, 0x2000137f, &NMD::TLBR             , 0,
18478        CP0_ | TLB_         },        /* TLBR */
18479     { instruction         , 0                   , 0   , 32,
18480        0xfc00ffff, 0x2000157f, &NMD::TLBGINVF         , 0,
18481        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINVF */
18482     { instruction         , 0                   , 0   , 32,
18483        0xfc00ffff, 0x2000177f, &NMD::TLBINVF          , 0,
18484        CP0_ | TLB_ | TLBINV_},        /* TLBINVF */
18485     { reserved_block      , 0                   , 0   , 32,
18486        0xfc00ffff, 0x2000197f, 0                      , 0,
18487        0x0                 },        /* POOL32Axf_5_group0~*(12) */
18488     { reserved_block      , 0                   , 0   , 32,
18489        0xfc00ffff, 0x20001b7f, 0                      , 0,
18490        0x0                 },        /* POOL32Axf_5_group0~*(13) */
18491     { reserved_block      , 0                   , 0   , 32,
18492        0xfc00ffff, 0x20001d7f, 0                      , 0,
18493        0x0                 },        /* POOL32Axf_5_group0~*(14) */
18494     { reserved_block      , 0                   , 0   , 32,
18495        0xfc00ffff, 0x20001f7f, 0                      , 0,
18496        0x0                 },        /* POOL32Axf_5_group0~*(15) */
18497     { instruction         , 0                   , 0   , 32,
18498        0xfc00ffff, 0x2000217f, &NMD::TLBGWI           , 0,
18499        CP0_ | VZ_ | TLB_   },        /* TLBGWI */
18500     { instruction         , 0                   , 0   , 32,
18501        0xfc00ffff, 0x2000237f, &NMD::TLBWI            , 0,
18502        CP0_ | TLB_         },        /* TLBWI */
18503     { reserved_block      , 0                   , 0   , 32,
18504        0xfc00ffff, 0x2000257f, 0                      , 0,
18505        0x0                 },        /* POOL32Axf_5_group0~*(18) */
18506     { reserved_block      , 0                   , 0   , 32,
18507        0xfc00ffff, 0x2000277f, 0                      , 0,
18508        0x0                 },        /* POOL32Axf_5_group0~*(19) */
18509     { reserved_block      , 0                   , 0   , 32,
18510        0xfc00ffff, 0x2000297f, 0                      , 0,
18511        0x0                 },        /* POOL32Axf_5_group0~*(20) */
18512     { reserved_block      , 0                   , 0   , 32,
18513        0xfc00ffff, 0x20002b7f, 0                      , 0,
18514        0x0                 },        /* POOL32Axf_5_group0~*(21) */
18515     { reserved_block      , 0                   , 0   , 32,
18516        0xfc00ffff, 0x20002d7f, 0                      , 0,
18517        0x0                 },        /* POOL32Axf_5_group0~*(22) */
18518     { reserved_block      , 0                   , 0   , 32,
18519        0xfc00ffff, 0x20002f7f, 0                      , 0,
18520        0x0                 },        /* POOL32Axf_5_group0~*(23) */
18521     { instruction         , 0                   , 0   , 32,
18522        0xfc00ffff, 0x2000317f, &NMD::TLBGWR           , 0,
18523        CP0_ | VZ_ | TLB_   },        /* TLBGWR */
18524     { instruction         , 0                   , 0   , 32,
18525        0xfc00ffff, 0x2000337f, &NMD::TLBWR            , 0,
18526        CP0_ | TLB_         },        /* TLBWR */
18527     { reserved_block      , 0                   , 0   , 32,
18528        0xfc00ffff, 0x2000357f, 0                      , 0,
18529        0x0                 },        /* POOL32Axf_5_group0~*(26) */
18530     { reserved_block      , 0                   , 0   , 32,
18531        0xfc00ffff, 0x2000377f, 0                      , 0,
18532        0x0                 },        /* POOL32Axf_5_group0~*(27) */
18533     { reserved_block      , 0                   , 0   , 32,
18534        0xfc00ffff, 0x2000397f, 0                      , 0,
18535        0x0                 },        /* POOL32Axf_5_group0~*(28) */
18536     { reserved_block      , 0                   , 0   , 32,
18537        0xfc00ffff, 0x20003b7f, 0                      , 0,
18538        0x0                 },        /* POOL32Axf_5_group0~*(29) */
18539     { reserved_block      , 0                   , 0   , 32,
18540        0xfc00ffff, 0x20003d7f, 0                      , 0,
18541        0x0                 },        /* POOL32Axf_5_group0~*(30) */
18542     { reserved_block      , 0                   , 0   , 32,
18543        0xfc00ffff, 0x20003f7f, 0                      , 0,
18544        0x0                 },        /* POOL32Axf_5_group0~*(31) */
18545 };
18546
18547
18548 NMD::Pool NMD::POOL32Axf_5_group1[32] = {
18549     { reserved_block      , 0                   , 0   , 32,
18550        0xfc00ffff, 0x2000417f, 0                      , 0,
18551        0x0                 },        /* POOL32Axf_5_group1~*(0) */
18552     { reserved_block      , 0                   , 0   , 32,
18553        0xfc00ffff, 0x2000437f, 0                      , 0,
18554        0x0                 },        /* POOL32Axf_5_group1~*(1) */
18555     { reserved_block      , 0                   , 0   , 32,
18556        0xfc00ffff, 0x2000457f, 0                      , 0,
18557        0x0                 },        /* POOL32Axf_5_group1~*(2) */
18558     { instruction         , 0                   , 0   , 32,
18559        0xfc00ffff, 0x2000477f, &NMD::DI               , 0,
18560        0x0                 },        /* DI */
18561     { reserved_block      , 0                   , 0   , 32,
18562        0xfc00ffff, 0x2000497f, 0                      , 0,
18563        0x0                 },        /* POOL32Axf_5_group1~*(4) */
18564     { reserved_block      , 0                   , 0   , 32,
18565        0xfc00ffff, 0x20004b7f, 0                      , 0,
18566        0x0                 },        /* POOL32Axf_5_group1~*(5) */
18567     { reserved_block      , 0                   , 0   , 32,
18568        0xfc00ffff, 0x20004d7f, 0                      , 0,
18569        0x0                 },        /* POOL32Axf_5_group1~*(6) */
18570     { reserved_block      , 0                   , 0   , 32,
18571        0xfc00ffff, 0x20004f7f, 0                      , 0,
18572        0x0                 },        /* POOL32Axf_5_group1~*(7) */
18573     { reserved_block      , 0                   , 0   , 32,
18574        0xfc00ffff, 0x2000517f, 0                      , 0,
18575        0x0                 },        /* POOL32Axf_5_group1~*(8) */
18576     { reserved_block      , 0                   , 0   , 32,
18577        0xfc00ffff, 0x2000537f, 0                      , 0,
18578        0x0                 },        /* POOL32Axf_5_group1~*(9) */
18579     { reserved_block      , 0                   , 0   , 32,
18580        0xfc00ffff, 0x2000557f, 0                      , 0,
18581        0x0                 },        /* POOL32Axf_5_group1~*(10) */
18582     { instruction         , 0                   , 0   , 32,
18583        0xfc00ffff, 0x2000577f, &NMD::EI               , 0,
18584        0x0                 },        /* EI */
18585     { reserved_block      , 0                   , 0   , 32,
18586        0xfc00ffff, 0x2000597f, 0                      , 0,
18587        0x0                 },        /* POOL32Axf_5_group1~*(12) */
18588     { reserved_block      , 0                   , 0   , 32,
18589        0xfc00ffff, 0x20005b7f, 0                      , 0,
18590        0x0                 },        /* POOL32Axf_5_group1~*(13) */
18591     { reserved_block      , 0                   , 0   , 32,
18592        0xfc00ffff, 0x20005d7f, 0                      , 0,
18593        0x0                 },        /* POOL32Axf_5_group1~*(14) */
18594     { reserved_block      , 0                   , 0   , 32,
18595        0xfc00ffff, 0x20005f7f, 0                      , 0,
18596        0x0                 },        /* POOL32Axf_5_group1~*(15) */
18597     { reserved_block      , 0                   , 0   , 32,
18598        0xfc00ffff, 0x2000617f, 0                      , 0,
18599        0x0                 },        /* POOL32Axf_5_group1~*(16) */
18600     { reserved_block      , 0                   , 0   , 32,
18601        0xfc00ffff, 0x2000637f, 0                      , 0,
18602        0x0                 },        /* POOL32Axf_5_group1~*(17) */
18603     { reserved_block      , 0                   , 0   , 32,
18604        0xfc00ffff, 0x2000657f, 0                      , 0,
18605        0x0                 },        /* POOL32Axf_5_group1~*(18) */
18606     { reserved_block      , 0                   , 0   , 32,
18607        0xfc00ffff, 0x2000677f, 0                      , 0,
18608        0x0                 },        /* POOL32Axf_5_group1~*(19) */
18609     { reserved_block      , 0                   , 0   , 32,
18610        0xfc00ffff, 0x2000697f, 0                      , 0,
18611        0x0                 },        /* POOL32Axf_5_group1~*(20) */
18612     { reserved_block      , 0                   , 0   , 32,
18613        0xfc00ffff, 0x20006b7f, 0                      , 0,
18614        0x0                 },        /* POOL32Axf_5_group1~*(21) */
18615     { reserved_block      , 0                   , 0   , 32,
18616        0xfc00ffff, 0x20006d7f, 0                      , 0,
18617        0x0                 },        /* POOL32Axf_5_group1~*(22) */
18618     { reserved_block      , 0                   , 0   , 32,
18619        0xfc00ffff, 0x20006f7f, 0                      , 0,
18620        0x0                 },        /* POOL32Axf_5_group1~*(23) */
18621     { reserved_block      , 0                   , 0   , 32,
18622        0xfc00ffff, 0x2000717f, 0                      , 0,
18623        0x0                 },        /* POOL32Axf_5_group1~*(24) */
18624     { reserved_block      , 0                   , 0   , 32,
18625        0xfc00ffff, 0x2000737f, 0                      , 0,
18626        0x0                 },        /* POOL32Axf_5_group1~*(25) */
18627     { reserved_block      , 0                   , 0   , 32,
18628        0xfc00ffff, 0x2000757f, 0                      , 0,
18629        0x0                 },        /* POOL32Axf_5_group1~*(26) */
18630     { reserved_block      , 0                   , 0   , 32,
18631        0xfc00ffff, 0x2000777f, 0                      , 0,
18632        0x0                 },        /* POOL32Axf_5_group1~*(27) */
18633     { reserved_block      , 0                   , 0   , 32,
18634        0xfc00ffff, 0x2000797f, 0                      , 0,
18635        0x0                 },        /* POOL32Axf_5_group1~*(28) */
18636     { reserved_block      , 0                   , 0   , 32,
18637        0xfc00ffff, 0x20007b7f, 0                      , 0,
18638        0x0                 },        /* POOL32Axf_5_group1~*(29) */
18639     { reserved_block      , 0                   , 0   , 32,
18640        0xfc00ffff, 0x20007d7f, 0                      , 0,
18641        0x0                 },        /* POOL32Axf_5_group1~*(30) */
18642     { reserved_block      , 0                   , 0   , 32,
18643        0xfc00ffff, 0x20007f7f, 0                      , 0,
18644        0x0                 },        /* POOL32Axf_5_group1~*(31) */
18645 };
18646
18647
18648 NMD::Pool NMD::ERETx[2] = {
18649     { instruction         , 0                   , 0   , 32,
18650        0xfc01ffff, 0x2000f37f, &NMD::ERET             , 0,
18651        0x0                 },        /* ERET */
18652     { instruction         , 0                   , 0   , 32,
18653        0xfc01ffff, 0x2001f37f, &NMD::ERETNC           , 0,
18654        0x0                 },        /* ERETNC */
18655 };
18656
18657
18658 NMD::Pool NMD::POOL32Axf_5_group3[32] = {
18659     { reserved_block      , 0                   , 0   , 32,
18660        0xfc00ffff, 0x2000c17f, 0                      , 0,
18661        0x0                 },        /* POOL32Axf_5_group3~*(0) */
18662     { instruction         , 0                   , 0   , 32,
18663        0xfc00ffff, 0x2000c37f, &NMD::WAIT             , 0,
18664        0x0                 },        /* WAIT */
18665     { reserved_block      , 0                   , 0   , 32,
18666        0xfc00ffff, 0x2000c57f, 0                      , 0,
18667        0x0                 },        /* POOL32Axf_5_group3~*(2) */
18668     { reserved_block      , 0                   , 0   , 32,
18669        0xfc00ffff, 0x2000c77f, 0                      , 0,
18670        0x0                 },        /* POOL32Axf_5_group3~*(3) */
18671     { reserved_block      , 0                   , 0   , 32,
18672        0xfc00ffff, 0x2000c97f, 0                      , 0,
18673        0x0                 },        /* POOL32Axf_5_group3~*(4) */
18674     { reserved_block      , 0                   , 0   , 32,
18675        0xfc00ffff, 0x2000cb7f, 0                      , 0,
18676        0x0                 },        /* POOL32Axf_5_group3~*(5) */
18677     { reserved_block      , 0                   , 0   , 32,
18678        0xfc00ffff, 0x2000cd7f, 0                      , 0,
18679        0x0                 },        /* POOL32Axf_5_group3~*(6) */
18680     { reserved_block      , 0                   , 0   , 32,
18681        0xfc00ffff, 0x2000cf7f, 0                      , 0,
18682        0x0                 },        /* POOL32Axf_5_group3~*(7) */
18683     { reserved_block      , 0                   , 0   , 32,
18684        0xfc00ffff, 0x2000d17f, 0                      , 0,
18685        0x0                 },        /* POOL32Axf_5_group3~*(8) */
18686     { instruction         , 0                   , 0   , 32,
18687        0xfc00ffff, 0x2000d37f, &NMD::IRET             , 0,
18688        MCU_                },        /* IRET */
18689     { reserved_block      , 0                   , 0   , 32,
18690        0xfc00ffff, 0x2000d57f, 0                      , 0,
18691        0x0                 },        /* POOL32Axf_5_group3~*(10) */
18692     { reserved_block      , 0                   , 0   , 32,
18693        0xfc00ffff, 0x2000d77f, 0                      , 0,
18694        0x0                 },        /* POOL32Axf_5_group3~*(11) */
18695     { reserved_block      , 0                   , 0   , 32,
18696        0xfc00ffff, 0x2000d97f, 0                      , 0,
18697        0x0                 },        /* POOL32Axf_5_group3~*(12) */
18698     { reserved_block      , 0                   , 0   , 32,
18699        0xfc00ffff, 0x2000db7f, 0                      , 0,
18700        0x0                 },        /* POOL32Axf_5_group3~*(13) */
18701     { reserved_block      , 0                   , 0   , 32,
18702        0xfc00ffff, 0x2000dd7f, 0                      , 0,
18703        0x0                 },        /* POOL32Axf_5_group3~*(14) */
18704     { reserved_block      , 0                   , 0   , 32,
18705        0xfc00ffff, 0x2000df7f, 0                      , 0,
18706        0x0                 },        /* POOL32Axf_5_group3~*(15) */
18707     { instruction         , 0                   , 0   , 32,
18708        0xfc00ffff, 0x2000e17f, &NMD::RDPGPR           , 0,
18709        CP0_                },        /* RDPGPR */
18710     { instruction         , 0                   , 0   , 32,
18711        0xfc00ffff, 0x2000e37f, &NMD::DERET            , 0,
18712        EJTAG_              },        /* DERET */
18713     { reserved_block      , 0                   , 0   , 32,
18714        0xfc00ffff, 0x2000e57f, 0                      , 0,
18715        0x0                 },        /* POOL32Axf_5_group3~*(18) */
18716     { reserved_block      , 0                   , 0   , 32,
18717        0xfc00ffff, 0x2000e77f, 0                      , 0,
18718        0x0                 },        /* POOL32Axf_5_group3~*(19) */
18719     { reserved_block      , 0                   , 0   , 32,
18720        0xfc00ffff, 0x2000e97f, 0                      , 0,
18721        0x0                 },        /* POOL32Axf_5_group3~*(20) */
18722     { reserved_block      , 0                   , 0   , 32,
18723        0xfc00ffff, 0x2000eb7f, 0                      , 0,
18724        0x0                 },        /* POOL32Axf_5_group3~*(21) */
18725     { reserved_block      , 0                   , 0   , 32,
18726        0xfc00ffff, 0x2000ed7f, 0                      , 0,
18727        0x0                 },        /* POOL32Axf_5_group3~*(22) */
18728     { reserved_block      , 0                   , 0   , 32,
18729        0xfc00ffff, 0x2000ef7f, 0                      , 0,
18730        0x0                 },        /* POOL32Axf_5_group3~*(23) */
18731     { instruction         , 0                   , 0   , 32,
18732        0xfc00ffff, 0x2000f17f, &NMD::WRPGPR           , 0,
18733        CP0_                },        /* WRPGPR */
18734     { pool                , ERETx               , 2   , 32,
18735        0xfc00ffff, 0x2000f37f, 0                      , 0,
18736        0x0                 },        /* ERETx */
18737     { reserved_block      , 0                   , 0   , 32,
18738        0xfc00ffff, 0x2000f57f, 0                      , 0,
18739        0x0                 },        /* POOL32Axf_5_group3~*(26) */
18740     { reserved_block      , 0                   , 0   , 32,
18741        0xfc00ffff, 0x2000f77f, 0                      , 0,
18742        0x0                 },        /* POOL32Axf_5_group3~*(27) */
18743     { reserved_block      , 0                   , 0   , 32,
18744        0xfc00ffff, 0x2000f97f, 0                      , 0,
18745        0x0                 },        /* POOL32Axf_5_group3~*(28) */
18746     { reserved_block      , 0                   , 0   , 32,
18747        0xfc00ffff, 0x2000fb7f, 0                      , 0,
18748        0x0                 },        /* POOL32Axf_5_group3~*(29) */
18749     { reserved_block      , 0                   , 0   , 32,
18750        0xfc00ffff, 0x2000fd7f, 0                      , 0,
18751        0x0                 },        /* POOL32Axf_5_group3~*(30) */
18752     { reserved_block      , 0                   , 0   , 32,
18753        0xfc00ffff, 0x2000ff7f, 0                      , 0,
18754        0x0                 },        /* POOL32Axf_5_group3~*(31) */
18755 };
18756
18757
18758 NMD::Pool NMD::POOL32Axf_5[4] = {
18759     { pool                , POOL32Axf_5_group0  , 32  , 32,
18760        0xfc00c1ff, 0x2000017f, 0                      , 0,
18761        0x0                 },        /* POOL32Axf_5_group0 */
18762     { pool                , POOL32Axf_5_group1  , 32  , 32,
18763        0xfc00c1ff, 0x2000417f, 0                      , 0,
18764        0x0                 },        /* POOL32Axf_5_group1 */
18765     { reserved_block      , 0                   , 0   , 32,
18766        0xfc00c1ff, 0x2000817f, 0                      , 0,
18767        0x0                 },        /* POOL32Axf_5~*(2) */
18768     { pool                , POOL32Axf_5_group3  , 32  , 32,
18769        0xfc00c1ff, 0x2000c17f, 0                      , 0,
18770        0x0                 },        /* POOL32Axf_5_group3 */
18771 };
18772
18773
18774 NMD::Pool NMD::SHRA__R__QB[2] = {
18775     { instruction         , 0                   , 0   , 32,
18776        0xfc001fff, 0x200001ff, &NMD::SHRA_QB          , 0,
18777        DSP_                },        /* SHRA.QB */
18778     { instruction         , 0                   , 0   , 32,
18779        0xfc001fff, 0x200011ff, &NMD::SHRA_R_QB        , 0,
18780        DSP_                },        /* SHRA_R.QB */
18781 };
18782
18783
18784 NMD::Pool NMD::POOL32Axf_7[8] = {
18785     { pool                , SHRA__R__QB         , 2   , 32,
18786        0xfc000fff, 0x200001ff, 0                      , 0,
18787        0x0                 },        /* SHRA[_R].QB */
18788     { instruction         , 0                   , 0   , 32,
18789        0xfc000fff, 0x200003ff, &NMD::SHRL_PH          , 0,
18790        DSP_                },        /* SHRL.PH */
18791     { instruction         , 0                   , 0   , 32,
18792        0xfc000fff, 0x200005ff, &NMD::REPL_QB          , 0,
18793        DSP_                },        /* REPL.QB */
18794     { reserved_block      , 0                   , 0   , 32,
18795        0xfc000fff, 0x200007ff, 0                      , 0,
18796        0x0                 },        /* POOL32Axf_7~*(3) */
18797     { reserved_block      , 0                   , 0   , 32,
18798        0xfc000fff, 0x200009ff, 0                      , 0,
18799        0x0                 },        /* POOL32Axf_7~*(4) */
18800     { reserved_block      , 0                   , 0   , 32,
18801        0xfc000fff, 0x20000bff, 0                      , 0,
18802        0x0                 },        /* POOL32Axf_7~*(5) */
18803     { reserved_block      , 0                   , 0   , 32,
18804        0xfc000fff, 0x20000dff, 0                      , 0,
18805        0x0                 },        /* POOL32Axf_7~*(6) */
18806     { reserved_block      , 0                   , 0   , 32,
18807        0xfc000fff, 0x20000fff, 0                      , 0,
18808        0x0                 },        /* POOL32Axf_7~*(7) */
18809 };
18810
18811
18812 NMD::Pool NMD::POOL32Axf[8] = {
18813     { reserved_block      , 0                   , 0   , 32,
18814        0xfc0001ff, 0x2000003f, 0                      , 0,
18815        0x0                 },        /* POOL32Axf~*(0) */
18816     { pool                , POOL32Axf_1         , 8   , 32,
18817        0xfc0001ff, 0x2000007f, 0                      , 0,
18818        0x0                 },        /* POOL32Axf_1 */
18819     { pool                , POOL32Axf_2         , 4   , 32,
18820        0xfc0001ff, 0x200000bf, 0                      , 0,
18821        0x0                 },        /* POOL32Axf_2 */
18822     { reserved_block      , 0                   , 0   , 32,
18823        0xfc0001ff, 0x200000ff, 0                      , 0,
18824        0x0                 },        /* POOL32Axf~*(3) */
18825     { pool                , POOL32Axf_4         , 128 , 32,
18826        0xfc0001ff, 0x2000013f, 0                      , 0,
18827        0x0                 },        /* POOL32Axf_4 */
18828     { pool                , POOL32Axf_5         , 4   , 32,
18829        0xfc0001ff, 0x2000017f, 0                      , 0,
18830        0x0                 },        /* POOL32Axf_5 */
18831     { reserved_block      , 0                   , 0   , 32,
18832        0xfc0001ff, 0x200001bf, 0                      , 0,
18833        0x0                 },        /* POOL32Axf~*(6) */
18834     { pool                , POOL32Axf_7         , 8   , 32,
18835        0xfc0001ff, 0x200001ff, 0                      , 0,
18836        0x0                 },        /* POOL32Axf_7 */
18837 };
18838
18839
18840 NMD::Pool NMD::_POOL32A7[8] = {
18841     { pool                , P_LSX               , 2   , 32,
18842        0xfc00003f, 0x20000007, 0                      , 0,
18843        0x0                 },        /* P.LSX */
18844     { instruction         , 0                   , 0   , 32,
18845        0xfc00003f, 0x2000000f, &NMD::LSA              , 0,
18846        0x0                 },        /* LSA */
18847     { reserved_block      , 0                   , 0   , 32,
18848        0xfc00003f, 0x20000017, 0                      , 0,
18849        0x0                 },        /* _POOL32A7~*(2) */
18850     { instruction         , 0                   , 0   , 32,
18851        0xfc00003f, 0x2000001f, &NMD::EXTW             , 0,
18852        0x0                 },        /* EXTW */
18853     { reserved_block      , 0                   , 0   , 32,
18854        0xfc00003f, 0x20000027, 0                      , 0,
18855        0x0                 },        /* _POOL32A7~*(4) */
18856     { reserved_block      , 0                   , 0   , 32,
18857        0xfc00003f, 0x2000002f, 0                      , 0,
18858        0x0                 },        /* _POOL32A7~*(5) */
18859     { reserved_block      , 0                   , 0   , 32,
18860        0xfc00003f, 0x20000037, 0                      , 0,
18861        0x0                 },        /* _POOL32A7~*(6) */
18862     { pool                , POOL32Axf           , 8   , 32,
18863        0xfc00003f, 0x2000003f, 0                      , 0,
18864        0x0                 },        /* POOL32Axf */
18865 };
18866
18867
18868 NMD::Pool NMD::P32A[8] = {
18869     { pool                , _POOL32A0           , 128 , 32,
18870        0xfc000007, 0x20000000, 0                      , 0,
18871        0x0                 },        /* _POOL32A0 */
18872     { instruction         , 0                   , 0   , 32,
18873        0xfc000007, 0x20000001, &NMD::SPECIAL2         , 0,
18874        UDI_                },        /* SPECIAL2 */
18875     { instruction         , 0                   , 0   , 32,
18876        0xfc000007, 0x20000002, &NMD::COP2_1           , 0,
18877        CP2_                },        /* COP2_1 */
18878     { instruction         , 0                   , 0   , 32,
18879        0xfc000007, 0x20000003, &NMD::UDI              , 0,
18880        UDI_                },        /* UDI */
18881     { reserved_block      , 0                   , 0   , 32,
18882        0xfc000007, 0x20000004, 0                      , 0,
18883        0x0                 },        /* P32A~*(4) */
18884     { pool                , _POOL32A5           , 128 , 32,
18885        0xfc000007, 0x20000005, 0                      , 0,
18886        0x0                 },        /* _POOL32A5 */
18887     { reserved_block      , 0                   , 0   , 32,
18888        0xfc000007, 0x20000006, 0                      , 0,
18889        0x0                 },        /* P32A~*(6) */
18890     { pool                , _POOL32A7           , 8   , 32,
18891        0xfc000007, 0x20000007, 0                      , 0,
18892        0x0                 },        /* _POOL32A7 */
18893 };
18894
18895
18896 NMD::Pool NMD::P_GP_D[2] = {
18897     { instruction         , 0                   , 0   , 32,
18898        0xfc000007, 0x40000001, &NMD::LD_GP_           , 0,
18899        MIPS64_             },        /* LD[GP] */
18900     { instruction         , 0                   , 0   , 32,
18901        0xfc000007, 0x40000005, &NMD::SD_GP_           , 0,
18902        MIPS64_             },        /* SD[GP] */
18903 };
18904
18905
18906 NMD::Pool NMD::P_GP_W[4] = {
18907     { instruction         , 0                   , 0   , 32,
18908        0xfc000003, 0x40000000, &NMD::ADDIU_GP_W_      , 0,
18909        0x0                 },        /* ADDIU[GP.W] */
18910     { pool                , P_GP_D              , 2   , 32,
18911        0xfc000003, 0x40000001, 0                      , 0,
18912        0x0                 },        /* P.GP.D */
18913     { instruction         , 0                   , 0   , 32,
18914        0xfc000003, 0x40000002, &NMD::LW_GP_           , 0,
18915        0x0                 },        /* LW[GP] */
18916     { instruction         , 0                   , 0   , 32,
18917        0xfc000003, 0x40000003, &NMD::SW_GP_           , 0,
18918        0x0                 },        /* SW[GP] */
18919 };
18920
18921
18922 NMD::Pool NMD::POOL48I[32] = {
18923     { instruction         , 0                   , 0   , 48,
18924        0xfc1f00000000ull, 0x600000000000ull, &NMD::LI_48_           , 0,
18925        XMMS_               },        /* LI[48] */
18926     { instruction         , 0                   , 0   , 48,
18927        0xfc1f00000000ull, 0x600100000000ull, &NMD::ADDIU_48_        , 0,
18928        XMMS_               },        /* ADDIU[48] */
18929     { instruction         , 0                   , 0   , 48,
18930        0xfc1f00000000ull, 0x600200000000ull, &NMD::ADDIU_GP48_      , 0,
18931        XMMS_               },        /* ADDIU[GP48] */
18932     { instruction         , 0                   , 0   , 48,
18933        0xfc1f00000000ull, 0x600300000000ull, &NMD::ADDIUPC_48_      , 0,
18934        XMMS_               },        /* ADDIUPC[48] */
18935     { reserved_block      , 0                   , 0   , 48,
18936        0xfc1f00000000ull, 0x600400000000ull, 0                      , 0,
18937        0x0                 },        /* POOL48I~*(4) */
18938     { reserved_block      , 0                   , 0   , 48,
18939        0xfc1f00000000ull, 0x600500000000ull, 0                      , 0,
18940        0x0                 },        /* POOL48I~*(5) */
18941     { reserved_block      , 0                   , 0   , 48,
18942        0xfc1f00000000ull, 0x600600000000ull, 0                      , 0,
18943        0x0                 },        /* POOL48I~*(6) */
18944     { reserved_block      , 0                   , 0   , 48,
18945        0xfc1f00000000ull, 0x600700000000ull, 0                      , 0,
18946        0x0                 },        /* POOL48I~*(7) */
18947     { reserved_block      , 0                   , 0   , 48,
18948        0xfc1f00000000ull, 0x600800000000ull, 0                      , 0,
18949        0x0                 },        /* POOL48I~*(8) */
18950     { reserved_block      , 0                   , 0   , 48,
18951        0xfc1f00000000ull, 0x600900000000ull, 0                      , 0,
18952        0x0                 },        /* POOL48I~*(9) */
18953     { reserved_block      , 0                   , 0   , 48,
18954        0xfc1f00000000ull, 0x600a00000000ull, 0                      , 0,
18955        0x0                 },        /* POOL48I~*(10) */
18956     { instruction         , 0                   , 0   , 48,
18957        0xfc1f00000000ull, 0x600b00000000ull, &NMD::LWPC_48_         , 0,
18958        XMMS_               },        /* LWPC[48] */
18959     { reserved_block      , 0                   , 0   , 48,
18960        0xfc1f00000000ull, 0x600c00000000ull, 0                      , 0,
18961        0x0                 },        /* POOL48I~*(12) */
18962     { reserved_block      , 0                   , 0   , 48,
18963        0xfc1f00000000ull, 0x600d00000000ull, 0                      , 0,
18964        0x0                 },        /* POOL48I~*(13) */
18965     { reserved_block      , 0                   , 0   , 48,
18966        0xfc1f00000000ull, 0x600e00000000ull, 0                      , 0,
18967        0x0                 },        /* POOL48I~*(14) */
18968     { instruction         , 0                   , 0   , 48,
18969        0xfc1f00000000ull, 0x600f00000000ull, &NMD::SWPC_48_         , 0,
18970        XMMS_               },        /* SWPC[48] */
18971     { reserved_block      , 0                   , 0   , 48,
18972        0xfc1f00000000ull, 0x601000000000ull, 0                      , 0,
18973        0x0                 },        /* POOL48I~*(16) */
18974     { instruction         , 0                   , 0   , 48,
18975        0xfc1f00000000ull, 0x601100000000ull, &NMD::DADDIU_48_       , 0,
18976        MIPS64_             },        /* DADDIU[48] */
18977     { reserved_block      , 0                   , 0   , 48,
18978        0xfc1f00000000ull, 0x601200000000ull, 0                      , 0,
18979        0x0                 },        /* POOL48I~*(18) */
18980     { reserved_block      , 0                   , 0   , 48,
18981        0xfc1f00000000ull, 0x601300000000ull, 0                      , 0,
18982        0x0                 },        /* POOL48I~*(19) */
18983     { instruction         , 0                   , 0   , 48,
18984        0xfc1f00000000ull, 0x601400000000ull, &NMD::DLUI_48_         , 0,
18985        MIPS64_             },        /* DLUI[48] */
18986     { reserved_block      , 0                   , 0   , 48,
18987        0xfc1f00000000ull, 0x601500000000ull, 0                      , 0,
18988        0x0                 },        /* POOL48I~*(21) */
18989     { reserved_block      , 0                   , 0   , 48,
18990        0xfc1f00000000ull, 0x601600000000ull, 0                      , 0,
18991        0x0                 },        /* POOL48I~*(22) */
18992     { reserved_block      , 0                   , 0   , 48,
18993        0xfc1f00000000ull, 0x601700000000ull, 0                      , 0,
18994        0x0                 },        /* POOL48I~*(23) */
18995     { reserved_block      , 0                   , 0   , 48,
18996        0xfc1f00000000ull, 0x601800000000ull, 0                      , 0,
18997        0x0                 },        /* POOL48I~*(24) */
18998     { reserved_block      , 0                   , 0   , 48,
18999        0xfc1f00000000ull, 0x601900000000ull, 0                      , 0,
19000        0x0                 },        /* POOL48I~*(25) */
19001     { reserved_block      , 0                   , 0   , 48,
19002        0xfc1f00000000ull, 0x601a00000000ull, 0                      , 0,
19003        0x0                 },        /* POOL48I~*(26) */
19004     { instruction         , 0                   , 0   , 48,
19005        0xfc1f00000000ull, 0x601b00000000ull, &NMD::LDPC_48_         , 0,
19006        MIPS64_             },        /* LDPC[48] */
19007     { reserved_block      , 0                   , 0   , 48,
19008        0xfc1f00000000ull, 0x601c00000000ull, 0                      , 0,
19009        0x0                 },        /* POOL48I~*(28) */
19010     { reserved_block      , 0                   , 0   , 48,
19011        0xfc1f00000000ull, 0x601d00000000ull, 0                      , 0,
19012        0x0                 },        /* POOL48I~*(29) */
19013     { reserved_block      , 0                   , 0   , 48,
19014        0xfc1f00000000ull, 0x601e00000000ull, 0                      , 0,
19015        0x0                 },        /* POOL48I~*(30) */
19016     { instruction         , 0                   , 0   , 48,
19017        0xfc1f00000000ull, 0x601f00000000ull, &NMD::SDPC_48_         , 0,
19018        MIPS64_             },        /* SDPC[48] */
19019 };
19020
19021
19022 NMD::Pool NMD::PP_SR[4] = {
19023     { instruction         , 0                   , 0   , 32,
19024        0xfc10f003, 0x80003000, &NMD::SAVE_32_         , 0,
19025        0x0                 },        /* SAVE[32] */
19026     { reserved_block      , 0                   , 0   , 32,
19027        0xfc10f003, 0x80003001, 0                      , 0,
19028        0x0                 },        /* PP.SR~*(1) */
19029     { instruction         , 0                   , 0   , 32,
19030        0xfc10f003, 0x80003002, &NMD::RESTORE_32_      , 0,
19031        0x0                 },        /* RESTORE[32] */
19032     { return_instruction  , 0                   , 0   , 32,
19033        0xfc10f003, 0x80003003, &NMD::RESTORE_JRC_32_  , 0,
19034        0x0                 },        /* RESTORE.JRC[32] */
19035 };
19036
19037
19038 NMD::Pool NMD::P_SR_F[8] = {
19039     { instruction         , 0                   , 0   , 32,
19040        0xfc10f007, 0x80103000, &NMD::SAVEF            , 0,
19041        CP1_                },        /* SAVEF */
19042     { instruction         , 0                   , 0   , 32,
19043        0xfc10f007, 0x80103001, &NMD::RESTOREF         , 0,
19044        CP1_                },        /* RESTOREF */
19045     { reserved_block      , 0                   , 0   , 32,
19046        0xfc10f007, 0x80103002, 0                      , 0,
19047        0x0                 },        /* P.SR.F~*(2) */
19048     { reserved_block      , 0                   , 0   , 32,
19049        0xfc10f007, 0x80103003, 0                      , 0,
19050        0x0                 },        /* P.SR.F~*(3) */
19051     { reserved_block      , 0                   , 0   , 32,
19052        0xfc10f007, 0x80103004, 0                      , 0,
19053        0x0                 },        /* P.SR.F~*(4) */
19054     { reserved_block      , 0                   , 0   , 32,
19055        0xfc10f007, 0x80103005, 0                      , 0,
19056        0x0                 },        /* P.SR.F~*(5) */
19057     { reserved_block      , 0                   , 0   , 32,
19058        0xfc10f007, 0x80103006, 0                      , 0,
19059        0x0                 },        /* P.SR.F~*(6) */
19060     { reserved_block      , 0                   , 0   , 32,
19061        0xfc10f007, 0x80103007, 0                      , 0,
19062        0x0                 },        /* P.SR.F~*(7) */
19063 };
19064
19065
19066 NMD::Pool NMD::P_SR[2] = {
19067     { pool                , PP_SR               , 4   , 32,
19068        0xfc10f000, 0x80003000, 0                      , 0,
19069        0x0                 },        /* PP.SR */
19070     { pool                , P_SR_F              , 8   , 32,
19071        0xfc10f000, 0x80103000, 0                      , 0,
19072        0x0                 },        /* P.SR.F */
19073 };
19074
19075
19076 NMD::Pool NMD::P_SLL[5] = {
19077     { instruction         , 0                   , 0   , 32,
19078        0xffe0f1ff, 0x8000c000, &NMD::NOP_32_          , 0,
19079        0x0                 },        /* NOP[32] */
19080     { instruction         , 0                   , 0   , 32,
19081        0xffe0f1ff, 0x8000c003, &NMD::EHB              , 0,
19082        0x0                 },        /* EHB */
19083     { instruction         , 0                   , 0   , 32,
19084        0xffe0f1ff, 0x8000c005, &NMD::PAUSE            , 0,
19085        0x0                 },        /* PAUSE */
19086     { instruction         , 0                   , 0   , 32,
19087        0xffe0f1ff, 0x8000c006, &NMD::SYNC             , 0,
19088        0x0                 },        /* SYNC */
19089     { instruction         , 0                   , 0   , 32,
19090        0xfc00f1e0, 0x8000c000, &NMD::SLL_32_          , 0,
19091        0x0                 },        /* SLL[32] */
19092 };
19093
19094
19095 NMD::Pool NMD::P_SHIFT[16] = {
19096     { pool                , P_SLL               , 5   , 32,
19097        0xfc00f1e0, 0x8000c000, 0                      , 0,
19098        0x0                 },        /* P.SLL */
19099     { reserved_block      , 0                   , 0   , 32,
19100        0xfc00f1e0, 0x8000c020, 0                      , 0,
19101        0x0                 },        /* P.SHIFT~*(1) */
19102     { instruction         , 0                   , 0   , 32,
19103        0xfc00f1e0, 0x8000c040, &NMD::SRL_32_          , 0,
19104        0x0                 },        /* SRL[32] */
19105     { reserved_block      , 0                   , 0   , 32,
19106        0xfc00f1e0, 0x8000c060, 0                      , 0,
19107        0x0                 },        /* P.SHIFT~*(3) */
19108     { instruction         , 0                   , 0   , 32,
19109        0xfc00f1e0, 0x8000c080, &NMD::SRA              , 0,
19110        0x0                 },        /* SRA */
19111     { reserved_block      , 0                   , 0   , 32,
19112        0xfc00f1e0, 0x8000c0a0, 0                      , 0,
19113        0x0                 },        /* P.SHIFT~*(5) */
19114     { instruction         , 0                   , 0   , 32,
19115        0xfc00f1e0, 0x8000c0c0, &NMD::ROTR             , 0,
19116        0x0                 },        /* ROTR */
19117     { reserved_block      , 0                   , 0   , 32,
19118        0xfc00f1e0, 0x8000c0e0, 0                      , 0,
19119        0x0                 },        /* P.SHIFT~*(7) */
19120     { instruction         , 0                   , 0   , 32,
19121        0xfc00f1e0, 0x8000c100, &NMD::DSLL             , 0,
19122        MIPS64_             },        /* DSLL */
19123     { instruction         , 0                   , 0   , 32,
19124        0xfc00f1e0, 0x8000c120, &NMD::DSLL32           , 0,
19125        MIPS64_             },        /* DSLL32 */
19126     { instruction         , 0                   , 0   , 32,
19127        0xfc00f1e0, 0x8000c140, &NMD::DSRL             , 0,
19128        MIPS64_             },        /* DSRL */
19129     { instruction         , 0                   , 0   , 32,
19130        0xfc00f1e0, 0x8000c160, &NMD::DSRL32           , 0,
19131        MIPS64_             },        /* DSRL32 */
19132     { instruction         , 0                   , 0   , 32,
19133        0xfc00f1e0, 0x8000c180, &NMD::DSRA             , 0,
19134        MIPS64_             },        /* DSRA */
19135     { instruction         , 0                   , 0   , 32,
19136        0xfc00f1e0, 0x8000c1a0, &NMD::DSRA32           , 0,
19137        MIPS64_             },        /* DSRA32 */
19138     { instruction         , 0                   , 0   , 32,
19139        0xfc00f1e0, 0x8000c1c0, &NMD::DROTR            , 0,
19140        MIPS64_             },        /* DROTR */
19141     { instruction         , 0                   , 0   , 32,
19142        0xfc00f1e0, 0x8000c1e0, &NMD::DROTR32          , 0,
19143        MIPS64_             },        /* DROTR32 */
19144 };
19145
19146
19147 NMD::Pool NMD::P_ROTX[4] = {
19148     { instruction         , 0                   , 0   , 32,
19149        0xfc00f820, 0x8000d000, &NMD::ROTX             , 0,
19150        XMMS_               },        /* ROTX */
19151     { reserved_block      , 0                   , 0   , 32,
19152        0xfc00f820, 0x8000d020, 0                      , 0,
19153        0x0                 },        /* P.ROTX~*(1) */
19154     { reserved_block      , 0                   , 0   , 32,
19155        0xfc00f820, 0x8000d800, 0                      , 0,
19156        0x0                 },        /* P.ROTX~*(2) */
19157     { reserved_block      , 0                   , 0   , 32,
19158        0xfc00f820, 0x8000d820, 0                      , 0,
19159        0x0                 },        /* P.ROTX~*(3) */
19160 };
19161
19162
19163 NMD::Pool NMD::P_INS[4] = {
19164     { instruction         , 0                   , 0   , 32,
19165        0xfc00f820, 0x8000e000, &NMD::INS              , 0,
19166        XMMS_               },        /* INS */
19167     { instruction         , 0                   , 0   , 32,
19168        0xfc00f820, 0x8000e020, &NMD::DINSU            , 0,
19169        MIPS64_             },        /* DINSU */
19170     { instruction         , 0                   , 0   , 32,
19171        0xfc00f820, 0x8000e800, &NMD::DINSM            , 0,
19172        MIPS64_             },        /* DINSM */
19173     { instruction         , 0                   , 0   , 32,
19174        0xfc00f820, 0x8000e820, &NMD::DINS             , 0,
19175        MIPS64_             },        /* DINS */
19176 };
19177
19178
19179 NMD::Pool NMD::P_EXT[4] = {
19180     { instruction         , 0                   , 0   , 32,
19181        0xfc00f820, 0x8000f000, &NMD::EXT              , 0,
19182        XMMS_               },        /* EXT */
19183     { instruction         , 0                   , 0   , 32,
19184        0xfc00f820, 0x8000f020, &NMD::DEXTU            , 0,
19185        MIPS64_             },        /* DEXTU */
19186     { instruction         , 0                   , 0   , 32,
19187        0xfc00f820, 0x8000f800, &NMD::DEXTM            , 0,
19188        MIPS64_             },        /* DEXTM */
19189     { instruction         , 0                   , 0   , 32,
19190        0xfc00f820, 0x8000f820, &NMD::DEXT             , 0,
19191        MIPS64_             },        /* DEXT */
19192 };
19193
19194
19195 NMD::Pool NMD::P_U12[16] = {
19196     { instruction         , 0                   , 0   , 32,
19197        0xfc00f000, 0x80000000, &NMD::ORI              , 0,
19198        0x0                 },        /* ORI */
19199     { instruction         , 0                   , 0   , 32,
19200        0xfc00f000, 0x80001000, &NMD::XORI             , 0,
19201        0x0                 },        /* XORI */
19202     { instruction         , 0                   , 0   , 32,
19203        0xfc00f000, 0x80002000, &NMD::ANDI_32_         , 0,
19204        0x0                 },        /* ANDI[32] */
19205     { pool                , P_SR                , 2   , 32,
19206        0xfc00f000, 0x80003000, 0                      , 0,
19207        0x0                 },        /* P.SR */
19208     { instruction         , 0                   , 0   , 32,
19209        0xfc00f000, 0x80004000, &NMD::SLTI             , 0,
19210        0x0                 },        /* SLTI */
19211     { instruction         , 0                   , 0   , 32,
19212        0xfc00f000, 0x80005000, &NMD::SLTIU            , 0,
19213        0x0                 },        /* SLTIU */
19214     { instruction         , 0                   , 0   , 32,
19215        0xfc00f000, 0x80006000, &NMD::SEQI             , 0,
19216        0x0                 },        /* SEQI */
19217     { reserved_block      , 0                   , 0   , 32,
19218        0xfc00f000, 0x80007000, 0                      , 0,
19219        0x0                 },        /* P.U12~*(7) */
19220     { instruction         , 0                   , 0   , 32,
19221        0xfc00f000, 0x80008000, &NMD::ADDIU_NEG_       , 0,
19222        0x0                 },        /* ADDIU[NEG] */
19223     { instruction         , 0                   , 0   , 32,
19224        0xfc00f000, 0x80009000, &NMD::DADDIU_U12_      , 0,
19225        MIPS64_             },        /* DADDIU[U12] */
19226     { instruction         , 0                   , 0   , 32,
19227        0xfc00f000, 0x8000a000, &NMD::DADDIU_NEG_      , 0,
19228        MIPS64_             },        /* DADDIU[NEG] */
19229     { instruction         , 0                   , 0   , 32,
19230        0xfc00f000, 0x8000b000, &NMD::DROTX            , 0,
19231        MIPS64_             },        /* DROTX */
19232     { pool                , P_SHIFT             , 16  , 32,
19233        0xfc00f000, 0x8000c000, 0                      , 0,
19234        0x0                 },        /* P.SHIFT */
19235     { pool                , P_ROTX              , 4   , 32,
19236        0xfc00f000, 0x8000d000, 0                      , 0,
19237        0x0                 },        /* P.ROTX */
19238     { pool                , P_INS               , 4   , 32,
19239        0xfc00f000, 0x8000e000, 0                      , 0,
19240        0x0                 },        /* P.INS */
19241     { pool                , P_EXT               , 4   , 32,
19242        0xfc00f000, 0x8000f000, 0                      , 0,
19243        0x0                 },        /* P.EXT */
19244 };
19245
19246
19247 NMD::Pool NMD::RINT_fmt[2] = {
19248     { instruction         , 0                   , 0   , 32,
19249        0xfc0003ff, 0xa0000020, &NMD::RINT_S           , 0,
19250        CP1_                },        /* RINT.S */
19251     { instruction         , 0                   , 0   , 32,
19252        0xfc0003ff, 0xa0000220, &NMD::RINT_D           , 0,
19253        CP1_                },        /* RINT.D */
19254 };
19255
19256
19257 NMD::Pool NMD::ADD_fmt0[2] = {
19258     { instruction         , 0                   , 0   , 32,
19259        0xfc0003ff, 0xa0000030, &NMD::ADD_S            , 0,
19260        CP1_                },        /* ADD.S */
19261     { reserved_block      , 0                   , 0   , 32,
19262        0xfc0003ff, 0xa0000230, 0                      , 0,
19263        CP1_                },        /* ADD.fmt0~*(1) */
19264 };
19265
19266
19267 NMD::Pool NMD::SELEQZ_fmt[2] = {
19268     { instruction         , 0                   , 0   , 32,
19269        0xfc0003ff, 0xa0000038, &NMD::SELEQZ_S         , 0,
19270        CP1_                },        /* SELEQZ.S */
19271     { instruction         , 0                   , 0   , 32,
19272        0xfc0003ff, 0xa0000238, &NMD::SELEQZ_D         , 0,
19273        CP1_                },        /* SELEQZ.D */
19274 };
19275
19276
19277 NMD::Pool NMD::CLASS_fmt[2] = {
19278     { instruction         , 0                   , 0   , 32,
19279        0xfc0003ff, 0xa0000060, &NMD::CLASS_S          , 0,
19280        CP1_                },        /* CLASS.S */
19281     { instruction         , 0                   , 0   , 32,
19282        0xfc0003ff, 0xa0000260, &NMD::CLASS_D          , 0,
19283        CP1_                },        /* CLASS.D */
19284 };
19285
19286
19287 NMD::Pool NMD::SUB_fmt0[2] = {
19288     { instruction         , 0                   , 0   , 32,
19289        0xfc0003ff, 0xa0000070, &NMD::SUB_S            , 0,
19290        CP1_                },        /* SUB.S */
19291     { reserved_block      , 0                   , 0   , 32,
19292        0xfc0003ff, 0xa0000270, 0                      , 0,
19293        CP1_                },        /* SUB.fmt0~*(1) */
19294 };
19295
19296
19297 NMD::Pool NMD::SELNEZ_fmt[2] = {
19298     { instruction         , 0                   , 0   , 32,
19299        0xfc0003ff, 0xa0000078, &NMD::SELNEZ_S         , 0,
19300        CP1_                },        /* SELNEZ.S */
19301     { instruction         , 0                   , 0   , 32,
19302        0xfc0003ff, 0xa0000278, &NMD::SELNEZ_D         , 0,
19303        CP1_                },        /* SELNEZ.D */
19304 };
19305
19306
19307 NMD::Pool NMD::MUL_fmt0[2] = {
19308     { instruction         , 0                   , 0   , 32,
19309        0xfc0003ff, 0xa00000b0, &NMD::MUL_S            , 0,
19310        CP1_                },        /* MUL.S */
19311     { reserved_block      , 0                   , 0   , 32,
19312        0xfc0003ff, 0xa00002b0, 0                      , 0,
19313        CP1_                },        /* MUL.fmt0~*(1) */
19314 };
19315
19316
19317 NMD::Pool NMD::SEL_fmt[2] = {
19318     { instruction         , 0                   , 0   , 32,
19319        0xfc0003ff, 0xa00000b8, &NMD::SEL_S            , 0,
19320        CP1_                },        /* SEL.S */
19321     { instruction         , 0                   , 0   , 32,
19322        0xfc0003ff, 0xa00002b8, &NMD::SEL_D            , 0,
19323        CP1_                },        /* SEL.D */
19324 };
19325
19326
19327 NMD::Pool NMD::DIV_fmt0[2] = {
19328     { instruction         , 0                   , 0   , 32,
19329        0xfc0003ff, 0xa00000f0, &NMD::DIV_S            , 0,
19330        CP1_                },        /* DIV.S */
19331     { reserved_block      , 0                   , 0   , 32,
19332        0xfc0003ff, 0xa00002f0, 0                      , 0,
19333        CP1_                },        /* DIV.fmt0~*(1) */
19334 };
19335
19336
19337 NMD::Pool NMD::ADD_fmt1[2] = {
19338     { instruction         , 0                   , 0   , 32,
19339        0xfc0003ff, 0xa0000130, &NMD::ADD_D            , 0,
19340        CP1_                },        /* ADD.D */
19341     { reserved_block      , 0                   , 0   , 32,
19342        0xfc0003ff, 0xa0000330, 0                      , 0,
19343        CP1_                },        /* ADD.fmt1~*(1) */
19344 };
19345
19346
19347 NMD::Pool NMD::SUB_fmt1[2] = {
19348     { instruction         , 0                   , 0   , 32,
19349        0xfc0003ff, 0xa0000170, &NMD::SUB_D            , 0,
19350        CP1_                },        /* SUB.D */
19351     { reserved_block      , 0                   , 0   , 32,
19352        0xfc0003ff, 0xa0000370, 0                      , 0,
19353        CP1_                },        /* SUB.fmt1~*(1) */
19354 };
19355
19356
19357 NMD::Pool NMD::MUL_fmt1[2] = {
19358     { instruction         , 0                   , 0   , 32,
19359        0xfc0003ff, 0xa00001b0, &NMD::MUL_D            , 0,
19360        CP1_                },        /* MUL.D */
19361     { reserved_block      , 0                   , 0   , 32,
19362        0xfc0003ff, 0xa00003b0, 0                      , 0,
19363        CP1_                },        /* MUL.fmt1~*(1) */
19364 };
19365
19366
19367 NMD::Pool NMD::MADDF_fmt[2] = {
19368     { instruction         , 0                   , 0   , 32,
19369        0xfc0003ff, 0xa00001b8, &NMD::MADDF_S          , 0,
19370        CP1_                },        /* MADDF.S */
19371     { instruction         , 0                   , 0   , 32,
19372        0xfc0003ff, 0xa00003b8, &NMD::MADDF_D          , 0,
19373        CP1_                },        /* MADDF.D */
19374 };
19375
19376
19377 NMD::Pool NMD::DIV_fmt1[2] = {
19378     { instruction         , 0                   , 0   , 32,
19379        0xfc0003ff, 0xa00001f0, &NMD::DIV_D            , 0,
19380        CP1_                },        /* DIV.D */
19381     { reserved_block      , 0                   , 0   , 32,
19382        0xfc0003ff, 0xa00003f0, 0                      , 0,
19383        CP1_                },        /* DIV.fmt1~*(1) */
19384 };
19385
19386
19387 NMD::Pool NMD::MSUBF_fmt[2] = {
19388     { instruction         , 0                   , 0   , 32,
19389        0xfc0003ff, 0xa00001f8, &NMD::MSUBF_S          , 0,
19390        CP1_                },        /* MSUBF.S */
19391     { instruction         , 0                   , 0   , 32,
19392        0xfc0003ff, 0xa00003f8, &NMD::MSUBF_D          , 0,
19393        CP1_                },        /* MSUBF.D */
19394 };
19395
19396
19397 NMD::Pool NMD::POOL32F_0[64] = {
19398     { reserved_block      , 0                   , 0   , 32,
19399        0xfc0001ff, 0xa0000000, 0                      , 0,
19400        CP1_                },        /* POOL32F_0~*(0) */
19401     { reserved_block      , 0                   , 0   , 32,
19402        0xfc0001ff, 0xa0000008, 0                      , 0,
19403        CP1_                },        /* POOL32F_0~*(1) */
19404     { reserved_block      , 0                   , 0   , 32,
19405        0xfc0001ff, 0xa0000010, 0                      , 0,
19406        CP1_                },        /* POOL32F_0~*(2) */
19407     { reserved_block      , 0                   , 0   , 32,
19408        0xfc0001ff, 0xa0000018, 0                      , 0,
19409        CP1_                },        /* POOL32F_0~*(3) */
19410     { pool                , RINT_fmt            , 2   , 32,
19411        0xfc0001ff, 0xa0000020, 0                      , 0,
19412        CP1_                },        /* RINT.fmt */
19413     { reserved_block      , 0                   , 0   , 32,
19414        0xfc0001ff, 0xa0000028, 0                      , 0,
19415        CP1_                },        /* POOL32F_0~*(5) */
19416     { pool                , ADD_fmt0            , 2   , 32,
19417        0xfc0001ff, 0xa0000030, 0                      , 0,
19418        CP1_                },        /* ADD.fmt0 */
19419     { pool                , SELEQZ_fmt          , 2   , 32,
19420        0xfc0001ff, 0xa0000038, 0                      , 0,
19421        CP1_                },        /* SELEQZ.fmt */
19422     { reserved_block      , 0                   , 0   , 32,
19423        0xfc0001ff, 0xa0000040, 0                      , 0,
19424        CP1_                },        /* POOL32F_0~*(8) */
19425     { reserved_block      , 0                   , 0   , 32,
19426        0xfc0001ff, 0xa0000048, 0                      , 0,
19427        CP1_                },        /* POOL32F_0~*(9) */
19428     { reserved_block      , 0                   , 0   , 32,
19429        0xfc0001ff, 0xa0000050, 0                      , 0,
19430        CP1_                },        /* POOL32F_0~*(10) */
19431     { reserved_block      , 0                   , 0   , 32,
19432        0xfc0001ff, 0xa0000058, 0                      , 0,
19433        CP1_                },        /* POOL32F_0~*(11) */
19434     { pool                , CLASS_fmt           , 2   , 32,
19435        0xfc0001ff, 0xa0000060, 0                      , 0,
19436        CP1_                },        /* CLASS.fmt */
19437     { reserved_block      , 0                   , 0   , 32,
19438        0xfc0001ff, 0xa0000068, 0                      , 0,
19439        CP1_                },        /* POOL32F_0~*(13) */
19440     { pool                , SUB_fmt0            , 2   , 32,
19441        0xfc0001ff, 0xa0000070, 0                      , 0,
19442        CP1_                },        /* SUB.fmt0 */
19443     { pool                , SELNEZ_fmt          , 2   , 32,
19444        0xfc0001ff, 0xa0000078, 0                      , 0,
19445        CP1_                },        /* SELNEZ.fmt */
19446     { reserved_block      , 0                   , 0   , 32,
19447        0xfc0001ff, 0xa0000080, 0                      , 0,
19448        CP1_                },        /* POOL32F_0~*(16) */
19449     { reserved_block      , 0                   , 0   , 32,
19450        0xfc0001ff, 0xa0000088, 0                      , 0,
19451        CP1_                },        /* POOL32F_0~*(17) */
19452     { reserved_block      , 0                   , 0   , 32,
19453        0xfc0001ff, 0xa0000090, 0                      , 0,
19454        CP1_                },        /* POOL32F_0~*(18) */
19455     { reserved_block      , 0                   , 0   , 32,
19456        0xfc0001ff, 0xa0000098, 0                      , 0,
19457        CP1_                },        /* POOL32F_0~*(19) */
19458     { reserved_block      , 0                   , 0   , 32,
19459        0xfc0001ff, 0xa00000a0, 0                      , 0,
19460        CP1_                },        /* POOL32F_0~*(20) */
19461     { reserved_block      , 0                   , 0   , 32,
19462        0xfc0001ff, 0xa00000a8, 0                      , 0,
19463        CP1_                },        /* POOL32F_0~*(21) */
19464     { pool                , MUL_fmt0            , 2   , 32,
19465        0xfc0001ff, 0xa00000b0, 0                      , 0,
19466        CP1_                },        /* MUL.fmt0 */
19467     { pool                , SEL_fmt             , 2   , 32,
19468        0xfc0001ff, 0xa00000b8, 0                      , 0,
19469        CP1_                },        /* SEL.fmt */
19470     { reserved_block      , 0                   , 0   , 32,
19471        0xfc0001ff, 0xa00000c0, 0                      , 0,
19472        CP1_                },        /* POOL32F_0~*(24) */
19473     { reserved_block      , 0                   , 0   , 32,
19474        0xfc0001ff, 0xa00000c8, 0                      , 0,
19475        CP1_                },        /* POOL32F_0~*(25) */
19476     { reserved_block      , 0                   , 0   , 32,
19477        0xfc0001ff, 0xa00000d0, 0                      , 0,
19478        CP1_                },        /* POOL32F_0~*(26) */
19479     { reserved_block      , 0                   , 0   , 32,
19480        0xfc0001ff, 0xa00000d8, 0                      , 0,
19481        CP1_                },        /* POOL32F_0~*(27) */
19482     { reserved_block      , 0                   , 0   , 32,
19483        0xfc0001ff, 0xa00000e0, 0                      , 0,
19484        CP1_                },        /* POOL32F_0~*(28) */
19485     { reserved_block      , 0                   , 0   , 32,
19486        0xfc0001ff, 0xa00000e8, 0                      , 0,
19487        CP1_                },        /* POOL32F_0~*(29) */
19488     { pool                , DIV_fmt0            , 2   , 32,
19489        0xfc0001ff, 0xa00000f0, 0                      , 0,
19490        CP1_                },        /* DIV.fmt0 */
19491     { reserved_block      , 0                   , 0   , 32,
19492        0xfc0001ff, 0xa00000f8, 0                      , 0,
19493        CP1_                },        /* POOL32F_0~*(31) */
19494     { reserved_block      , 0                   , 0   , 32,
19495        0xfc0001ff, 0xa0000100, 0                      , 0,
19496        CP1_                },        /* POOL32F_0~*(32) */
19497     { reserved_block      , 0                   , 0   , 32,
19498        0xfc0001ff, 0xa0000108, 0                      , 0,
19499        CP1_                },        /* POOL32F_0~*(33) */
19500     { reserved_block      , 0                   , 0   , 32,
19501        0xfc0001ff, 0xa0000110, 0                      , 0,
19502        CP1_                },        /* POOL32F_0~*(34) */
19503     { reserved_block      , 0                   , 0   , 32,
19504        0xfc0001ff, 0xa0000118, 0                      , 0,
19505        CP1_                },        /* POOL32F_0~*(35) */
19506     { reserved_block      , 0                   , 0   , 32,
19507        0xfc0001ff, 0xa0000120, 0                      , 0,
19508        CP1_                },        /* POOL32F_0~*(36) */
19509     { reserved_block      , 0                   , 0   , 32,
19510        0xfc0001ff, 0xa0000128, 0                      , 0,
19511        CP1_                },        /* POOL32F_0~*(37) */
19512     { pool                , ADD_fmt1            , 2   , 32,
19513        0xfc0001ff, 0xa0000130, 0                      , 0,
19514        CP1_                },        /* ADD.fmt1 */
19515     { reserved_block      , 0                   , 0   , 32,
19516        0xfc0001ff, 0xa0000138, 0                      , 0,
19517        CP1_                },        /* POOL32F_0~*(39) */
19518     { reserved_block      , 0                   , 0   , 32,
19519        0xfc0001ff, 0xa0000140, 0                      , 0,
19520        CP1_                },        /* POOL32F_0~*(40) */
19521     { reserved_block      , 0                   , 0   , 32,
19522        0xfc0001ff, 0xa0000148, 0                      , 0,
19523        CP1_                },        /* POOL32F_0~*(41) */
19524     { reserved_block      , 0                   , 0   , 32,
19525        0xfc0001ff, 0xa0000150, 0                      , 0,
19526        CP1_                },        /* POOL32F_0~*(42) */
19527     { reserved_block      , 0                   , 0   , 32,
19528        0xfc0001ff, 0xa0000158, 0                      , 0,
19529        CP1_                },        /* POOL32F_0~*(43) */
19530     { reserved_block      , 0                   , 0   , 32,
19531        0xfc0001ff, 0xa0000160, 0                      , 0,
19532        CP1_                },        /* POOL32F_0~*(44) */
19533     { reserved_block      , 0                   , 0   , 32,
19534        0xfc0001ff, 0xa0000168, 0                      , 0,
19535        CP1_                },        /* POOL32F_0~*(45) */
19536     { pool                , SUB_fmt1            , 2   , 32,
19537        0xfc0001ff, 0xa0000170, 0                      , 0,
19538        CP1_                },        /* SUB.fmt1 */
19539     { reserved_block      , 0                   , 0   , 32,
19540        0xfc0001ff, 0xa0000178, 0                      , 0,
19541        CP1_                },        /* POOL32F_0~*(47) */
19542     { reserved_block      , 0                   , 0   , 32,
19543        0xfc0001ff, 0xa0000180, 0                      , 0,
19544        CP1_                },        /* POOL32F_0~*(48) */
19545     { reserved_block      , 0                   , 0   , 32,
19546        0xfc0001ff, 0xa0000188, 0                      , 0,
19547        CP1_                },        /* POOL32F_0~*(49) */
19548     { reserved_block      , 0                   , 0   , 32,
19549        0xfc0001ff, 0xa0000190, 0                      , 0,
19550        CP1_                },        /* POOL32F_0~*(50) */
19551     { reserved_block      , 0                   , 0   , 32,
19552        0xfc0001ff, 0xa0000198, 0                      , 0,
19553        CP1_                },        /* POOL32F_0~*(51) */
19554     { reserved_block      , 0                   , 0   , 32,
19555        0xfc0001ff, 0xa00001a0, 0                      , 0,
19556        CP1_                },        /* POOL32F_0~*(52) */
19557     { reserved_block      , 0                   , 0   , 32,
19558        0xfc0001ff, 0xa00001a8, 0                      , 0,
19559        CP1_                },        /* POOL32F_0~*(53) */
19560     { pool                , MUL_fmt1            , 2   , 32,
19561        0xfc0001ff, 0xa00001b0, 0                      , 0,
19562        CP1_                },        /* MUL.fmt1 */
19563     { pool                , MADDF_fmt           , 2   , 32,
19564        0xfc0001ff, 0xa00001b8, 0                      , 0,
19565        CP1_                },        /* MADDF.fmt */
19566     { reserved_block      , 0                   , 0   , 32,
19567        0xfc0001ff, 0xa00001c0, 0                      , 0,
19568        CP1_                },        /* POOL32F_0~*(56) */
19569     { reserved_block      , 0                   , 0   , 32,
19570        0xfc0001ff, 0xa00001c8, 0                      , 0,
19571        CP1_                },        /* POOL32F_0~*(57) */
19572     { reserved_block      , 0                   , 0   , 32,
19573        0xfc0001ff, 0xa00001d0, 0                      , 0,
19574        CP1_                },        /* POOL32F_0~*(58) */
19575     { reserved_block      , 0                   , 0   , 32,
19576        0xfc0001ff, 0xa00001d8, 0                      , 0,
19577        CP1_                },        /* POOL32F_0~*(59) */
19578     { reserved_block      , 0                   , 0   , 32,
19579        0xfc0001ff, 0xa00001e0, 0                      , 0,
19580        CP1_                },        /* POOL32F_0~*(60) */
19581     { reserved_block      , 0                   , 0   , 32,
19582        0xfc0001ff, 0xa00001e8, 0                      , 0,
19583        CP1_                },        /* POOL32F_0~*(61) */
19584     { pool                , DIV_fmt1            , 2   , 32,
19585        0xfc0001ff, 0xa00001f0, 0                      , 0,
19586        CP1_                },        /* DIV.fmt1 */
19587     { pool                , MSUBF_fmt           , 2   , 32,
19588        0xfc0001ff, 0xa00001f8, 0                      , 0,
19589        CP1_                },        /* MSUBF.fmt */
19590 };
19591
19592
19593 NMD::Pool NMD::MIN_fmt[2] = {
19594     { instruction         , 0                   , 0   , 32,
19595        0xfc00023f, 0xa0000003, &NMD::MIN_S            , 0,
19596        CP1_                },        /* MIN.S */
19597     { instruction         , 0                   , 0   , 32,
19598        0xfc00023f, 0xa0000203, &NMD::MIN_D            , 0,
19599        CP1_                },        /* MIN.D */
19600 };
19601
19602
19603 NMD::Pool NMD::MAX_fmt[2] = {
19604     { instruction         , 0                   , 0   , 32,
19605        0xfc00023f, 0xa000000b, &NMD::MAX_S            , 0,
19606        CP1_                },        /* MAX.S */
19607     { instruction         , 0                   , 0   , 32,
19608        0xfc00023f, 0xa000020b, &NMD::MAX_D            , 0,
19609        CP1_                },        /* MAX.D */
19610 };
19611
19612
19613 NMD::Pool NMD::MINA_fmt[2] = {
19614     { instruction         , 0                   , 0   , 32,
19615        0xfc00023f, 0xa0000023, &NMD::MINA_S           , 0,
19616        CP1_                },        /* MINA.S */
19617     { instruction         , 0                   , 0   , 32,
19618        0xfc00023f, 0xa0000223, &NMD::MINA_D           , 0,
19619        CP1_                },        /* MINA.D */
19620 };
19621
19622
19623 NMD::Pool NMD::MAXA_fmt[2] = {
19624     { instruction         , 0                   , 0   , 32,
19625        0xfc00023f, 0xa000002b, &NMD::MAXA_S           , 0,
19626        CP1_                },        /* MAXA.S */
19627     { instruction         , 0                   , 0   , 32,
19628        0xfc00023f, 0xa000022b, &NMD::MAXA_D           , 0,
19629        CP1_                },        /* MAXA.D */
19630 };
19631
19632
19633 NMD::Pool NMD::CVT_L_fmt[2] = {
19634     { instruction         , 0                   , 0   , 32,
19635        0xfc007fff, 0xa000013b, &NMD::CVT_L_S          , 0,
19636        CP1_                },        /* CVT.L.S */
19637     { instruction         , 0                   , 0   , 32,
19638        0xfc007fff, 0xa000413b, &NMD::CVT_L_D          , 0,
19639        CP1_                },        /* CVT.L.D */
19640 };
19641
19642
19643 NMD::Pool NMD::RSQRT_fmt[2] = {
19644     { instruction         , 0                   , 0   , 32,
19645        0xfc007fff, 0xa000023b, &NMD::RSQRT_S          , 0,
19646        CP1_                },        /* RSQRT.S */
19647     { instruction         , 0                   , 0   , 32,
19648        0xfc007fff, 0xa000423b, &NMD::RSQRT_D          , 0,
19649        CP1_                },        /* RSQRT.D */
19650 };
19651
19652
19653 NMD::Pool NMD::FLOOR_L_fmt[2] = {
19654     { instruction         , 0                   , 0   , 32,
19655        0xfc007fff, 0xa000033b, &NMD::FLOOR_L_S        , 0,
19656        CP1_                },        /* FLOOR.L.S */
19657     { instruction         , 0                   , 0   , 32,
19658        0xfc007fff, 0xa000433b, &NMD::FLOOR_L_D        , 0,
19659        CP1_                },        /* FLOOR.L.D */
19660 };
19661
19662
19663 NMD::Pool NMD::CVT_W_fmt[2] = {
19664     { instruction         , 0                   , 0   , 32,
19665        0xfc007fff, 0xa000093b, &NMD::CVT_W_S          , 0,
19666        CP1_                },        /* CVT.W.S */
19667     { instruction         , 0                   , 0   , 32,
19668        0xfc007fff, 0xa000493b, &NMD::CVT_W_D          , 0,
19669        CP1_                },        /* CVT.W.D */
19670 };
19671
19672
19673 NMD::Pool NMD::SQRT_fmt[2] = {
19674     { instruction         , 0                   , 0   , 32,
19675        0xfc007fff, 0xa0000a3b, &NMD::SQRT_S           , 0,
19676        CP1_                },        /* SQRT.S */
19677     { instruction         , 0                   , 0   , 32,
19678        0xfc007fff, 0xa0004a3b, &NMD::SQRT_D           , 0,
19679        CP1_                },        /* SQRT.D */
19680 };
19681
19682
19683 NMD::Pool NMD::FLOOR_W_fmt[2] = {
19684     { instruction         , 0                   , 0   , 32,
19685        0xfc007fff, 0xa0000b3b, &NMD::FLOOR_W_S        , 0,
19686        CP1_                },        /* FLOOR.W.S */
19687     { instruction         , 0                   , 0   , 32,
19688        0xfc007fff, 0xa0004b3b, &NMD::FLOOR_W_D        , 0,
19689        CP1_                },        /* FLOOR.W.D */
19690 };
19691
19692
19693 NMD::Pool NMD::RECIP_fmt[2] = {
19694     { instruction         , 0                   , 0   , 32,
19695        0xfc007fff, 0xa000123b, &NMD::RECIP_S          , 0,
19696        CP1_                },        /* RECIP.S */
19697     { instruction         , 0                   , 0   , 32,
19698        0xfc007fff, 0xa000523b, &NMD::RECIP_D          , 0,
19699        CP1_                },        /* RECIP.D */
19700 };
19701
19702
19703 NMD::Pool NMD::CEIL_L_fmt[2] = {
19704     { instruction         , 0                   , 0   , 32,
19705        0xfc007fff, 0xa000133b, &NMD::CEIL_L_S         , 0,
19706        CP1_                },        /* CEIL.L.S */
19707     { instruction         , 0                   , 0   , 32,
19708        0xfc007fff, 0xa000533b, &NMD::CEIL_L_D         , 0,
19709        CP1_                },        /* CEIL.L.D */
19710 };
19711
19712
19713 NMD::Pool NMD::CEIL_W_fmt[2] = {
19714     { instruction         , 0                   , 0   , 32,
19715        0xfc007fff, 0xa0001b3b, &NMD::CEIL_W_S         , 0,
19716        CP1_                },        /* CEIL.W.S */
19717     { instruction         , 0                   , 0   , 32,
19718        0xfc007fff, 0xa0005b3b, &NMD::CEIL_W_D         , 0,
19719        CP1_                },        /* CEIL.W.D */
19720 };
19721
19722
19723 NMD::Pool NMD::TRUNC_L_fmt[2] = {
19724     { instruction         , 0                   , 0   , 32,
19725        0xfc007fff, 0xa000233b, &NMD::TRUNC_L_S        , 0,
19726        CP1_                },        /* TRUNC.L.S */
19727     { instruction         , 0                   , 0   , 32,
19728        0xfc007fff, 0xa000633b, &NMD::TRUNC_L_D        , 0,
19729        CP1_                },        /* TRUNC.L.D */
19730 };
19731
19732
19733 NMD::Pool NMD::TRUNC_W_fmt[2] = {
19734     { instruction         , 0                   , 0   , 32,
19735        0xfc007fff, 0xa0002b3b, &NMD::TRUNC_W_S        , 0,
19736        CP1_                },        /* TRUNC.W.S */
19737     { instruction         , 0                   , 0   , 32,
19738        0xfc007fff, 0xa0006b3b, &NMD::TRUNC_W_D        , 0,
19739        CP1_                },        /* TRUNC.W.D */
19740 };
19741
19742
19743 NMD::Pool NMD::ROUND_L_fmt[2] = {
19744     { instruction         , 0                   , 0   , 32,
19745        0xfc007fff, 0xa000333b, &NMD::ROUND_L_S        , 0,
19746        CP1_                },        /* ROUND.L.S */
19747     { instruction         , 0                   , 0   , 32,
19748        0xfc007fff, 0xa000733b, &NMD::ROUND_L_D        , 0,
19749        CP1_                },        /* ROUND.L.D */
19750 };
19751
19752
19753 NMD::Pool NMD::ROUND_W_fmt[2] = {
19754     { instruction         , 0                   , 0   , 32,
19755        0xfc007fff, 0xa0003b3b, &NMD::ROUND_W_S        , 0,
19756        CP1_                },        /* ROUND.W.S */
19757     { instruction         , 0                   , 0   , 32,
19758        0xfc007fff, 0xa0007b3b, &NMD::ROUND_W_D        , 0,
19759        CP1_                },        /* ROUND.W.D */
19760 };
19761
19762
19763 NMD::Pool NMD::POOL32Fxf_0[64] = {
19764     { reserved_block      , 0                   , 0   , 32,
19765        0xfc003fff, 0xa000003b, 0                      , 0,
19766        CP1_                },        /* POOL32Fxf_0~*(0) */
19767     { pool                , CVT_L_fmt           , 2   , 32,
19768        0xfc003fff, 0xa000013b, 0                      , 0,
19769        CP1_                },        /* CVT.L.fmt */
19770     { pool                , RSQRT_fmt           , 2   , 32,
19771        0xfc003fff, 0xa000023b, 0                      , 0,
19772        CP1_                },        /* RSQRT.fmt */
19773     { pool                , FLOOR_L_fmt         , 2   , 32,
19774        0xfc003fff, 0xa000033b, 0                      , 0,
19775        CP1_                },        /* FLOOR.L.fmt */
19776     { reserved_block      , 0                   , 0   , 32,
19777        0xfc003fff, 0xa000043b, 0                      , 0,
19778        CP1_                },        /* POOL32Fxf_0~*(4) */
19779     { reserved_block      , 0                   , 0   , 32,
19780        0xfc003fff, 0xa000053b, 0                      , 0,
19781        CP1_                },        /* POOL32Fxf_0~*(5) */
19782     { reserved_block      , 0                   , 0   , 32,
19783        0xfc003fff, 0xa000063b, 0                      , 0,
19784        CP1_                },        /* POOL32Fxf_0~*(6) */
19785     { reserved_block      , 0                   , 0   , 32,
19786        0xfc003fff, 0xa000073b, 0                      , 0,
19787        CP1_                },        /* POOL32Fxf_0~*(7) */
19788     { reserved_block      , 0                   , 0   , 32,
19789        0xfc003fff, 0xa000083b, 0                      , 0,
19790        CP1_                },        /* POOL32Fxf_0~*(8) */
19791     { pool                , CVT_W_fmt           , 2   , 32,
19792        0xfc003fff, 0xa000093b, 0                      , 0,
19793        CP1_                },        /* CVT.W.fmt */
19794     { pool                , SQRT_fmt            , 2   , 32,
19795        0xfc003fff, 0xa0000a3b, 0                      , 0,
19796        CP1_                },        /* SQRT.fmt */
19797     { pool                , FLOOR_W_fmt         , 2   , 32,
19798        0xfc003fff, 0xa0000b3b, 0                      , 0,
19799        CP1_                },        /* FLOOR.W.fmt */
19800     { reserved_block      , 0                   , 0   , 32,
19801        0xfc003fff, 0xa0000c3b, 0                      , 0,
19802        CP1_                },        /* POOL32Fxf_0~*(12) */
19803     { reserved_block      , 0                   , 0   , 32,
19804        0xfc003fff, 0xa0000d3b, 0                      , 0,
19805        CP1_                },        /* POOL32Fxf_0~*(13) */
19806     { reserved_block      , 0                   , 0   , 32,
19807        0xfc003fff, 0xa0000e3b, 0                      , 0,
19808        CP1_                },        /* POOL32Fxf_0~*(14) */
19809     { reserved_block      , 0                   , 0   , 32,
19810        0xfc003fff, 0xa0000f3b, 0                      , 0,
19811        CP1_                },        /* POOL32Fxf_0~*(15) */
19812     { instruction         , 0                   , 0   , 32,
19813        0xfc003fff, 0xa000103b, &NMD::CFC1             , 0,
19814        CP1_                },        /* CFC1 */
19815     { reserved_block      , 0                   , 0   , 32,
19816        0xfc003fff, 0xa000113b, 0                      , 0,
19817        CP1_                },        /* POOL32Fxf_0~*(17) */
19818     { pool                , RECIP_fmt           , 2   , 32,
19819        0xfc003fff, 0xa000123b, 0                      , 0,
19820        CP1_                },        /* RECIP.fmt */
19821     { pool                , CEIL_L_fmt          , 2   , 32,
19822        0xfc003fff, 0xa000133b, 0                      , 0,
19823        CP1_                },        /* CEIL.L.fmt */
19824     { reserved_block      , 0                   , 0   , 32,
19825        0xfc003fff, 0xa000143b, 0                      , 0,
19826        CP1_                },        /* POOL32Fxf_0~*(20) */
19827     { reserved_block      , 0                   , 0   , 32,
19828        0xfc003fff, 0xa000153b, 0                      , 0,
19829        CP1_                },        /* POOL32Fxf_0~*(21) */
19830     { reserved_block      , 0                   , 0   , 32,
19831        0xfc003fff, 0xa000163b, 0                      , 0,
19832        CP1_                },        /* POOL32Fxf_0~*(22) */
19833     { reserved_block      , 0                   , 0   , 32,
19834        0xfc003fff, 0xa000173b, 0                      , 0,
19835        CP1_                },        /* POOL32Fxf_0~*(23) */
19836     { instruction         , 0                   , 0   , 32,
19837        0xfc003fff, 0xa000183b, &NMD::CTC1             , 0,
19838        CP1_                },        /* CTC1 */
19839     { reserved_block      , 0                   , 0   , 32,
19840        0xfc003fff, 0xa000193b, 0                      , 0,
19841        CP1_                },        /* POOL32Fxf_0~*(25) */
19842     { reserved_block      , 0                   , 0   , 32,
19843        0xfc003fff, 0xa0001a3b, 0                      , 0,
19844        CP1_                },        /* POOL32Fxf_0~*(26) */
19845     { pool                , CEIL_W_fmt          , 2   , 32,
19846        0xfc003fff, 0xa0001b3b, 0                      , 0,
19847        CP1_                },        /* CEIL.W.fmt */
19848     { reserved_block      , 0                   , 0   , 32,
19849        0xfc003fff, 0xa0001c3b, 0                      , 0,
19850        CP1_                },        /* POOL32Fxf_0~*(28) */
19851     { reserved_block      , 0                   , 0   , 32,
19852        0xfc003fff, 0xa0001d3b, 0                      , 0,
19853        CP1_                },        /* POOL32Fxf_0~*(29) */
19854     { reserved_block      , 0                   , 0   , 32,
19855        0xfc003fff, 0xa0001e3b, 0                      , 0,
19856        CP1_                },        /* POOL32Fxf_0~*(30) */
19857     { reserved_block      , 0                   , 0   , 32,
19858        0xfc003fff, 0xa0001f3b, 0                      , 0,
19859        CP1_                },        /* POOL32Fxf_0~*(31) */
19860     { instruction         , 0                   , 0   , 32,
19861        0xfc003fff, 0xa000203b, &NMD::MFC1             , 0,
19862        CP1_                },        /* MFC1 */
19863     { instruction         , 0                   , 0   , 32,
19864        0xfc003fff, 0xa000213b, &NMD::CVT_S_PL         , 0,
19865        CP1_                },        /* CVT.S.PL */
19866     { reserved_block      , 0                   , 0   , 32,
19867        0xfc003fff, 0xa000223b, 0                      , 0,
19868        CP1_                },        /* POOL32Fxf_0~*(34) */
19869     { pool                , TRUNC_L_fmt         , 2   , 32,
19870        0xfc003fff, 0xa000233b, 0                      , 0,
19871        CP1_                },        /* TRUNC.L.fmt */
19872     { instruction         , 0                   , 0   , 32,
19873        0xfc003fff, 0xa000243b, &NMD::DMFC1            , 0,
19874        CP1_ | MIPS64_      },        /* DMFC1 */
19875     { reserved_block      , 0                   , 0   , 32,
19876        0xfc003fff, 0xa000253b, 0                      , 0,
19877        CP1_                },        /* POOL32Fxf_0~*(37) */
19878     { reserved_block      , 0                   , 0   , 32,
19879        0xfc003fff, 0xa000263b, 0                      , 0,
19880        CP1_                },        /* POOL32Fxf_0~*(38) */
19881     { reserved_block      , 0                   , 0   , 32,
19882        0xfc003fff, 0xa000273b, 0                      , 0,
19883        CP1_                },        /* POOL32Fxf_0~*(39) */
19884     { instruction         , 0                   , 0   , 32,
19885        0xfc003fff, 0xa000283b, &NMD::MTC1             , 0,
19886        CP1_                },        /* MTC1 */
19887     { instruction         , 0                   , 0   , 32,
19888        0xfc003fff, 0xa000293b, &NMD::CVT_S_PU         , 0,
19889        CP1_                },        /* CVT.S.PU */
19890     { reserved_block      , 0                   , 0   , 32,
19891        0xfc003fff, 0xa0002a3b, 0                      , 0,
19892        CP1_                },        /* POOL32Fxf_0~*(42) */
19893     { pool                , TRUNC_W_fmt         , 2   , 32,
19894        0xfc003fff, 0xa0002b3b, 0                      , 0,
19895        CP1_                },        /* TRUNC.W.fmt */
19896     { instruction         , 0                   , 0   , 32,
19897        0xfc003fff, 0xa0002c3b, &NMD::DMTC1            , 0,
19898        CP1_ | MIPS64_      },        /* DMTC1 */
19899     { reserved_block      , 0                   , 0   , 32,
19900        0xfc003fff, 0xa0002d3b, 0                      , 0,
19901        CP1_                },        /* POOL32Fxf_0~*(45) */
19902     { reserved_block      , 0                   , 0   , 32,
19903        0xfc003fff, 0xa0002e3b, 0                      , 0,
19904        CP1_                },        /* POOL32Fxf_0~*(46) */
19905     { reserved_block      , 0                   , 0   , 32,
19906        0xfc003fff, 0xa0002f3b, 0                      , 0,
19907        CP1_                },        /* POOL32Fxf_0~*(47) */
19908     { instruction         , 0                   , 0   , 32,
19909        0xfc003fff, 0xa000303b, &NMD::MFHC1            , 0,
19910        CP1_                },        /* MFHC1 */
19911     { reserved_block      , 0                   , 0   , 32,
19912        0xfc003fff, 0xa000313b, 0                      , 0,
19913        CP1_                },        /* POOL32Fxf_0~*(49) */
19914     { reserved_block      , 0                   , 0   , 32,
19915        0xfc003fff, 0xa000323b, 0                      , 0,
19916        CP1_                },        /* POOL32Fxf_0~*(50) */
19917     { pool                , ROUND_L_fmt         , 2   , 32,
19918        0xfc003fff, 0xa000333b, 0                      , 0,
19919        CP1_                },        /* ROUND.L.fmt */
19920     { reserved_block      , 0                   , 0   , 32,
19921        0xfc003fff, 0xa000343b, 0                      , 0,
19922        CP1_                },        /* POOL32Fxf_0~*(52) */
19923     { reserved_block      , 0                   , 0   , 32,
19924        0xfc003fff, 0xa000353b, 0                      , 0,
19925        CP1_                },        /* POOL32Fxf_0~*(53) */
19926     { reserved_block      , 0                   , 0   , 32,
19927        0xfc003fff, 0xa000363b, 0                      , 0,
19928        CP1_                },        /* POOL32Fxf_0~*(54) */
19929     { reserved_block      , 0                   , 0   , 32,
19930        0xfc003fff, 0xa000373b, 0                      , 0,
19931        CP1_                },        /* POOL32Fxf_0~*(55) */
19932     { instruction         , 0                   , 0   , 32,
19933        0xfc003fff, 0xa000383b, &NMD::MTHC1            , 0,
19934        CP1_                },        /* MTHC1 */
19935     { reserved_block      , 0                   , 0   , 32,
19936        0xfc003fff, 0xa000393b, 0                      , 0,
19937        CP1_                },        /* POOL32Fxf_0~*(57) */
19938     { reserved_block      , 0                   , 0   , 32,
19939        0xfc003fff, 0xa0003a3b, 0                      , 0,
19940        CP1_                },        /* POOL32Fxf_0~*(58) */
19941     { pool                , ROUND_W_fmt         , 2   , 32,
19942        0xfc003fff, 0xa0003b3b, 0                      , 0,
19943        CP1_                },        /* ROUND.W.fmt */
19944     { reserved_block      , 0                   , 0   , 32,
19945        0xfc003fff, 0xa0003c3b, 0                      , 0,
19946        CP1_                },        /* POOL32Fxf_0~*(60) */
19947     { reserved_block      , 0                   , 0   , 32,
19948        0xfc003fff, 0xa0003d3b, 0                      , 0,
19949        CP1_                },        /* POOL32Fxf_0~*(61) */
19950     { reserved_block      , 0                   , 0   , 32,
19951        0xfc003fff, 0xa0003e3b, 0                      , 0,
19952        CP1_                },        /* POOL32Fxf_0~*(62) */
19953     { reserved_block      , 0                   , 0   , 32,
19954        0xfc003fff, 0xa0003f3b, 0                      , 0,
19955        CP1_                },        /* POOL32Fxf_0~*(63) */
19956 };
19957
19958
19959 NMD::Pool NMD::MOV_fmt[4] = {
19960     { instruction         , 0                   , 0   , 32,
19961        0xfc007fff, 0xa000007b, &NMD::MOV_S            , 0,
19962        CP1_                },        /* MOV.S */
19963     { instruction         , 0                   , 0   , 32,
19964        0xfc007fff, 0xa000207b, &NMD::MOV_D            , 0,
19965        CP1_                },        /* MOV.D */
19966     { reserved_block      , 0                   , 0   , 32,
19967        0xfc007fff, 0xa000407b, 0                      , 0,
19968        CP1_                },        /* MOV.fmt~*(2) */
19969     { reserved_block      , 0                   , 0   , 32,
19970        0xfc007fff, 0xa000607b, 0                      , 0,
19971        CP1_                },        /* MOV.fmt~*(3) */
19972 };
19973
19974
19975 NMD::Pool NMD::ABS_fmt[4] = {
19976     { instruction         , 0                   , 0   , 32,
19977        0xfc007fff, 0xa000037b, &NMD::ABS_S            , 0,
19978        CP1_                },        /* ABS.S */
19979     { instruction         , 0                   , 0   , 32,
19980        0xfc007fff, 0xa000237b, &NMD::ABS_D            , 0,
19981        CP1_                },        /* ABS.D */
19982     { reserved_block      , 0                   , 0   , 32,
19983        0xfc007fff, 0xa000437b, 0                      , 0,
19984        CP1_                },        /* ABS.fmt~*(2) */
19985     { reserved_block      , 0                   , 0   , 32,
19986        0xfc007fff, 0xa000637b, 0                      , 0,
19987        CP1_                },        /* ABS.fmt~*(3) */
19988 };
19989
19990
19991 NMD::Pool NMD::NEG_fmt[4] = {
19992     { instruction         , 0                   , 0   , 32,
19993        0xfc007fff, 0xa0000b7b, &NMD::NEG_S            , 0,
19994        CP1_                },        /* NEG.S */
19995     { instruction         , 0                   , 0   , 32,
19996        0xfc007fff, 0xa0002b7b, &NMD::NEG_D            , 0,
19997        CP1_                },        /* NEG.D */
19998     { reserved_block      , 0                   , 0   , 32,
19999        0xfc007fff, 0xa0004b7b, 0                      , 0,
20000        CP1_                },        /* NEG.fmt~*(2) */
20001     { reserved_block      , 0                   , 0   , 32,
20002        0xfc007fff, 0xa0006b7b, 0                      , 0,
20003        CP1_                },        /* NEG.fmt~*(3) */
20004 };
20005
20006
20007 NMD::Pool NMD::CVT_D_fmt[4] = {
20008     { instruction         , 0                   , 0   , 32,
20009        0xfc007fff, 0xa000137b, &NMD::CVT_D_S          , 0,
20010        CP1_                },        /* CVT.D.S */
20011     { instruction         , 0                   , 0   , 32,
20012        0xfc007fff, 0xa000337b, &NMD::CVT_D_W          , 0,
20013        CP1_                },        /* CVT.D.W */
20014     { instruction         , 0                   , 0   , 32,
20015        0xfc007fff, 0xa000537b, &NMD::CVT_D_L          , 0,
20016        CP1_                },        /* CVT.D.L */
20017     { reserved_block      , 0                   , 0   , 32,
20018        0xfc007fff, 0xa000737b, 0                      , 0,
20019        CP1_                },        /* CVT.D.fmt~*(3) */
20020 };
20021
20022
20023 NMD::Pool NMD::CVT_S_fmt[4] = {
20024     { instruction         , 0                   , 0   , 32,
20025        0xfc007fff, 0xa0001b7b, &NMD::CVT_S_D          , 0,
20026        CP1_                },        /* CVT.S.D */
20027     { instruction         , 0                   , 0   , 32,
20028        0xfc007fff, 0xa0003b7b, &NMD::CVT_S_W          , 0,
20029        CP1_                },        /* CVT.S.W */
20030     { instruction         , 0                   , 0   , 32,
20031        0xfc007fff, 0xa0005b7b, &NMD::CVT_S_L          , 0,
20032        CP1_                },        /* CVT.S.L */
20033     { reserved_block      , 0                   , 0   , 32,
20034        0xfc007fff, 0xa0007b7b, 0                      , 0,
20035        CP1_                },        /* CVT.S.fmt~*(3) */
20036 };
20037
20038
20039 NMD::Pool NMD::POOL32Fxf_1[32] = {
20040     { pool                , MOV_fmt             , 4   , 32,
20041        0xfc001fff, 0xa000007b, 0                      , 0,
20042        CP1_                },        /* MOV.fmt */
20043     { reserved_block      , 0                   , 0   , 32,
20044        0xfc001fff, 0xa000017b, 0                      , 0,
20045        CP1_                },        /* POOL32Fxf_1~*(1) */
20046     { reserved_block      , 0                   , 0   , 32,
20047        0xfc001fff, 0xa000027b, 0                      , 0,
20048        CP1_                },        /* POOL32Fxf_1~*(2) */
20049     { pool                , ABS_fmt             , 4   , 32,
20050        0xfc001fff, 0xa000037b, 0                      , 0,
20051        CP1_                },        /* ABS.fmt */
20052     { reserved_block      , 0                   , 0   , 32,
20053        0xfc001fff, 0xa000047b, 0                      , 0,
20054        CP1_                },        /* POOL32Fxf_1~*(4) */
20055     { reserved_block      , 0                   , 0   , 32,
20056        0xfc001fff, 0xa000057b, 0                      , 0,
20057        CP1_                },        /* POOL32Fxf_1~*(5) */
20058     { reserved_block      , 0                   , 0   , 32,
20059        0xfc001fff, 0xa000067b, 0                      , 0,
20060        CP1_                },        /* POOL32Fxf_1~*(6) */
20061     { reserved_block      , 0                   , 0   , 32,
20062        0xfc001fff, 0xa000077b, 0                      , 0,
20063        CP1_                },        /* POOL32Fxf_1~*(7) */
20064     { reserved_block      , 0                   , 0   , 32,
20065        0xfc001fff, 0xa000087b, 0                      , 0,
20066        CP1_                },        /* POOL32Fxf_1~*(8) */
20067     { reserved_block      , 0                   , 0   , 32,
20068        0xfc001fff, 0xa000097b, 0                      , 0,
20069        CP1_                },        /* POOL32Fxf_1~*(9) */
20070     { reserved_block      , 0                   , 0   , 32,
20071        0xfc001fff, 0xa0000a7b, 0                      , 0,
20072        CP1_                },        /* POOL32Fxf_1~*(10) */
20073     { pool                , NEG_fmt             , 4   , 32,
20074        0xfc001fff, 0xa0000b7b, 0                      , 0,
20075        CP1_                },        /* NEG.fmt */
20076     { reserved_block      , 0                   , 0   , 32,
20077        0xfc001fff, 0xa0000c7b, 0                      , 0,
20078        CP1_                },        /* POOL32Fxf_1~*(12) */
20079     { reserved_block      , 0                   , 0   , 32,
20080        0xfc001fff, 0xa0000d7b, 0                      , 0,
20081        CP1_                },        /* POOL32Fxf_1~*(13) */
20082     { reserved_block      , 0                   , 0   , 32,
20083        0xfc001fff, 0xa0000e7b, 0                      , 0,
20084        CP1_                },        /* POOL32Fxf_1~*(14) */
20085     { reserved_block      , 0                   , 0   , 32,
20086        0xfc001fff, 0xa0000f7b, 0                      , 0,
20087        CP1_                },        /* POOL32Fxf_1~*(15) */
20088     { reserved_block      , 0                   , 0   , 32,
20089        0xfc001fff, 0xa000107b, 0                      , 0,
20090        CP1_                },        /* POOL32Fxf_1~*(16) */
20091     { reserved_block      , 0                   , 0   , 32,
20092        0xfc001fff, 0xa000117b, 0                      , 0,
20093        CP1_                },        /* POOL32Fxf_1~*(17) */
20094     { reserved_block      , 0                   , 0   , 32,
20095        0xfc001fff, 0xa000127b, 0                      , 0,
20096        CP1_                },        /* POOL32Fxf_1~*(18) */
20097     { pool                , CVT_D_fmt           , 4   , 32,
20098        0xfc001fff, 0xa000137b, 0                      , 0,
20099        CP1_                },        /* CVT.D.fmt */
20100     { reserved_block      , 0                   , 0   , 32,
20101        0xfc001fff, 0xa000147b, 0                      , 0,
20102        CP1_                },        /* POOL32Fxf_1~*(20) */
20103     { reserved_block      , 0                   , 0   , 32,
20104        0xfc001fff, 0xa000157b, 0                      , 0,
20105        CP1_                },        /* POOL32Fxf_1~*(21) */
20106     { reserved_block      , 0                   , 0   , 32,
20107        0xfc001fff, 0xa000167b, 0                      , 0,
20108        CP1_                },        /* POOL32Fxf_1~*(22) */
20109     { reserved_block      , 0                   , 0   , 32,
20110        0xfc001fff, 0xa000177b, 0                      , 0,
20111        CP1_                },        /* POOL32Fxf_1~*(23) */
20112     { reserved_block      , 0                   , 0   , 32,
20113        0xfc001fff, 0xa000187b, 0                      , 0,
20114        CP1_                },        /* POOL32Fxf_1~*(24) */
20115     { reserved_block      , 0                   , 0   , 32,
20116        0xfc001fff, 0xa000197b, 0                      , 0,
20117        CP1_                },        /* POOL32Fxf_1~*(25) */
20118     { reserved_block      , 0                   , 0   , 32,
20119        0xfc001fff, 0xa0001a7b, 0                      , 0,
20120        CP1_                },        /* POOL32Fxf_1~*(26) */
20121     { pool                , CVT_S_fmt           , 4   , 32,
20122        0xfc001fff, 0xa0001b7b, 0                      , 0,
20123        CP1_                },        /* CVT.S.fmt */
20124     { reserved_block      , 0                   , 0   , 32,
20125        0xfc001fff, 0xa0001c7b, 0                      , 0,
20126        CP1_                },        /* POOL32Fxf_1~*(28) */
20127     { reserved_block      , 0                   , 0   , 32,
20128        0xfc001fff, 0xa0001d7b, 0                      , 0,
20129        CP1_                },        /* POOL32Fxf_1~*(29) */
20130     { reserved_block      , 0                   , 0   , 32,
20131        0xfc001fff, 0xa0001e7b, 0                      , 0,
20132        CP1_                },        /* POOL32Fxf_1~*(30) */
20133     { reserved_block      , 0                   , 0   , 32,
20134        0xfc001fff, 0xa0001f7b, 0                      , 0,
20135        CP1_                },        /* POOL32Fxf_1~*(31) */
20136 };
20137
20138
20139 NMD::Pool NMD::POOL32Fxf[4] = {
20140     { pool                , POOL32Fxf_0         , 64  , 32,
20141        0xfc0000ff, 0xa000003b, 0                      , 0,
20142        CP1_                },        /* POOL32Fxf_0 */
20143     { pool                , POOL32Fxf_1         , 32  , 32,
20144        0xfc0000ff, 0xa000007b, 0                      , 0,
20145        CP1_                },        /* POOL32Fxf_1 */
20146     { reserved_block      , 0                   , 0   , 32,
20147        0xfc0000ff, 0xa00000bb, 0                      , 0,
20148        CP1_                },        /* POOL32Fxf~*(2) */
20149     { reserved_block      , 0                   , 0   , 32,
20150        0xfc0000ff, 0xa00000fb, 0                      , 0,
20151        CP1_                },        /* POOL32Fxf~*(3) */
20152 };
20153
20154
20155 NMD::Pool NMD::POOL32F_3[8] = {
20156     { pool                , MIN_fmt             , 2   , 32,
20157        0xfc00003f, 0xa0000003, 0                      , 0,
20158        CP1_                },        /* MIN.fmt */
20159     { pool                , MAX_fmt             , 2   , 32,
20160        0xfc00003f, 0xa000000b, 0                      , 0,
20161        CP1_                },        /* MAX.fmt */
20162     { reserved_block      , 0                   , 0   , 32,
20163        0xfc00003f, 0xa0000013, 0                      , 0,
20164        CP1_                },        /* POOL32F_3~*(2) */
20165     { reserved_block      , 0                   , 0   , 32,
20166        0xfc00003f, 0xa000001b, 0                      , 0,
20167        CP1_                },        /* POOL32F_3~*(3) */
20168     { pool                , MINA_fmt            , 2   , 32,
20169        0xfc00003f, 0xa0000023, 0                      , 0,
20170        CP1_                },        /* MINA.fmt */
20171     { pool                , MAXA_fmt            , 2   , 32,
20172        0xfc00003f, 0xa000002b, 0                      , 0,
20173        CP1_                },        /* MAXA.fmt */
20174     { reserved_block      , 0                   , 0   , 32,
20175        0xfc00003f, 0xa0000033, 0                      , 0,
20176        CP1_                },        /* POOL32F_3~*(6) */
20177     { pool                , POOL32Fxf           , 4   , 32,
20178        0xfc00003f, 0xa000003b, 0                      , 0,
20179        CP1_                },        /* POOL32Fxf */
20180 };
20181
20182
20183 NMD::Pool NMD::CMP_condn_S[32] = {
20184     { instruction         , 0                   , 0   , 32,
20185        0xfc0007ff, 0xa0000005, &NMD::CMP_AF_S         , 0,
20186        CP1_                },        /* CMP.AF.S */
20187     { instruction         , 0                   , 0   , 32,
20188        0xfc0007ff, 0xa0000045, &NMD::CMP_UN_S         , 0,
20189        CP1_                },        /* CMP.UN.S */
20190     { instruction         , 0                   , 0   , 32,
20191        0xfc0007ff, 0xa0000085, &NMD::CMP_EQ_S         , 0,
20192        CP1_                },        /* CMP.EQ.S */
20193     { instruction         , 0                   , 0   , 32,
20194        0xfc0007ff, 0xa00000c5, &NMD::CMP_UEQ_S        , 0,
20195        CP1_                },        /* CMP.UEQ.S */
20196     { instruction         , 0                   , 0   , 32,
20197        0xfc0007ff, 0xa0000105, &NMD::CMP_LT_S         , 0,
20198        CP1_                },        /* CMP.LT.S */
20199     { instruction         , 0                   , 0   , 32,
20200        0xfc0007ff, 0xa0000145, &NMD::CMP_ULT_S        , 0,
20201        CP1_                },        /* CMP.ULT.S */
20202     { instruction         , 0                   , 0   , 32,
20203        0xfc0007ff, 0xa0000185, &NMD::CMP_LE_S         , 0,
20204        CP1_                },        /* CMP.LE.S */
20205     { instruction         , 0                   , 0   , 32,
20206        0xfc0007ff, 0xa00001c5, &NMD::CMP_ULE_S        , 0,
20207        CP1_                },        /* CMP.ULE.S */
20208     { instruction         , 0                   , 0   , 32,
20209        0xfc0007ff, 0xa0000205, &NMD::CMP_SAF_S        , 0,
20210        CP1_                },        /* CMP.SAF.S */
20211     { instruction         , 0                   , 0   , 32,
20212        0xfc0007ff, 0xa0000245, &NMD::CMP_SUN_S        , 0,
20213        CP1_                },        /* CMP.SUN.S */
20214     { instruction         , 0                   , 0   , 32,
20215        0xfc0007ff, 0xa0000285, &NMD::CMP_SEQ_S        , 0,
20216        CP1_                },        /* CMP.SEQ.S */
20217     { instruction         , 0                   , 0   , 32,
20218        0xfc0007ff, 0xa00002c5, &NMD::CMP_SUEQ_S       , 0,
20219        CP1_                },        /* CMP.SUEQ.S */
20220     { instruction         , 0                   , 0   , 32,
20221        0xfc0007ff, 0xa0000305, &NMD::CMP_SLT_S        , 0,
20222        CP1_                },        /* CMP.SLT.S */
20223     { instruction         , 0                   , 0   , 32,
20224        0xfc0007ff, 0xa0000345, &NMD::CMP_SULT_S       , 0,
20225        CP1_                },        /* CMP.SULT.S */
20226     { instruction         , 0                   , 0   , 32,
20227        0xfc0007ff, 0xa0000385, &NMD::CMP_SLE_S        , 0,
20228        CP1_                },        /* CMP.SLE.S */
20229     { instruction         , 0                   , 0   , 32,
20230        0xfc0007ff, 0xa00003c5, &NMD::CMP_SULE_S       , 0,
20231        CP1_                },        /* CMP.SULE.S */
20232     { reserved_block      , 0                   , 0   , 32,
20233        0xfc0007ff, 0xa0000405, 0                      , 0,
20234        CP1_                },        /* CMP.condn.S~*(16) */
20235     { instruction         , 0                   , 0   , 32,
20236        0xfc0007ff, 0xa0000445, &NMD::CMP_OR_S         , 0,
20237        CP1_                },        /* CMP.OR.S */
20238     { instruction         , 0                   , 0   , 32,
20239        0xfc0007ff, 0xa0000485, &NMD::CMP_UNE_S        , 0,
20240        CP1_                },        /* CMP.UNE.S */
20241     { instruction         , 0                   , 0   , 32,
20242        0xfc0007ff, 0xa00004c5, &NMD::CMP_NE_S         , 0,
20243        CP1_                },        /* CMP.NE.S */
20244     { reserved_block      , 0                   , 0   , 32,
20245        0xfc0007ff, 0xa0000505, 0                      , 0,
20246        CP1_                },        /* CMP.condn.S~*(20) */
20247     { reserved_block      , 0                   , 0   , 32,
20248        0xfc0007ff, 0xa0000545, 0                      , 0,
20249        CP1_                },        /* CMP.condn.S~*(21) */
20250     { reserved_block      , 0                   , 0   , 32,
20251        0xfc0007ff, 0xa0000585, 0                      , 0,
20252        CP1_                },        /* CMP.condn.S~*(22) */
20253     { reserved_block      , 0                   , 0   , 32,
20254        0xfc0007ff, 0xa00005c5, 0                      , 0,
20255        CP1_                },        /* CMP.condn.S~*(23) */
20256     { reserved_block      , 0                   , 0   , 32,
20257        0xfc0007ff, 0xa0000605, 0                      , 0,
20258        CP1_                },        /* CMP.condn.S~*(24) */
20259     { instruction         , 0                   , 0   , 32,
20260        0xfc0007ff, 0xa0000645, &NMD::CMP_SOR_S        , 0,
20261        CP1_                },        /* CMP.SOR.S */
20262     { instruction         , 0                   , 0   , 32,
20263        0xfc0007ff, 0xa0000685, &NMD::CMP_SUNE_S       , 0,
20264        CP1_                },        /* CMP.SUNE.S */
20265     { instruction         , 0                   , 0   , 32,
20266        0xfc0007ff, 0xa00006c5, &NMD::CMP_SNE_S        , 0,
20267        CP1_                },        /* CMP.SNE.S */
20268     { reserved_block      , 0                   , 0   , 32,
20269        0xfc0007ff, 0xa0000705, 0                      , 0,
20270        CP1_                },        /* CMP.condn.S~*(28) */
20271     { reserved_block      , 0                   , 0   , 32,
20272        0xfc0007ff, 0xa0000745, 0                      , 0,
20273        CP1_                },        /* CMP.condn.S~*(29) */
20274     { reserved_block      , 0                   , 0   , 32,
20275        0xfc0007ff, 0xa0000785, 0                      , 0,
20276        CP1_                },        /* CMP.condn.S~*(30) */
20277     { reserved_block      , 0                   , 0   , 32,
20278        0xfc0007ff, 0xa00007c5, 0                      , 0,
20279        CP1_                },        /* CMP.condn.S~*(31) */
20280 };
20281
20282
20283 NMD::Pool NMD::CMP_condn_D[32] = {
20284     { instruction         , 0                   , 0   , 32,
20285        0xfc0007ff, 0xa0000015, &NMD::CMP_AF_D         , 0,
20286        CP1_                },        /* CMP.AF.D */
20287     { instruction         , 0                   , 0   , 32,
20288        0xfc0007ff, 0xa0000055, &NMD::CMP_UN_D         , 0,
20289        CP1_                },        /* CMP.UN.D */
20290     { instruction         , 0                   , 0   , 32,
20291        0xfc0007ff, 0xa0000095, &NMD::CMP_EQ_D         , 0,
20292        CP1_                },        /* CMP.EQ.D */
20293     { instruction         , 0                   , 0   , 32,
20294        0xfc0007ff, 0xa00000d5, &NMD::CMP_UEQ_D        , 0,
20295        CP1_                },        /* CMP.UEQ.D */
20296     { instruction         , 0                   , 0   , 32,
20297        0xfc0007ff, 0xa0000115, &NMD::CMP_LT_D         , 0,
20298        CP1_                },        /* CMP.LT.D */
20299     { instruction         , 0                   , 0   , 32,
20300        0xfc0007ff, 0xa0000155, &NMD::CMP_ULT_D        , 0,
20301        CP1_                },        /* CMP.ULT.D */
20302     { instruction         , 0                   , 0   , 32,
20303        0xfc0007ff, 0xa0000195, &NMD::CMP_LE_D         , 0,
20304        CP1_                },        /* CMP.LE.D */
20305     { instruction         , 0                   , 0   , 32,
20306        0xfc0007ff, 0xa00001d5, &NMD::CMP_ULE_D        , 0,
20307        CP1_                },        /* CMP.ULE.D */
20308     { instruction         , 0                   , 0   , 32,
20309        0xfc0007ff, 0xa0000215, &NMD::CMP_SAF_D        , 0,
20310        CP1_                },        /* CMP.SAF.D */
20311     { instruction         , 0                   , 0   , 32,
20312        0xfc0007ff, 0xa0000255, &NMD::CMP_SUN_D        , 0,
20313        CP1_                },        /* CMP.SUN.D */
20314     { instruction         , 0                   , 0   , 32,
20315        0xfc0007ff, 0xa0000295, &NMD::CMP_SEQ_D        , 0,
20316        CP1_                },        /* CMP.SEQ.D */
20317     { instruction         , 0                   , 0   , 32,
20318        0xfc0007ff, 0xa00002d5, &NMD::CMP_SUEQ_D       , 0,
20319        CP1_                },        /* CMP.SUEQ.D */
20320     { instruction         , 0                   , 0   , 32,
20321        0xfc0007ff, 0xa0000315, &NMD::CMP_SLT_D        , 0,
20322        CP1_                },        /* CMP.SLT.D */
20323     { instruction         , 0                   , 0   , 32,
20324        0xfc0007ff, 0xa0000355, &NMD::CMP_SULT_D       , 0,
20325        CP1_                },        /* CMP.SULT.D */
20326     { instruction         , 0                   , 0   , 32,
20327        0xfc0007ff, 0xa0000395, &NMD::CMP_SLE_D        , 0,
20328        CP1_                },        /* CMP.SLE.D */
20329     { instruction         , 0                   , 0   , 32,
20330        0xfc0007ff, 0xa00003d5, &NMD::CMP_SULE_D       , 0,
20331        CP1_                },        /* CMP.SULE.D */
20332     { reserved_block      , 0                   , 0   , 32,
20333        0xfc0007ff, 0xa0000415, 0                      , 0,
20334        CP1_                },        /* CMP.condn.D~*(16) */
20335     { instruction         , 0                   , 0   , 32,
20336        0xfc0007ff, 0xa0000455, &NMD::CMP_OR_D         , 0,
20337        CP1_                },        /* CMP.OR.D */
20338     { instruction         , 0                   , 0   , 32,
20339        0xfc0007ff, 0xa0000495, &NMD::CMP_UNE_D        , 0,
20340        CP1_                },        /* CMP.UNE.D */
20341     { instruction         , 0                   , 0   , 32,
20342        0xfc0007ff, 0xa00004d5, &NMD::CMP_NE_D         , 0,
20343        CP1_                },        /* CMP.NE.D */
20344     { reserved_block      , 0                   , 0   , 32,
20345        0xfc0007ff, 0xa0000515, 0                      , 0,
20346        CP1_                },        /* CMP.condn.D~*(20) */
20347     { reserved_block      , 0                   , 0   , 32,
20348        0xfc0007ff, 0xa0000555, 0                      , 0,
20349        CP1_                },        /* CMP.condn.D~*(21) */
20350     { reserved_block      , 0                   , 0   , 32,
20351        0xfc0007ff, 0xa0000595, 0                      , 0,
20352        CP1_                },        /* CMP.condn.D~*(22) */
20353     { reserved_block      , 0                   , 0   , 32,
20354        0xfc0007ff, 0xa00005d5, 0                      , 0,
20355        CP1_                },        /* CMP.condn.D~*(23) */
20356     { reserved_block      , 0                   , 0   , 32,
20357        0xfc0007ff, 0xa0000615, 0                      , 0,
20358        CP1_                },        /* CMP.condn.D~*(24) */
20359     { instruction         , 0                   , 0   , 32,
20360        0xfc0007ff, 0xa0000655, &NMD::CMP_SOR_D        , 0,
20361        CP1_                },        /* CMP.SOR.D */
20362     { instruction         , 0                   , 0   , 32,
20363        0xfc0007ff, 0xa0000695, &NMD::CMP_SUNE_D       , 0,
20364        CP1_                },        /* CMP.SUNE.D */
20365     { instruction         , 0                   , 0   , 32,
20366        0xfc0007ff, 0xa00006d5, &NMD::CMP_SNE_D        , 0,
20367        CP1_                },        /* CMP.SNE.D */
20368     { reserved_block      , 0                   , 0   , 32,
20369        0xfc0007ff, 0xa0000715, 0                      , 0,
20370        CP1_                },        /* CMP.condn.D~*(28) */
20371     { reserved_block      , 0                   , 0   , 32,
20372        0xfc0007ff, 0xa0000755, 0                      , 0,
20373        CP1_                },        /* CMP.condn.D~*(29) */
20374     { reserved_block      , 0                   , 0   , 32,
20375        0xfc0007ff, 0xa0000795, 0                      , 0,
20376        CP1_                },        /* CMP.condn.D~*(30) */
20377     { reserved_block      , 0                   , 0   , 32,
20378        0xfc0007ff, 0xa00007d5, 0                      , 0,
20379        CP1_                },        /* CMP.condn.D~*(31) */
20380 };
20381
20382
20383 NMD::Pool NMD::POOL32F_5[8] = {
20384     { pool                , CMP_condn_S         , 32  , 32,
20385        0xfc00003f, 0xa0000005, 0                      , 0,
20386        CP1_                },        /* CMP.condn.S */
20387     { reserved_block      , 0                   , 0   , 32,
20388        0xfc00003f, 0xa000000d, 0                      , 0,
20389        CP1_                },        /* POOL32F_5~*(1) */
20390     { pool                , CMP_condn_D         , 32  , 32,
20391        0xfc00003f, 0xa0000015, 0                      , 0,
20392        CP1_                },        /* CMP.condn.D */
20393     { reserved_block      , 0                   , 0   , 32,
20394        0xfc00003f, 0xa000001d, 0                      , 0,
20395        CP1_                },        /* POOL32F_5~*(3) */
20396     { reserved_block      , 0                   , 0   , 32,
20397        0xfc00003f, 0xa0000025, 0                      , 0,
20398        CP1_                },        /* POOL32F_5~*(4) */
20399     { reserved_block      , 0                   , 0   , 32,
20400        0xfc00003f, 0xa000002d, 0                      , 0,
20401        CP1_                },        /* POOL32F_5~*(5) */
20402     { reserved_block      , 0                   , 0   , 32,
20403        0xfc00003f, 0xa0000035, 0                      , 0,
20404        CP1_                },        /* POOL32F_5~*(6) */
20405     { reserved_block      , 0                   , 0   , 32,
20406        0xfc00003f, 0xa000003d, 0                      , 0,
20407        CP1_                },        /* POOL32F_5~*(7) */
20408 };
20409
20410
20411 NMD::Pool NMD::POOL32F[8] = {
20412     { pool                , POOL32F_0           , 64  , 32,
20413        0xfc000007, 0xa0000000, 0                      , 0,
20414        CP1_                },        /* POOL32F_0 */
20415     { reserved_block      , 0                   , 0   , 32,
20416        0xfc000007, 0xa0000001, 0                      , 0,
20417        CP1_                },        /* POOL32F~*(1) */
20418     { reserved_block      , 0                   , 0   , 32,
20419        0xfc000007, 0xa0000002, 0                      , 0,
20420        CP1_                },        /* POOL32F~*(2) */
20421     { pool                , POOL32F_3           , 8   , 32,
20422        0xfc000007, 0xa0000003, 0                      , 0,
20423        CP1_                },        /* POOL32F_3 */
20424     { reserved_block      , 0                   , 0   , 32,
20425        0xfc000007, 0xa0000004, 0                      , 0,
20426        CP1_                },        /* POOL32F~*(4) */
20427     { pool                , POOL32F_5           , 8   , 32,
20428        0xfc000007, 0xa0000005, 0                      , 0,
20429        CP1_                },        /* POOL32F_5 */
20430     { reserved_block      , 0                   , 0   , 32,
20431        0xfc000007, 0xa0000006, 0                      , 0,
20432        CP1_                },        /* POOL32F~*(6) */
20433     { reserved_block      , 0                   , 0   , 32,
20434        0xfc000007, 0xa0000007, 0                      , 0,
20435        CP1_                },        /* POOL32F~*(7) */
20436 };
20437
20438
20439 NMD::Pool NMD::POOL32S_0[64] = {
20440     { reserved_block      , 0                   , 0   , 32,
20441        0xfc0001ff, 0xc0000000, 0                      , 0,
20442        0x0                 },        /* POOL32S_0~*(0) */
20443     { instruction         , 0                   , 0   , 32,
20444        0xfc0001ff, 0xc0000008, &NMD::DLSA             , 0,
20445        MIPS64_             },        /* DLSA */
20446     { instruction         , 0                   , 0   , 32,
20447        0xfc0001ff, 0xc0000010, &NMD::DSLLV            , 0,
20448        MIPS64_             },        /* DSLLV */
20449     { instruction         , 0                   , 0   , 32,
20450        0xfc0001ff, 0xc0000018, &NMD::DMUL             , 0,
20451        MIPS64_             },        /* DMUL */
20452     { reserved_block      , 0                   , 0   , 32,
20453        0xfc0001ff, 0xc0000020, 0                      , 0,
20454        0x0                 },        /* POOL32S_0~*(4) */
20455     { reserved_block      , 0                   , 0   , 32,
20456        0xfc0001ff, 0xc0000028, 0                      , 0,
20457        0x0                 },        /* POOL32S_0~*(5) */
20458     { reserved_block      , 0                   , 0   , 32,
20459        0xfc0001ff, 0xc0000030, 0                      , 0,
20460        0x0                 },        /* POOL32S_0~*(6) */
20461     { reserved_block      , 0                   , 0   , 32,
20462        0xfc0001ff, 0xc0000038, 0                      , 0,
20463        0x0                 },        /* POOL32S_0~*(7) */
20464     { reserved_block      , 0                   , 0   , 32,
20465        0xfc0001ff, 0xc0000040, 0                      , 0,
20466        0x0                 },        /* POOL32S_0~*(8) */
20467     { reserved_block      , 0                   , 0   , 32,
20468        0xfc0001ff, 0xc0000048, 0                      , 0,
20469        0x0                 },        /* POOL32S_0~*(9) */
20470     { instruction         , 0                   , 0   , 32,
20471        0xfc0001ff, 0xc0000050, &NMD::DSRLV            , 0,
20472        MIPS64_             },        /* DSRLV */
20473     { instruction         , 0                   , 0   , 32,
20474        0xfc0001ff, 0xc0000058, &NMD::DMUH             , 0,
20475        MIPS64_             },        /* DMUH */
20476     { reserved_block      , 0                   , 0   , 32,
20477        0xfc0001ff, 0xc0000060, 0                      , 0,
20478        0x0                 },        /* POOL32S_0~*(12) */
20479     { reserved_block      , 0                   , 0   , 32,
20480        0xfc0001ff, 0xc0000068, 0                      , 0,
20481        0x0                 },        /* POOL32S_0~*(13) */
20482     { reserved_block      , 0                   , 0   , 32,
20483        0xfc0001ff, 0xc0000070, 0                      , 0,
20484        0x0                 },        /* POOL32S_0~*(14) */
20485     { reserved_block      , 0                   , 0   , 32,
20486        0xfc0001ff, 0xc0000078, 0                      , 0,
20487        0x0                 },        /* POOL32S_0~*(15) */
20488     { reserved_block      , 0                   , 0   , 32,
20489        0xfc0001ff, 0xc0000080, 0                      , 0,
20490        0x0                 },        /* POOL32S_0~*(16) */
20491     { reserved_block      , 0                   , 0   , 32,
20492        0xfc0001ff, 0xc0000088, 0                      , 0,
20493        0x0                 },        /* POOL32S_0~*(17) */
20494     { instruction         , 0                   , 0   , 32,
20495        0xfc0001ff, 0xc0000090, &NMD::DSRAV            , 0,
20496        MIPS64_             },        /* DSRAV */
20497     { instruction         , 0                   , 0   , 32,
20498        0xfc0001ff, 0xc0000098, &NMD::DMULU            , 0,
20499        MIPS64_             },        /* DMULU */
20500     { reserved_block      , 0                   , 0   , 32,
20501        0xfc0001ff, 0xc00000a0, 0                      , 0,
20502        0x0                 },        /* POOL32S_0~*(20) */
20503     { reserved_block      , 0                   , 0   , 32,
20504        0xfc0001ff, 0xc00000a8, 0                      , 0,
20505        0x0                 },        /* POOL32S_0~*(21) */
20506     { reserved_block      , 0                   , 0   , 32,
20507        0xfc0001ff, 0xc00000b0, 0                      , 0,
20508        0x0                 },        /* POOL32S_0~*(22) */
20509     { reserved_block      , 0                   , 0   , 32,
20510        0xfc0001ff, 0xc00000b8, 0                      , 0,
20511        0x0                 },        /* POOL32S_0~*(23) */
20512     { reserved_block      , 0                   , 0   , 32,
20513        0xfc0001ff, 0xc00000c0, 0                      , 0,
20514        0x0                 },        /* POOL32S_0~*(24) */
20515     { reserved_block      , 0                   , 0   , 32,
20516        0xfc0001ff, 0xc00000c8, 0                      , 0,
20517        0x0                 },        /* POOL32S_0~*(25) */
20518     { instruction         , 0                   , 0   , 32,
20519        0xfc0001ff, 0xc00000d0, &NMD::DROTRV           , 0,
20520        MIPS64_             },        /* DROTRV */
20521     { instruction         , 0                   , 0   , 32,
20522        0xfc0001ff, 0xc00000d8, &NMD::DMUHU            , 0,
20523        MIPS64_             },        /* DMUHU */
20524     { reserved_block      , 0                   , 0   , 32,
20525        0xfc0001ff, 0xc00000e0, 0                      , 0,
20526        0x0                 },        /* POOL32S_0~*(28) */
20527     { reserved_block      , 0                   , 0   , 32,
20528        0xfc0001ff, 0xc00000e8, 0                      , 0,
20529        0x0                 },        /* POOL32S_0~*(29) */
20530     { reserved_block      , 0                   , 0   , 32,
20531        0xfc0001ff, 0xc00000f0, 0                      , 0,
20532        0x0                 },        /* POOL32S_0~*(30) */
20533     { reserved_block      , 0                   , 0   , 32,
20534        0xfc0001ff, 0xc00000f8, 0                      , 0,
20535        0x0                 },        /* POOL32S_0~*(31) */
20536     { reserved_block      , 0                   , 0   , 32,
20537        0xfc0001ff, 0xc0000100, 0                      , 0,
20538        0x0                 },        /* POOL32S_0~*(32) */
20539     { reserved_block      , 0                   , 0   , 32,
20540        0xfc0001ff, 0xc0000108, 0                      , 0,
20541        0x0                 },        /* POOL32S_0~*(33) */
20542     { instruction         , 0                   , 0   , 32,
20543        0xfc0001ff, 0xc0000110, &NMD::DADD             , 0,
20544        MIPS64_             },        /* DADD */
20545     { instruction         , 0                   , 0   , 32,
20546        0xfc0001ff, 0xc0000118, &NMD::DDIV             , 0,
20547        MIPS64_             },        /* DDIV */
20548     { reserved_block      , 0                   , 0   , 32,
20549        0xfc0001ff, 0xc0000120, 0                      , 0,
20550        0x0                 },        /* POOL32S_0~*(36) */
20551     { reserved_block      , 0                   , 0   , 32,
20552        0xfc0001ff, 0xc0000128, 0                      , 0,
20553        0x0                 },        /* POOL32S_0~*(37) */
20554     { reserved_block      , 0                   , 0   , 32,
20555        0xfc0001ff, 0xc0000130, 0                      , 0,
20556        0x0                 },        /* POOL32S_0~*(38) */
20557     { reserved_block      , 0                   , 0   , 32,
20558        0xfc0001ff, 0xc0000138, 0                      , 0,
20559        0x0                 },        /* POOL32S_0~*(39) */
20560     { reserved_block      , 0                   , 0   , 32,
20561        0xfc0001ff, 0xc0000140, 0                      , 0,
20562        0x0                 },        /* POOL32S_0~*(40) */
20563     { reserved_block      , 0                   , 0   , 32,
20564        0xfc0001ff, 0xc0000148, 0                      , 0,
20565        0x0                 },        /* POOL32S_0~*(41) */
20566     { instruction         , 0                   , 0   , 32,
20567        0xfc0001ff, 0xc0000150, &NMD::DADDU            , 0,
20568        MIPS64_             },        /* DADDU */
20569     { instruction         , 0                   , 0   , 32,
20570        0xfc0001ff, 0xc0000158, &NMD::DMOD             , 0,
20571        MIPS64_             },        /* DMOD */
20572     { reserved_block      , 0                   , 0   , 32,
20573        0xfc0001ff, 0xc0000160, 0                      , 0,
20574        0x0                 },        /* POOL32S_0~*(44) */
20575     { reserved_block      , 0                   , 0   , 32,
20576        0xfc0001ff, 0xc0000168, 0                      , 0,
20577        0x0                 },        /* POOL32S_0~*(45) */
20578     { reserved_block      , 0                   , 0   , 32,
20579        0xfc0001ff, 0xc0000170, 0                      , 0,
20580        0x0                 },        /* POOL32S_0~*(46) */
20581     { reserved_block      , 0                   , 0   , 32,
20582        0xfc0001ff, 0xc0000178, 0                      , 0,
20583        0x0                 },        /* POOL32S_0~*(47) */
20584     { reserved_block      , 0                   , 0   , 32,
20585        0xfc0001ff, 0xc0000180, 0                      , 0,
20586        0x0                 },        /* POOL32S_0~*(48) */
20587     { reserved_block      , 0                   , 0   , 32,
20588        0xfc0001ff, 0xc0000188, 0                      , 0,
20589        0x0                 },        /* POOL32S_0~*(49) */
20590     { instruction         , 0                   , 0   , 32,
20591        0xfc0001ff, 0xc0000190, &NMD::DSUB             , 0,
20592        MIPS64_             },        /* DSUB */
20593     { instruction         , 0                   , 0   , 32,
20594        0xfc0001ff, 0xc0000198, &NMD::DDIVU            , 0,
20595        MIPS64_             },        /* DDIVU */
20596     { reserved_block      , 0                   , 0   , 32,
20597        0xfc0001ff, 0xc00001a0, 0                      , 0,
20598        0x0                 },        /* POOL32S_0~*(52) */
20599     { reserved_block      , 0                   , 0   , 32,
20600        0xfc0001ff, 0xc00001a8, 0                      , 0,
20601        0x0                 },        /* POOL32S_0~*(53) */
20602     { reserved_block      , 0                   , 0   , 32,
20603        0xfc0001ff, 0xc00001b0, 0                      , 0,
20604        0x0                 },        /* POOL32S_0~*(54) */
20605     { reserved_block      , 0                   , 0   , 32,
20606        0xfc0001ff, 0xc00001b8, 0                      , 0,
20607        0x0                 },        /* POOL32S_0~*(55) */
20608     { reserved_block      , 0                   , 0   , 32,
20609        0xfc0001ff, 0xc00001c0, 0                      , 0,
20610        0x0                 },        /* POOL32S_0~*(56) */
20611     { reserved_block      , 0                   , 0   , 32,
20612        0xfc0001ff, 0xc00001c8, 0                      , 0,
20613        0x0                 },        /* POOL32S_0~*(57) */
20614     { instruction         , 0                   , 0   , 32,
20615        0xfc0001ff, 0xc00001d0, &NMD::DSUBU            , 0,
20616        MIPS64_             },        /* DSUBU */
20617     { instruction         , 0                   , 0   , 32,
20618        0xfc0001ff, 0xc00001d8, &NMD::DMODU            , 0,
20619        MIPS64_             },        /* DMODU */
20620     { reserved_block      , 0                   , 0   , 32,
20621        0xfc0001ff, 0xc00001e0, 0                      , 0,
20622        0x0                 },        /* POOL32S_0~*(60) */
20623     { reserved_block      , 0                   , 0   , 32,
20624        0xfc0001ff, 0xc00001e8, 0                      , 0,
20625        0x0                 },        /* POOL32S_0~*(61) */
20626     { reserved_block      , 0                   , 0   , 32,
20627        0xfc0001ff, 0xc00001f0, 0                      , 0,
20628        0x0                 },        /* POOL32S_0~*(62) */
20629     { reserved_block      , 0                   , 0   , 32,
20630        0xfc0001ff, 0xc00001f8, 0                      , 0,
20631        0x0                 },        /* POOL32S_0~*(63) */
20632 };
20633
20634
20635 NMD::Pool NMD::POOL32Sxf_4[128] = {
20636     { reserved_block      , 0                   , 0   , 32,
20637        0xfc00ffff, 0xc000013c, 0                      , 0,
20638        0x0                 },        /* POOL32Sxf_4~*(0) */
20639     { reserved_block      , 0                   , 0   , 32,
20640        0xfc00ffff, 0xc000033c, 0                      , 0,
20641        0x0                 },        /* POOL32Sxf_4~*(1) */
20642     { reserved_block      , 0                   , 0   , 32,
20643        0xfc00ffff, 0xc000053c, 0                      , 0,
20644        0x0                 },        /* POOL32Sxf_4~*(2) */
20645     { reserved_block      , 0                   , 0   , 32,
20646        0xfc00ffff, 0xc000073c, 0                      , 0,
20647        0x0                 },        /* POOL32Sxf_4~*(3) */
20648     { reserved_block      , 0                   , 0   , 32,
20649        0xfc00ffff, 0xc000093c, 0                      , 0,
20650        0x0                 },        /* POOL32Sxf_4~*(4) */
20651     { reserved_block      , 0                   , 0   , 32,
20652        0xfc00ffff, 0xc0000b3c, 0                      , 0,
20653        0x0                 },        /* POOL32Sxf_4~*(5) */
20654     { reserved_block      , 0                   , 0   , 32,
20655        0xfc00ffff, 0xc0000d3c, 0                      , 0,
20656        0x0                 },        /* POOL32Sxf_4~*(6) */
20657     { reserved_block      , 0                   , 0   , 32,
20658        0xfc00ffff, 0xc0000f3c, 0                      , 0,
20659        0x0                 },        /* POOL32Sxf_4~*(7) */
20660     { reserved_block      , 0                   , 0   , 32,
20661        0xfc00ffff, 0xc000113c, 0                      , 0,
20662        0x0                 },        /* POOL32Sxf_4~*(8) */
20663     { reserved_block      , 0                   , 0   , 32,
20664        0xfc00ffff, 0xc000133c, 0                      , 0,
20665        0x0                 },        /* POOL32Sxf_4~*(9) */
20666     { reserved_block      , 0                   , 0   , 32,
20667        0xfc00ffff, 0xc000153c, 0                      , 0,
20668        0x0                 },        /* POOL32Sxf_4~*(10) */
20669     { reserved_block      , 0                   , 0   , 32,
20670        0xfc00ffff, 0xc000173c, 0                      , 0,
20671        0x0                 },        /* POOL32Sxf_4~*(11) */
20672     { reserved_block      , 0                   , 0   , 32,
20673        0xfc00ffff, 0xc000193c, 0                      , 0,
20674        0x0                 },        /* POOL32Sxf_4~*(12) */
20675     { reserved_block      , 0                   , 0   , 32,
20676        0xfc00ffff, 0xc0001b3c, 0                      , 0,
20677        0x0                 },        /* POOL32Sxf_4~*(13) */
20678     { reserved_block      , 0                   , 0   , 32,
20679        0xfc00ffff, 0xc0001d3c, 0                      , 0,
20680        0x0                 },        /* POOL32Sxf_4~*(14) */
20681     { reserved_block      , 0                   , 0   , 32,
20682        0xfc00ffff, 0xc0001f3c, 0                      , 0,
20683        0x0                 },        /* POOL32Sxf_4~*(15) */
20684     { reserved_block      , 0                   , 0   , 32,
20685        0xfc00ffff, 0xc000213c, 0                      , 0,
20686        0x0                 },        /* POOL32Sxf_4~*(16) */
20687     { reserved_block      , 0                   , 0   , 32,
20688        0xfc00ffff, 0xc000233c, 0                      , 0,
20689        0x0                 },        /* POOL32Sxf_4~*(17) */
20690     { reserved_block      , 0                   , 0   , 32,
20691        0xfc00ffff, 0xc000253c, 0                      , 0,
20692        0x0                 },        /* POOL32Sxf_4~*(18) */
20693     { reserved_block      , 0                   , 0   , 32,
20694        0xfc00ffff, 0xc000273c, 0                      , 0,
20695        0x0                 },        /* POOL32Sxf_4~*(19) */
20696     { reserved_block      , 0                   , 0   , 32,
20697        0xfc00ffff, 0xc000293c, 0                      , 0,
20698        0x0                 },        /* POOL32Sxf_4~*(20) */
20699     { reserved_block      , 0                   , 0   , 32,
20700        0xfc00ffff, 0xc0002b3c, 0                      , 0,
20701        0x0                 },        /* POOL32Sxf_4~*(21) */
20702     { reserved_block      , 0                   , 0   , 32,
20703        0xfc00ffff, 0xc0002d3c, 0                      , 0,
20704        0x0                 },        /* POOL32Sxf_4~*(22) */
20705     { reserved_block      , 0                   , 0   , 32,
20706        0xfc00ffff, 0xc0002f3c, 0                      , 0,
20707        0x0                 },        /* POOL32Sxf_4~*(23) */
20708     { reserved_block      , 0                   , 0   , 32,
20709        0xfc00ffff, 0xc000313c, 0                      , 0,
20710        0x0                 },        /* POOL32Sxf_4~*(24) */
20711     { reserved_block      , 0                   , 0   , 32,
20712        0xfc00ffff, 0xc000333c, 0                      , 0,
20713        0x0                 },        /* POOL32Sxf_4~*(25) */
20714     { reserved_block      , 0                   , 0   , 32,
20715        0xfc00ffff, 0xc000353c, 0                      , 0,
20716        0x0                 },        /* POOL32Sxf_4~*(26) */
20717     { reserved_block      , 0                   , 0   , 32,
20718        0xfc00ffff, 0xc000373c, 0                      , 0,
20719        0x0                 },        /* POOL32Sxf_4~*(27) */
20720     { reserved_block      , 0                   , 0   , 32,
20721        0xfc00ffff, 0xc000393c, 0                      , 0,
20722        0x0                 },        /* POOL32Sxf_4~*(28) */
20723     { reserved_block      , 0                   , 0   , 32,
20724        0xfc00ffff, 0xc0003b3c, 0                      , 0,
20725        0x0                 },        /* POOL32Sxf_4~*(29) */
20726     { reserved_block      , 0                   , 0   , 32,
20727        0xfc00ffff, 0xc0003d3c, 0                      , 0,
20728        0x0                 },        /* POOL32Sxf_4~*(30) */
20729     { reserved_block      , 0                   , 0   , 32,
20730        0xfc00ffff, 0xc0003f3c, 0                      , 0,
20731        0x0                 },        /* POOL32Sxf_4~*(31) */
20732     { reserved_block      , 0                   , 0   , 32,
20733        0xfc00ffff, 0xc000413c, 0                      , 0,
20734        0x0                 },        /* POOL32Sxf_4~*(32) */
20735     { reserved_block      , 0                   , 0   , 32,
20736        0xfc00ffff, 0xc000433c, 0                      , 0,
20737        0x0                 },        /* POOL32Sxf_4~*(33) */
20738     { reserved_block      , 0                   , 0   , 32,
20739        0xfc00ffff, 0xc000453c, 0                      , 0,
20740        0x0                 },        /* POOL32Sxf_4~*(34) */
20741     { reserved_block      , 0                   , 0   , 32,
20742        0xfc00ffff, 0xc000473c, 0                      , 0,
20743        0x0                 },        /* POOL32Sxf_4~*(35) */
20744     { reserved_block      , 0                   , 0   , 32,
20745        0xfc00ffff, 0xc000493c, 0                      , 0,
20746        0x0                 },        /* POOL32Sxf_4~*(36) */
20747     { instruction         , 0                   , 0   , 32,
20748        0xfc00ffff, 0xc0004b3c, &NMD::DCLO             , 0,
20749        MIPS64_             },        /* DCLO */
20750     { reserved_block      , 0                   , 0   , 32,
20751        0xfc00ffff, 0xc0004d3c, 0                      , 0,
20752        0x0                 },        /* POOL32Sxf_4~*(38) */
20753     { reserved_block      , 0                   , 0   , 32,
20754        0xfc00ffff, 0xc0004f3c, 0                      , 0,
20755        0x0                 },        /* POOL32Sxf_4~*(39) */
20756     { reserved_block      , 0                   , 0   , 32,
20757        0xfc00ffff, 0xc000513c, 0                      , 0,
20758        0x0                 },        /* POOL32Sxf_4~*(40) */
20759     { reserved_block      , 0                   , 0   , 32,
20760        0xfc00ffff, 0xc000533c, 0                      , 0,
20761        0x0                 },        /* POOL32Sxf_4~*(41) */
20762     { reserved_block      , 0                   , 0   , 32,
20763        0xfc00ffff, 0xc000553c, 0                      , 0,
20764        0x0                 },        /* POOL32Sxf_4~*(42) */
20765     { reserved_block      , 0                   , 0   , 32,
20766        0xfc00ffff, 0xc000573c, 0                      , 0,
20767        0x0                 },        /* POOL32Sxf_4~*(43) */
20768     { reserved_block      , 0                   , 0   , 32,
20769        0xfc00ffff, 0xc000593c, 0                      , 0,
20770        0x0                 },        /* POOL32Sxf_4~*(44) */
20771     { instruction         , 0                   , 0   , 32,
20772        0xfc00ffff, 0xc0005b3c, &NMD::DCLZ             , 0,
20773        MIPS64_             },        /* DCLZ */
20774     { reserved_block      , 0                   , 0   , 32,
20775        0xfc00ffff, 0xc0005d3c, 0                      , 0,
20776        0x0                 },        /* POOL32Sxf_4~*(46) */
20777     { reserved_block      , 0                   , 0   , 32,
20778        0xfc00ffff, 0xc0005f3c, 0                      , 0,
20779        0x0                 },        /* POOL32Sxf_4~*(47) */
20780     { reserved_block      , 0                   , 0   , 32,
20781        0xfc00ffff, 0xc000613c, 0                      , 0,
20782        0x0                 },        /* POOL32Sxf_4~*(48) */
20783     { reserved_block      , 0                   , 0   , 32,
20784        0xfc00ffff, 0xc000633c, 0                      , 0,
20785        0x0                 },        /* POOL32Sxf_4~*(49) */
20786     { reserved_block      , 0                   , 0   , 32,
20787        0xfc00ffff, 0xc000653c, 0                      , 0,
20788        0x0                 },        /* POOL32Sxf_4~*(50) */
20789     { reserved_block      , 0                   , 0   , 32,
20790        0xfc00ffff, 0xc000673c, 0                      , 0,
20791        0x0                 },        /* POOL32Sxf_4~*(51) */
20792     { reserved_block      , 0                   , 0   , 32,
20793        0xfc00ffff, 0xc000693c, 0                      , 0,
20794        0x0                 },        /* POOL32Sxf_4~*(52) */
20795     { reserved_block      , 0                   , 0   , 32,
20796        0xfc00ffff, 0xc0006b3c, 0                      , 0,
20797        0x0                 },        /* POOL32Sxf_4~*(53) */
20798     { reserved_block      , 0                   , 0   , 32,
20799        0xfc00ffff, 0xc0006d3c, 0                      , 0,
20800        0x0                 },        /* POOL32Sxf_4~*(54) */
20801     { reserved_block      , 0                   , 0   , 32,
20802        0xfc00ffff, 0xc0006f3c, 0                      , 0,
20803        0x0                 },        /* POOL32Sxf_4~*(55) */
20804     { reserved_block      , 0                   , 0   , 32,
20805        0xfc00ffff, 0xc000713c, 0                      , 0,
20806        0x0                 },        /* POOL32Sxf_4~*(56) */
20807     { reserved_block      , 0                   , 0   , 32,
20808        0xfc00ffff, 0xc000733c, 0                      , 0,
20809        0x0                 },        /* POOL32Sxf_4~*(57) */
20810     { reserved_block      , 0                   , 0   , 32,
20811        0xfc00ffff, 0xc000753c, 0                      , 0,
20812        0x0                 },        /* POOL32Sxf_4~*(58) */
20813     { reserved_block      , 0                   , 0   , 32,
20814        0xfc00ffff, 0xc000773c, 0                      , 0,
20815        0x0                 },        /* POOL32Sxf_4~*(59) */
20816     { reserved_block      , 0                   , 0   , 32,
20817        0xfc00ffff, 0xc000793c, 0                      , 0,
20818        0x0                 },        /* POOL32Sxf_4~*(60) */
20819     { reserved_block      , 0                   , 0   , 32,
20820        0xfc00ffff, 0xc0007b3c, 0                      , 0,
20821        0x0                 },        /* POOL32Sxf_4~*(61) */
20822     { reserved_block      , 0                   , 0   , 32,
20823        0xfc00ffff, 0xc0007d3c, 0                      , 0,
20824        0x0                 },        /* POOL32Sxf_4~*(62) */
20825     { reserved_block      , 0                   , 0   , 32,
20826        0xfc00ffff, 0xc0007f3c, 0                      , 0,
20827        0x0                 },        /* POOL32Sxf_4~*(63) */
20828     { reserved_block      , 0                   , 0   , 32,
20829        0xfc00ffff, 0xc000813c, 0                      , 0,
20830        0x0                 },        /* POOL32Sxf_4~*(64) */
20831     { reserved_block      , 0                   , 0   , 32,
20832        0xfc00ffff, 0xc000833c, 0                      , 0,
20833        0x0                 },        /* POOL32Sxf_4~*(65) */
20834     { reserved_block      , 0                   , 0   , 32,
20835        0xfc00ffff, 0xc000853c, 0                      , 0,
20836        0x0                 },        /* POOL32Sxf_4~*(66) */
20837     { reserved_block      , 0                   , 0   , 32,
20838        0xfc00ffff, 0xc000873c, 0                      , 0,
20839        0x0                 },        /* POOL32Sxf_4~*(67) */
20840     { reserved_block      , 0                   , 0   , 32,
20841        0xfc00ffff, 0xc000893c, 0                      , 0,
20842        0x0                 },        /* POOL32Sxf_4~*(68) */
20843     { reserved_block      , 0                   , 0   , 32,
20844        0xfc00ffff, 0xc0008b3c, 0                      , 0,
20845        0x0                 },        /* POOL32Sxf_4~*(69) */
20846     { reserved_block      , 0                   , 0   , 32,
20847        0xfc00ffff, 0xc0008d3c, 0                      , 0,
20848        0x0                 },        /* POOL32Sxf_4~*(70) */
20849     { reserved_block      , 0                   , 0   , 32,
20850        0xfc00ffff, 0xc0008f3c, 0                      , 0,
20851        0x0                 },        /* POOL32Sxf_4~*(71) */
20852     { reserved_block      , 0                   , 0   , 32,
20853        0xfc00ffff, 0xc000913c, 0                      , 0,
20854        0x0                 },        /* POOL32Sxf_4~*(72) */
20855     { reserved_block      , 0                   , 0   , 32,
20856        0xfc00ffff, 0xc000933c, 0                      , 0,
20857        0x0                 },        /* POOL32Sxf_4~*(73) */
20858     { reserved_block      , 0                   , 0   , 32,
20859        0xfc00ffff, 0xc000953c, 0                      , 0,
20860        0x0                 },        /* POOL32Sxf_4~*(74) */
20861     { reserved_block      , 0                   , 0   , 32,
20862        0xfc00ffff, 0xc000973c, 0                      , 0,
20863        0x0                 },        /* POOL32Sxf_4~*(75) */
20864     { reserved_block      , 0                   , 0   , 32,
20865        0xfc00ffff, 0xc000993c, 0                      , 0,
20866        0x0                 },        /* POOL32Sxf_4~*(76) */
20867     { reserved_block      , 0                   , 0   , 32,
20868        0xfc00ffff, 0xc0009b3c, 0                      , 0,
20869        0x0                 },        /* POOL32Sxf_4~*(77) */
20870     { reserved_block      , 0                   , 0   , 32,
20871        0xfc00ffff, 0xc0009d3c, 0                      , 0,
20872        0x0                 },        /* POOL32Sxf_4~*(78) */
20873     { reserved_block      , 0                   , 0   , 32,
20874        0xfc00ffff, 0xc0009f3c, 0                      , 0,
20875        0x0                 },        /* POOL32Sxf_4~*(79) */
20876     { reserved_block      , 0                   , 0   , 32,
20877        0xfc00ffff, 0xc000a13c, 0                      , 0,
20878        0x0                 },        /* POOL32Sxf_4~*(80) */
20879     { reserved_block      , 0                   , 0   , 32,
20880        0xfc00ffff, 0xc000a33c, 0                      , 0,
20881        0x0                 },        /* POOL32Sxf_4~*(81) */
20882     { reserved_block      , 0                   , 0   , 32,
20883        0xfc00ffff, 0xc000a53c, 0                      , 0,
20884        0x0                 },        /* POOL32Sxf_4~*(82) */
20885     { reserved_block      , 0                   , 0   , 32,
20886        0xfc00ffff, 0xc000a73c, 0                      , 0,
20887        0x0                 },        /* POOL32Sxf_4~*(83) */
20888     { reserved_block      , 0                   , 0   , 32,
20889        0xfc00ffff, 0xc000a93c, 0                      , 0,
20890        0x0                 },        /* POOL32Sxf_4~*(84) */
20891     { reserved_block      , 0                   , 0   , 32,
20892        0xfc00ffff, 0xc000ab3c, 0                      , 0,
20893        0x0                 },        /* POOL32Sxf_4~*(85) */
20894     { reserved_block      , 0                   , 0   , 32,
20895        0xfc00ffff, 0xc000ad3c, 0                      , 0,
20896        0x0                 },        /* POOL32Sxf_4~*(86) */
20897     { reserved_block      , 0                   , 0   , 32,
20898        0xfc00ffff, 0xc000af3c, 0                      , 0,
20899        0x0                 },        /* POOL32Sxf_4~*(87) */
20900     { reserved_block      , 0                   , 0   , 32,
20901        0xfc00ffff, 0xc000b13c, 0                      , 0,
20902        0x0                 },        /* POOL32Sxf_4~*(88) */
20903     { reserved_block      , 0                   , 0   , 32,
20904        0xfc00ffff, 0xc000b33c, 0                      , 0,
20905        0x0                 },        /* POOL32Sxf_4~*(89) */
20906     { reserved_block      , 0                   , 0   , 32,
20907        0xfc00ffff, 0xc000b53c, 0                      , 0,
20908        0x0                 },        /* POOL32Sxf_4~*(90) */
20909     { reserved_block      , 0                   , 0   , 32,
20910        0xfc00ffff, 0xc000b73c, 0                      , 0,
20911        0x0                 },        /* POOL32Sxf_4~*(91) */
20912     { reserved_block      , 0                   , 0   , 32,
20913        0xfc00ffff, 0xc000b93c, 0                      , 0,
20914        0x0                 },        /* POOL32Sxf_4~*(92) */
20915     { reserved_block      , 0                   , 0   , 32,
20916        0xfc00ffff, 0xc000bb3c, 0                      , 0,
20917        0x0                 },        /* POOL32Sxf_4~*(93) */
20918     { reserved_block      , 0                   , 0   , 32,
20919        0xfc00ffff, 0xc000bd3c, 0                      , 0,
20920        0x0                 },        /* POOL32Sxf_4~*(94) */
20921     { reserved_block      , 0                   , 0   , 32,
20922        0xfc00ffff, 0xc000bf3c, 0                      , 0,
20923        0x0                 },        /* POOL32Sxf_4~*(95) */
20924     { reserved_block      , 0                   , 0   , 32,
20925        0xfc00ffff, 0xc000c13c, 0                      , 0,
20926        0x0                 },        /* POOL32Sxf_4~*(96) */
20927     { reserved_block      , 0                   , 0   , 32,
20928        0xfc00ffff, 0xc000c33c, 0                      , 0,
20929        0x0                 },        /* POOL32Sxf_4~*(97) */
20930     { reserved_block      , 0                   , 0   , 32,
20931        0xfc00ffff, 0xc000c53c, 0                      , 0,
20932        0x0                 },        /* POOL32Sxf_4~*(98) */
20933     { reserved_block      , 0                   , 0   , 32,
20934        0xfc00ffff, 0xc000c73c, 0                      , 0,
20935        0x0                 },        /* POOL32Sxf_4~*(99) */
20936     { reserved_block      , 0                   , 0   , 32,
20937        0xfc00ffff, 0xc000c93c, 0                      , 0,
20938        0x0                 },        /* POOL32Sxf_4~*(100) */
20939     { reserved_block      , 0                   , 0   , 32,
20940        0xfc00ffff, 0xc000cb3c, 0                      , 0,
20941        0x0                 },        /* POOL32Sxf_4~*(101) */
20942     { reserved_block      , 0                   , 0   , 32,
20943        0xfc00ffff, 0xc000cd3c, 0                      , 0,
20944        0x0                 },        /* POOL32Sxf_4~*(102) */
20945     { reserved_block      , 0                   , 0   , 32,
20946        0xfc00ffff, 0xc000cf3c, 0                      , 0,
20947        0x0                 },        /* POOL32Sxf_4~*(103) */
20948     { reserved_block      , 0                   , 0   , 32,
20949        0xfc00ffff, 0xc000d13c, 0                      , 0,
20950        0x0                 },        /* POOL32Sxf_4~*(104) */
20951     { reserved_block      , 0                   , 0   , 32,
20952        0xfc00ffff, 0xc000d33c, 0                      , 0,
20953        0x0                 },        /* POOL32Sxf_4~*(105) */
20954     { reserved_block      , 0                   , 0   , 32,
20955        0xfc00ffff, 0xc000d53c, 0                      , 0,
20956        0x0                 },        /* POOL32Sxf_4~*(106) */
20957     { reserved_block      , 0                   , 0   , 32,
20958        0xfc00ffff, 0xc000d73c, 0                      , 0,
20959        0x0                 },        /* POOL32Sxf_4~*(107) */
20960     { reserved_block      , 0                   , 0   , 32,
20961        0xfc00ffff, 0xc000d93c, 0                      , 0,
20962        0x0                 },        /* POOL32Sxf_4~*(108) */
20963     { reserved_block      , 0                   , 0   , 32,
20964        0xfc00ffff, 0xc000db3c, 0                      , 0,
20965        0x0                 },        /* POOL32Sxf_4~*(109) */
20966     { reserved_block      , 0                   , 0   , 32,
20967        0xfc00ffff, 0xc000dd3c, 0                      , 0,
20968        0x0                 },        /* POOL32Sxf_4~*(110) */
20969     { reserved_block      , 0                   , 0   , 32,
20970        0xfc00ffff, 0xc000df3c, 0                      , 0,
20971        0x0                 },        /* POOL32Sxf_4~*(111) */
20972     { reserved_block      , 0                   , 0   , 32,
20973        0xfc00ffff, 0xc000e13c, 0                      , 0,
20974        0x0                 },        /* POOL32Sxf_4~*(112) */
20975     { reserved_block      , 0                   , 0   , 32,
20976        0xfc00ffff, 0xc000e33c, 0                      , 0,
20977        0x0                 },        /* POOL32Sxf_4~*(113) */
20978     { reserved_block      , 0                   , 0   , 32,
20979        0xfc00ffff, 0xc000e53c, 0                      , 0,
20980        0x0                 },        /* POOL32Sxf_4~*(114) */
20981     { reserved_block      , 0                   , 0   , 32,
20982        0xfc00ffff, 0xc000e73c, 0                      , 0,
20983        0x0                 },        /* POOL32Sxf_4~*(115) */
20984     { reserved_block      , 0                   , 0   , 32,
20985        0xfc00ffff, 0xc000e93c, 0                      , 0,
20986        0x0                 },        /* POOL32Sxf_4~*(116) */
20987     { reserved_block      , 0                   , 0   , 32,
20988        0xfc00ffff, 0xc000eb3c, 0                      , 0,
20989        0x0                 },        /* POOL32Sxf_4~*(117) */
20990     { reserved_block      , 0                   , 0   , 32,
20991        0xfc00ffff, 0xc000ed3c, 0                      , 0,
20992        0x0                 },        /* POOL32Sxf_4~*(118) */
20993     { reserved_block      , 0                   , 0   , 32,
20994        0xfc00ffff, 0xc000ef3c, 0                      , 0,
20995        0x0                 },        /* POOL32Sxf_4~*(119) */
20996     { reserved_block      , 0                   , 0   , 32,
20997        0xfc00ffff, 0xc000f13c, 0                      , 0,
20998        0x0                 },        /* POOL32Sxf_4~*(120) */
20999     { reserved_block      , 0                   , 0   , 32,
21000        0xfc00ffff, 0xc000f33c, 0                      , 0,
21001        0x0                 },        /* POOL32Sxf_4~*(121) */
21002     { reserved_block      , 0                   , 0   , 32,
21003        0xfc00ffff, 0xc000f53c, 0                      , 0,
21004        0x0                 },        /* POOL32Sxf_4~*(122) */
21005     { reserved_block      , 0                   , 0   , 32,
21006        0xfc00ffff, 0xc000f73c, 0                      , 0,
21007        0x0                 },        /* POOL32Sxf_4~*(123) */
21008     { reserved_block      , 0                   , 0   , 32,
21009        0xfc00ffff, 0xc000f93c, 0                      , 0,
21010        0x0                 },        /* POOL32Sxf_4~*(124) */
21011     { reserved_block      , 0                   , 0   , 32,
21012        0xfc00ffff, 0xc000fb3c, 0                      , 0,
21013        0x0                 },        /* POOL32Sxf_4~*(125) */
21014     { reserved_block      , 0                   , 0   , 32,
21015        0xfc00ffff, 0xc000fd3c, 0                      , 0,
21016        0x0                 },        /* POOL32Sxf_4~*(126) */
21017     { reserved_block      , 0                   , 0   , 32,
21018        0xfc00ffff, 0xc000ff3c, 0                      , 0,
21019        0x0                 },        /* POOL32Sxf_4~*(127) */
21020 };
21021
21022
21023 NMD::Pool NMD::POOL32Sxf[8] = {
21024     { reserved_block      , 0                   , 0   , 32,
21025        0xfc0001ff, 0xc000003c, 0                      , 0,
21026        0x0                 },        /* POOL32Sxf~*(0) */
21027     { reserved_block      , 0                   , 0   , 32,
21028        0xfc0001ff, 0xc000007c, 0                      , 0,
21029        0x0                 },        /* POOL32Sxf~*(1) */
21030     { reserved_block      , 0                   , 0   , 32,
21031        0xfc0001ff, 0xc00000bc, 0                      , 0,
21032        0x0                 },        /* POOL32Sxf~*(2) */
21033     { reserved_block      , 0                   , 0   , 32,
21034        0xfc0001ff, 0xc00000fc, 0                      , 0,
21035        0x0                 },        /* POOL32Sxf~*(3) */
21036     { pool                , POOL32Sxf_4         , 128 , 32,
21037        0xfc0001ff, 0xc000013c, 0                      , 0,
21038        0x0                 },        /* POOL32Sxf_4 */
21039     { reserved_block      , 0                   , 0   , 32,
21040        0xfc0001ff, 0xc000017c, 0                      , 0,
21041        0x0                 },        /* POOL32Sxf~*(5) */
21042     { reserved_block      , 0                   , 0   , 32,
21043        0xfc0001ff, 0xc00001bc, 0                      , 0,
21044        0x0                 },        /* POOL32Sxf~*(6) */
21045     { reserved_block      , 0                   , 0   , 32,
21046        0xfc0001ff, 0xc00001fc, 0                      , 0,
21047        0x0                 },        /* POOL32Sxf~*(7) */
21048 };
21049
21050
21051 NMD::Pool NMD::POOL32S_4[8] = {
21052     { instruction         , 0                   , 0   , 32,
21053        0xfc00003f, 0xc0000004, &NMD::EXTD             , 0,
21054        MIPS64_             },        /* EXTD */
21055     { instruction         , 0                   , 0   , 32,
21056        0xfc00003f, 0xc000000c, &NMD::EXTD32           , 0,
21057        MIPS64_             },        /* EXTD32 */
21058     { reserved_block      , 0                   , 0   , 32,
21059        0xfc00003f, 0xc0000014, 0                      , 0,
21060        0x0                 },        /* POOL32S_4~*(2) */
21061     { reserved_block      , 0                   , 0   , 32,
21062        0xfc00003f, 0xc000001c, 0                      , 0,
21063        0x0                 },        /* POOL32S_4~*(3) */
21064     { reserved_block      , 0                   , 0   , 32,
21065        0xfc00003f, 0xc0000024, 0                      , 0,
21066        0x0                 },        /* POOL32S_4~*(4) */
21067     { reserved_block      , 0                   , 0   , 32,
21068        0xfc00003f, 0xc000002c, 0                      , 0,
21069        0x0                 },        /* POOL32S_4~*(5) */
21070     { reserved_block      , 0                   , 0   , 32,
21071        0xfc00003f, 0xc0000034, 0                      , 0,
21072        0x0                 },        /* POOL32S_4~*(6) */
21073     { pool                , POOL32Sxf           , 8   , 32,
21074        0xfc00003f, 0xc000003c, 0                      , 0,
21075        0x0                 },        /* POOL32Sxf */
21076 };
21077
21078
21079 NMD::Pool NMD::POOL32S[8] = {
21080     { pool                , POOL32S_0           , 64  , 32,
21081        0xfc000007, 0xc0000000, 0                      , 0,
21082        0x0                 },        /* POOL32S_0 */
21083     { reserved_block      , 0                   , 0   , 32,
21084        0xfc000007, 0xc0000001, 0                      , 0,
21085        0x0                 },        /* POOL32S~*(1) */
21086     { reserved_block      , 0                   , 0   , 32,
21087        0xfc000007, 0xc0000002, 0                      , 0,
21088        0x0                 },        /* POOL32S~*(2) */
21089     { reserved_block      , 0                   , 0   , 32,
21090        0xfc000007, 0xc0000003, 0                      , 0,
21091        0x0                 },        /* POOL32S~*(3) */
21092     { pool                , POOL32S_4           , 8   , 32,
21093        0xfc000007, 0xc0000004, 0                      , 0,
21094        0x0                 },        /* POOL32S_4 */
21095     { reserved_block      , 0                   , 0   , 32,
21096        0xfc000007, 0xc0000005, 0                      , 0,
21097        0x0                 },        /* POOL32S~*(5) */
21098     { reserved_block      , 0                   , 0   , 32,
21099        0xfc000007, 0xc0000006, 0                      , 0,
21100        0x0                 },        /* POOL32S~*(6) */
21101     { reserved_block      , 0                   , 0   , 32,
21102        0xfc000007, 0xc0000007, 0                      , 0,
21103        0x0                 },        /* POOL32S~*(7) */
21104 };
21105
21106
21107 NMD::Pool NMD::P_LUI[2] = {
21108     { instruction         , 0                   , 0   , 32,
21109        0xfc000002, 0xe0000000, &NMD::LUI              , 0,
21110        0x0                 },        /* LUI */
21111     { instruction         , 0                   , 0   , 32,
21112        0xfc000002, 0xe0000002, &NMD::ALUIPC           , 0,
21113        0x0                 },        /* ALUIPC */
21114 };
21115
21116
21117 NMD::Pool NMD::P_GP_LH[2] = {
21118     { instruction         , 0                   , 0   , 32,
21119        0xfc1c0001, 0x44100000, &NMD::LH_GP_           , 0,
21120        0x0                 },        /* LH[GP] */
21121     { instruction         , 0                   , 0   , 32,
21122        0xfc1c0001, 0x44100001, &NMD::LHU_GP_          , 0,
21123        0x0                 },        /* LHU[GP] */
21124 };
21125
21126
21127 NMD::Pool NMD::P_GP_SH[2] = {
21128     { instruction         , 0                   , 0   , 32,
21129        0xfc1c0001, 0x44140000, &NMD::SH_GP_           , 0,
21130        0x0                 },        /* SH[GP] */
21131     { reserved_block      , 0                   , 0   , 32,
21132        0xfc1c0001, 0x44140001, 0                      , 0,
21133        0x0                 },        /* P.GP.SH~*(1) */
21134 };
21135
21136
21137 NMD::Pool NMD::P_GP_CP1[4] = {
21138     { instruction         , 0                   , 0   , 32,
21139        0xfc1c0003, 0x44180000, &NMD::LWC1_GP_         , 0,
21140        CP1_                },        /* LWC1[GP] */
21141     { instruction         , 0                   , 0   , 32,
21142        0xfc1c0003, 0x44180001, &NMD::SWC1_GP_         , 0,
21143        CP1_                },        /* SWC1[GP] */
21144     { instruction         , 0                   , 0   , 32,
21145        0xfc1c0003, 0x44180002, &NMD::LDC1_GP_         , 0,
21146        CP1_                },        /* LDC1[GP] */
21147     { instruction         , 0                   , 0   , 32,
21148        0xfc1c0003, 0x44180003, &NMD::SDC1_GP_         , 0,
21149        CP1_                },        /* SDC1[GP] */
21150 };
21151
21152
21153 NMD::Pool NMD::P_GP_M64[4] = {
21154     { instruction         , 0                   , 0   , 32,
21155        0xfc1c0003, 0x441c0000, &NMD::LWU_GP_          , 0,
21156        MIPS64_             },        /* LWU[GP] */
21157     { reserved_block      , 0                   , 0   , 32,
21158        0xfc1c0003, 0x441c0001, 0                      , 0,
21159        0x0                 },        /* P.GP.M64~*(1) */
21160     { reserved_block      , 0                   , 0   , 32,
21161        0xfc1c0003, 0x441c0002, 0                      , 0,
21162        0x0                 },        /* P.GP.M64~*(2) */
21163     { reserved_block      , 0                   , 0   , 32,
21164        0xfc1c0003, 0x441c0003, 0                      , 0,
21165        0x0                 },        /* P.GP.M64~*(3) */
21166 };
21167
21168
21169 NMD::Pool NMD::P_GP_BH[8] = {
21170     { instruction         , 0                   , 0   , 32,
21171        0xfc1c0000, 0x44000000, &NMD::LB_GP_           , 0,
21172        0x0                 },        /* LB[GP] */
21173     { instruction         , 0                   , 0   , 32,
21174        0xfc1c0000, 0x44040000, &NMD::SB_GP_           , 0,
21175        0x0                 },        /* SB[GP] */
21176     { instruction         , 0                   , 0   , 32,
21177        0xfc1c0000, 0x44080000, &NMD::LBU_GP_          , 0,
21178        0x0                 },        /* LBU[GP] */
21179     { instruction         , 0                   , 0   , 32,
21180        0xfc1c0000, 0x440c0000, &NMD::ADDIU_GP_B_      , 0,
21181        0x0                 },        /* ADDIU[GP.B] */
21182     { pool                , P_GP_LH             , 2   , 32,
21183        0xfc1c0000, 0x44100000, 0                      , 0,
21184        0x0                 },        /* P.GP.LH */
21185     { pool                , P_GP_SH             , 2   , 32,
21186        0xfc1c0000, 0x44140000, 0                      , 0,
21187        0x0                 },        /* P.GP.SH */
21188     { pool                , P_GP_CP1            , 4   , 32,
21189        0xfc1c0000, 0x44180000, 0                      , 0,
21190        0x0                 },        /* P.GP.CP1 */
21191     { pool                , P_GP_M64            , 4   , 32,
21192        0xfc1c0000, 0x441c0000, 0                      , 0,
21193        0x0                 },        /* P.GP.M64 */
21194 };
21195
21196
21197 NMD::Pool NMD::P_LS_U12[16] = {
21198     { instruction         , 0                   , 0   , 32,
21199        0xfc00f000, 0x84000000, &NMD::LB_U12_          , 0,
21200        0x0                 },        /* LB[U12] */
21201     { instruction         , 0                   , 0   , 32,
21202        0xfc00f000, 0x84001000, &NMD::SB_U12_          , 0,
21203        0x0                 },        /* SB[U12] */
21204     { instruction         , 0                   , 0   , 32,
21205        0xfc00f000, 0x84002000, &NMD::LBU_U12_         , 0,
21206        0x0                 },        /* LBU[U12] */
21207     { instruction         , 0                   , 0   , 32,
21208        0xfc00f000, 0x84003000, &NMD::PREF_U12_        , 0,
21209        0x0                 },        /* PREF[U12] */
21210     { instruction         , 0                   , 0   , 32,
21211        0xfc00f000, 0x84004000, &NMD::LH_U12_          , 0,
21212        0x0                 },        /* LH[U12] */
21213     { instruction         , 0                   , 0   , 32,
21214        0xfc00f000, 0x84005000, &NMD::SH_U12_          , 0,
21215        0x0                 },        /* SH[U12] */
21216     { instruction         , 0                   , 0   , 32,
21217        0xfc00f000, 0x84006000, &NMD::LHU_U12_         , 0,
21218        0x0                 },        /* LHU[U12] */
21219     { instruction         , 0                   , 0   , 32,
21220        0xfc00f000, 0x84007000, &NMD::LWU_U12_         , 0,
21221        MIPS64_             },        /* LWU[U12] */
21222     { instruction         , 0                   , 0   , 32,
21223        0xfc00f000, 0x84008000, &NMD::LW_U12_          , 0,
21224        0x0                 },        /* LW[U12] */
21225     { instruction         , 0                   , 0   , 32,
21226        0xfc00f000, 0x84009000, &NMD::SW_U12_          , 0,
21227        0x0                 },        /* SW[U12] */
21228     { instruction         , 0                   , 0   , 32,
21229        0xfc00f000, 0x8400a000, &NMD::LWC1_U12_        , 0,
21230        CP1_                },        /* LWC1[U12] */
21231     { instruction         , 0                   , 0   , 32,
21232        0xfc00f000, 0x8400b000, &NMD::SWC1_U12_        , 0,
21233        CP1_                },        /* SWC1[U12] */
21234     { instruction         , 0                   , 0   , 32,
21235        0xfc00f000, 0x8400c000, &NMD::LD_U12_          , 0,
21236        MIPS64_             },        /* LD[U12] */
21237     { instruction         , 0                   , 0   , 32,
21238        0xfc00f000, 0x8400d000, &NMD::SD_U12_          , 0,
21239        MIPS64_             },        /* SD[U12] */
21240     { instruction         , 0                   , 0   , 32,
21241        0xfc00f000, 0x8400e000, &NMD::LDC1_U12_        , 0,
21242        CP1_                },        /* LDC1[U12] */
21243     { instruction         , 0                   , 0   , 32,
21244        0xfc00f000, 0x8400f000, &NMD::SDC1_U12_        , 0,
21245        CP1_                },        /* SDC1[U12] */
21246 };
21247
21248
21249 NMD::Pool NMD::P_PREF_S9_[2] = {
21250     { instruction         , 0                   , 0   , 32,
21251        0xffe07f00, 0xa7e01800, &NMD::SYNCI            , 0,
21252        0x0                 },        /* SYNCI */
21253     { instruction         , 0                   , 0   , 32,
21254        0xfc007f00, 0xa4001800, &NMD::PREF_S9_         , &NMD::PREF_S9__cond    ,
21255        0x0                 },        /* PREF[S9] */
21256 };
21257
21258
21259 NMD::Pool NMD::P_LS_S0[16] = {
21260     { instruction         , 0                   , 0   , 32,
21261        0xfc007f00, 0xa4000000, &NMD::LB_S9_           , 0,
21262        0x0                 },        /* LB[S9] */
21263     { instruction         , 0                   , 0   , 32,
21264        0xfc007f00, 0xa4000800, &NMD::SB_S9_           , 0,
21265        0x0                 },        /* SB[S9] */
21266     { instruction         , 0                   , 0   , 32,
21267        0xfc007f00, 0xa4001000, &NMD::LBU_S9_          , 0,
21268        0x0                 },        /* LBU[S9] */
21269     { pool                , P_PREF_S9_          , 2   , 32,
21270        0xfc007f00, 0xa4001800, 0                      , 0,
21271        0x0                 },        /* P.PREF[S9] */
21272     { instruction         , 0                   , 0   , 32,
21273        0xfc007f00, 0xa4002000, &NMD::LH_S9_           , 0,
21274        0x0                 },        /* LH[S9] */
21275     { instruction         , 0                   , 0   , 32,
21276        0xfc007f00, 0xa4002800, &NMD::SH_S9_           , 0,
21277        0x0                 },        /* SH[S9] */
21278     { instruction         , 0                   , 0   , 32,
21279        0xfc007f00, 0xa4003000, &NMD::LHU_S9_          , 0,
21280        0x0                 },        /* LHU[S9] */
21281     { instruction         , 0                   , 0   , 32,
21282        0xfc007f00, 0xa4003800, &NMD::LWU_S9_          , 0,
21283        MIPS64_             },        /* LWU[S9] */
21284     { instruction         , 0                   , 0   , 32,
21285        0xfc007f00, 0xa4004000, &NMD::LW_S9_           , 0,
21286        0x0                 },        /* LW[S9] */
21287     { instruction         , 0                   , 0   , 32,
21288        0xfc007f00, 0xa4004800, &NMD::SW_S9_           , 0,
21289        0x0                 },        /* SW[S9] */
21290     { instruction         , 0                   , 0   , 32,
21291        0xfc007f00, 0xa4005000, &NMD::LWC1_S9_         , 0,
21292        CP1_                },        /* LWC1[S9] */
21293     { instruction         , 0                   , 0   , 32,
21294        0xfc007f00, 0xa4005800, &NMD::SWC1_S9_         , 0,
21295        CP1_                },        /* SWC1[S9] */
21296     { instruction         , 0                   , 0   , 32,
21297        0xfc007f00, 0xa4006000, &NMD::LD_S9_           , 0,
21298        MIPS64_             },        /* LD[S9] */
21299     { instruction         , 0                   , 0   , 32,
21300        0xfc007f00, 0xa4006800, &NMD::SD_S9_           , 0,
21301        MIPS64_             },        /* SD[S9] */
21302     { instruction         , 0                   , 0   , 32,
21303        0xfc007f00, 0xa4007000, &NMD::LDC1_S9_         , 0,
21304        CP1_                },        /* LDC1[S9] */
21305     { instruction         , 0                   , 0   , 32,
21306        0xfc007f00, 0xa4007800, &NMD::SDC1_S9_         , 0,
21307        CP1_                },        /* SDC1[S9] */
21308 };
21309
21310
21311 NMD::Pool NMD::ASET_ACLR[2] = {
21312     { instruction         , 0                   , 0   , 32,
21313        0xfe007f00, 0xa4001100, &NMD::ASET             , 0,
21314        MCU_                },        /* ASET */
21315     { instruction         , 0                   , 0   , 32,
21316        0xfe007f00, 0xa6001100, &NMD::ACLR             , 0,
21317        MCU_                },        /* ACLR */
21318 };
21319
21320
21321 NMD::Pool NMD::P_LL[4] = {
21322     { instruction         , 0                   , 0   , 32,
21323        0xfc007f03, 0xa4005100, &NMD::LL               , 0,
21324        0x0                 },        /* LL */
21325     { instruction         , 0                   , 0   , 32,
21326        0xfc007f03, 0xa4005101, &NMD::LLWP             , 0,
21327        XNP_                },        /* LLWP */
21328     { reserved_block      , 0                   , 0   , 32,
21329        0xfc007f03, 0xa4005102, 0                      , 0,
21330        0x0                 },        /* P.LL~*(2) */
21331     { reserved_block      , 0                   , 0   , 32,
21332        0xfc007f03, 0xa4005103, 0                      , 0,
21333        0x0                 },        /* P.LL~*(3) */
21334 };
21335
21336
21337 NMD::Pool NMD::P_SC[4] = {
21338     { instruction         , 0                   , 0   , 32,
21339        0xfc007f03, 0xa4005900, &NMD::SC               , 0,
21340        0x0                 },        /* SC */
21341     { instruction         , 0                   , 0   , 32,
21342        0xfc007f03, 0xa4005901, &NMD::SCWP             , 0,
21343        XNP_                },        /* SCWP */
21344     { reserved_block      , 0                   , 0   , 32,
21345        0xfc007f03, 0xa4005902, 0                      , 0,
21346        0x0                 },        /* P.SC~*(2) */
21347     { reserved_block      , 0                   , 0   , 32,
21348        0xfc007f03, 0xa4005903, 0                      , 0,
21349        0x0                 },        /* P.SC~*(3) */
21350 };
21351
21352
21353 NMD::Pool NMD::P_LLD[8] = {
21354     { instruction         , 0                   , 0   , 32,
21355        0xfc007f07, 0xa4007100, &NMD::LLD              , 0,
21356        MIPS64_             },        /* LLD */
21357     { instruction         , 0                   , 0   , 32,
21358        0xfc007f07, 0xa4007101, &NMD::LLDP             , 0,
21359        MIPS64_             },        /* LLDP */
21360     { reserved_block      , 0                   , 0   , 32,
21361        0xfc007f07, 0xa4007102, 0                      , 0,
21362        0x0                 },        /* P.LLD~*(2) */
21363     { reserved_block      , 0                   , 0   , 32,
21364        0xfc007f07, 0xa4007103, 0                      , 0,
21365        0x0                 },        /* P.LLD~*(3) */
21366     { reserved_block      , 0                   , 0   , 32,
21367        0xfc007f07, 0xa4007104, 0                      , 0,
21368        0x0                 },        /* P.LLD~*(4) */
21369     { reserved_block      , 0                   , 0   , 32,
21370        0xfc007f07, 0xa4007105, 0                      , 0,
21371        0x0                 },        /* P.LLD~*(5) */
21372     { reserved_block      , 0                   , 0   , 32,
21373        0xfc007f07, 0xa4007106, 0                      , 0,
21374        0x0                 },        /* P.LLD~*(6) */
21375     { reserved_block      , 0                   , 0   , 32,
21376        0xfc007f07, 0xa4007107, 0                      , 0,
21377        0x0                 },        /* P.LLD~*(7) */
21378 };
21379
21380
21381 NMD::Pool NMD::P_SCD[8] = {
21382     { instruction         , 0                   , 0   , 32,
21383        0xfc007f07, 0xa4007900, &NMD::SCD              , 0,
21384        MIPS64_             },        /* SCD */
21385     { instruction         , 0                   , 0   , 32,
21386        0xfc007f07, 0xa4007901, &NMD::SCDP             , 0,
21387        MIPS64_             },        /* SCDP */
21388     { reserved_block      , 0                   , 0   , 32,
21389        0xfc007f07, 0xa4007902, 0                      , 0,
21390        0x0                 },        /* P.SCD~*(2) */
21391     { reserved_block      , 0                   , 0   , 32,
21392        0xfc007f07, 0xa4007903, 0                      , 0,
21393        0x0                 },        /* P.SCD~*(3) */
21394     { reserved_block      , 0                   , 0   , 32,
21395        0xfc007f07, 0xa4007904, 0                      , 0,
21396        0x0                 },        /* P.SCD~*(4) */
21397     { reserved_block      , 0                   , 0   , 32,
21398        0xfc007f07, 0xa4007905, 0                      , 0,
21399        0x0                 },        /* P.SCD~*(5) */
21400     { reserved_block      , 0                   , 0   , 32,
21401        0xfc007f07, 0xa4007906, 0                      , 0,
21402        0x0                 },        /* P.SCD~*(6) */
21403     { reserved_block      , 0                   , 0   , 32,
21404        0xfc007f07, 0xa4007907, 0                      , 0,
21405        0x0                 },        /* P.SCD~*(7) */
21406 };
21407
21408
21409 NMD::Pool NMD::P_LS_S1[16] = {
21410     { reserved_block      , 0                   , 0   , 32,
21411        0xfc007f00, 0xa4000100, 0                      , 0,
21412        0x0                 },        /* P.LS.S1~*(0) */
21413     { reserved_block      , 0                   , 0   , 32,
21414        0xfc007f00, 0xa4000900, 0                      , 0,
21415        0x0                 },        /* P.LS.S1~*(1) */
21416     { pool                , ASET_ACLR           , 2   , 32,
21417        0xfc007f00, 0xa4001100, 0                      , 0,
21418        0x0                 },        /* ASET_ACLR */
21419     { reserved_block      , 0                   , 0   , 32,
21420        0xfc007f00, 0xa4001900, 0                      , 0,
21421        0x0                 },        /* P.LS.S1~*(3) */
21422     { instruction         , 0                   , 0   , 32,
21423        0xfc007f00, 0xa4002100, &NMD::UALH             , 0,
21424        XMMS_               },        /* UALH */
21425     { instruction         , 0                   , 0   , 32,
21426        0xfc007f00, 0xa4002900, &NMD::UASH             , 0,
21427        XMMS_               },        /* UASH */
21428     { reserved_block      , 0                   , 0   , 32,
21429        0xfc007f00, 0xa4003100, 0                      , 0,
21430        0x0                 },        /* P.LS.S1~*(6) */
21431     { instruction         , 0                   , 0   , 32,
21432        0xfc007f00, 0xa4003900, &NMD::CACHE            , 0,
21433        CP0_                },        /* CACHE */
21434     { instruction         , 0                   , 0   , 32,
21435        0xfc007f00, 0xa4004100, &NMD::LWC2             , 0,
21436        CP2_                },        /* LWC2 */
21437     { instruction         , 0                   , 0   , 32,
21438        0xfc007f00, 0xa4004900, &NMD::SWC2             , 0,
21439        CP2_                },        /* SWC2 */
21440     { pool                , P_LL                , 4   , 32,
21441        0xfc007f00, 0xa4005100, 0                      , 0,
21442        0x0                 },        /* P.LL */
21443     { pool                , P_SC                , 4   , 32,
21444        0xfc007f00, 0xa4005900, 0                      , 0,
21445        0x0                 },        /* P.SC */
21446     { instruction         , 0                   , 0   , 32,
21447        0xfc007f00, 0xa4006100, &NMD::LDC2             , 0,
21448        CP2_                },        /* LDC2 */
21449     { instruction         , 0                   , 0   , 32,
21450        0xfc007f00, 0xa4006900, &NMD::SDC2             , 0,
21451        CP2_                },        /* SDC2 */
21452     { pool                , P_LLD               , 8   , 32,
21453        0xfc007f00, 0xa4007100, 0                      , 0,
21454        0x0                 },        /* P.LLD */
21455     { pool                , P_SCD               , 8   , 32,
21456        0xfc007f00, 0xa4007900, 0                      , 0,
21457        0x0                 },        /* P.SCD */
21458 };
21459
21460
21461 NMD::Pool NMD::P_PREFE[2] = {
21462     { instruction         , 0                   , 0   , 32,
21463        0xffe07f00, 0xa7e01a00, &NMD::SYNCIE           , 0,
21464        CP0_ | EVA_         },        /* SYNCIE */
21465     { instruction         , 0                   , 0   , 32,
21466        0xfc007f00, 0xa4001a00, &NMD::PREFE            , &NMD::PREFE_cond       ,
21467        CP0_ | EVA_         },        /* PREFE */
21468 };
21469
21470
21471 NMD::Pool NMD::P_LLE[4] = {
21472     { instruction         , 0                   , 0   , 32,
21473        0xfc007f03, 0xa4005200, &NMD::LLE              , 0,
21474        CP0_ | EVA_         },        /* LLE */
21475     { instruction         , 0                   , 0   , 32,
21476        0xfc007f03, 0xa4005201, &NMD::LLWPE            , 0,
21477        CP0_ | EVA_         },        /* LLWPE */
21478     { reserved_block      , 0                   , 0   , 32,
21479        0xfc007f03, 0xa4005202, 0                      , 0,
21480        0x0                 },        /* P.LLE~*(2) */
21481     { reserved_block      , 0                   , 0   , 32,
21482        0xfc007f03, 0xa4005203, 0                      , 0,
21483        0x0                 },        /* P.LLE~*(3) */
21484 };
21485
21486
21487 NMD::Pool NMD::P_SCE[4] = {
21488     { instruction         , 0                   , 0   , 32,
21489        0xfc007f03, 0xa4005a00, &NMD::SCE              , 0,
21490        CP0_ | EVA_         },        /* SCE */
21491     { instruction         , 0                   , 0   , 32,
21492        0xfc007f03, 0xa4005a01, &NMD::SCWPE            , 0,
21493        CP0_ | EVA_         },        /* SCWPE */
21494     { reserved_block      , 0                   , 0   , 32,
21495        0xfc007f03, 0xa4005a02, 0                      , 0,
21496        0x0                 },        /* P.SCE~*(2) */
21497     { reserved_block      , 0                   , 0   , 32,
21498        0xfc007f03, 0xa4005a03, 0                      , 0,
21499        0x0                 },        /* P.SCE~*(3) */
21500 };
21501
21502
21503 NMD::Pool NMD::P_LS_E0[16] = {
21504     { instruction         , 0                   , 0   , 32,
21505        0xfc007f00, 0xa4000200, &NMD::LBE              , 0,
21506        CP0_ | EVA_         },        /* LBE */
21507     { instruction         , 0                   , 0   , 32,
21508        0xfc007f00, 0xa4000a00, &NMD::SBE              , 0,
21509        CP0_ | EVA_         },        /* SBE */
21510     { instruction         , 0                   , 0   , 32,
21511        0xfc007f00, 0xa4001200, &NMD::LBUE             , 0,
21512        CP0_ | EVA_         },        /* LBUE */
21513     { pool                , P_PREFE             , 2   , 32,
21514        0xfc007f00, 0xa4001a00, 0                      , 0,
21515        0x0                 },        /* P.PREFE */
21516     { instruction         , 0                   , 0   , 32,
21517        0xfc007f00, 0xa4002200, &NMD::LHE              , 0,
21518        CP0_ | EVA_         },        /* LHE */
21519     { instruction         , 0                   , 0   , 32,
21520        0xfc007f00, 0xa4002a00, &NMD::SHE              , 0,
21521        CP0_ | EVA_         },        /* SHE */
21522     { instruction         , 0                   , 0   , 32,
21523        0xfc007f00, 0xa4003200, &NMD::LHUE             , 0,
21524        CP0_ | EVA_         },        /* LHUE */
21525     { instruction         , 0                   , 0   , 32,
21526        0xfc007f00, 0xa4003a00, &NMD::CACHEE           , 0,
21527        CP0_ | EVA_         },        /* CACHEE */
21528     { instruction         , 0                   , 0   , 32,
21529        0xfc007f00, 0xa4004200, &NMD::LWE              , 0,
21530        CP0_ | EVA_         },        /* LWE */
21531     { instruction         , 0                   , 0   , 32,
21532        0xfc007f00, 0xa4004a00, &NMD::SWE              , 0,
21533        CP0_ | EVA_         },        /* SWE */
21534     { pool                , P_LLE               , 4   , 32,
21535        0xfc007f00, 0xa4005200, 0                      , 0,
21536        0x0                 },        /* P.LLE */
21537     { pool                , P_SCE               , 4   , 32,
21538        0xfc007f00, 0xa4005a00, 0                      , 0,
21539        0x0                 },        /* P.SCE */
21540     { reserved_block      , 0                   , 0   , 32,
21541        0xfc007f00, 0xa4006200, 0                      , 0,
21542        0x0                 },        /* P.LS.E0~*(12) */
21543     { reserved_block      , 0                   , 0   , 32,
21544        0xfc007f00, 0xa4006a00, 0                      , 0,
21545        0x0                 },        /* P.LS.E0~*(13) */
21546     { reserved_block      , 0                   , 0   , 32,
21547        0xfc007f00, 0xa4007200, 0                      , 0,
21548        0x0                 },        /* P.LS.E0~*(14) */
21549     { reserved_block      , 0                   , 0   , 32,
21550        0xfc007f00, 0xa4007a00, 0                      , 0,
21551        0x0                 },        /* P.LS.E0~*(15) */
21552 };
21553
21554
21555 NMD::Pool NMD::P_LS_WM[2] = {
21556     { instruction         , 0                   , 0   , 32,
21557        0xfc000f00, 0xa4000400, &NMD::LWM              , 0,
21558        XMMS_               },        /* LWM */
21559     { instruction         , 0                   , 0   , 32,
21560        0xfc000f00, 0xa4000c00, &NMD::SWM              , 0,
21561        XMMS_               },        /* SWM */
21562 };
21563
21564
21565 NMD::Pool NMD::P_LS_UAWM[2] = {
21566     { instruction         , 0                   , 0   , 32,
21567        0xfc000f00, 0xa4000500, &NMD::UALWM            , 0,
21568        XMMS_               },        /* UALWM */
21569     { instruction         , 0                   , 0   , 32,
21570        0xfc000f00, 0xa4000d00, &NMD::UASWM            , 0,
21571        XMMS_               },        /* UASWM */
21572 };
21573
21574
21575 NMD::Pool NMD::P_LS_DM[2] = {
21576     { instruction         , 0                   , 0   , 32,
21577        0xfc000f00, 0xa4000600, &NMD::LDM              , 0,
21578        MIPS64_             },        /* LDM */
21579     { instruction         , 0                   , 0   , 32,
21580        0xfc000f00, 0xa4000e00, &NMD::SDM              , 0,
21581        MIPS64_             },        /* SDM */
21582 };
21583
21584
21585 NMD::Pool NMD::P_LS_UADM[2] = {
21586     { instruction         , 0                   , 0   , 32,
21587        0xfc000f00, 0xa4000700, &NMD::UALDM            , 0,
21588        MIPS64_             },        /* UALDM */
21589     { instruction         , 0                   , 0   , 32,
21590        0xfc000f00, 0xa4000f00, &NMD::UASDM            , 0,
21591        MIPS64_             },        /* UASDM */
21592 };
21593
21594
21595 NMD::Pool NMD::P_LS_S9[8] = {
21596     { pool                , P_LS_S0             , 16  , 32,
21597        0xfc000700, 0xa4000000, 0                      , 0,
21598        0x0                 },        /* P.LS.S0 */
21599     { pool                , P_LS_S1             , 16  , 32,
21600        0xfc000700, 0xa4000100, 0                      , 0,
21601        0x0                 },        /* P.LS.S1 */
21602     { pool                , P_LS_E0             , 16  , 32,
21603        0xfc000700, 0xa4000200, 0                      , 0,
21604        0x0                 },        /* P.LS.E0 */
21605     { reserved_block      , 0                   , 0   , 32,
21606        0xfc000700, 0xa4000300, 0                      , 0,
21607        0x0                 },        /* P.LS.S9~*(3) */
21608     { pool                , P_LS_WM             , 2   , 32,
21609        0xfc000700, 0xa4000400, 0                      , 0,
21610        0x0                 },        /* P.LS.WM */
21611     { pool                , P_LS_UAWM           , 2   , 32,
21612        0xfc000700, 0xa4000500, 0                      , 0,
21613        0x0                 },        /* P.LS.UAWM */
21614     { pool                , P_LS_DM             , 2   , 32,
21615        0xfc000700, 0xa4000600, 0                      , 0,
21616        0x0                 },        /* P.LS.DM */
21617     { pool                , P_LS_UADM           , 2   , 32,
21618        0xfc000700, 0xa4000700, 0                      , 0,
21619        0x0                 },        /* P.LS.UADM */
21620 };
21621
21622
21623 NMD::Pool NMD::P_BAL[2] = {
21624     { branch_instruction  , 0                   , 0   , 32,
21625        0xfe000000, 0x28000000, &NMD::BC_32_           , 0,
21626        0x0                 },        /* BC[32] */
21627     { call_instruction    , 0                   , 0   , 32,
21628        0xfe000000, 0x2a000000, &NMD::BALC_32_         , 0,
21629        0x0                 },        /* BALC[32] */
21630 };
21631
21632
21633 NMD::Pool NMD::P_BALRSC[2] = {
21634     { branch_instruction  , 0                   , 0   , 32,
21635        0xffe0f000, 0x48008000, &NMD::BRSC             , 0,
21636        0x0                 },        /* BRSC */
21637     { call_instruction    , 0                   , 0   , 32,
21638        0xfc00f000, 0x48008000, &NMD::BALRSC           , &NMD::BALRSC_cond      ,
21639        0x0                 },        /* BALRSC */
21640 };
21641
21642
21643 NMD::Pool NMD::P_J[16] = {
21644     { call_instruction    , 0                   , 0   , 32,
21645        0xfc00f000, 0x48000000, &NMD::JALRC_32_        , 0,
21646        0x0                 },        /* JALRC[32] */
21647     { call_instruction    , 0                   , 0   , 32,
21648        0xfc00f000, 0x48001000, &NMD::JALRC_HB         , 0,
21649        0x0                 },        /* JALRC.HB */
21650     { reserved_block      , 0                   , 0   , 32,
21651        0xfc00f000, 0x48002000, 0                      , 0,
21652        0x0                 },        /* P.J~*(2) */
21653     { reserved_block      , 0                   , 0   , 32,
21654        0xfc00f000, 0x48003000, 0                      , 0,
21655        0x0                 },        /* P.J~*(3) */
21656     { reserved_block      , 0                   , 0   , 32,
21657        0xfc00f000, 0x48004000, 0                      , 0,
21658        0x0                 },        /* P.J~*(4) */
21659     { reserved_block      , 0                   , 0   , 32,
21660        0xfc00f000, 0x48005000, 0                      , 0,
21661        0x0                 },        /* P.J~*(5) */
21662     { reserved_block      , 0                   , 0   , 32,
21663        0xfc00f000, 0x48006000, 0                      , 0,
21664        0x0                 },        /* P.J~*(6) */
21665     { reserved_block      , 0                   , 0   , 32,
21666        0xfc00f000, 0x48007000, 0                      , 0,
21667        0x0                 },        /* P.J~*(7) */
21668     { pool                , P_BALRSC            , 2   , 32,
21669        0xfc00f000, 0x48008000, 0                      , 0,
21670        0x0                 },        /* P.BALRSC */
21671     { reserved_block      , 0                   , 0   , 32,
21672        0xfc00f000, 0x48009000, 0                      , 0,
21673        0x0                 },        /* P.J~*(9) */
21674     { reserved_block      , 0                   , 0   , 32,
21675        0xfc00f000, 0x4800a000, 0                      , 0,
21676        0x0                 },        /* P.J~*(10) */
21677     { reserved_block      , 0                   , 0   , 32,
21678        0xfc00f000, 0x4800b000, 0                      , 0,
21679        0x0                 },        /* P.J~*(11) */
21680     { reserved_block      , 0                   , 0   , 32,
21681        0xfc00f000, 0x4800c000, 0                      , 0,
21682        0x0                 },        /* P.J~*(12) */
21683     { reserved_block      , 0                   , 0   , 32,
21684        0xfc00f000, 0x4800d000, 0                      , 0,
21685        0x0                 },        /* P.J~*(13) */
21686     { reserved_block      , 0                   , 0   , 32,
21687        0xfc00f000, 0x4800e000, 0                      , 0,
21688        0x0                 },        /* P.J~*(14) */
21689     { reserved_block      , 0                   , 0   , 32,
21690        0xfc00f000, 0x4800f000, 0                      , 0,
21691        0x0                 },        /* P.J~*(15) */
21692 };
21693
21694
21695 NMD::Pool NMD::P_BR3A[32] = {
21696     { branch_instruction  , 0                   , 0   , 32,
21697        0xfc1fc000, 0x88004000, &NMD::BC1EQZC          , 0,
21698        CP1_                },        /* BC1EQZC */
21699     { branch_instruction  , 0                   , 0   , 32,
21700        0xfc1fc000, 0x88014000, &NMD::BC1NEZC          , 0,
21701        CP1_                },        /* BC1NEZC */
21702     { branch_instruction  , 0                   , 0   , 32,
21703        0xfc1fc000, 0x88024000, &NMD::BC2EQZC          , 0,
21704        CP2_                },        /* BC2EQZC */
21705     { branch_instruction  , 0                   , 0   , 32,
21706        0xfc1fc000, 0x88034000, &NMD::BC2NEZC          , 0,
21707        CP2_                },        /* BC2NEZC */
21708     { branch_instruction  , 0                   , 0   , 32,
21709        0xfc1fc000, 0x88044000, &NMD::BPOSGE32C        , 0,
21710        DSP_                },        /* BPOSGE32C */
21711     { reserved_block      , 0                   , 0   , 32,
21712        0xfc1fc000, 0x88054000, 0                      , 0,
21713        0x0                 },        /* P.BR3A~*(5) */
21714     { reserved_block      , 0                   , 0   , 32,
21715        0xfc1fc000, 0x88064000, 0                      , 0,
21716        0x0                 },        /* P.BR3A~*(6) */
21717     { reserved_block      , 0                   , 0   , 32,
21718        0xfc1fc000, 0x88074000, 0                      , 0,
21719        0x0                 },        /* P.BR3A~*(7) */
21720     { reserved_block      , 0                   , 0   , 32,
21721        0xfc1fc000, 0x88084000, 0                      , 0,
21722        0x0                 },        /* P.BR3A~*(8) */
21723     { reserved_block      , 0                   , 0   , 32,
21724        0xfc1fc000, 0x88094000, 0                      , 0,
21725        0x0                 },        /* P.BR3A~*(9) */
21726     { reserved_block      , 0                   , 0   , 32,
21727        0xfc1fc000, 0x880a4000, 0                      , 0,
21728        0x0                 },        /* P.BR3A~*(10) */
21729     { reserved_block      , 0                   , 0   , 32,
21730        0xfc1fc000, 0x880b4000, 0                      , 0,
21731        0x0                 },        /* P.BR3A~*(11) */
21732     { reserved_block      , 0                   , 0   , 32,
21733        0xfc1fc000, 0x880c4000, 0                      , 0,
21734        0x0                 },        /* P.BR3A~*(12) */
21735     { reserved_block      , 0                   , 0   , 32,
21736        0xfc1fc000, 0x880d4000, 0                      , 0,
21737        0x0                 },        /* P.BR3A~*(13) */
21738     { reserved_block      , 0                   , 0   , 32,
21739        0xfc1fc000, 0x880e4000, 0                      , 0,
21740        0x0                 },        /* P.BR3A~*(14) */
21741     { reserved_block      , 0                   , 0   , 32,
21742        0xfc1fc000, 0x880f4000, 0                      , 0,
21743        0x0                 },        /* P.BR3A~*(15) */
21744     { reserved_block      , 0                   , 0   , 32,
21745        0xfc1fc000, 0x88104000, 0                      , 0,
21746        0x0                 },        /* P.BR3A~*(16) */
21747     { reserved_block      , 0                   , 0   , 32,
21748        0xfc1fc000, 0x88114000, 0                      , 0,
21749        0x0                 },        /* P.BR3A~*(17) */
21750     { reserved_block      , 0                   , 0   , 32,
21751        0xfc1fc000, 0x88124000, 0                      , 0,
21752        0x0                 },        /* P.BR3A~*(18) */
21753     { reserved_block      , 0                   , 0   , 32,
21754        0xfc1fc000, 0x88134000, 0                      , 0,
21755        0x0                 },        /* P.BR3A~*(19) */
21756     { reserved_block      , 0                   , 0   , 32,
21757        0xfc1fc000, 0x88144000, 0                      , 0,
21758        0x0                 },        /* P.BR3A~*(20) */
21759     { reserved_block      , 0                   , 0   , 32,
21760        0xfc1fc000, 0x88154000, 0                      , 0,
21761        0x0                 },        /* P.BR3A~*(21) */
21762     { reserved_block      , 0                   , 0   , 32,
21763        0xfc1fc000, 0x88164000, 0                      , 0,
21764        0x0                 },        /* P.BR3A~*(22) */
21765     { reserved_block      , 0                   , 0   , 32,
21766        0xfc1fc000, 0x88174000, 0                      , 0,
21767        0x0                 },        /* P.BR3A~*(23) */
21768     { reserved_block      , 0                   , 0   , 32,
21769        0xfc1fc000, 0x88184000, 0                      , 0,
21770        0x0                 },        /* P.BR3A~*(24) */
21771     { reserved_block      , 0                   , 0   , 32,
21772        0xfc1fc000, 0x88194000, 0                      , 0,
21773        0x0                 },        /* P.BR3A~*(25) */
21774     { reserved_block      , 0                   , 0   , 32,
21775        0xfc1fc000, 0x881a4000, 0                      , 0,
21776        0x0                 },        /* P.BR3A~*(26) */
21777     { reserved_block      , 0                   , 0   , 32,
21778        0xfc1fc000, 0x881b4000, 0                      , 0,
21779        0x0                 },        /* P.BR3A~*(27) */
21780     { reserved_block      , 0                   , 0   , 32,
21781        0xfc1fc000, 0x881c4000, 0                      , 0,
21782        0x0                 },        /* P.BR3A~*(28) */
21783     { reserved_block      , 0                   , 0   , 32,
21784        0xfc1fc000, 0x881d4000, 0                      , 0,
21785        0x0                 },        /* P.BR3A~*(29) */
21786     { reserved_block      , 0                   , 0   , 32,
21787        0xfc1fc000, 0x881e4000, 0                      , 0,
21788        0x0                 },        /* P.BR3A~*(30) */
21789     { reserved_block      , 0                   , 0   , 32,
21790        0xfc1fc000, 0x881f4000, 0                      , 0,
21791        0x0                 },        /* P.BR3A~*(31) */
21792 };
21793
21794
21795 NMD::Pool NMD::P_BR1[4] = {
21796     { branch_instruction  , 0                   , 0   , 32,
21797        0xfc00c000, 0x88000000, &NMD::BEQC_32_         , 0,
21798        0x0                 },        /* BEQC[32] */
21799     { pool                , P_BR3A              , 32  , 32,
21800        0xfc00c000, 0x88004000, 0                      , 0,
21801        0x0                 },        /* P.BR3A */
21802     { branch_instruction  , 0                   , 0   , 32,
21803        0xfc00c000, 0x88008000, &NMD::BGEC             , 0,
21804        0x0                 },        /* BGEC */
21805     { branch_instruction  , 0                   , 0   , 32,
21806        0xfc00c000, 0x8800c000, &NMD::BGEUC            , 0,
21807        0x0                 },        /* BGEUC */
21808 };
21809
21810
21811 NMD::Pool NMD::P_BR2[4] = {
21812     { branch_instruction  , 0                   , 0   , 32,
21813        0xfc00c000, 0xa8000000, &NMD::BNEC_32_         , 0,
21814        0x0                 },        /* BNEC[32] */
21815     { reserved_block      , 0                   , 0   , 32,
21816        0xfc00c000, 0xa8004000, 0                      , 0,
21817        0x0                 },        /* P.BR2~*(1) */
21818     { branch_instruction  , 0                   , 0   , 32,
21819        0xfc00c000, 0xa8008000, &NMD::BLTC             , 0,
21820        0x0                 },        /* BLTC */
21821     { branch_instruction  , 0                   , 0   , 32,
21822        0xfc00c000, 0xa800c000, &NMD::BLTUC            , 0,
21823        0x0                 },        /* BLTUC */
21824 };
21825
21826
21827 NMD::Pool NMD::P_BRI[8] = {
21828     { branch_instruction  , 0                   , 0   , 32,
21829        0xfc1c0000, 0xc8000000, &NMD::BEQIC            , 0,
21830        0x0                 },        /* BEQIC */
21831     { branch_instruction  , 0                   , 0   , 32,
21832        0xfc1c0000, 0xc8040000, &NMD::BBEQZC           , 0,
21833        XMMS_               },        /* BBEQZC */
21834     { branch_instruction  , 0                   , 0   , 32,
21835        0xfc1c0000, 0xc8080000, &NMD::BGEIC            , 0,
21836        0x0                 },        /* BGEIC */
21837     { branch_instruction  , 0                   , 0   , 32,
21838        0xfc1c0000, 0xc80c0000, &NMD::BGEIUC           , 0,
21839        0x0                 },        /* BGEIUC */
21840     { branch_instruction  , 0                   , 0   , 32,
21841        0xfc1c0000, 0xc8100000, &NMD::BNEIC            , 0,
21842        0x0                 },        /* BNEIC */
21843     { branch_instruction  , 0                   , 0   , 32,
21844        0xfc1c0000, 0xc8140000, &NMD::BBNEZC           , 0,
21845        XMMS_               },        /* BBNEZC */
21846     { branch_instruction  , 0                   , 0   , 32,
21847        0xfc1c0000, 0xc8180000, &NMD::BLTIC            , 0,
21848        0x0                 },        /* BLTIC */
21849     { branch_instruction  , 0                   , 0   , 32,
21850        0xfc1c0000, 0xc81c0000, &NMD::BLTIUC           , 0,
21851        0x0                 },        /* BLTIUC */
21852 };
21853
21854
21855 NMD::Pool NMD::P32[32] = {
21856     { pool                , P_ADDIU             , 2   , 32,
21857        0xfc000000, 0x00000000, 0                      , 0,
21858        0x0                 },        /* P.ADDIU */
21859     { pool                , P32A                , 8   , 32,
21860        0xfc000000, 0x20000000, 0                      , 0,
21861        0x0                 },        /* P32A */
21862     { pool                , P_GP_W              , 4   , 32,
21863        0xfc000000, 0x40000000, 0                      , 0,
21864        0x0                 },        /* P.GP.W */
21865     { pool                , POOL48I             , 32  , 48,
21866        0xfc0000000000ull, 0x600000000000ull, 0                      , 0,
21867        0x0                 },        /* POOL48I */
21868     { pool                , P_U12               , 16  , 32,
21869        0xfc000000, 0x80000000, 0                      , 0,
21870        0x0                 },        /* P.U12 */
21871     { pool                , POOL32F             , 8   , 32,
21872        0xfc000000, 0xa0000000, 0                      , 0,
21873        CP1_                },        /* POOL32F */
21874     { pool                , POOL32S             , 8   , 32,
21875        0xfc000000, 0xc0000000, 0                      , 0,
21876        0x0                 },        /* POOL32S */
21877     { pool                , P_LUI               , 2   , 32,
21878        0xfc000000, 0xe0000000, 0                      , 0,
21879        0x0                 },        /* P.LUI */
21880     { instruction         , 0                   , 0   , 32,
21881        0xfc000000, 0x04000000, &NMD::ADDIUPC_32_      , 0,
21882        0x0                 },        /* ADDIUPC[32] */
21883     { reserved_block      , 0                   , 0   , 32,
21884        0xfc000000, 0x24000000, 0                      , 0,
21885        0x0                 },        /* P32~*(5) */
21886     { pool                , P_GP_BH             , 8   , 32,
21887        0xfc000000, 0x44000000, 0                      , 0,
21888        0x0                 },        /* P.GP.BH */
21889     { reserved_block      , 0                   , 0   , 32,
21890        0xfc000000, 0x64000000, 0                      , 0,
21891        0x0                 },        /* P32~*(13) */
21892     { pool                , P_LS_U12            , 16  , 32,
21893        0xfc000000, 0x84000000, 0                      , 0,
21894        0x0                 },        /* P.LS.U12 */
21895     { pool                , P_LS_S9             , 8   , 32,
21896        0xfc000000, 0xa4000000, 0                      , 0,
21897        0x0                 },        /* P.LS.S9 */
21898     { reserved_block      , 0                   , 0   , 32,
21899        0xfc000000, 0xc4000000, 0                      , 0,
21900        0x0                 },        /* P32~*(25) */
21901     { reserved_block      , 0                   , 0   , 32,
21902        0xfc000000, 0xe4000000, 0                      , 0,
21903        0x0                 },        /* P32~*(29) */
21904     { call_instruction    , 0                   , 0   , 32,
21905        0xfc000000, 0x08000000, &NMD::MOVE_BALC        , 0,
21906        XMMS_               },        /* MOVE.BALC */
21907     { pool                , P_BAL               , 2   , 32,
21908        0xfc000000, 0x28000000, 0                      , 0,
21909        0x0                 },        /* P.BAL */
21910     { pool                , P_J                 , 16  , 32,
21911        0xfc000000, 0x48000000, 0                      , 0,
21912        0x0                 },        /* P.J */
21913     { reserved_block      , 0                   , 0   , 32,
21914        0xfc000000, 0x68000000, 0                      , 0,
21915        0x0                 },        /* P32~*(14) */
21916     { pool                , P_BR1               , 4   , 32,
21917        0xfc000000, 0x88000000, 0                      , 0,
21918        0x0                 },        /* P.BR1 */
21919     { pool                , P_BR2               , 4   , 32,
21920        0xfc000000, 0xa8000000, 0                      , 0,
21921        0x0                 },        /* P.BR2 */
21922     { pool                , P_BRI               , 8   , 32,
21923        0xfc000000, 0xc8000000, 0                      , 0,
21924        0x0                 },        /* P.BRI */
21925     { reserved_block      , 0                   , 0   , 32,
21926        0xfc000000, 0xe8000000, 0                      , 0,
21927        0x0                 },        /* P32~*(30) */
21928     { reserved_block      , 0                   , 0   , 32,
21929        0xfc000000, 0x0c000000, 0                      , 0,
21930        0x0                 },        /* P32~*(3) */
21931     { reserved_block      , 0                   , 0   , 32,
21932        0xfc000000, 0x2c000000, 0                      , 0,
21933        0x0                 },        /* P32~*(7) */
21934     { reserved_block      , 0                   , 0   , 32,
21935        0xfc000000, 0x4c000000, 0                      , 0,
21936        0x0                 },        /* P32~*(11) */
21937     { reserved_block      , 0                   , 0   , 32,
21938        0xfc000000, 0x6c000000, 0                      , 0,
21939        0x0                 },        /* P32~*(15) */
21940     { reserved_block      , 0                   , 0   , 32,
21941        0xfc000000, 0x8c000000, 0                      , 0,
21942        0x0                 },        /* P32~*(19) */
21943     { reserved_block      , 0                   , 0   , 32,
21944        0xfc000000, 0xac000000, 0                      , 0,
21945        0x0                 },        /* P32~*(23) */
21946     { reserved_block      , 0                   , 0   , 32,
21947        0xfc000000, 0xcc000000, 0                      , 0,
21948        0x0                 },        /* P32~*(27) */
21949     { reserved_block      , 0                   , 0   , 32,
21950        0xfc000000, 0xec000000, 0                      , 0,
21951        0x0                 },        /* P32~*(31) */
21952 };
21953
21954
21955 NMD::Pool NMD::P16_SYSCALL[2] = {
21956     { instruction         , 0                   , 0   , 16,
21957        0xfffc    , 0x1008    , &NMD::SYSCALL_16_      , 0,
21958        0x0                 },        /* SYSCALL[16] */
21959     { instruction         , 0                   , 0   , 16,
21960        0xfffc    , 0x100c    , &NMD::HYPCALL_16_      , 0,
21961        CP0_ | VZ_          },        /* HYPCALL[16] */
21962 };
21963
21964
21965 NMD::Pool NMD::P16_RI[4] = {
21966     { reserved_block      , 0                   , 0   , 16,
21967        0xfff8    , 0x1000    , 0                      , 0,
21968        0x0                 },        /* P16.RI~*(0) */
21969     { pool                , P16_SYSCALL         , 2   , 16,
21970        0xfff8    , 0x1008    , 0                      , 0,
21971        0x0                 },        /* P16.SYSCALL */
21972     { instruction         , 0                   , 0   , 16,
21973        0xfff8    , 0x1010    , &NMD::BREAK_16_        , 0,
21974        0x0                 },        /* BREAK[16] */
21975     { instruction         , 0                   , 0   , 16,
21976        0xfff8    , 0x1018    , &NMD::SDBBP_16_        , 0,
21977        EJTAG_              },        /* SDBBP[16] */
21978 };
21979
21980
21981 NMD::Pool NMD::P16_MV[2] = {
21982     { pool                , P16_RI              , 4   , 16,
21983        0xffe0    , 0x1000    , 0                      , 0,
21984        0x0                 },        /* P16.RI */
21985     { instruction         , 0                   , 0   , 16,
21986        0xfc00    , 0x1000    , &NMD::MOVE             , &NMD::MOVE_cond        ,
21987        0x0                 },        /* MOVE */
21988 };
21989
21990
21991 NMD::Pool NMD::P16_SHIFT[2] = {
21992     { instruction         , 0                   , 0   , 16,
21993        0xfc08    , 0x3000    , &NMD::SLL_16_          , 0,
21994        0x0                 },        /* SLL[16] */
21995     { instruction         , 0                   , 0   , 16,
21996        0xfc08    , 0x3008    , &NMD::SRL_16_          , 0,
21997        0x0                 },        /* SRL[16] */
21998 };
21999
22000
22001 NMD::Pool NMD::POOL16C_00[4] = {
22002     { instruction         , 0                   , 0   , 16,
22003        0xfc0f    , 0x5000    , &NMD::NOT_16_          , 0,
22004        0x0                 },        /* NOT[16] */
22005     { instruction         , 0                   , 0   , 16,
22006        0xfc0f    , 0x5004    , &NMD::XOR_16_          , 0,
22007        0x0                 },        /* XOR[16] */
22008     { instruction         , 0                   , 0   , 16,
22009        0xfc0f    , 0x5008    , &NMD::AND_16_          , 0,
22010        0x0                 },        /* AND[16] */
22011     { instruction         , 0                   , 0   , 16,
22012        0xfc0f    , 0x500c    , &NMD::OR_16_           , 0,
22013        0x0                 },        /* OR[16] */
22014 };
22015
22016
22017 NMD::Pool NMD::POOL16C_0[2] = {
22018     { pool                , POOL16C_00          , 4   , 16,
22019        0xfc03    , 0x5000    , 0                      , 0,
22020        0x0                 },        /* POOL16C_00 */
22021     { reserved_block      , 0                   , 0   , 16,
22022        0xfc03    , 0x5002    , 0                      , 0,
22023        0x0                 },        /* POOL16C_0~*(1) */
22024 };
22025
22026
22027 NMD::Pool NMD::P16C[2] = {
22028     { pool                , POOL16C_0           , 2   , 16,
22029        0xfc01    , 0x5000    , 0                      , 0,
22030        0x0                 },        /* POOL16C_0 */
22031     { instruction         , 0                   , 0   , 16,
22032        0xfc01    , 0x5001    , &NMD::LWXS_16_         , 0,
22033        0x0                 },        /* LWXS[16] */
22034 };
22035
22036
22037 NMD::Pool NMD::P16_A1[2] = {
22038     { reserved_block      , 0                   , 0   , 16,
22039        0xfc40    , 0x7000    , 0                      , 0,
22040        0x0                 },        /* P16.A1~*(0) */
22041     { instruction         , 0                   , 0   , 16,
22042        0xfc40    , 0x7040    , &NMD::ADDIU_R1_SP_     , 0,
22043        0x0                 },        /* ADDIU[R1.SP] */
22044 };
22045
22046
22047 NMD::Pool NMD::P_ADDIU_RS5_[2] = {
22048     { instruction         , 0                   , 0   , 16,
22049        0xffe8    , 0x9008    , &NMD::NOP_16_          , 0,
22050        0x0                 },        /* NOP[16] */
22051     { instruction         , 0                   , 0   , 16,
22052        0xfc08    , 0x9008    , &NMD::ADDIU_RS5_       , &NMD::ADDIU_RS5__cond  ,
22053        0x0                 },        /* ADDIU[RS5] */
22054 };
22055
22056
22057 NMD::Pool NMD::P16_A2[2] = {
22058     { instruction         , 0                   , 0   , 16,
22059        0xfc08    , 0x9000    , &NMD::ADDIU_R2_        , 0,
22060        0x0                 },        /* ADDIU[R2] */
22061     { pool                , P_ADDIU_RS5_        , 2   , 16,
22062        0xfc08    , 0x9008    , 0                      , 0,
22063        0x0                 },        /* P.ADDIU[RS5] */
22064 };
22065
22066
22067 NMD::Pool NMD::P16_ADDU[2] = {
22068     { instruction         , 0                   , 0   , 16,
22069        0xfc01    , 0xb000    , &NMD::ADDU_16_         , 0,
22070        0x0                 },        /* ADDU[16] */
22071     { instruction         , 0                   , 0   , 16,
22072        0xfc01    , 0xb001    , &NMD::SUBU_16_         , 0,
22073        0x0                 },        /* SUBU[16] */
22074 };
22075
22076
22077 NMD::Pool NMD::P16_JRC[2] = {
22078     { branch_instruction  , 0                   , 0   , 16,
22079        0xfc1f    , 0xd800    , &NMD::JRC              , 0,
22080        0x0                 },        /* JRC */
22081     { call_instruction    , 0                   , 0   , 16,
22082        0xfc1f    , 0xd810    , &NMD::JALRC_16_        , 0,
22083        0x0                 },        /* JALRC[16] */
22084 };
22085
22086
22087 NMD::Pool NMD::P16_BR1[2] = {
22088     { branch_instruction  , 0                   , 0   , 16,
22089        0xfc00    , 0xd800    , &NMD::BEQC_16_         , &NMD::BEQC_16__cond    ,
22090        XMMS_               },        /* BEQC[16] */
22091     { branch_instruction  , 0                   , 0   , 16,
22092        0xfc00    , 0xd800    , &NMD::BNEC_16_         , &NMD::BNEC_16__cond    ,
22093        XMMS_               },        /* BNEC[16] */
22094 };
22095
22096
22097 NMD::Pool NMD::P16_BR[2] = {
22098     { pool                , P16_JRC             , 2   , 16,
22099        0xfc0f    , 0xd800    , 0                      , 0,
22100        0x0                 },        /* P16.JRC */
22101     { pool                , P16_BR1             , 2   , 16,
22102        0xfc00    , 0xd800    , 0                      , &NMD::P16_BR1_cond     ,
22103        0x0                 },        /* P16.BR1 */
22104 };
22105
22106
22107 NMD::Pool NMD::P16_SR[2] = {
22108     { instruction         , 0                   , 0   , 16,
22109        0xfd00    , 0x1c00    , &NMD::SAVE_16_         , 0,
22110        0x0                 },        /* SAVE[16] */
22111     { return_instruction  , 0                   , 0   , 16,
22112        0xfd00    , 0x1d00    , &NMD::RESTORE_JRC_16_  , 0,
22113        0x0                 },        /* RESTORE.JRC[16] */
22114 };
22115
22116
22117 NMD::Pool NMD::P16_4X4[4] = {
22118     { instruction         , 0                   , 0   , 16,
22119        0xfd08    , 0x3c00    , &NMD::ADDU_4X4_        , 0,
22120        XMMS_               },        /* ADDU[4X4] */
22121     { instruction         , 0                   , 0   , 16,
22122        0xfd08    , 0x3c08    , &NMD::MUL_4X4_         , 0,
22123        XMMS_               },        /* MUL[4X4] */
22124     { reserved_block      , 0                   , 0   , 16,
22125        0xfd08    , 0x3d00    , 0                      , 0,
22126        0x0                 },        /* P16.4X4~*(2) */
22127     { reserved_block      , 0                   , 0   , 16,
22128        0xfd08    , 0x3d08    , 0                      , 0,
22129        0x0                 },        /* P16.4X4~*(3) */
22130 };
22131
22132
22133 NMD::Pool NMD::P16_LB[4] = {
22134     { instruction         , 0                   , 0   , 16,
22135        0xfc0c    , 0x5c00    , &NMD::LB_16_           , 0,
22136        0x0                 },        /* LB[16] */
22137     { instruction         , 0                   , 0   , 16,
22138        0xfc0c    , 0x5c04    , &NMD::SB_16_           , 0,
22139        0x0                 },        /* SB[16] */
22140     { instruction         , 0                   , 0   , 16,
22141        0xfc0c    , 0x5c08    , &NMD::LBU_16_          , 0,
22142        0x0                 },        /* LBU[16] */
22143     { reserved_block      , 0                   , 0   , 16,
22144        0xfc0c    , 0x5c0c    , 0                      , 0,
22145        0x0                 },        /* P16.LB~*(3) */
22146 };
22147
22148
22149 NMD::Pool NMD::P16_LH[4] = {
22150     { instruction         , 0                   , 0   , 16,
22151        0xfc09    , 0x7c00    , &NMD::LH_16_           , 0,
22152        0x0                 },        /* LH[16] */
22153     { instruction         , 0                   , 0   , 16,
22154        0xfc09    , 0x7c01    , &NMD::SH_16_           , 0,
22155        0x0                 },        /* SH[16] */
22156     { instruction         , 0                   , 0   , 16,
22157        0xfc09    , 0x7c08    , &NMD::LHU_16_          , 0,
22158        0x0                 },        /* LHU[16] */
22159     { reserved_block      , 0                   , 0   , 16,
22160        0xfc09    , 0x7c09    , 0                      , 0,
22161        0x0                 },        /* P16.LH~*(3) */
22162 };
22163
22164
22165 NMD::Pool NMD::P16[32] = {
22166     { pool                , P16_MV              , 2   , 16,
22167        0xfc00    , 0x1000    , 0                      , 0,
22168        0x0                 },        /* P16.MV */
22169     { pool                , P16_SHIFT           , 2   , 16,
22170        0xfc00    , 0x3000    , 0                      , 0,
22171        0x0                 },        /* P16.SHIFT */
22172     { pool                , P16C                , 2   , 16,
22173        0xfc00    , 0x5000    , 0                      , 0,
22174        0x0                 },        /* P16C */
22175     { pool                , P16_A1              , 2   , 16,
22176        0xfc00    , 0x7000    , 0                      , 0,
22177        0x0                 },        /* P16.A1 */
22178     { pool                , P16_A2              , 2   , 16,
22179        0xfc00    , 0x9000    , 0                      , 0,
22180        0x0                 },        /* P16.A2 */
22181     { pool                , P16_ADDU            , 2   , 16,
22182        0xfc00    , 0xb000    , 0                      , 0,
22183        0x0                 },        /* P16.ADDU */
22184     { instruction         , 0                   , 0   , 16,
22185        0xfc00    , 0xd000    , &NMD::LI_16_           , 0,
22186        0x0                 },        /* LI[16] */
22187     { instruction         , 0                   , 0   , 16,
22188        0xfc00    , 0xf000    , &NMD::ANDI_16_         , 0,
22189        0x0                 },        /* ANDI[16] */
22190     { instruction         , 0                   , 0   , 16,
22191        0xfc00    , 0x1400    , &NMD::LW_16_           , 0,
22192        0x0                 },        /* LW[16] */
22193     { instruction         , 0                   , 0   , 16,
22194        0xfc00    , 0x3400    , &NMD::LW_SP_           , 0,
22195        0x0                 },        /* LW[SP] */
22196     { instruction         , 0                   , 0   , 16,
22197        0xfc00    , 0x5400    , &NMD::LW_GP16_         , 0,
22198        0x0                 },        /* LW[GP16] */
22199     { instruction         , 0                   , 0   , 16,
22200        0xfc00    , 0x7400    , &NMD::LW_4X4_          , 0,
22201        XMMS_               },        /* LW[4X4] */
22202     { instruction         , 0                   , 0   , 16,
22203        0xfc00    , 0x9400    , &NMD::SW_16_           , 0,
22204        0x0                 },        /* SW[16] */
22205     { instruction         , 0                   , 0   , 16,
22206        0xfc00    , 0xb400    , &NMD::SW_SP_           , 0,
22207        0x0                 },        /* SW[SP] */
22208     { instruction         , 0                   , 0   , 16,
22209        0xfc00    , 0xd400    , &NMD::SW_GP16_         , 0,
22210        0x0                 },        /* SW[GP16] */
22211     { instruction         , 0                   , 0   , 16,
22212        0xfc00    , 0xf400    , &NMD::SW_4X4_          , 0,
22213        XMMS_               },        /* SW[4X4] */
22214     { branch_instruction  , 0                   , 0   , 16,
22215        0xfc00    , 0x1800    , &NMD::BC_16_           , 0,
22216        0x0                 },        /* BC[16] */
22217     { call_instruction    , 0                   , 0   , 16,
22218        0xfc00    , 0x3800    , &NMD::BALC_16_         , 0,
22219        0x0                 },        /* BALC[16] */
22220     { reserved_block      , 0                   , 0   , 16,
22221        0xfc00    , 0x5800    , 0                      , 0,
22222        0x0                 },        /* P16~*(10) */
22223     { reserved_block      , 0                   , 0   , 16,
22224        0xfc00    , 0x7800    , 0                      , 0,
22225        0x0                 },        /* P16~*(14) */
22226     { branch_instruction  , 0                   , 0   , 16,
22227        0xfc00    , 0x9800    , &NMD::BEQZC_16_        , 0,
22228        0x0                 },        /* BEQZC[16] */
22229     { branch_instruction  , 0                   , 0   , 16,
22230        0xfc00    , 0xb800    , &NMD::BNEZC_16_        , 0,
22231        0x0                 },        /* BNEZC[16] */
22232     { pool                , P16_BR              , 2   , 16,
22233        0xfc00    , 0xd800    , 0                      , 0,
22234        0x0                 },        /* P16.BR */
22235     { reserved_block      , 0                   , 0   , 16,
22236        0xfc00    , 0xf800    , 0                      , 0,
22237        0x0                 },        /* P16~*(30) */
22238     { pool                , P16_SR              , 2   , 16,
22239        0xfc00    , 0x1c00    , 0                      , 0,
22240        0x0                 },        /* P16.SR */
22241     { pool                , P16_4X4             , 4   , 16,
22242        0xfc00    , 0x3c00    , 0                      , 0,
22243        0x0                 },        /* P16.4X4 */
22244     { pool                , P16_LB              , 4   , 16,
22245        0xfc00    , 0x5c00    , 0                      , 0,
22246        0x0                 },        /* P16.LB */
22247     { pool                , P16_LH              , 4   , 16,
22248        0xfc00    , 0x7c00    , 0                      , 0,
22249        0x0                 },        /* P16.LH */
22250     { reserved_block      , 0                   , 0   , 16,
22251        0xfc00    , 0x9c00    , 0                      , 0,
22252        0x0                 },        /* P16~*(19) */
22253     { instruction         , 0                   , 0   , 16,
22254        0xfc00    , 0xbc00    , &NMD::MOVEP            , 0,
22255        XMMS_               },        /* MOVEP */
22256     { reserved_block      , 0                   , 0   , 16,
22257        0xfc00    , 0xdc00    , 0                      , 0,
22258        0x0                 },        /* P16~*(27) */
22259     { instruction         , 0                   , 0   , 16,
22260        0xfc00    , 0xfc00    , &NMD::MOVEP_REV_       , 0,
22261        XMMS_               },        /* MOVEP[REV] */
22262 };
22263
22264
22265 NMD::Pool NMD::MAJOR[2] = {
22266     { pool                , P32                 , 32  , 32,
22267        0x10000000, 0x00000000, 0                      , 0,
22268        0x0                 },        /* P32 */
22269     { pool                , P16                 , 32  , 16,
22270        0x1000    , 0x1000    , 0                      , 0,
22271        0x0                 },        /* P16 */
22272 };