hw/arm/aspeed.c

   1 /*
   2  * OpenPOWER Palmetto BMC
   3  *
   4  * Andrew Jeffery <[email protected]>
   5  *
   6  * Copyright 2016 IBM Corp.
   7  *
   8  * This code is licensed under the GPL version 2 or later.  See
   9  * the COPYING file in the top-level directory.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qapi/error.h"
  14 #include "hw/arm/boot.h"
  15 #include "hw/arm/aspeed.h"
  16 #include "hw/arm/aspeed_soc.h"
  17 #include "hw/i2c/i2c_mux_pca954x.h"
  18 #include "hw/i2c/smbus_eeprom.h"
  19 #include "hw/misc/pca9552.h"
  20 #include "hw/sensor/tmp105.h"
  21 #include "hw/misc/led.h"
  22 #include "hw/qdev-properties.h"
  23 #include "sysemu/block-backend.h"
  24 #include "sysemu/reset.h"
  25 #include "hw/loader.h"
  26 #include "qemu/error-report.h"
  27 #include "qemu/units.h"
  28 #include "hw/qdev-clock.h"
  29
  30 static struct arm_boot_info aspeed_board_binfo = {
  31     .board_id = -1, /* device-tree-only board */
  32 };
  33
  34 struct AspeedMachineState {
  35     /* Private */
  36     MachineState parent_obj;
  37     /* Public */
  38
  39     AspeedSoCState soc;
  40     MemoryRegion ram_container;
  41     MemoryRegion max_ram;
  42     bool mmio_exec;
  43     char *fmc_model;
  44     char *spi_model;
  45 };
  46
  47 /* Palmetto hardware value: 0x120CE416 */
  48 #define PALMETTO_BMC_HW_STRAP1 (                                        \
  49         SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
  50         SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
  51         SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
  52         SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
  53         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
  54         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
  55         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
  56         SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
  57         SCU_HW_STRAP_SPI_WIDTH |                                        \
  58         SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
  59         SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
  60
  61 /* TODO: Find the actual hardware value */
  62 #define SUPERMICROX11_BMC_HW_STRAP1 (                                   \
  63         SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) |               \
  64         SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) |                           \
  65         SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
  66         SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
  67         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
  68         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
  69         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
  70         SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
  71         SCU_HW_STRAP_SPI_WIDTH |                                        \
  72         SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
  73         SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
  74
  75 /* AST2500 evb hardware value: 0xF100C2E6 */
  76 #define AST2500_EVB_HW_STRAP1 ((                                        \
  77         AST2500_HW_STRAP1_DEFAULTS |                                    \
  78         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  79         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
  80         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
  81         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
  82         SCU_HW_STRAP_MAC1_RGMII |                                       \
  83         SCU_HW_STRAP_MAC0_RGMII) &                                      \
  84         ~SCU_HW_STRAP_2ND_BOOT_WDT)
  85
  86 /* Romulus hardware value: 0xF10AD206 */
  87 #define ROMULUS_BMC_HW_STRAP1 (                                         \
  88         AST2500_HW_STRAP1_DEFAULTS |                                    \
  89         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  90         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
  91         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
  92         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
  93         SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
  94         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
  95
  96 /* Sonorapass hardware value: 0xF100D216 */
  97 #define SONORAPASS_BMC_HW_STRAP1 (                                      \
  98         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  99         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
 100         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
 101         SCU_AST2500_HW_STRAP_RESERVED28 |                               \
 102         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
 103         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
 104         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
 105         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) |                \
 106         SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) |     \
 107         SCU_HW_STRAP_VGA_BIOS_ROM |                                     \
 108         SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
 109         SCU_AST2500_HW_STRAP_RESERVED1)
 110
 111 #define G220A_BMC_HW_STRAP1 (                                      \
 112         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
 113         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
 114         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
 115         SCU_AST2500_HW_STRAP_RESERVED28 |                               \
 116         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
 117         SCU_HW_STRAP_2ND_BOOT_WDT |                                     \
 118         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
 119         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
 120         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) |                \
 121         SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) |     \
 122         SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) |                       \
 123         SCU_AST2500_HW_STRAP_RESERVED1)
 124
 125 /* FP5280G2 hardware value: 0XF100D286 */
 126 #define FP5280G2_BMC_HW_STRAP1 (                                      \
 127         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
 128         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
 129         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
 130         SCU_AST2500_HW_STRAP_RESERVED28 |                               \
 131         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
 132         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
 133         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
 134         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) |                \
 135         SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) |     \
 136         SCU_HW_STRAP_MAC1_RGMII |                                       \
 137         SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
 138         SCU_AST2500_HW_STRAP_RESERVED1)
 139
 140 /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
 141 #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
 142
 143 /* Quanta-Q71l hardware value */
 144 #define QUANTA_Q71L_BMC_HW_STRAP1 (                                     \
 145         SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) |               \
 146         SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
 147         SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
 148         SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) |       \
 149         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
 150         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) |          \
 151         SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
 152         SCU_HW_STRAP_SPI_WIDTH |                                        \
 153         SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) |                        \
 154         SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
 155
 156 /* AST2600 evb hardware value */
 157 #define AST2600_EVB_HW_STRAP1 0x000000C0
 158 #define AST2600_EVB_HW_STRAP2 0x00000003
 159
 160 /* Tacoma hardware value */
 161 #define TACOMA_BMC_HW_STRAP1  0x00000000
 162 #define TACOMA_BMC_HW_STRAP2  0x00000040
 163
 164 /* Rainier hardware value: (QEMU prototype) */
 165 #define RAINIER_BMC_HW_STRAP1 0x00422016
 166 #define RAINIER_BMC_HW_STRAP2 0x80000848
 167
 168 /* Fuji hardware value */
 169 #define FUJI_BMC_HW_STRAP1    0x00000000
 170 #define FUJI_BMC_HW_STRAP2    0x00000000
 171
 172 /* Bletchley hardware value */
 173 /* TODO: Leave same as EVB for now. */
 174 #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
 175 #define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
 176
 177 #define AST_SMP_MAILBOX_BASE            0x1e6e2180
 178 #define AST_SMP_MBOX_FIELD_ENTRY        (AST_SMP_MAILBOX_BASE + 0x0)
 179 #define AST_SMP_MBOX_FIELD_GOSIGN       (AST_SMP_MAILBOX_BASE + 0x4)
 180 #define AST_SMP_MBOX_FIELD_READY        (AST_SMP_MAILBOX_BASE + 0x8)
 181 #define AST_SMP_MBOX_FIELD_POLLINSN     (AST_SMP_MAILBOX_BASE + 0xc)
 182 #define AST_SMP_MBOX_CODE               (AST_SMP_MAILBOX_BASE + 0x10)
 183 #define AST_SMP_MBOX_GOSIGN             0xabbaab00
 184
 185 static void aspeed_write_smpboot(ARMCPU *cpu,
 186                                  const struct arm_boot_info *info)
 187 {
 188     static const uint32_t poll_mailbox_ready[] = {
 189         /*
 190          * r2 = per-cpu go sign value
 191          * r1 = AST_SMP_MBOX_FIELD_ENTRY
 192          * r0 = AST_SMP_MBOX_FIELD_GOSIGN
 193          */
 194         0xee100fb0,  /* mrc     p15, 0, r0, c0, c0, 5 */
 195         0xe21000ff,  /* ands    r0, r0, #255          */
 196         0xe59f201c,  /* ldr     r2, [pc, #28]         */
 197         0xe1822000,  /* orr     r2, r2, r0            */
 198
 199         0xe59f1018,  /* ldr     r1, [pc, #24]         */
 200         0xe59f0018,  /* ldr     r0, [pc, #24]         */
 201
 202         0xe320f002,  /* wfe                           */
 203         0xe5904000,  /* ldr     r4, [r0]              */
 204         0xe1520004,  /* cmp     r2, r4                */
 205         0x1afffffb,  /* bne     <wfe>                 */
 206         0xe591f000,  /* ldr     pc, [r1]              */
 207         AST_SMP_MBOX_GOSIGN,
 208         AST_SMP_MBOX_FIELD_ENTRY,
 209         AST_SMP_MBOX_FIELD_GOSIGN,
 210     };
 211
 212     rom_add_blob_fixed("aspeed.smpboot", poll_mailbox_ready,
 213                        sizeof(poll_mailbox_ready),
 214                        info->smp_loader_start);
 215 }
 216
 217 static void aspeed_reset_secondary(ARMCPU *cpu,
 218                                    const struct arm_boot_info *info)
 219 {
 220     AddressSpace *as = arm_boot_address_space(cpu, info);
 221     CPUState *cs = CPU(cpu);
 222
 223     /* info->smp_bootreg_addr */
 224     address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0,
 225                                MEMTXATTRS_UNSPECIFIED, NULL);
 226     cpu_set_pc(cs, info->smp_loader_start);
 227 }
 228
 229 #define FIRMWARE_ADDR 0x0
 230
 231 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
 232                            Error **errp)
 233 {
 234     BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 235     g_autofree void *storage = NULL;
 236     int64_t size;
 237
 238     /* The block backend size should have already been 'validated' by
 239      * the creation of the m25p80 object.
 240      */
 241     size = blk_getlength(blk);
 242     if (size <= 0) {
 243         error_setg(errp, "failed to get flash size");
 244         return;
 245     }
 246
 247     if (rom_size > size) {
 248         rom_size = size;
 249     }
 250
 251     storage = g_malloc0(rom_size);
 252     if (blk_pread(blk, 0, storage, rom_size) < 0) {
 253         error_setg(errp, "failed to read the initial flash content");
 254         return;
 255     }
 256
 257     rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
 258 }
 259
 260 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
 261                                       unsigned int count, int unit0)
 262 {
 263     int i;
 264
 265     if (!flashtype) {
 266         return;
 267     }
 268
 269     for (i = 0; i < count; ++i) {
 270         DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i);
 271         qemu_irq cs_line;
 272         DeviceState *dev;
 273
 274         dev = qdev_new(flashtype);
 275         if (dinfo) {
 276             qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
 277         }
 278         qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal);
 279
 280         cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
 281         sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
 282     }
 283 }
 284
 285 static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
 286 {
 287         DeviceState *card;
 288
 289         if (!dinfo) {
 290             return;
 291         }
 292         card = qdev_new(TYPE_SD_CARD);
 293         qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
 294                                 &error_fatal);
 295         qdev_realize_and_unref(card,
 296                                qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
 297                                &error_fatal);
 298 }
 299
 300 static void aspeed_machine_init(MachineState *machine)
 301 {
 302     AspeedMachineState *bmc = ASPEED_MACHINE(machine);
 303     AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
 304     AspeedSoCClass *sc;
 305     DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
 306     int i;
 307     NICInfo *nd = &nd_table[0];
 308
 309     object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
 310
 311     sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
 312
 313     /*
 314      * This will error out if the RAM size is not supported by the
 315      * memory controller of the SoC.
 316      */
 317     object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size,
 318                              &error_fatal);
 319
 320     for (i = 0; i < sc->macs_num; i++) {
 321         if ((amc->macs_mask & (1 << i)) && nd->used) {
 322             qemu_check_nic_model(nd, TYPE_FTGMAC100);
 323             qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd);
 324             nd++;
 325         }
 326     }
 327
 328     object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,
 329                             &error_abort);
 330     object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
 331                             &error_abort);
 332     object_property_set_link(OBJECT(&bmc->soc), "dram",
 333                              OBJECT(machine->ram), &error_abort);
 334     if (machine->kernel_filename) {
 335         /*
 336          * When booting with a -kernel command line there is no u-boot
 337          * that runs to unlock the SCU. In this case set the default to
 338          * be unlocked as the kernel expects
 339          */
 340         object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",
 341                                 ASPEED_SCU_PROT_KEY, &error_abort);
 342     }
 343     qdev_prop_set_uint32(DEVICE(&bmc->soc), "uart-default",
 344                          amc->uart_default);
 345     qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
 346
 347     aspeed_board_init_flashes(&bmc->soc.fmc,
 348                               bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
 349                               amc->num_cs, 0);
 350     aspeed_board_init_flashes(&bmc->soc.spi[0],
 351                               bmc->spi_model ? bmc->spi_model : amc->spi_model,
 352                               1, amc->num_cs);
 353
 354     /* Install first FMC flash content as a boot rom. */
 355     if (drive0) {
 356         AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
 357         MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
 358         uint64_t size = memory_region_size(&fl->mmio);
 359
 360         /*
 361          * create a ROM region using the default mapping window size of
 362          * the flash module. The window size is 64MB for the AST2400
 363          * SoC and 128MB for the AST2500 SoC, which is twice as big as
 364          * needed by the flash modules of the Aspeed machines.
 365          */
 366         if (ASPEED_MACHINE(machine)->mmio_exec) {
 367             memory_region_init_alias(boot_rom, NULL, "aspeed.boot_rom",
 368                                      &fl->mmio, 0, size);
 369             memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
 370                                         boot_rom);
 371         } else {
 372             memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
 373                                    size, &error_abort);
 374             memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
 375                                         boot_rom);
 376             write_boot_rom(drive0, FIRMWARE_ADDR, size, &error_abort);
 377         }
 378     }
 379
 380     if (machine->kernel_filename && sc->num_cpus > 1) {
 381         /* With no u-boot we must set up a boot stub for the secondary CPU */
 382         MemoryRegion *smpboot = g_new(MemoryRegion, 1);
 383         memory_region_init_ram(smpboot, NULL, "aspeed.smpboot",
 384                                0x80, &error_abort);
 385         memory_region_add_subregion(get_system_memory(),
 386                                     AST_SMP_MAILBOX_BASE, smpboot);
 387
 388         aspeed_board_binfo.write_secondary_boot = aspeed_write_smpboot;
 389         aspeed_board_binfo.secondary_cpu_reset_hook = aspeed_reset_secondary;
 390         aspeed_board_binfo.smp_loader_start = AST_SMP_MBOX_CODE;
 391     }
 392
 393     aspeed_board_binfo.ram_size = machine->ram_size;
 394     aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM];
 395
 396     if (amc->i2c_init) {
 397         amc->i2c_init(bmc);
 398     }
 399
 400     for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
 401         sdhci_attach_drive(&bmc->soc.sdhci.slots[i],
 402                            drive_get(IF_SD, 0, i));
 403     }
 404
 405     if (bmc->soc.emmc.num_slots) {
 406         sdhci_attach_drive(&bmc->soc.emmc.slots[0],
 407                            drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));
 408     }
 409
 410     arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
 411 }
 412
 413 static void at24c_eeprom_init(I2CBus *bus, uint8_t addr, uint32_t rsize)
 414 {
 415     I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr);
 416     DeviceState *dev = DEVICE(i2c_dev);
 417
 418     qdev_prop_set_uint32(dev, "rom-size", rsize);
 419     i2c_slave_realize_and_unref(i2c_dev, bus, &error_abort);
 420 }
 421
 422 static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
 423 {
 424     AspeedSoCState *soc = &bmc->soc;
 425     DeviceState *dev;
 426     uint8_t *eeprom_buf = g_malloc0(32 * 1024);
 427
 428     /* The palmetto platform expects a ds3231 RTC but a ds1338 is
 429      * enough to provide basic RTC features. Alarms will be missing */
 430     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
 431
 432     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
 433                           eeprom_buf);
 434
 435     /* add a TMP423 temperature sensor */
 436     dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
 437                                          "tmp423", 0x4c));
 438     object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
 439     object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
 440     object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
 441     object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
 442 }
 443
 444 static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
 445 {
 446     AspeedSoCState *soc = &bmc->soc;
 447
 448     /*
 449      * The quanta-q71l platform expects tmp75s which are compatible with
 450      * tmp105s.
 451      */
 452     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
 453     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
 454     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
 455
 456     /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
 457     /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
 458     /* TODO: Add Memory Riser i2c mux and eeproms. */
 459
 460     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
 461     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
 462
 463     /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
 464
 465     /* i2c-7 */
 466     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
 467     /*        - i2c@0: pmbus@59 */
 468     /*        - i2c@1: pmbus@58 */
 469     /*        - i2c@2: pmbus@58 */
 470     /*        - i2c@3: pmbus@59 */
 471
 472     /* TODO: i2c-7: Add PDB FRU eeprom@52 */
 473     /* TODO: i2c-8: Add BMC FRU eeprom@50 */
 474 }
 475
 476 static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
 477 {
 478     AspeedSoCState *soc = &bmc->soc;
 479     uint8_t *eeprom_buf = g_malloc0(8 * 1024);
 480
 481     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
 482                           eeprom_buf);
 483
 484     /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
 485     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
 486                      TYPE_TMP105, 0x4d);
 487 }
 488
 489 static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
 490 {
 491     AspeedSoCState *soc = &bmc->soc;
 492     uint8_t *eeprom_buf = g_malloc0(8 * 1024);
 493
 494     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
 495                           eeprom_buf);
 496
 497     /* LM75 is compatible with TMP105 driver */
 498     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
 499                      TYPE_TMP105, 0x4d);
 500 }
 501
 502 static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
 503 {
 504     AspeedSoCState *soc = &bmc->soc;
 505
 506     /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
 507      * good enough */
 508     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
 509 }
 510
 511 static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
 512 {
 513     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
 514                             TYPE_PCA9552, addr);
 515 }
 516
 517 static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
 518 {
 519     AspeedSoCState *soc = &bmc->soc;
 520
 521     /* bus 2 : */
 522     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
 523     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49);
 524     /* bus 2 : pca9546 @ 0x73 */
 525
 526     /* bus 3 : pca9548 @ 0x70 */
 527
 528     /* bus 4 : */
 529     uint8_t *eeprom4_54 = g_malloc0(8 * 1024);
 530     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
 531                           eeprom4_54);
 532     /* PCA9539 @ 0x76, but PCA9552 is compatible */
 533     create_pca9552(soc, 4, 0x76);
 534     /* PCA9539 @ 0x77, but PCA9552 is compatible */
 535     create_pca9552(soc, 4, 0x77);
 536
 537     /* bus 6 : */
 538     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
 539     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49);
 540     /* bus 6 : pca9546 @ 0x73 */
 541
 542     /* bus 8 : */
 543     uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
 544     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
 545                           eeprom8_56);
 546     create_pca9552(soc, 8, 0x60);
 547     create_pca9552(soc, 8, 0x61);
 548     /* bus 8 : adc128d818 @ 0x1d */
 549     /* bus 8 : adc128d818 @ 0x1f */
 550
 551     /*
 552      * bus 13 : pca9548 @ 0x71
 553      *      - channel 3:
 554      *          - tmm421 @ 0x4c
 555      *          - tmp421 @ 0x4e
 556      *          - tmp421 @ 0x4f
 557      */
 558
 559 }
 560
 561 static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
 562 {
 563     static const struct {
 564         unsigned gpio_id;
 565         LEDColor color;
 566         const char *description;
 567         bool gpio_polarity;
 568     } pca1_leds[] = {
 569         {13, LED_COLOR_GREEN, "front-fault-4",  GPIO_POLARITY_ACTIVE_LOW},
 570         {14, LED_COLOR_GREEN, "front-power-3",  GPIO_POLARITY_ACTIVE_LOW},
 571         {15, LED_COLOR_GREEN, "front-id-5",     GPIO_POLARITY_ACTIVE_LOW},
 572     };
 573     AspeedSoCState *soc = &bmc->soc;
 574     uint8_t *eeprom_buf = g_malloc0(8 * 1024);
 575     DeviceState *dev;
 576     LEDState *led;
 577
 578     /* Bus 3: TODO bmp280@77 */
 579     /* Bus 3: TODO max31785@52 */
 580     dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
 581     qdev_prop_set_string(dev, "description", "pca1");
 582     i2c_slave_realize_and_unref(I2C_SLAVE(dev),
 583                                 aspeed_i2c_get_bus(&soc->i2c, 3),
 584                                 &error_fatal);
 585
 586     for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) {
 587         led = led_create_simple(OBJECT(bmc),
 588                                 pca1_leds[i].gpio_polarity,
 589                                 pca1_leds[i].color,
 590                                 pca1_leds[i].description);
 591         qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id,
 592                               qdev_get_gpio_in(DEVICE(led), 0));
 593     }
 594     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76);
 595     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c);
 596     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c);
 597
 598     /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
 599     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105,
 600                      0x4a);
 601
 602     /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
 603      * good enough */
 604     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
 605
 606     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51,
 607                           eeprom_buf);
 608     dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
 609     qdev_prop_set_string(dev, "description", "pca0");
 610     i2c_slave_realize_and_unref(I2C_SLAVE(dev),
 611                                 aspeed_i2c_get_bus(&soc->i2c, 11),
 612                                 &error_fatal);
 613     /* Bus 11: TODO ucd90160@64 */
 614 }
 615
 616 static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
 617 {
 618     AspeedSoCState *soc = &bmc->soc;
 619     DeviceState *dev;
 620
 621     dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
 622                                          "emc1413", 0x4c));
 623     object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
 624     object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
 625     object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
 626
 627     dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12),
 628                                          "emc1413", 0x4c));
 629     object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
 630     object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
 631     object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
 632
 633     dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13),
 634                                          "emc1413", 0x4c));
 635     object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
 636     object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
 637     object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
 638
 639     static uint8_t eeprom_buf[2 * 1024] = {
 640             0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe,
 641             0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65,
 642             0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32,
 643             0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42,
 644             0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45,
 645             0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1,
 646             0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
 647     };
 648     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
 649                           eeprom_buf);
 650 }
 651
 652 static void aspeed_eeprom_init(I2CBus *bus, uint8_t addr, uint32_t rsize)
 653 {
 654     I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr);
 655     DeviceState *dev = DEVICE(i2c_dev);
 656
 657     qdev_prop_set_uint32(dev, "rom-size", rsize);
 658     i2c_slave_realize_and_unref(i2c_dev, bus, &error_abort);
 659 }
 660
 661 static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
 662 {
 663     AspeedSoCState *soc = &bmc->soc;
 664     I2CSlave *i2c_mux;
 665
 666     /* The at24c256 */
 667     at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768);
 668
 669     /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */
 670     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
 671                      0x48);
 672     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
 673                      0x49);
 674
 675     i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
 676                      "pca9546", 0x70);
 677     /* It expects a TMP112 but a TMP105 is compatible */
 678     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105,
 679                      0x4a);
 680
 681     /* It expects a ds3232 but a ds1338 is good enough */
 682     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
 683
 684     /* It expects a pca9555 but a pca9552 is compatible */
 685     create_pca9552(soc, 8, 0x30);
 686 }
 687
 688 static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
 689 {
 690     AspeedSoCState *soc = &bmc->soc;
 691     I2CSlave *i2c_mux;
 692
 693     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
 694
 695     create_pca9552(soc, 3, 0x61);
 696
 697     /* The rainier expects a TMP275 but a TMP105 is compatible */
 698     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
 699                      0x48);
 700     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
 701                      0x49);
 702     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
 703                      0x4a);
 704     i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4),
 705                                       "pca9546", 0x70);
 706     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
 707     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
 708     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
 709     create_pca9552(soc, 4, 0x60);
 710
 711     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
 712                      0x48);
 713     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
 714                      0x49);
 715     create_pca9552(soc, 5, 0x60);
 716     create_pca9552(soc, 5, 0x61);
 717     i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
 718                                       "pca9546", 0x70);
 719     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
 720     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
 721
 722     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
 723                      0x48);
 724     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
 725                      0x4a);
 726     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
 727                      0x4b);
 728     i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6),
 729                                       "pca9546", 0x70);
 730     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
 731     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
 732     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
 733     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
 734
 735     create_pca9552(soc, 7, 0x30);
 736     create_pca9552(soc, 7, 0x31);
 737     create_pca9552(soc, 7, 0x32);
 738     create_pca9552(soc, 7, 0x33);
 739     /* Bus 7: TODO max31785@52 */
 740     create_pca9552(soc, 7, 0x60);
 741     create_pca9552(soc, 7, 0x61);
 742     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
 743     /* Bus 7: TODO si7021-a20@20 */
 744     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
 745                      0x48);
 746     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB);
 747     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB);
 748
 749     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
 750                      0x48);
 751     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
 752                      0x4a);
 753     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, 64 * KiB);
 754     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 64 * KiB);
 755     create_pca9552(soc, 8, 0x60);
 756     create_pca9552(soc, 8, 0x61);
 757     /* Bus 8: ucd90320@11 */
 758     /* Bus 8: ucd90320@b */
 759     /* Bus 8: ucd90320@c */
 760
 761     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c);
 762     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d);
 763     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB);
 764
 765     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c);
 766     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d);
 767     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB);
 768
 769     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
 770                      0x48);
 771     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
 772                      0x49);
 773     i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11),
 774                                       "pca9546", 0x70);
 775     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
 776     aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
 777     create_pca9552(soc, 11, 0x60);
 778
 779
 780     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
 781     create_pca9552(soc, 13, 0x60);
 782
 783     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
 784     create_pca9552(soc, 14, 0x60);
 785
 786     aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
 787     create_pca9552(soc, 15, 0x60);
 788 }
 789
 790 static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
 791                                  I2CBus **channels)
 792 {
 793     I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr);
 794     for (int i = 0; i < 8; i++) {
 795         channels[i] = pca954x_i2c_get_bus(mux, i);
 796     }
 797 }
 798
 799 #define TYPE_LM75 TYPE_TMP105
 800 #define TYPE_TMP75 TYPE_TMP105
 801 #define TYPE_TMP422 "tmp422"
 802
 803 static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
 804 {
 805     AspeedSoCState *soc = &bmc->soc;
 806     I2CBus *i2c[144] = {};
 807
 808     for (int i = 0; i < 16; i++) {
 809         i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
 810     }
 811     I2CBus *i2c180 = i2c[2];
 812     I2CBus *i2c480 = i2c[8];
 813     I2CBus *i2c600 = i2c[11];
 814
 815     get_pca9548_channels(i2c180, 0x70, &i2c[16]);
 816     get_pca9548_channels(i2c480, 0x70, &i2c[24]);
 817     /* NOTE: The device tree skips [32, 40) in the alias numbering */
 818     get_pca9548_channels(i2c600, 0x77, &i2c[40]);
 819     get_pca9548_channels(i2c[24], 0x71, &i2c[48]);
 820     get_pca9548_channels(i2c[25], 0x72, &i2c[56]);
 821     get_pca9548_channels(i2c[26], 0x76, &i2c[64]);
 822     get_pca9548_channels(i2c[27], 0x76, &i2c[72]);
 823     for (int i = 0; i < 8; i++) {
 824         get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]);
 825     }
 826
 827     i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c);
 828     i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d);
 829
 830     aspeed_eeprom_init(i2c[19], 0x52, 64 * KiB);
 831     aspeed_eeprom_init(i2c[20], 0x50, 2 * KiB);
 832     aspeed_eeprom_init(i2c[22], 0x52, 2 * KiB);
 833
 834     i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48);
 835     i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49);
 836     i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a);
 837     i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c);
 838
 839     aspeed_eeprom_init(i2c[8], 0x51, 64 * KiB);
 840     i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a);
 841
 842     i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c);
 843     aspeed_eeprom_init(i2c[50], 0x52, 64 * KiB);
 844     i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48);
 845     i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49);
 846
 847     i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48);
 848     i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49);
 849
 850     aspeed_eeprom_init(i2c[65], 0x53, 64 * KiB);
 851     i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49);
 852     i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48);
 853     aspeed_eeprom_init(i2c[68], 0x52, 64 * KiB);
 854     aspeed_eeprom_init(i2c[69], 0x52, 64 * KiB);
 855     aspeed_eeprom_init(i2c[70], 0x52, 64 * KiB);
 856     aspeed_eeprom_init(i2c[71], 0x52, 64 * KiB);
 857
 858     aspeed_eeprom_init(i2c[73], 0x53, 64 * KiB);
 859     i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49);
 860     i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48);
 861     aspeed_eeprom_init(i2c[76], 0x52, 64 * KiB);
 862     aspeed_eeprom_init(i2c[77], 0x52, 64 * KiB);
 863     aspeed_eeprom_init(i2c[78], 0x52, 64 * KiB);
 864     aspeed_eeprom_init(i2c[79], 0x52, 64 * KiB);
 865     aspeed_eeprom_init(i2c[28], 0x50, 2 * KiB);
 866
 867     for (int i = 0; i < 8; i++) {
 868         aspeed_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB);
 869         i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48);
 870         i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b);
 871         i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a);
 872     }
 873 }
 874
 875 #define TYPE_TMP421 "tmp421"
 876
 877 static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
 878 {
 879     AspeedSoCState *soc = &bmc->soc;
 880     I2CBus *i2c[13] = {};
 881     for (int i = 0; i < 13; i++) {
 882         if ((i == 8) || (i == 11)) {
 883             continue;
 884         }
 885         i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
 886     }
 887
 888     /* Bus 0 - 5 all have the same config. */
 889     for (int i = 0; i < 6; i++) {
 890         /* Missing model: ti,ina230 @ 0x45 */
 891         /* Missing model: mps,mp5023 @ 0x40 */
 892         i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f);
 893         /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */
 894         i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76);
 895         i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67);
 896         /* Missing model: fsc,fusb302 @ 0x22 */
 897     }
 898
 899     /* Bus 6 */
 900     at24c_eeprom_init(i2c[6], 0x56, 65536);
 901     /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */
 902     i2c_slave_create_simple(i2c[6], "ds1338", 0x51);
 903
 904
 905     /* Bus 7 */
 906     at24c_eeprom_init(i2c[7], 0x54, 65536);
 907
 908     /* Bus 9 */
 909     i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f);
 910
 911     /* Bus 10 */
 912     i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f);
 913     /* Missing model: ti,hdc1080 @ 0x40 */
 914     i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67);
 915
 916     /* Bus 12 */
 917     /* Missing model: adi,adm1278 @ 0x11 */
 918     i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c);
 919     i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d);
 920     i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
 921 }
 922
 923 static void fby35_i2c_init(AspeedMachineState *bmc)
 924 {
 925     AspeedSoCState *soc = &bmc->soc;
 926     I2CBus *i2c[16];
 927
 928     for (int i = 0; i < 16; i++) {
 929         i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
 930     }
 931
 932     i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
 933     i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
 934     /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */
 935     i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
 936     i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
 937     i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
 938
 939     aspeed_eeprom_init(i2c[4], 0x51, 128 * KiB);
 940     aspeed_eeprom_init(i2c[6], 0x51, 128 * KiB);
 941     aspeed_eeprom_init(i2c[8], 0x50, 32 * KiB);
 942     aspeed_eeprom_init(i2c[11], 0x51, 128 * KiB);
 943     aspeed_eeprom_init(i2c[11], 0x54, 128 * KiB);
 944
 945     /*
 946      * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on
 947      * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on
 948      * each.
 949      */
 950 }
 951
 952 static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
 953 {
 954     return ASPEED_MACHINE(obj)->mmio_exec;
 955 }
 956
 957 static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp)
 958 {
 959     ASPEED_MACHINE(obj)->mmio_exec = value;
 960 }
 961
 962 static void aspeed_machine_instance_init(Object *obj)
 963 {
 964     ASPEED_MACHINE(obj)->mmio_exec = false;
 965 }
 966
 967 static char *aspeed_get_fmc_model(Object *obj, Error **errp)
 968 {
 969     AspeedMachineState *bmc = ASPEED_MACHINE(obj);
 970     return g_strdup(bmc->fmc_model);
 971 }
 972
 973 static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp)
 974 {
 975     AspeedMachineState *bmc = ASPEED_MACHINE(obj);
 976
 977     g_free(bmc->fmc_model);
 978     bmc->fmc_model = g_strdup(value);
 979 }
 980
 981 static char *aspeed_get_spi_model(Object *obj, Error **errp)
 982 {
 983     AspeedMachineState *bmc = ASPEED_MACHINE(obj);
 984     return g_strdup(bmc->spi_model);
 985 }
 986
 987 static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp)
 988 {
 989     AspeedMachineState *bmc = ASPEED_MACHINE(obj);
 990
 991     g_free(bmc->spi_model);
 992     bmc->spi_model = g_strdup(value);
 993 }
 994
 995 static void aspeed_machine_class_props_init(ObjectClass *oc)
 996 {
 997     object_class_property_add_bool(oc, "execute-in-place",
 998                                    aspeed_get_mmio_exec,
 999                                    aspeed_set_mmio_exec);
1000     object_class_property_set_description(oc, "execute-in-place",
1001                            "boot directly from CE0 flash device");
1002
1003     object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model,
1004                                    aspeed_set_fmc_model);
1005     object_class_property_set_description(oc, "fmc-model",
1006                                           "Change the FMC Flash model");
1007     object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model,
1008                                    aspeed_set_spi_model);
1009     object_class_property_set_description(oc, "spi-model",
1010                                           "Change the SPI Flash model");
1011 }
1012
1013 static int aspeed_soc_num_cpus(const char *soc_name)
1014 {
1015    AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(soc_name));
1016    return sc->num_cpus;
1017 }
1018
1019 static void aspeed_machine_class_init(ObjectClass *oc, void *data)
1020 {
1021     MachineClass *mc = MACHINE_CLASS(oc);
1022     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1023
1024     mc->init = aspeed_machine_init;
1025     mc->no_floppy = 1;
1026     mc->no_cdrom = 1;
1027     mc->no_parallel = 1;
1028     mc->default_ram_id = "ram";
1029     amc->macs_mask = ASPEED_MAC0_ON;
1030     amc->uart_default = ASPEED_DEV_UART5;
1031
1032     aspeed_machine_class_props_init(oc);
1033 }
1034
1035 static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
1036 {
1037     MachineClass *mc = MACHINE_CLASS(oc);
1038     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1039
1040     mc->desc       = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
1041     amc->soc_name  = "ast2400-a1";
1042     amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
1043     amc->fmc_model = "n25q256a";
1044     amc->spi_model = "mx25l25635e";
1045     amc->num_cs    = 1;
1046     amc->i2c_init  = palmetto_bmc_i2c_init;
1047     mc->default_ram_size       = 256 * MiB;
1048     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1049         aspeed_soc_num_cpus(amc->soc_name);
1050 };
1051
1052 static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data)
1053 {
1054     MachineClass *mc = MACHINE_CLASS(oc);
1055     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1056
1057     mc->desc       = "Quanta-Q71l BMC (ARM926EJ-S)";
1058     amc->soc_name  = "ast2400-a1";
1059     amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
1060     amc->fmc_model = "n25q256a";
1061     amc->spi_model = "mx25l25635e";
1062     amc->num_cs    = 1;
1063     amc->i2c_init  = quanta_q71l_bmc_i2c_init;
1064     mc->default_ram_size       = 128 * MiB;
1065     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1066         aspeed_soc_num_cpus(amc->soc_name);
1067 }
1068
1069 static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
1070                                                         void *data)
1071 {
1072     MachineClass *mc = MACHINE_CLASS(oc);
1073     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1074
1075     mc->desc       = "Supermicro X11 BMC (ARM926EJ-S)";
1076     amc->soc_name  = "ast2400-a1";
1077     amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
1078     amc->fmc_model = "mx25l25635e";
1079     amc->spi_model = "mx25l25635e";
1080     amc->num_cs    = 1;
1081     amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1082     amc->i2c_init  = palmetto_bmc_i2c_init;
1083     mc->default_ram_size = 256 * MiB;
1084 }
1085
1086 static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
1087 {
1088     MachineClass *mc = MACHINE_CLASS(oc);
1089     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1090
1091     mc->desc       = "Aspeed AST2500 EVB (ARM1176)";
1092     amc->soc_name  = "ast2500-a1";
1093     amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
1094     amc->fmc_model = "mx25l25635e";
1095     amc->spi_model = "mx25l25635e";
1096     amc->num_cs    = 1;
1097     amc->i2c_init  = ast2500_evb_i2c_init;
1098     mc->default_ram_size       = 512 * MiB;
1099     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1100         aspeed_soc_num_cpus(amc->soc_name);
1101 };
1102
1103 static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
1104 {
1105     MachineClass *mc = MACHINE_CLASS(oc);
1106     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1107
1108     mc->desc       = "OpenPOWER Romulus BMC (ARM1176)";
1109     amc->soc_name  = "ast2500-a1";
1110     amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
1111     amc->fmc_model = "n25q256a";
1112     amc->spi_model = "mx66l1g45g";
1113     amc->num_cs    = 2;
1114     amc->i2c_init  = romulus_bmc_i2c_init;
1115     mc->default_ram_size       = 512 * MiB;
1116     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1117         aspeed_soc_num_cpus(amc->soc_name);
1118 };
1119
1120 static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data)
1121 {
1122     MachineClass *mc = MACHINE_CLASS(oc);
1123     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1124
1125     mc->desc       = "OCP SonoraPass BMC (ARM1176)";
1126     amc->soc_name  = "ast2500-a1";
1127     amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1;
1128     amc->fmc_model = "mx66l1g45g";
1129     amc->spi_model = "mx66l1g45g";
1130     amc->num_cs    = 2;
1131     amc->i2c_init  = sonorapass_bmc_i2c_init;
1132     mc->default_ram_size       = 512 * MiB;
1133     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1134         aspeed_soc_num_cpus(amc->soc_name);
1135 };
1136
1137 static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
1138 {
1139     MachineClass *mc = MACHINE_CLASS(oc);
1140     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1141
1142     mc->desc       = "OpenPOWER Witherspoon BMC (ARM1176)";
1143     amc->soc_name  = "ast2500-a1";
1144     amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
1145     amc->fmc_model = "mx25l25635e";
1146     amc->spi_model = "mx66l1g45g";
1147     amc->num_cs    = 2;
1148     amc->i2c_init  = witherspoon_bmc_i2c_init;
1149     mc->default_ram_size = 512 * MiB;
1150     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1151         aspeed_soc_num_cpus(amc->soc_name);
1152 };
1153
1154 static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
1155 {
1156     MachineClass *mc = MACHINE_CLASS(oc);
1157     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1158
1159     mc->desc       = "Aspeed AST2600 EVB (Cortex-A7)";
1160     amc->soc_name  = "ast2600-a3";
1161     amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
1162     amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
1163     amc->fmc_model = "mx66u51235f";
1164     amc->spi_model = "mx66u51235f";
1165     amc->num_cs    = 1;
1166     amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
1167                      ASPEED_MAC3_ON;
1168     amc->i2c_init  = ast2600_evb_i2c_init;
1169     mc->default_ram_size = 1 * GiB;
1170     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1171         aspeed_soc_num_cpus(amc->soc_name);
1172 };
1173
1174 static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
1175 {
1176     MachineClass *mc = MACHINE_CLASS(oc);
1177     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1178
1179     mc->desc       = "OpenPOWER Tacoma BMC (Cortex-A7)";
1180     amc->soc_name  = "ast2600-a3";
1181     amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
1182     amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
1183     amc->fmc_model = "mx66l1g45g";
1184     amc->spi_model = "mx66l1g45g";
1185     amc->num_cs    = 2;
1186     amc->macs_mask  = ASPEED_MAC2_ON;
1187     amc->i2c_init  = witherspoon_bmc_i2c_init; /* Same board layout */
1188     mc->default_ram_size = 1 * GiB;
1189     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1190         aspeed_soc_num_cpus(amc->soc_name);
1191 };
1192
1193 static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data)
1194 {
1195     MachineClass *mc = MACHINE_CLASS(oc);
1196     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1197
1198     mc->desc       = "Bytedance G220A BMC (ARM1176)";
1199     amc->soc_name  = "ast2500-a1";
1200     amc->hw_strap1 = G220A_BMC_HW_STRAP1;
1201     amc->fmc_model = "n25q512a";
1202     amc->spi_model = "mx25l25635e";
1203     amc->num_cs    = 2;
1204     amc->macs_mask  = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1205     amc->i2c_init  = g220a_bmc_i2c_init;
1206     mc->default_ram_size = 1024 * MiB;
1207     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1208         aspeed_soc_num_cpus(amc->soc_name);
1209 };
1210
1211 static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data)
1212 {
1213     MachineClass *mc = MACHINE_CLASS(oc);
1214     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1215
1216     mc->desc       = "Inspur FP5280G2 BMC (ARM1176)";
1217     amc->soc_name  = "ast2500-a1";
1218     amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1;
1219     amc->fmc_model = "n25q512a";
1220     amc->spi_model = "mx25l25635e";
1221     amc->num_cs    = 2;
1222     amc->macs_mask  = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1223     amc->i2c_init  = fp5280g2_bmc_i2c_init;
1224     mc->default_ram_size = 512 * MiB;
1225     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1226         aspeed_soc_num_cpus(amc->soc_name);
1227 };
1228
1229 static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
1230 {
1231     MachineClass *mc = MACHINE_CLASS(oc);
1232     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1233
1234     mc->desc       = "IBM Rainier BMC (Cortex-A7)";
1235     amc->soc_name  = "ast2600-a3";
1236     amc->hw_strap1 = RAINIER_BMC_HW_STRAP1;
1237     amc->hw_strap2 = RAINIER_BMC_HW_STRAP2;
1238     amc->fmc_model = "mx66l1g45g";
1239     amc->spi_model = "mx66l1g45g";
1240     amc->num_cs    = 2;
1241     amc->macs_mask  = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1242     amc->i2c_init  = rainier_bmc_i2c_init;
1243     mc->default_ram_size = 1 * GiB;
1244     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1245         aspeed_soc_num_cpus(amc->soc_name);
1246 };
1247
1248 /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
1249 #if HOST_LONG_BITS == 32
1250 #define FUJI_BMC_RAM_SIZE (1 * GiB)
1251 #else
1252 #define FUJI_BMC_RAM_SIZE (2 * GiB)
1253 #endif
1254
1255 static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
1256 {
1257     MachineClass *mc = MACHINE_CLASS(oc);
1258     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1259
1260     mc->desc = "Facebook Fuji BMC (Cortex-A7)";
1261     amc->soc_name = "ast2600-a3";
1262     amc->hw_strap1 = FUJI_BMC_HW_STRAP1;
1263     amc->hw_strap2 = FUJI_BMC_HW_STRAP2;
1264     amc->fmc_model = "mx66l1g45g";
1265     amc->spi_model = "mx66l1g45g";
1266     amc->num_cs = 2;
1267     amc->macs_mask = ASPEED_MAC3_ON;
1268     amc->i2c_init = fuji_bmc_i2c_init;
1269     amc->uart_default = ASPEED_DEV_UART1;
1270     mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1271     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1272         aspeed_soc_num_cpus(amc->soc_name);
1273 };
1274
1275 static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
1276 {
1277     MachineClass *mc = MACHINE_CLASS(oc);
1278     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1279
1280     mc->desc       = "Facebook Bletchley BMC (Cortex-A7)";
1281     amc->soc_name  = "ast2600-a3";
1282     amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1;
1283     amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2;
1284     amc->fmc_model = "w25q01jvq";
1285     amc->spi_model = NULL;
1286     amc->num_cs    = 2;
1287     amc->macs_mask = ASPEED_MAC2_ON;
1288     amc->i2c_init  = bletchley_bmc_i2c_init;
1289     mc->default_ram_size = 512 * MiB;
1290     mc->default_cpus = mc->min_cpus = mc->max_cpus =
1291         aspeed_soc_num_cpus(amc->soc_name);
1292 }
1293
1294 static void fby35_reset(MachineState *state)
1295 {
1296     AspeedMachineState *bmc = ASPEED_MACHINE(state);
1297     AspeedGPIOState *gpio = &bmc->soc.gpio;
1298
1299     qemu_devices_reset();
1300
1301     /* Board ID */
1302     object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal);
1303     object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal);
1304     object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal);
1305     object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal);
1306 }
1307
1308 static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data)
1309 {
1310     MachineClass *mc = MACHINE_CLASS(oc);
1311     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1312
1313     mc->desc       = "Facebook fby35 BMC (Cortex-A7)";
1314     mc->reset      = fby35_reset;
1315     amc->fmc_model = "mx66l1g45g";
1316     amc->num_cs    = 2;
1317     amc->macs_mask = ASPEED_MAC3_ON;
1318     amc->i2c_init  = fby35_i2c_init;
1319     /* FIXME: Replace this macro with something more general */
1320     mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1321 }
1322
1323 #define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
1324 /* Main SYSCLK frequency in Hz (200MHz) */
1325 #define SYSCLK_FRQ 200000000ULL
1326
1327 static void aspeed_minibmc_machine_init(MachineState *machine)
1328 {
1329     AspeedMachineState *bmc = ASPEED_MACHINE(machine);
1330     AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
1331     Clock *sysclk;
1332
1333     sysclk = clock_new(OBJECT(machine), "SYSCLK");
1334     clock_set_hz(sysclk, SYSCLK_FRQ);
1335
1336     object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
1337     qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
1338
1339     qdev_prop_set_uint32(DEVICE(&bmc->soc), "uart-default",
1340                          amc->uart_default);
1341     qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
1342
1343     aspeed_board_init_flashes(&bmc->soc.fmc,
1344                               bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
1345                               amc->num_cs,
1346                               0);
1347
1348     aspeed_board_init_flashes(&bmc->soc.spi[0],
1349                               bmc->spi_model ? bmc->spi_model : amc->spi_model,
1350                               amc->num_cs, amc->num_cs);
1351
1352     aspeed_board_init_flashes(&bmc->soc.spi[1],
1353                               bmc->spi_model ? bmc->spi_model : amc->spi_model,
1354                               amc->num_cs, (amc->num_cs * 2));
1355
1356     if (amc->i2c_init) {
1357         amc->i2c_init(bmc);
1358     }
1359
1360     armv7m_load_kernel(ARM_CPU(first_cpu),
1361                        machine->kernel_filename,
1362                        AST1030_INTERNAL_FLASH_SIZE);
1363 }
1364
1365 static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
1366 {
1367     AspeedSoCState *soc = &bmc->soc;
1368
1369     /* U10 24C08 connects to SDA/SCL Groupt 1 by default */
1370     uint8_t *eeprom_buf = g_malloc0(32 * 1024);
1371     smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
1372
1373     /* U11 LM75 connects to SDA/SCL Group 2 by default */
1374     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
1375 }
1376
1377 static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
1378                                                           void *data)
1379 {
1380     MachineClass *mc = MACHINE_CLASS(oc);
1381     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1382
1383     mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)";
1384     amc->soc_name = "ast1030-a1";
1385     amc->hw_strap1 = 0;
1386     amc->hw_strap2 = 0;
1387     mc->init = aspeed_minibmc_machine_init;
1388     amc->i2c_init = ast1030_evb_i2c_init;
1389     mc->default_ram_size = 0;
1390     mc->default_cpus = mc->min_cpus = mc->max_cpus = 1;
1391     amc->fmc_model = "sst25vf032b";
1392     amc->spi_model = "sst25vf032b";
1393     amc->num_cs = 2;
1394     amc->macs_mask = 0;
1395 }
1396
1397 static const TypeInfo aspeed_machine_types[] = {
1398     {
1399         .name          = MACHINE_TYPE_NAME("palmetto-bmc"),
1400         .parent        = TYPE_ASPEED_MACHINE,
1401         .class_init    = aspeed_machine_palmetto_class_init,
1402     }, {
1403         .name          = MACHINE_TYPE_NAME("supermicrox11-bmc"),
1404         .parent        = TYPE_ASPEED_MACHINE,
1405         .class_init    = aspeed_machine_supermicrox11_bmc_class_init,
1406     }, {
1407         .name          = MACHINE_TYPE_NAME("ast2500-evb"),
1408         .parent        = TYPE_ASPEED_MACHINE,
1409         .class_init    = aspeed_machine_ast2500_evb_class_init,
1410     }, {
1411         .name          = MACHINE_TYPE_NAME("romulus-bmc"),
1412         .parent        = TYPE_ASPEED_MACHINE,
1413         .class_init    = aspeed_machine_romulus_class_init,
1414     }, {
1415         .name          = MACHINE_TYPE_NAME("sonorapass-bmc"),
1416         .parent        = TYPE_ASPEED_MACHINE,
1417         .class_init    = aspeed_machine_sonorapass_class_init,
1418     }, {
1419         .name          = MACHINE_TYPE_NAME("witherspoon-bmc"),
1420         .parent        = TYPE_ASPEED_MACHINE,
1421         .class_init    = aspeed_machine_witherspoon_class_init,
1422     }, {
1423         .name          = MACHINE_TYPE_NAME("ast2600-evb"),
1424         .parent        = TYPE_ASPEED_MACHINE,
1425         .class_init    = aspeed_machine_ast2600_evb_class_init,
1426     }, {
1427         .name          = MACHINE_TYPE_NAME("tacoma-bmc"),
1428         .parent        = TYPE_ASPEED_MACHINE,
1429         .class_init    = aspeed_machine_tacoma_class_init,
1430     }, {
1431         .name          = MACHINE_TYPE_NAME("g220a-bmc"),
1432         .parent        = TYPE_ASPEED_MACHINE,
1433         .class_init    = aspeed_machine_g220a_class_init,
1434     }, {
1435         .name          = MACHINE_TYPE_NAME("fp5280g2-bmc"),
1436         .parent        = TYPE_ASPEED_MACHINE,
1437         .class_init    = aspeed_machine_fp5280g2_class_init,
1438     }, {
1439         .name          = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
1440         .parent        = TYPE_ASPEED_MACHINE,
1441         .class_init    = aspeed_machine_quanta_q71l_class_init,
1442     }, {
1443         .name          = MACHINE_TYPE_NAME("rainier-bmc"),
1444         .parent        = TYPE_ASPEED_MACHINE,
1445         .class_init    = aspeed_machine_rainier_class_init,
1446     }, {
1447         .name          = MACHINE_TYPE_NAME("fuji-bmc"),
1448         .parent        = TYPE_ASPEED_MACHINE,
1449         .class_init    = aspeed_machine_fuji_class_init,
1450     }, {
1451         .name          = MACHINE_TYPE_NAME("bletchley-bmc"),
1452         .parent        = TYPE_ASPEED_MACHINE,
1453         .class_init    = aspeed_machine_bletchley_class_init,
1454     }, {
1455         .name          = MACHINE_TYPE_NAME("fby35-bmc"),
1456         .parent        = MACHINE_TYPE_NAME("ast2600-evb"),
1457         .class_init    = aspeed_machine_fby35_class_init,
1458     }, {
1459         .name           = MACHINE_TYPE_NAME("ast1030-evb"),
1460         .parent         = TYPE_ASPEED_MACHINE,
1461         .class_init     = aspeed_minibmc_machine_ast1030_evb_class_init,
1462     }, {
1463         .name          = TYPE_ASPEED_MACHINE,
1464         .parent        = TYPE_MACHINE,
1465         .instance_size = sizeof(AspeedMachineState),
1466         .instance_init = aspeed_machine_instance_init,
1467         .class_size    = sizeof(AspeedMachineClass),
1468         .class_init    = aspeed_machine_class_init,
1469         .abstract      = true,
1470     }
1471 };
1472
1473 DEFINE_TYPES(aspeed_machine_types)