hw/etraxfs_eth.c

   1 /*
   2  * QEMU ETRAX Ethernet Controller.
   3  *
   4  * Copyright (c) 2008 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <stdio.h>
  26 #include "hw.h"
  27 #include "net.h"
  28
  29 #include "etraxfs_dma.h"
  30
  31 #define D(x)
  32
  33 /*
  34  * The MDIO extensions in the TDK PHY model were reversed engineered from the
  35  * linux driver (PHYID and Diagnostics reg).
  36  * TODO: Add friendly names for the register nums.
  37  */
  38 struct qemu_phy
  39 {
  40         uint32_t regs[32];
  41
  42         unsigned int (*read)(struct qemu_phy *phy, unsigned int req);
  43         void (*write)(struct qemu_phy *phy, unsigned int req,
  44                       unsigned int data);
  45 };
  46
  47 static unsigned int tdk_read(struct qemu_phy *phy, unsigned int req)
  48 {
  49         int regnum;
  50         unsigned r = 0;
  51
  52         regnum = req & 0x1f;
  53
  54         switch (regnum) {
  55                 case 1:
  56                         /* MR1.  */
  57                         /* Speeds and modes.  */
  58                         r |= (1 << 13) | (1 << 14);
  59                         r |= (1 << 11) | (1 << 12);
  60                         r |= (1 << 5); /* Autoneg complete.  */
  61                         r |= (1 << 3); /* Autoneg able.  */
  62                         r |= (1 << 2); /* Link.  */
  63                         break;
  64                 case 5:
  65                         /* Link partner ability.
  66                            We are kind; always agree with whatever best mode
  67                            the guest advertises.  */
  68                         r = 1 << 14; /* Success.  */
  69                         /* Copy advertised modes.  */
  70                         r |= phy->regs[4] & (15 << 5);
  71                         /* Autoneg support.  */
  72                         r |= 1;
  73                         break;
  74                 case 18:
  75                 {
  76                         /* Diagnostics reg.  */
  77                         int duplex = 0;
  78                         int speed_100 = 0;
  79
  80                         /* Are we advertising 100 half or 100 duplex ? */
  81                         speed_100 = !!(phy->regs[4] & 0x180);
  82                         /* Are we advertising 10 duplex or 100 duplex ? */
  83                         duplex = !!(phy->regs[4] & 0x180);
  84                         r = (speed_100 << 10) | (duplex << 11);
  85                 }
  86                 break;
  87
  88                 default:
  89                         r = phy->regs[regnum];
  90                         break;
  91         }
  92         D(printf("\n%s %x = reg[%d]\n", __func__, r, regnum));
  93         return r;
  94 }
  95
  96 static void
  97 tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data)
  98 {
  99         int regnum;
 100
 101         regnum = req & 0x1f;
 102         D(printf("%s reg[%d] = %x\n", __func__, regnum, data));
 103         switch (regnum) {
 104                 default:
 105                         phy->regs[regnum] = data;
 106                         break;
 107         }
 108 }
 109
 110 static void
 111 tdk_init(struct qemu_phy *phy)
 112 {
 113         phy->regs[0] = 0x3100;
 114         /* PHY Id.  */
 115         phy->regs[2] = 0x0300;
 116         phy->regs[3] = 0xe400;
 117         /* Autonegotiation advertisement reg.  */
 118         phy->regs[4] = 0x01E1;
 119
 120         phy->read = tdk_read;
 121         phy->write = tdk_write;
 122 }
 123
 124 struct qemu_mdio
 125 {
 126         /* bus.  */
 127         int mdc;
 128         int mdio;
 129
 130         /* decoder.  */
 131         enum {
 132                 PREAMBLE,
 133                 SOF,
 134                 OPC,
 135                 ADDR,
 136                 REQ,
 137                 TURNAROUND,
 138                 DATA
 139         } state;
 140         unsigned int drive;
 141
 142         unsigned int cnt;
 143         unsigned int addr;
 144         unsigned int opc;
 145         unsigned int req;
 146         unsigned int data;
 147
 148         struct qemu_phy *devs[32];
 149 };
 150
 151 static void
 152 mdio_attach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
 153 {
 154         bus->devs[addr & 0x1f] = phy;
 155 }
 156
 157 static void
 158 mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
 159 {
 160         bus->devs[addr & 0x1f] = NULL;
 161 }
 162
 163 static void mdio_read_req(struct qemu_mdio *bus)
 164 {
 165         struct qemu_phy *phy;
 166
 167         phy = bus->devs[bus->addr];
 168         if (phy && phy->read)
 169                 bus->data = phy->read(phy, bus->req);
 170         else
 171                 bus->data = 0xffff;
 172 }
 173
 174 static void mdio_write_req(struct qemu_mdio *bus)
 175 {
 176         struct qemu_phy *phy;
 177
 178         phy = bus->devs[bus->addr];
 179         if (phy && phy->write)
 180                 phy->write(phy, bus->req, bus->data);
 181 }
 182
 183 static void mdio_cycle(struct qemu_mdio *bus)
 184 {
 185         bus->cnt++;
 186
 187         D(printf("mdc=%d mdio=%d state=%d cnt=%d drv=%d\n",
 188                 bus->mdc, bus->mdio, bus->state, bus->cnt, bus->drive));
 189 #if 0
 190         if (bus->mdc)
 191                 printf("%d", bus->mdio);
 192 #endif
 193         switch (bus->state)
 194         {
 195                 case PREAMBLE:
 196                         if (bus->mdc) {
 197                                 if (bus->cnt >= (32 * 2) && !bus->mdio) {
 198                                         bus->cnt = 0;
 199                                         bus->state = SOF;
 200                                         bus->data = 0;
 201                                 }
 202                         }
 203                         break;
 204                 case SOF:
 205                         if (bus->mdc) {
 206                                 if (bus->mdio != 1)
 207                                         printf("WARNING: no SOF\n");
 208                                 if (bus->cnt == 1*2) {
 209                                         bus->cnt = 0;
 210                                         bus->opc = 0;
 211                                         bus->state = OPC;
 212                                 }
 213                         }
 214                         break;
 215                 case OPC:
 216                         if (bus->mdc) {
 217                                 bus->opc <<= 1;
 218                                 bus->opc |= bus->mdio & 1;
 219                                 if (bus->cnt == 2*2) {
 220                                         bus->cnt = 0;
 221                                         bus->addr = 0;
 222                                         bus->state = ADDR;
 223                                 }
 224                         }
 225                         break;
 226                 case ADDR:
 227                         if (bus->mdc) {
 228                                 bus->addr <<= 1;
 229                                 bus->addr |= bus->mdio & 1;
 230
 231                                 if (bus->cnt == 5*2) {
 232                                         bus->cnt = 0;
 233                                         bus->req = 0;
 234                                         bus->state = REQ;
 235                                 }
 236                         }
 237                         break;
 238                 case REQ:
 239                         if (bus->mdc) {
 240                                 bus->req <<= 1;
 241                                 bus->req |= bus->mdio & 1;
 242                                 if (bus->cnt == 5*2) {
 243                                         bus->cnt = 0;
 244                                         bus->state = TURNAROUND;
 245                                 }
 246                         }
 247                         break;
 248                 case TURNAROUND:
 249                         if (bus->mdc && bus->cnt == 2*2) {
 250                                 bus->mdio = 0;
 251                                 bus->cnt = 0;
 252
 253                                 if (bus->opc == 2) {
 254                                         bus->drive = 1;
 255                                         mdio_read_req(bus);
 256                                         bus->mdio = bus->data & 1;
 257                                 }
 258                                 bus->state = DATA;
 259                         }
 260                         break;
 261                 case DATA:
 262                         if (!bus->mdc) {
 263                                 if (bus->drive) {
 264                                         bus->mdio = !!(bus->data & (1 << 15));
 265                                         bus->data <<= 1;
 266                                 }
 267                         } else {
 268                                 if (!bus->drive) {
 269                                         bus->data <<= 1;
 270                                         bus->data |= bus->mdio;
 271                                 }
 272                                 if (bus->cnt == 16 * 2) {
 273                                         bus->cnt = 0;
 274                                         bus->state = PREAMBLE;
 275                                         if (!bus->drive)
 276                                                 mdio_write_req(bus);
 277                                         bus->drive = 0;
 278                                 }
 279                         }
 280                         break;
 281                 default:
 282                         break;
 283         }
 284 }
 285
 286 /* ETRAX-FS Ethernet MAC block starts here.  */
 287
 288 #define R_STAT            0x2c
 289 #define RW_MGM_CTRL       0x28
 290 #define FS_ETH_MAX_REGS   0x5c
 291
 292 struct fs_eth
 293 {
 294         CPUState *env;
 295         qemu_irq *irq;
 296         target_phys_addr_t base;
 297         VLANClientState *vc;
 298         uint8_t macaddr[6];
 299         int ethregs;
 300
 301         uint32_t regs[FS_ETH_MAX_REGS];
 302
 303         unsigned char rx_fifo[1536];
 304         int rx_fifo_len;
 305         int rx_fifo_pos;
 306
 307         struct etraxfs_dma_client *dma_out;
 308         struct etraxfs_dma_client *dma_in;
 309
 310         /* MDIO bus.  */
 311         struct qemu_mdio mdio_bus;
 312         /* PHY.  */
 313         struct qemu_phy phy;
 314 };
 315
 316 static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr)
 317 {
 318         struct fs_eth *eth = opaque;
 319         CPUState *env = eth->env;
 320         cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
 321                   addr, env->pc);
 322         return 0;
 323 }
 324
 325 static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
 326 {
 327         struct fs_eth *eth = opaque;
 328         D(CPUState *env = eth->env);
 329         uint32_t r = 0;
 330
 331         /* Make addr relative to this instances base.  */
 332         addr -= eth->base;
 333         switch (addr) {
 334                 case R_STAT:
 335                         /* Attach an MDIO/PHY abstraction.  */
 336                         r = eth->mdio_bus.mdio & 1;
 337                         break;
 338         default:
 339                 r = eth->regs[addr];
 340                 D(printf ("%s %x p=%x\n", __func__, addr, env->pc));
 341                 break;
 342         }
 343         return r;
 344 }
 345
 346 static void
 347 eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
 348 {
 349         struct fs_eth *eth = opaque;
 350         CPUState *env = eth->env;
 351         cpu_abort(env, "Unsupported short access. reg=%x pc=%x.\n",
 352                   addr, env->pc);
 353 }
 354
 355 static void
 356 eth_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
 357 {
 358         struct fs_eth *eth = opaque;
 359         CPUState *env = eth->env;
 360
 361         /* Make addr relative to this instances base.  */
 362         addr -= eth->base;
 363         switch (addr)
 364         {
 365                 case RW_MGM_CTRL:
 366                         /* Attach an MDIO/PHY abstraction.  */
 367                         if (value & 2)
 368                                 eth->mdio_bus.mdio = value & 1;
 369                         if (eth->mdio_bus.mdc != (value & 4))
 370                                 mdio_cycle(&eth->mdio_bus);
 371                         eth->mdio_bus.mdc = !!(value & 4);
 372                         break;
 373
 374                 default:
 375                         printf ("%s %x %x pc=%x\n",
 376                                 __func__, addr, value, env->pc);
 377                         break;
 378         }
 379 }
 380
 381 static int eth_can_receive(void *opaque)
 382 {
 383         struct fs_eth *eth = opaque;
 384         int r;
 385
 386         r = eth->rx_fifo_len == 0;
 387         if (!r) {
 388                 /* TODO: signal fifo overrun.  */
 389                 printf("PACKET LOSS!\n");
 390         }
 391         return r;
 392 }
 393
 394 static void eth_receive(void *opaque, const uint8_t *buf, int size)
 395 {
 396         struct fs_eth *eth = opaque;
 397         if (size > sizeof(eth->rx_fifo)) {
 398                 /* TODO: signal error.  */
 399         } else {
 400                 memcpy(eth->rx_fifo, buf, size);
 401                 /* +4, HW passes the CRC to sw.  */
 402                 eth->rx_fifo_len = size + 4;
 403                 eth->rx_fifo_pos = 0;
 404         }
 405 }
 406
 407 static void eth_rx_pull(void *opaque)
 408 {
 409         struct fs_eth *eth = opaque;
 410         int len;
 411         if (eth->rx_fifo_len) {
 412                 D(printf("%s %d\n", __func__, eth->rx_fifo_len));
 413 #if 0
 414                 {
 415                         int i;
 416                         for (i = 0; i < 32; i++)
 417                                 printf("%2.2x", eth->rx_fifo[i]);
 418                         printf("\n");
 419                 }
 420 #endif
 421                 len = etraxfs_dmac_input(eth->dma_in,
 422                                          eth->rx_fifo + eth->rx_fifo_pos,
 423                                          eth->rx_fifo_len, 1);
 424                 eth->rx_fifo_len -= len;
 425                 eth->rx_fifo_pos += len;
 426         }
 427 }
 428
 429 static int eth_tx_push(void *opaque, unsigned char *buf, int len)
 430 {
 431         struct fs_eth *eth = opaque;
 432
 433         D(printf("%s buf=%p len=%d\n", __func__, buf, len));
 434         qemu_send_packet(eth->vc, buf, len);
 435         return len;
 436 }
 437
 438 static CPUReadMemoryFunc *eth_read[] = {
 439         &eth_rinvalid,
 440         &eth_rinvalid,
 441         &eth_readl,
 442 };
 443
 444 static CPUWriteMemoryFunc *eth_write[] = {
 445         &eth_winvalid,
 446         &eth_winvalid,
 447         &eth_writel,
 448 };
 449
 450 void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
 451                        qemu_irq *irq, target_phys_addr_t base)
 452 {
 453         struct etraxfs_dma_client *dma = NULL;
 454         struct fs_eth *eth = NULL;
 455
 456         dma = qemu_mallocz(sizeof *dma * 2);
 457         if (!dma)
 458                 return NULL;
 459
 460         eth = qemu_mallocz(sizeof *eth);
 461         if (!eth)
 462                 goto err;
 463
 464         dma[0].client.push = eth_tx_push;
 465         dma[0].client.opaque = eth;
 466         dma[1].client.opaque = eth;
 467         dma[1].client.pull = eth_rx_pull;
 468
 469         eth->env = env;
 470         eth->base = base;
 471         eth->irq = irq;
 472         eth->dma_out = dma;
 473         eth->dma_in = dma + 1;
 474         memcpy(eth->macaddr, nd->macaddr, 6);
 475
 476         /* Connect the phy.  */
 477         tdk_init(&eth->phy);
 478         mdio_attach(&eth->mdio_bus, &eth->phy, 0x1);
 479
 480         eth->ethregs = cpu_register_io_memory(0, eth_read, eth_write, eth);
 481         cpu_register_physical_memory (base, 0x5c, eth->ethregs);
 482
 483         eth->vc = qemu_new_vlan_client(nd->vlan,
 484                                        eth_receive, eth_can_receive, eth);
 485
 486         return dma;
 487   err:
 488         qemu_free(eth);
 489         qemu_free(dma);
 490         return NULL;
 491 }